WO2020224599A1 - Integrated unit diode chip - Google Patents

Integrated unit diode chip Download PDF

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Publication number
WO2020224599A1
WO2020224599A1 PCT/CN2020/088805 CN2020088805W WO2020224599A1 WO 2020224599 A1 WO2020224599 A1 WO 2020224599A1 CN 2020088805 W CN2020088805 W CN 2020088805W WO 2020224599 A1 WO2020224599 A1 WO 2020224599A1
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Prior art keywords
integrated unit
diode
conductivity type
diode chip
axis direction
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PCT/CN2020/088805
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French (fr)
Chinese (zh)
Inventor
蒋振宇
闫春辉
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深圳第三代半导体研究院
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Publication of WO2020224599A1 publication Critical patent/WO2020224599A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Definitions

  • the invention relates to the field of semiconductor materials and device technology, especially semiconductor optoelectronic devices.
  • the first prior art is Proc.ofSPIEVol.10021100210X-12016 conference paper, as shown in Figures 1-3, where Figure 1 is a structural diagram of a vertical LED chip, in which the p-type electrode is connected to the electrode on the back, and the black part of the edge is square
  • Figure 1 is a structural diagram of a vertical LED chip, in which the p-type electrode is connected to the electrode on the back, and the black part of the edge is square
  • the frame and the 3 finger-shaped leads in the middle represent n-type electrodes, which are led out through the two large N-pad wires below. Therefore, the current diffusion of the entire chip is mainly limited by the n-type metal wire.
  • Fig. 2 shows the near-field analysis diagram of the vertical chip and the normalized current distribution diagram on the center line of the prior art 1.
  • the size of the chip is 1.2mm ⁇ 1.2mm. It can be seen from the near-field graph that the current distribution of the chip is still very uneven.
  • the area close to the n-electrode line has high light intensity and high current density, while the area far away from the n-electrode line has low light intensity and low current density.
  • the normalized distribution map shows that the area with lower current density is less than 70% of the larger area. Therefore, the LED luminous efficiency, heat dissipation and stability under high current will be severely restricted.
  • the present invention proposes a uniform light emitting device with high lumen efficiency and large lumen density output. Integrated unit diode chip.
  • the present invention provides an integrated unit diode chip.
  • the integrated unit diode chip includes a diode mesa structure.
  • the diode mesa structure includes a plurality of diode units.
  • the width of the diode unit in the y-axis direction is from the integrated unit in the y-axis direction.
  • the middle of the diode chip gradually becomes smaller toward both sides, where the y-axis direction is the width direction of the integrated unit diode chip; the connection mode of multiple diode units is parallel; the diode unit is provided with a hole structure.
  • the present invention also provides an integrated unit diode chip, including a diode mesa structure, the diode mesa structure includes a plurality of diode units, wherein the width of the diode unit along the y-axis direction in the y-axis direction from the integrated unit diode chip The middle becomes smaller toward both sides, and the y-axis direction is the width direction of the integrated unit diode chip.
  • the present invention also provides an integrated unit diode chip, which includes a diode mesa structure.
  • the diode mesa structure includes a plurality of diode units, a first conductivity type layer, a quantum well active region, a second conductivity type layer and An insulating dielectric layer, wherein the first conductivity type layer, the quantum well active region, and the second conductivity type are stacked in sequence, a trench structure is arranged between the diode units, and the width of the diode unit along the y-axis direction is in the y-axis direction From the middle of the integrated unit diode chip to both sides, it gradually becomes smaller, where the y-axis direction is the width direction of the integrated unit diode chip; the width of the trench structure between the diode units along the y-axis direction is 0.001-30 microns.
  • the integrated unit diode chip used in the present invention breaks through the limitations of the existing vertical LED technology at the three levels of light, electricity and heat through the nano-micron size structure effect.
  • the size design of the unit diode chip is controlled within the current diffusion length. Its high degree of freedom geometric optimization design method can simultaneously solve the problem of uneven current diffusion of the n-electrode and p-electrode that plagues the design of the LED unit diode chip.
  • the nano-microstructure of each diode unit, as well as the hole structure and groove structure inside the mesa can increase the effective light extraction area, thereby improving the light extraction efficiency;
  • the uniform light-emitting integrated unit diode chip size Reducing the hole structure and groove structure inside the mesa brings a larger heat dissipation area and better heat dissipation performance, which can allow the injection of super current density without affecting its stability, thereby greatly improving the unit area integration unit
  • the lumen output of the diode chip reduces the lumen cost. And through the uneven mesa structure design, ultra-uniform current distribution, heat distribution, wavelength distribution, and narrow half-height high-quality LED light source are obtained.
  • FIG. 1 is a structure diagram of a diode unit in the prior art
  • Fig. 2 is a structure diagram of a diode unit in the prior art
  • Embodiment 3 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 1 of the present invention.
  • Embodiment 4 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 1 of the present invention.
  • FIG. 5 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 1 of the present invention.
  • FIG. 6 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 2 of the present invention.
  • FIG. 7 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 2 of the present invention.
  • FIG. 8 is a schematic diagram of a uniformly emitting integrated unit diode chip provided by Embodiment 2 of the present invention.
  • Second conductivity type electrode 1 insulating dielectric layer 2, second conductivity type layer 3, quantum well active region (MQWs) 4, first conductivity type layer 5, diode mesa structure 6, trench structure 7, diode unit 8.
  • the second conductive type pad 9 the hole structure 10, the reflector 11, the protective metal layer 12, the substrate 13, and the back electrode 14.
  • embodiments of the present invention provide an integrated unit diode chip with uniform light emission with high lumen efficiency and large lumen density output.
  • This embodiment provides three uniformly emitting integrated unit diode chips, as shown in FIGS. 3-5, including a second conductivity type electrode 1, a diode mesa structure 6 on the first conductivity type electrode, and a trench structure 7 ,The second conductivity type pad 9.
  • the diode mesa structure includes a plurality of diode units 8 arranged in a geometric shape, the diode units are connected in parallel, and the area of the mesa structure is determined according to the current diffusion length.
  • the second conductivity type electrode 1 is an n electrode
  • the second conductivity type pad 9 is an n pad.
  • the diode mesa structure includes 56 square diode cells in 6 rows and a trench structure 7, which is located between the diode cells.
  • the diode units are uniformly distributed in the mesa structure, and the length of the diode units along the x-axis direction is 10 nanometers to 100 nanometers.
  • the length of each row of diode units along the x-axis direction starting from being close to the second conductivity type pad is unequal or equal. When they are not equal, define their lengths as L 0 , L 1 , L 2 , L 3 ...L n , where the diode unit width satisfies L 0 >L 1 >L 2 >L 3 >...>L n .
  • the length of the diode unit in the x-axis direction is 2000 microns; the length of the diode unit in the x-axis direction is 100 microns; in other preferred embodiments, the length of the diode unit in the x-axis direction is 10 microns; in other preferred implementations In the example, the length of the diode in the x-axis direction is 1 micron.
  • the diode mesa structure includes 6 rows of 16 squares of equal size and 40 two types of rectangular diode units with equal lengths and different widths and a trench structure 7, and the trench structure is located between the diode units.
  • the diode units in each row have the same size, the diode units are all distributed in the mesa structure, and the width of each diode unit along the y-axis direction is 10 nm-100 nm.
  • the diode unit starts from the middle position, and the width along the y-axis direction is unequal or equal.
  • the width of the diode unit in the y-axis direction is 100 microns; in other preferred embodiments, the width of the diode unit in the y-axis direction is 10 microns; in other preferred embodiments, the width of the diode unit in the y-axis direction is 1 micron.
  • the diode mesa structure includes 56 square diode cells in 6 rows and a trench structure 7, which is located between the diode cells.
  • the diode units are uniformly distributed in the mesa structure, and the length of the diode units along the x-axis direction is 10 nanometers to 100 nanometers.
  • the widths of the trenches along the y-axis between the diode units are equal or unequal.
  • the widths are defined as Lq 0 , Lq 1 , Lq 2 , Lq 3 , ... Lq n , and the widths can be equal proportions.
  • the width of the trench is 0.001- Within 30 microns.
  • This embodiment provides three arrangements of diode mesa structures.
  • the size, number, shape, and arrangement of the diode units on the diode mesa structure are selected according to the current diffusion length and other chip performance, so that the integrated unit diode chip with uniform light emission It has the best current diffusion and heat dissipation performance and improves the current density injected by the chip.
  • the width along the y-axis direction is gradually reduced to make the current spread more uniformly than when the width is equal, so that the current injection, light emission, heat dissipation and wavelength are more uniform.
  • This embodiment provides two uniformly emitting integrated unit diode chips, as shown in Figures 6-7, including a second conductivity type electrode 1, and a diode mesa structure 6 located on the first conductivity type electrode is second conductive Type pad 9.
  • the diode mesa structure includes a plurality of diode units 8 arranged in a geometric shape, the diode units are connected in parallel, and the area of the mesa structure is determined according to the current diffusion length.
  • the second conductivity type electrode 1 is an n electrode
  • the second conductivity type pad 9 is an n pad.
  • the diode mesa includes 6 rows of 26 square diode cells of equal size and a trench structure 7, each diode cell having a width of 1 micron to 100 micrometers along the y-axis direction, and a diode with a trench structure
  • the units are distributed on the left side of the mesa structure, and on the right side of the mesa structure, only the electrode wires are laid to form 8 rectangular diode units of equal size.
  • one hole unit is distributed on each of the 6 non-uniform and asymmetrically distributed diode units.
  • the hole unit is circular, and the diameter of the hole unit is 0.001 ⁇ m to 20 ⁇ m.
  • the shape of the hole unit can also be a triangle, a square, a rectangle, a pentagon, a hexagon, a circle, and other arbitrary defined shapes, and is not limited to the shape shown in FIG. 6.
  • the diode mesa structure includes 6 rows of 37 diode units, and each diode unit has a width of 1 micrometer to 100 micrometers along the y-axis direction, and the diode units are arranged in a sharp right angle.
  • the diode unit may be in a fan-shaped distribution.
  • the diode unit has a width of 10 nanometers along the y-axis direction, and in other preferred embodiments, the diode unit has a width of 100 nanometers along the y-axis direction.
  • the diode mesa structure also includes an insulating dielectric layer 2, a second conductivity type layer 3, quantum well active regions (MQWs) 4, a first conductivity type layer 5, a mirror 11, a protective metal layer 12, and a lining Bottom 13, back electrode 14.
  • the trench depth of the diode unit reaches the p-GaN layer, and the trench depth of the diode unit can also reach the n-GaN layer or the quantum well active region, which is not limited to that shown in FIG. 8.
  • the uniform light-emitting integrated unit diode chip structure design can flexibly change the size and shape of the diode mesa structure, obtain the best current diffusion and heat dissipation performance under the specified operating current, and greatly improve the injection current density of the chip, thereby Increase the lumen output per unit area.
  • the length design of the diode unit of the present invention is controlled within the current diffusion length.
  • the optimized geometric design with a certain degree of freedom can further improve the light extraction efficiency, and can simultaneously solve the n-type electrode and p The problem of uneven current diffusion of the type electrode, resulting in higher photoelectric conversion efficiency/lumens efficiency.
  • each diode unit of the present invention increases the light exit area of the sidewall, thereby improving the light extraction efficiency.
  • the design of the uniformly luminous integrated unit diode chip of the present invention can realize ultra-uniform current injection, better wavelength uniformity, narrower half-height width of the emission spectrum, especially in the backlight display and other aspects of the wavelength uniformity and Applications with higher narrow half-width requirements have more prominent performance advantages.
  • the uniform light-emitting integrated unit diode chip design of the present invention can achieve higher efficiency, better heat dissipation uniformity, and better device stability.
  • the uniformly emitting integrated unit diode chip of the present invention is suitable for LED products of various colors such as UVC, UVA, UVB, violet, blue, green, yellow, red, infrared, etc., and can be used for LED lighting, backlighting, Display, plant lighting, medical and other semiconductor light-emitting device applications.

Abstract

An integrated unit diode chip. The integrated unit diode chip comprises a diode mesa structure (6), and the diode mesa structure (6) comprises a plurality of diode units (8), wherein the width, in the y-axis direction, of each diode unit (8) gradually decreases, in the y-axis direction, from the middle to both sides of the integrated unit diode chip, and the y-axis direction is the width direction of the integrated unit diode chip; the way in which the plurality of diode units (8) are connected is parallel connection; and each diode unit (8) is provided with a hole structure (10). The lumen output per unit of area of an integrated unit diode chip is improved, and lumen cost is reduced.

Description

一种集成单元二极管芯片Integrated unit diode chip 【技术领域】【Technical Field】
本发明涉及半导体材料和器件工艺领域，特别是半导体光电器件。The invention relates to the field of semiconductor materials and device technology, especially semiconductor optoelectronic devices.
【背景技术】【Background technique】
常规的垂直结构LED芯片中，电流扩散主要依靠n电极侧，有电极引线型引线或钻孔型的引线，但总体电流扩散仍不均匀，导致发光效率的损失，散热也不均匀，从而影响单元二极管芯片的效率和稳定性。从而限制了垂直大功率LED芯片提供单位面积流明输出更高的产品。电流扩散的不均匀、热扩散的不均匀和光提取的不均匀，导致其在流明效率、流明密度输出、流明成本三个重要的参数上有极大的局限性，目前市场上的垂直LED芯片技术无法提供有效的解决方案。In conventional LED chips with a vertical structure, current diffusion mainly relies on the n-electrode side, with electrode-leaded leads or drilled leads, but the overall current spread is still uneven, resulting in the loss of luminous efficiency and uneven heat dissipation, which affects the unit The efficiency and stability of the diode chip. This limits the vertical high-power LED chip to provide products with higher lumen output per unit area. The uneven current diffusion, the uneven thermal diffusion and the uneven light extraction result in great limitations in the three important parameters of lumen efficiency, lumen density output, and lumen cost. The current vertical LED chip technology on the market Cannot provide an effective solution.
现有技术一为Proc.ofSPIEVol.10021100210X-12016会议论文，如图1-3所示，其中，图1为垂直LED芯片的结构图，其中p型电极与背面的电极相连，黑色部分边缘的方框与中间3根手指型引线代表了n型电极，通过下方的两个大的N-pad打线引出。因此整个芯片的电流扩散，主要为n型金属线所限制。The first prior art is Proc.ofSPIEVol.10021100210X-12016 conference paper, as shown in Figures 1-3, where Figure 1 is a structural diagram of a vertical LED chip, in which the p-type electrode is connected to the electrode on the back, and the black part of the edge is square The frame and the 3 finger-shaped leads in the middle represent n-type electrodes, which are led out through the two large N-pad wires below. Therefore, the current diffusion of the entire chip is mainly limited by the n-type metal wire.
图2展示了现有技术一的垂直芯片的近场分析图和中线上归一化的电流分布图，芯片的尺寸为1.2mm×1.2mm。近场图中可见，芯片的电流分布仍然十分不均匀，靠近n电极线的区域光强很大，电流密度大，而远离n电极线的区域光强较小，电流密度小。归一化的分布图显示，电流密度较小的区域不到较大区域的70％。因此，大电流下的LED光效、散热和稳定性都会受到严重的限制。Fig. 2 shows the near-field analysis diagram of the vertical chip and the normalized current distribution diagram on the center line of the prior art 1. The size of the chip is 1.2mm×1.2mm. It can be seen from the near-field graph that the current distribution of the chip is still very uneven. The area close to the n-electrode line has high light intensity and high current density, while the area far away from the n-electrode line has low light intensity and low current density. The normalized distribution map shows that the area with lower current density is less than 70% of the larger area. Therefore, the LED luminous efficiency, heat dissipation and stability under high current will be severely restricted.
【发明内容】[Content of the invention]
本发明为解决现有技术存在的二极管结构流明效率、流明密度输出、流明成本三个重要的参数上有极大局限性的技术问题，提出一种流明效率高、流明密度输出大的均匀发光的集成单元二极管芯片。In order to solve the technical problems that the existing technology of the diode structure has great limitations on the three important parameters of lumen efficiency, lumen density output, and lumen cost, the present invention proposes a uniform light emitting device with high lumen efficiency and large lumen density output. Integrated unit diode chip.
为实现上述目的，本发明提供一种集成单元二极管芯片，集成单元 二极管芯片包括二极管台面结构，二极管台面结构包括多个二极管单元，其中二极管单元沿y轴方向的宽度在y轴方向上从集成单元二极管芯片的中间往两边逐渐变小，其中y轴方向为集成单元二极管芯片的宽度方向；多个二极管单元的连接方式为并联；二极管单元上设置有孔结构。To achieve the above objective, the present invention provides an integrated unit diode chip. The integrated unit diode chip includes a diode mesa structure. The diode mesa structure includes a plurality of diode units. The width of the diode unit in the y-axis direction is from the integrated unit in the y-axis direction. The middle of the diode chip gradually becomes smaller toward both sides, where the y-axis direction is the width direction of the integrated unit diode chip; the connection mode of multiple diode units is parallel; the diode unit is provided with a hole structure.
为实现上述目的，本发明还提供一种集成单元二极管芯片，包括二极管台面结构，二极管台面结构包括多个二极管单元，其中二极管单元沿y轴方向的宽度在y轴方向上从集成单元二极管芯片的中间往两边逐渐变小，其中y轴方向为集成单元二极管芯片的宽度方向。To achieve the above objective, the present invention also provides an integrated unit diode chip, including a diode mesa structure, the diode mesa structure includes a plurality of diode units, wherein the width of the diode unit along the y-axis direction in the y-axis direction from the integrated unit diode chip The middle becomes smaller toward both sides, and the y-axis direction is the width direction of the integrated unit diode chip.
为实现上述目的，本发明还提供一种集成单元二极管芯片，其中，包括二极管台面结构，二极管台面结构包括多个二极管单元、第一导电类型层、量子阱有源区、第二导电类型层和绝缘介质层，其中，第一导电类型层、量子阱有源区、第二导电类型依次层叠设置，二极管单元之间设置有沟槽结构，其中二极管单元沿y轴方向的宽度在y轴方向上从集成单元二极管芯片的中间往两边逐渐变小，其中y轴方向为集成单元二极管芯片的宽度方向；二极管单元之间的沟槽结构沿y轴方向的宽度为0.001-30微米。To achieve the above objective, the present invention also provides an integrated unit diode chip, which includes a diode mesa structure. The diode mesa structure includes a plurality of diode units, a first conductivity type layer, a quantum well active region, a second conductivity type layer and An insulating dielectric layer, wherein the first conductivity type layer, the quantum well active region, and the second conductivity type are stacked in sequence, a trench structure is arranged between the diode units, and the width of the diode unit along the y-axis direction is in the y-axis direction From the middle of the integrated unit diode chip to both sides, it gradually becomes smaller, where the y-axis direction is the width direction of the integrated unit diode chip; the width of the trench structure between the diode units along the y-axis direction is 0.001-30 microns.
本发明所采用的集成单元二极管芯片，通过纳微米尺寸结构效应，在光、电、热三个层面突破现有垂直LED技术的局限性。单元二极管芯片的尺寸设计控制在电流扩散长度以内，其较高自由度的几何优化设计方式，可同时解决困扰LED单元二极管芯片设计的n-电极和p-电极电流扩散不均匀的问题，从而得到更高的光电转换效率/流明效率；每个二极管单元的纳米微结构，以及台面内部的孔结构和沟槽结构可增加有效出光面积，从而提升光萃取效率；均匀发光的集成单元二极管芯片尺寸的缩小和台面内部的孔结构及沟槽结构，带来更大的散热面积，具备更佳的散热性能，可以允许超大电流密度的注入而不影响其稳定性，从而极大的提高单位面积集成单元二极管芯片的流明输出，降低流明成本。并且通过不均匀的台面结构设计，获得超均匀的电流分布，热分布，波长分布，以及窄半高的高质量LED光源。The integrated unit diode chip used in the present invention breaks through the limitations of the existing vertical LED technology at the three levels of light, electricity and heat through the nano-micron size structure effect. The size design of the unit diode chip is controlled within the current diffusion length. Its high degree of freedom geometric optimization design method can simultaneously solve the problem of uneven current diffusion of the n-electrode and p-electrode that plagues the design of the LED unit diode chip. Higher photoelectric conversion efficiency/lumens efficiency; the nano-microstructure of each diode unit, as well as the hole structure and groove structure inside the mesa can increase the effective light extraction area, thereby improving the light extraction efficiency; the uniform light-emitting integrated unit diode chip size Reducing the hole structure and groove structure inside the mesa brings a larger heat dissipation area and better heat dissipation performance, which can allow the injection of super current density without affecting its stability, thereby greatly improving the unit area integration unit The lumen output of the diode chip reduces the lumen cost. And through the uneven mesa structure design, ultra-uniform current distribution, heat distribution, wavelength distribution, and narrow half-height high-quality LED light source are obtained.
【附图说明】【Explanation of drawings】
图1是现有技术的二极管单元结构图；FIG. 1 is a structure diagram of a diode unit in the prior art;
图2是现有技术的二极管单元结构图；Fig. 2 is a structure diagram of a diode unit in the prior art;
图3是本发明实施例1提供的均匀发光的集成单元二极管芯片的俯视图；3 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 1 of the present invention;
图4是本发明实施例1提供的均匀发光的集成单元二极管芯片的俯视图；4 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 1 of the present invention;
图5是本发明实施例1提供的均匀发光的集成单元二极管芯片的俯视图；5 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 1 of the present invention;
图6是本发明实施例2提供的均匀发光的集成单元二极管芯片的俯视图；6 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 2 of the present invention;
图7是本发明实施例2提供的均匀发光的集成单元二极管芯片的俯视图；FIG. 7 is a top view of a uniformly emitting integrated unit diode chip provided by Embodiment 2 of the present invention;
图8是本发明实施例2提供的均匀发光的集成单元二极管芯片的示意图；FIG. 8 is a schematic diagram of a uniformly emitting integrated unit diode chip provided by Embodiment 2 of the present invention;
第二导电类型电极1，绝缘介质层2，第二导电类型层3，量子阱有源区(MQWs)4，第一导电类型层5，二级管台面结构6，沟槽结构7，二极管单元8，第二导电类型焊盘9，孔结构10，反射镜11，保护金属层12，衬底13，背面电极14。Second conductivity type electrode 1, insulating dielectric layer 2, second conductivity type layer 3, quantum well active region (MQWs) 4, first conductivity type layer 5, diode mesa structure 6, trench structure 7, diode unit 8. The second conductive type pad 9, the hole structure 10, the reflector 11, the protective metal layer 12, the substrate 13, and the back electrode 14.
【具体实施方式】【Detailed ways】
下面结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护范围。The following describes the technical solutions in the embodiments of the present invention clearly and completely with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
鉴于现有的二极管结构流明效率、流明密度输出、流明成本三个重要的参数上极大的局限性，本发明实施例提供一种流明效率高、流明密度输出大的均匀发光的集成单元二极管芯片，以下结合附图对本发明进 行详细说明。In view of the extreme limitations of the existing diode structure on the three important parameters of lumen efficiency, lumen density output, and lumen cost, embodiments of the present invention provide an integrated unit diode chip with uniform light emission with high lumen efficiency and large lumen density output. The following describes the present invention in detail with reference to the accompanying drawings.
实施例1Example 1
本实施例提供了3种均匀发光的集成单元二极管芯片，如图3-5所示，包括第二导电类型电极1，位于所述第一导电类型电极上的二极管台面结构6，沟槽结构7，第二导电类型焊盘9。所述二极管台面结构包括多个二极管单元8，所述多个二极管单元呈几何形状排列，二极管单元连接方式为并联，所述台面结构面积根据电流扩散长度确定。其中第二导电类型电极1为n电极，第二导电类型焊盘9为n焊盘。This embodiment provides three uniformly emitting integrated unit diode chips, as shown in FIGS. 3-5, including a second conductivity type electrode 1, a diode mesa structure 6 on the first conductivity type electrode, and a trench structure 7 ,The second conductivity type pad 9. The diode mesa structure includes a plurality of diode units 8 arranged in a geometric shape, the diode units are connected in parallel, and the area of the mesa structure is determined according to the current diffusion length. The second conductivity type electrode 1 is an n electrode, and the second conductivity type pad 9 is an n pad.
如图3所示，所述二极管台面结构包括6行共56个正方形二极管单元和沟槽结构7，沟槽结构位于二极管单元之间。所述二极管单元均匀分布在台面结构内，二极管单元沿x轴方向长度为10纳米-100纳米。每行二极管单元从靠近第二导电类型焊盘开始沿x轴方向长度大小不等或相等。当不等时，定义其长度分别为L 0，L 1，L 2，L 3…L n，其中二极管单元宽度满足L 0>L 1>L 2>L 3>…>L n。 As shown in FIG. 3, the diode mesa structure includes 56 square diode cells in 6 rows and a trench structure 7, which is located between the diode cells. The diode units are uniformly distributed in the mesa structure, and the length of the diode units along the x-axis direction is 10 nanometers to 100 nanometers. The length of each row of diode units along the x-axis direction starting from being close to the second conductivity type pad is unequal or equal. When they are not equal, define their lengths as L 0 , L 1 , L 2 , L 3 …L n , where the diode unit width satisfies L 0 >L 1 >L 2 >L 3 >…>L n .
在一些优选的实施例中，二极管单元x轴方向长度为2000微米；二极管单元x轴方向长度为100微米；在另一些优选实施例中，二极管单元x轴方向长度10微米；在另一些优选实施例中，二极管x轴方向长度为1微米。In some preferred embodiments, the length of the diode unit in the x-axis direction is 2000 microns; the length of the diode unit in the x-axis direction is 100 microns; in other preferred embodiments, the length of the diode unit in the x-axis direction is 10 microns; in other preferred implementations In the example, the length of the diode in the x-axis direction is 1 micron.
如图4所示，所述二极管台面结构包括6行共16个大小相等的正方形以及40个长度相等宽度不等的两种长方形二极管单元和沟槽结构7，沟槽结构位于二极管单元之间。每一行的二极管单元大小相等，所述二极管单元均分布在台面结构内，每个二极管单元沿y轴方向宽度为10纳米-100纳米。二极管单元从中间位置开始，沿y轴方向宽度大小不等或相等。当不等时，定义其宽度从中间向两侧分别为W 0，W 1，W 2，W 3…W m；其中二极管单元宽度满足W 0>W 1>W 2>W 3>…>W m。 As shown in FIG. 4, the diode mesa structure includes 6 rows of 16 squares of equal size and 40 two types of rectangular diode units with equal lengths and different widths and a trench structure 7, and the trench structure is located between the diode units. The diode units in each row have the same size, the diode units are all distributed in the mesa structure, and the width of each diode unit along the y-axis direction is 10 nm-100 nm. The diode unit starts from the middle position, and the width along the y-axis direction is unequal or equal. When unequal, define its width from the middle to the two sides as W 0 , W 1 , W 2 , W 3 …W m, respectively ; the diode unit width satisfies W 0 >W 1 >W 2 >W 3 >…>W m .
在一些优选的实施例中，二极管单元沿y轴方向宽度为100微米；在另一些优选实施例中，二极管单元y轴方向宽度10微米；在另一些优选实施例中，二极管y轴方向宽度为1微米。In some preferred embodiments, the width of the diode unit in the y-axis direction is 100 microns; in other preferred embodiments, the width of the diode unit in the y-axis direction is 10 microns; in other preferred embodiments, the width of the diode unit in the y-axis direction is 1 micron.
如图5所示，所述二极管台面结构包括6行共56个正方形二极管 单元和沟槽结构7，沟槽结构位于二极管单元之间。所述二极管单元均匀分布在台面结构内，二极管单元沿x轴方向长度为10纳米-100纳米。二极管单元之间沿y轴方向的沟槽宽度相等或不等，定义其宽度分别为Lq 0，Lq 1，Lq 2，Lq 3，…Lq n，宽度可等比例，沟槽的宽度在0.001-30微米的范围之内。 As shown in FIG. 5, the diode mesa structure includes 56 square diode cells in 6 rows and a trench structure 7, which is located between the diode cells. The diode units are uniformly distributed in the mesa structure, and the length of the diode units along the x-axis direction is 10 nanometers to 100 nanometers. The widths of the trenches along the y-axis between the diode units are equal or unequal. The widths are defined as Lq 0 , Lq 1 , Lq 2 , Lq 3 , ... Lq n , and the widths can be equal proportions. The width of the trench is 0.001- Within 30 microns.
本实施例提供了3种二极管台面结构排布方式，根据电流扩散长度确定及其他芯片性能选择二极管台面结构上的二极管单元尺寸，数量、形状、及排布方式，使均匀发光的集成单元二极管芯片具备最佳的电流扩散和散热性能，提高芯片注入的电流密度。二极管单元从中间位置开始，沿y轴方向的宽度逐渐缩小使得电流相较于相等宽度时扩散更加均匀，从而使得电流注入、发光、散热和波长更加均匀。This embodiment provides three arrangements of diode mesa structures. The size, number, shape, and arrangement of the diode units on the diode mesa structure are selected according to the current diffusion length and other chip performance, so that the integrated unit diode chip with uniform light emission It has the best current diffusion and heat dissipation performance and improves the current density injected by the chip. Starting from the middle position of the diode unit, the width along the y-axis direction is gradually reduced to make the current spread more uniformly than when the width is equal, so that the current injection, light emission, heat dissipation and wavelength are more uniform.
实施例2Example 2
本实施例提供了2种均匀发光的集成单元二极管芯片，如图所示6-7所示，包括第二导电类型电极1，位于所述第一导电类型电极上的二极管台面结构6第二导电类型焊盘9。所述二极管台面结构包括多个二极管单元8，所述多个二极管单元呈几何形状排列，二极管单元连接方式为并联，所述台面结构面积根据电流扩散长度确定。其中第二导电类型电极1为n电极，第二导电类型焊盘9为n焊盘。This embodiment provides two uniformly emitting integrated unit diode chips, as shown in Figures 6-7, including a second conductivity type electrode 1, and a diode mesa structure 6 located on the first conductivity type electrode is second conductive Type pad 9. The diode mesa structure includes a plurality of diode units 8 arranged in a geometric shape, the diode units are connected in parallel, and the area of the mesa structure is determined according to the current diffusion length. The second conductivity type electrode 1 is an n electrode, and the second conductivity type pad 9 is an n pad.
如图6所示，所述二极管台面包括6行26个大小相等的正方形二极管单元和沟槽结构7，每个二极管单元沿y轴方向宽度为1微米-100微米，带有沟槽结构的二极管单元均分布在台面结构的左侧，所述台面结构右侧仅由电极线铺设形成8个大小相等的长方形二极管单元。其中，6个不均匀非对称分布的所述二极管单元上各分布1个孔单元。孔单元为圆形，孔单元直径为0.001微米～20微米。孔单元形状还可以为三角形、正方形、长方形、五边形、六边形、圆形、以及其它任意定义形状，并不局限于图6中展示的形状。As shown in Figure 6, the diode mesa includes 6 rows of 26 square diode cells of equal size and a trench structure 7, each diode cell having a width of 1 micron to 100 micrometers along the y-axis direction, and a diode with a trench structure The units are distributed on the left side of the mesa structure, and on the right side of the mesa structure, only the electrode wires are laid to form 8 rectangular diode units of equal size. Wherein, one hole unit is distributed on each of the 6 non-uniform and asymmetrically distributed diode units. The hole unit is circular, and the diameter of the hole unit is 0.001 μm to 20 μm. The shape of the hole unit can also be a triangle, a square, a rectangle, a pentagon, a hexagon, a circle, and other arbitrary defined shapes, and is not limited to the shape shown in FIG. 6.
如图7所示，所述二极管台面结构包括6行共37个二极管单元，每个二极管单元沿y轴方向宽度为1微米-100微米，所述二极管单元呈向右尖角型排布。当所述电极线为曲线分布时，该二极管单元可以为扇 形分布方式。As shown in FIG. 7, the diode mesa structure includes 6 rows of 37 diode units, and each diode unit has a width of 1 micrometer to 100 micrometers along the y-axis direction, and the diode units are arranged in a sharp right angle. When the electrode lines are distributed in a curve, the diode unit may be in a fan-shaped distribution.
在一些优选的实施例中，二极管单元沿y轴方向宽度为10纳米，在另一些优选实施例中，二极管单元沿y轴方向宽度为100纳米。In some preferred embodiments, the diode unit has a width of 10 nanometers along the y-axis direction, and in other preferred embodiments, the diode unit has a width of 100 nanometers along the y-axis direction.
如图8所示，二极管台面结构还包括绝缘介质层2，第二导电类型层3，量子阱有源区(MQWs)4，第一导电类型层5，反射镜11，保护金属层12，衬底13，背面电极14。二极管单元的沟槽深度至p-GaN层，二极管单元的沟槽深度还可至n-GaN层或量子阱有源区，并不局限于图8所示。As shown in Figure 8, the diode mesa structure also includes an insulating dielectric layer 2, a second conductivity type layer 3, quantum well active regions (MQWs) 4, a first conductivity type layer 5, a mirror 11, a protective metal layer 12, and a lining Bottom 13, back electrode 14. The trench depth of the diode unit reaches the p-GaN layer, and the trench depth of the diode unit can also reach the n-GaN layer or the quantum well active region, which is not limited to that shown in FIG. 8.
由于二极管芯片的电流扩散长度与电流密度的平方根成反比，因此在大电流的注入下，电流的扩散长度更短，导致芯片的电流扩散更加的不均匀，效率更低，散热更加困难。采用均匀发光的集成单元二极管芯片结构设计，可以灵活的改变二极管台面结构的尺寸、形状，可以获得指定工作电流下最佳的电流扩散和散热性能，并极大的提升芯片的注入电流密度，从而提升单位面积的流明输出。Since the current diffusion length of the diode chip is inversely proportional to the square root of the current density, under the injection of large current, the current diffusion length is shorter, resulting in more uneven current diffusion of the chip, lower efficiency, and more difficult heat dissipation. The uniform light-emitting integrated unit diode chip structure design can flexibly change the size and shape of the diode mesa structure, obtain the best current diffusion and heat dissipation performance under the specified operating current, and greatly improve the injection current density of the chip, thereby Increase the lumen output per unit area.
本发明的实施例提供的均匀发光的集成单元二极管芯片，具有以下有益效果：The uniformly emitting integrated unit diode chip provided by the embodiment of the present invention has the following beneficial effects:
(1)本发明的二极管单元的长度设计控制在电流扩散长度以内，优化的具备一定自由度的几何设计可以更进一步的提升出光效率，可同时解决困扰LED单元二极管芯片设计的n型电极和p型电极电流扩散不均匀的问题，从而得到更高的光电转换效率/流明效率。(1) The length design of the diode unit of the present invention is controlled within the current diffusion length. The optimized geometric design with a certain degree of freedom can further improve the light extraction efficiency, and can simultaneously solve the n-type electrode and p The problem of uneven current diffusion of the type electrode, resulting in higher photoelectric conversion efficiency/lumens efficiency.
(2)本发明的每个二极管单元的微纳结构增加侧壁的出光面积，从而提升光萃取效率。(2) The micro-nano structure of each diode unit of the present invention increases the light exit area of the sidewall, thereby improving the light extraction efficiency.
(3)本发明的均匀发光的集成单元二极管芯片的优化，带来更大的侧壁散热面积，具备更佳的散热性能，允许超大电流密度的注入而不影响其稳定性，极大的提高单位面积单元二极管芯片的流明输出，降低流明成本。(3) The optimization of the uniform light-emitting integrated unit diode chip of the present invention brings a larger sidewall heat dissipation area, better heat dissipation performance, and allows the injection of super current density without affecting its stability, which greatly improves The lumen output of the diode chip per unit area reduces the lumen cost.
(4)本发明的均匀发光的集成单元二极管芯片的设计，可以实现超均匀的电流注入，更好的波长均匀性、发光谱更窄的半高宽，尤其在背光显示等对波长均匀性和窄半宽要求更高的应用领域具有更为突出 的性能优势。(4) The design of the uniformly luminous integrated unit diode chip of the present invention can realize ultra-uniform current injection, better wavelength uniformity, narrower half-height width of the emission spectrum, especially in the backlight display and other aspects of the wavelength uniformity and Applications with higher narrow half-width requirements have more prominent performance advantages.
(5)本发明的均匀发光的集成单元二极管芯片的设计，可以获得更高的效率、更好的散热均匀性和更好的器件稳定性。(5) The uniform light-emitting integrated unit diode chip design of the present invention can achieve higher efficiency, better heat dissipation uniformity, and better device stability.
(6)本发明的均匀发光的集成单元二极管芯片适于UVC、UVA、UVB、紫光、蓝光、绿光、黄光、红光、红外光等各色系的LED产品，可用于LED照明，背光，显示，植物照明，医疗和其它半导体发光器件应用领域。(6) The uniformly emitting integrated unit diode chip of the present invention is suitable for LED products of various colors such as UVC, UVA, UVB, violet, blue, green, yellow, red, infrared, etc., and can be used for LED lighting, backlighting, Display, plant lighting, medical and other semiconductor light-emitting device applications.
以上所述的具体实施例，对本发明的目的，技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本发明的具体实施例，并不用于限定本发明的保护范围，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。The specific embodiments described above further describe the purpose, technical solutions and beneficial effects of the present invention in further detail. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the protection of the present invention. Scope, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims (20)

  1. 一种集成单元二极管芯片，其中，所述集成单元二极管芯片包括二极管台面结构，所述二极管台面结构包括多个二极管单元，其中所述二极管单元沿y轴方向的宽度在所述y轴方向上从所述集成单元二极管芯片的中间往两边逐渐变小，其中所述y轴方向为所述集成单元二极管芯片的宽度方向；An integrated unit diode chip, wherein the integrated unit diode chip includes a diode mesa structure, the diode mesa structure includes a plurality of diode units, wherein the width of the diode unit along the y-axis direction is from The middle of the integrated unit diode chip gradually becomes smaller toward both sides, wherein the y-axis direction is the width direction of the integrated unit diode chip;
    所述多个二极管单元的连接方式为并联；The connection mode of the plurality of diode units is parallel;
    所述二极管单元上设置有孔结构。A hole structure is provided on the diode unit.
  2. 根据权利要求1所述的集成单元二极管芯片，其中，所述集成单元二极管芯片包括第二导电类型焊盘，所述多个二极管单元沿x轴方向的长度从靠近所述第二导电类型焊盘开始沿所述x轴方向逐渐变小，其中所述x轴方向为所述集成单元二极管芯片的长度方向。The integrated unit diode chip of claim 1, wherein the integrated unit diode chip includes a second conductivity type pad, and the length of the plurality of diode units along the x-axis direction is from close to the second conductivity type pad It starts to gradually decrease along the x-axis direction, where the x-axis direction is the length direction of the integrated unit diode chip.
  3. 根据权利要求2所述的集成单元二极管芯片，其中，所述第二导电类型焊盘沿所述x轴方向靠近所述集成单元二极管芯片的边缘设置，且沿所述y轴方向相对所述集成单元二极管芯片居中设置。The integrated unit diode chip according to claim 2, wherein the second conductivity type pad is disposed close to the edge of the integrated unit diode chip along the x-axis direction, and is opposite to the integrated unit diode chip along the y-axis direction. The unit diode chip is placed in the center.
  4. 根据权利要求2所述的集成单元二极管芯片，其中，所述第二导电类型焊盘为n焊盘。The integrated unit diode chip of claim 2, wherein the second conductivity type pad is an n pad.
  5. 根据权利要求1所述的集成单元二极管芯片，其中，所述集成单元二极管芯片进一步包括第一导电类型电极和第二导电类型电极，所述二极管台面结构位于所述第一导电类型电极上。The integrated unit diode chip of claim 1, wherein the integrated unit diode chip further comprises a first conductivity type electrode and a second conductivity type electrode, and the diode mesa structure is located on the first conductivity type electrode.
  6. 根据权利要求5所述的集成单元二极管芯片，其中，所述第二导电类型电极为n电极。The integrated unit diode chip of claim 5, wherein the second conductivity type electrode is an n-electrode.
  7. 根据权利要求5所述的集成单元二极管芯片，其中，所述二极管台面结构包括第一导电类型层、量子阱有源区、第二导电类型层和绝缘介质层，所述第一导电类型层、量子阱有源区、第二导电类型依次层叠设置，所述二极管单元之间设置有沟槽结构，所述绝缘介质层从所述沟槽结构内延伸至所述第二导电类型层远离所述量子阱有源区的一侧，所述第二导电类型电极设置于所述绝缘介质层上，且从所述沟槽结构内 延伸至所述第二导电类型层远离所述量子阱有源区的一侧，并接触所述第二导电类型层。The integrated unit diode chip of claim 5, wherein the diode mesa structure includes a first conductivity type layer, a quantum well active region, a second conductivity type layer, and an insulating dielectric layer, and the first conductivity type layer, The quantum well active region and the second conductivity type are stacked in sequence, a trench structure is provided between the diode units, and the insulating dielectric layer extends from the trench structure to the second conductivity type layer away from the On one side of the quantum well active region, the second conductivity type electrode is disposed on the insulating dielectric layer and extends from the trench structure to the second conductivity type layer away from the quantum well active region , And contact the second conductivity type layer.
  8. 根据权利要求1所述的集成单元二极管芯片，其中，所述孔结构包括1个～1000000个孔单元，所述孔单元直径为0.001微米～20微米。The integrated unit diode chip of claim 1, wherein the hole structure includes 1 to 1,000,000 hole units, and the hole unit has a diameter of 0.001 μm to 20 μm.
  9. 根据权利要求8所述的集成单元二极管芯片，其中，The integrated unit diode chip of claim 8, wherein:
    所述孔单元的形状为三角形、正方形、长方形、五边形、六边形、圆形、以及其它任意定义形状。The shape of the hole unit is triangle, square, rectangle, pentagon, hexagon, circle, and other arbitrary defined shapes.
  10. 一种集成单元二极管芯片，其中，所述集成单元二极管芯片包括二极管台面结构，所述二极管台面结构包括多个二极管单元，其中所述二极管单元沿y轴方向的宽度在所述y轴方向上从所述集成单元二极管芯片的中间往两边逐渐变小，其中所述y轴方向为所述集成单元二极管芯片的宽度方向。An integrated unit diode chip, wherein the integrated unit diode chip includes a diode mesa structure, the diode mesa structure includes a plurality of diode units, wherein the width of the diode unit along the y-axis direction is from The middle of the integrated unit diode chip gradually becomes smaller toward both sides, wherein the y-axis direction is the width direction of the integrated unit diode chip.
  11. 根据权利要求10所述的集成单元二极管芯片，其中，所述集成单元二极管芯片包括第二导电类型焊盘，所述多个二极管单元沿x轴方向的长度从靠近所述第二导电类型焊盘开始沿所述x轴方向逐渐变小，其中所述x轴方向为所述集成单元二极管芯片的长度方向。The integrated unit diode chip of claim 10, wherein the integrated unit diode chip includes a second conductivity type pad, and the length of the plurality of diode units in the x-axis direction is from close to the second conductivity type pad It starts to gradually decrease along the x-axis direction, where the x-axis direction is the length direction of the integrated unit diode chip.
  12. 根据权利要求11所述的集成单元二极管芯片，其中，所述第二导电类型焊盘沿所述x轴方向靠近所述集成单元二极管芯片的边缘设置，且沿所述y轴方向相对所述集成单元二极管芯片居中设置。The integrated unit diode chip of claim 11, wherein the second conductivity type pad is disposed close to the edge of the integrated unit diode chip along the x-axis direction, and is opposite to the integrated unit diode chip along the y-axis direction. The unit diode chip is placed in the center.
  13. 根据权利要求11所述的集成单元二极管芯片，其中，所述第二导电类型焊盘为n焊盘。The integrated unit diode chip according to claim 11, wherein the second conductivity type pad is an n pad.
  14. 根据权利要求10所述的集成单元二极管芯片，其中，所述集成单元二极管芯片进一步包括第一导电类型电极和第二导电类型电极，所述二极管台面结构位于所述第一导电类型电极上。The integrated unit diode chip of claim 10, wherein the integrated unit diode chip further comprises a first conductivity type electrode and a second conductivity type electrode, and the diode mesa structure is located on the first conductivity type electrode.
  15. 根据权利要求14所述的集成单元二极管芯片，其中，所述第二导电类型电极为n电极。The integrated unit diode chip of claim 14, wherein the second conductivity type electrode is an n-electrode.
  16. 根据权利要求14所述的集成单元二极管芯片，其中，所述二极管台面结构包括第一导电类型层、量子阱有源区、第二导电类型层和 绝缘介质层，所述第一导电类型层、量子阱有源区、第二导电类型依次层叠设置，所述二极管单元之间设置有沟槽结构，所述绝缘介质层从所述沟槽结构内延伸至所述第二导电类型层远离所述量子阱有源区的一侧，所述第二导电类型电极设置于所述绝缘介质层上，且从所述沟槽结构内延伸至所述第二导电类型层远离所述量子阱有源区的一侧，并接触所述第二导电类型层。The integrated unit diode chip according to claim 14, wherein the diode mesa structure comprises a first conductivity type layer, a quantum well active region, a second conductivity type layer, and an insulating dielectric layer, the first conductivity type layer, The quantum well active region and the second conductivity type are stacked in sequence, a trench structure is provided between the diode units, and the insulating dielectric layer extends from the trench structure to the second conductivity type layer away from the On one side of the quantum well active region, the second conductivity type electrode is disposed on the insulating dielectric layer and extends from the trench structure to the second conductivity type layer away from the quantum well active region , And contact the second conductivity type layer.
  17. 根据权利要求10所述的集成单元二极管芯片，其中，所述多个二极管单元的连接方式为并联。9. The integrated unit diode chip of claim 10, wherein the connection mode of the plurality of diode units is parallel.
  18. 根据权利要求10所述的集成单元二极管芯片，其中，所述二极管单元上设置有孔结构。9. The integrated unit diode chip of claim 10, wherein a hole structure is provided on the diode unit.
  19. 根据权利要求18所述的集成单元二极管芯片，其中，所述孔结构包括1个～1000000个孔单元，所述孔单元直径为0.001微米～20微米。The integrated unit diode chip of claim 18, wherein the hole structure includes 1 to 1,000,000 hole units, and the hole unit has a diameter of 0.001 μm to 20 μm.
  20. 一种集成单元二极管芯片，其中，包括二极管台面结构，所述二极管台面结构包括多个二极管单元、第一导电类型层、量子阱有源区、第二导电类型层和绝缘介质层，其中，所述第一导电类型层、量子阱有源区、第二导电类型依次层叠设置，所述二极管单元之间设置有沟槽结构，An integrated unit diode chip, including a diode mesa structure, the diode mesa structure including a plurality of diode units, a first conductivity type layer, a quantum well active region, a second conductivity type layer, and an insulating dielectric layer, wherein The first conductivity type layer, the quantum well active region, and the second conductivity type are stacked in sequence, and a trench structure is provided between the diode units,
    其中所述二极管单元沿y轴方向的宽度在所述y轴方向上从所述集成单元二极管芯片的中间往两边逐渐变小，其中所述y轴方向为所述集成单元二极管芯片的宽度方向；Wherein, the width of the diode unit along the y-axis direction gradually decreases in the y-axis direction from the middle of the integrated unit diode chip to both sides, and the y-axis direction is the width direction of the integrated unit diode chip;
    所述二极管单元之间的所述沟槽结构沿y轴方向的宽度为0.001-30微米。The width of the trench structure between the diode units along the y-axis direction is 0.001-30 microns.
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