WO2020215206A1 - 展频电路的参数确定方法及装置、时钟展频方法及装置 - Google Patents

展频电路的参数确定方法及装置、时钟展频方法及装置 Download PDF

Info

Publication number
WO2020215206A1
WO2020215206A1 PCT/CN2019/083899 CN2019083899W WO2020215206A1 WO 2020215206 A1 WO2020215206 A1 WO 2020215206A1 CN 2019083899 W CN2019083899 W CN 2019083899W WO 2020215206 A1 WO2020215206 A1 WO 2020215206A1
Authority
WO
WIPO (PCT)
Prior art keywords
spreading
control word
frequency control
depth coefficient
spread spectrum
Prior art date
Application number
PCT/CN2019/083899
Other languages
English (en)
French (fr)
Inventor
马玉海
魏祥野
修黎明
白一鸣
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN201980000531.1A priority Critical patent/CN110214418B/zh
Priority to US16/651,511 priority patent/US11139819B2/en
Priority to PCT/CN2019/083899 priority patent/WO2020215206A1/zh
Publication of WO2020215206A1 publication Critical patent/WO2020215206A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator

Definitions

  • the embodiment of the present disclosure relates to a method for determining a parameter of a frequency spreading circuit, a method for clock spreading, a device for determining a parameter of a frequency spreading circuit, and a clock spreading device.
  • Electromagnetic interference refers to the impact of the circuit system on the surrounding circuit system through conduction or radiation. Electromagnetic interference will cause the performance of the circuit to decrease, and may even cause the entire circuit system to fail.
  • the clock signal is often the signal with the highest frequency and the steepest edge in the circuit system. Most electromagnetic interference problems are related to the high-frequency clock signal.
  • Methods to reduce electromagnetic interference include shielding, filtering, isolation, signal edge control, and printed circuit board (Printed Circuit Board, PCB) layout (for example, adding power and ground (GND) layers in the PCB).
  • PCB printed circuit board layout
  • SSCG Spread Spectrum Clock Generation
  • At least some embodiments of the present disclosure provide a method for determining a parameter of a spread spectrum circuit, including: obtaining a reference time unit and a target frequency; determining a spreading depth coefficient according to the reference time unit and the target frequency; determining the spreading frequency Whether the depth coefficient is greater than or equal to the reference spreading depth coefficient; when the spreading depth coefficient is less than the reference spreading depth coefficient, adjust the reference time unit until the corresponding spreading depth coefficient is greater than or equal to the reference spreading depth Coefficient; in the case that the spreading depth coefficient is greater than or equal to the reference spreading depth coefficient, the spreading depth coefficient is determined as the nominal spreading depth coefficient, and determined according to the nominal spreading depth coefficient Nominal frequency control word.
  • determining the spreading depth coefficient includes: determining a frequency control word according to the reference time unit and the target frequency; and determining according to the frequency control word The spreading depth coefficient.
  • determining the spreading depth coefficient according to the frequency control word includes: determining a spreading mode; according to the spreading mode and the frequency The control word determines the spreading depth coefficient.
  • the spreading mode includes boundary spreading, center spreading, upper spreading or lower spreading; when the spreading method is the When boundary spreading, the spreading depth coefficient is expressed as:
  • the spreading depth coefficient is expressed as:
  • the spreading depth coefficient is expressed as:
  • the spreading depth coefficient is expressed as:
  • ⁇ max represents the spreading depth coefficient
  • I ad is the integer part of the frequency control word
  • r ad is the decimal part of the frequency control word
  • the spreading depth coefficient is greater than or equal to the reference spreading depth coefficient, and the spreading depth coefficient is determined as the nominal spreading depth coefficient.
  • the reference time unit is determined as the nominal reference time unit
  • the nominal frequency control word corresponds to a reference frequency
  • the reference frequency is expressed as:
  • f T represents the target frequency
  • F T represents the frequency control word
  • the control word indicates the nominal frequency as: ⁇ 1 represents the nominal reference time unit.
  • Some embodiments of the present disclosure also provide a clock spreading method based on the method for determining the parameters of the spreading circuit described in any of the above embodiments, including: acquiring a reference frequency control word, wherein the reference frequency control word is based on the foregoing The nominal frequency control word obtained by the method for determining the parameters of the spread spectrum circuit in any embodiment; the target frequency control word is determined according to the reference frequency control word and the modulation parameter, wherein the target frequency control word is Time-discrete change; according to the target frequency control word, a spread spectrum output signal after spreading is generated, wherein the spread spectrum output signal corresponds to the target frequency control word.
  • the modulation parameter includes a modulation mode and a reference spreading depth coefficient
  • the reference spreading depth coefficient is the spreading circuit according to any one of the above embodiments.
  • the nominal spreading depth coefficient obtained by the parameter determination method of, the target frequency control word is expressed as:
  • F(t) represents the target frequency control word
  • F re represents the reference frequency control word
  • ⁇ re represents the reference spreading depth coefficient
  • M(t) represents the modulation function determined according to the modulation mode
  • t represents time.
  • the modulation function is the original modulation function, and the modulation function is expressed as:
  • ⁇ (t) represents the original modulation function
  • the modulation function is a compensation modulation function after compensating the original modulation function, and the modulation function is expressed as:
  • E( ⁇ (t)) represents the compensation modulation function
  • ⁇ (t) represents the original modulation function
  • the modulation parameter includes a modulation mode
  • generating a spreading output signal after spreading includes: determining a reference time unit;
  • the modulation mode determines a modulation function; based on the modulation function, the reference reference time unit and the target frequency control word, the spread spectrum output signal is determined, wherein the spread spectrum frequency of the spread spectrum output signal is expressed as :
  • f(M(t)) represents the spread frequency
  • F(t) represents the target frequency control word
  • F re represents the reference frequency control word
  • ⁇ re represents the reference spreading depth coefficient
  • M(t) represents the modulation function
  • ⁇ re represents the reference reference time unit
  • f re represents the reference frequency control The frequency corresponding to the word.
  • the modulation mode includes a triangular modulation mode, a sawtooth modulation mode, a sinusoidal modulation mode, or a random modulation mode.
  • the maximum value Fmax of the target frequency control word and the minimum value Fmin of the target frequency control word satisfy the following formula: 0 ⁇ Fmax-Fmin ⁇ 1.
  • Some embodiments of the present disclosure also provide a device for determining a parameter of a spread spectrum circuit, including: a memory for storing computer-readable instructions; a processor for running the computer-readable instructions, and the computer-readable instructions are When the processor is running, the method for determining the parameters of the spread spectrum circuit according to any of the above embodiments is executed.
  • Some embodiments of the present disclosure further provide a clock spreading device, including: a memory, configured to store computer-readable instructions; a processor, configured to run the computer-readable instructions, the computer-readable instructions being used by the processor
  • the clock spreading method according to any one of the above embodiments is executed at runtime.
  • FIG. 1 is a flowchart of a method for determining parameters of a spread spectrum circuit provided by some embodiments of the present disclosure
  • FIG. 2 is a flowchart of determining the spreading depth coefficient provided by some embodiments of the present disclosure
  • FIG. 3 is a flowchart of a clock spreading method provided by some embodiments of the present disclosure.
  • FIG. 4 is a schematic block diagram of a clock spreading circuit provided by some embodiments of the present disclosure.
  • 5A shows a schematic block diagram of a reference time unit generating sub-circuit provided by some embodiments of the present disclosure
  • Fig. 5B shows a schematic structural diagram of another reference time unit generating sub-circuit provided by some embodiments of the present disclosure
  • FIG. 6 shows a schematic diagram of K reference output signals with evenly spaced phases provided by some embodiments of the present disclosure
  • Fig. 7 shows a schematic block diagram of a spread spectrum sub-circuit provided by some embodiments of the present disclosure
  • FIG. 8 shows a schematic diagram of the working principle of a spread spectrum sub-circuit provided by some embodiments of the present disclosure
  • 9A is a schematic diagram of frequency modulation in a sinusoidal modulation mode according to some embodiments of the present disclosure.
  • FIG. 9B is a schematic diagram of frequency modulation in a triangular modulation mode according to some embodiments of the present disclosure.
  • FIG. 9C is a schematic diagram of frequency modulation in a sawtooth modulation mode according to some embodiments of the present disclosure.
  • 9D is a schematic diagram of frequency modulation in a random modulation mode provided by some embodiments of the present disclosure.
  • FIG. 10 is a schematic diagram of the distribution of the first boundary frequency, the second boundary frequency, and the reference frequency provided by some embodiments of the present disclosure
  • FIG. 11 is a schematic diagram of spectrum comparison results before and after spreading at different spreading depths according to some embodiments of the present disclosure.
  • FIG. 12 is a schematic block diagram of an apparatus for determining a parameter of a spread spectrum circuit provided by some embodiments of the present disclosure
  • FIG. 13 is a schematic block diagram of a clock spreading device provided by some embodiments of the present disclosure.
  • the frequency of the output signal of the traditional clock generator Since the frequency of the output signal of the traditional clock generator has greater uncertainty after the spread spectrum is turned on, it is generally used in the spread spectrum boundary type (the spread spectrum boundary type includes center spread, upper spread and lower spread). The scene only tends to use the lower spread spectrum for spreading, because after spreading in this way, the frequency of the signal is only modulated in a direction lower than the original frequency of the signal, which theoretically does not destroy the time constraints of the existing circuit design . It can be seen that, based on the clock spreading of the traditional clock generator, the spreading depth coefficient and spreading boundary type are restricted.
  • At least some embodiments of the present disclosure provide a method for determining a parameter of a spreading circuit, a method for clock spreading, a device for determining a parameter of a spreading circuit, and a clock spreading device.
  • the method for determining the parameters of the spread spectrum circuit includes: obtaining the reference time unit and the target frequency; determining the spread depth coefficient according to the reference time unit and the target frequency; judging whether the spread depth coefficient is greater than or equal to the reference spread depth coefficient; When the depth coefficient is less than the reference spread depth coefficient, adjust the reference time unit until the corresponding spread depth coefficient is greater than or equal to the reference spread depth coefficient; when the spread depth coefficient is greater than or equal to the reference spread depth coefficient, the spread depth The coefficient is determined as the nominal spreading depth coefficient, and the nominal frequency control word is determined according to the nominal spreading depth coefficient.
  • the spread spectrum clock signal is generated by using the TAF-DPS based on the Time-Average-Frequency Direct-Period-Synthesis (TAF-DPS) technology .
  • TAF-DPS Time-Average-Frequency Direct-Period-Synthesis
  • the period of the spread-spectrum clock signal is composed of only two periods, so that the problem of uncontrolled clock quality when the spread-spectrum depth coefficient increases can be solved; and when designing digital circuits, only a short period is needed.
  • the set-up time can be restricted, so the selection of the spread spectrum boundary can be handled flexibly.
  • the spread spectrum boundary is automatically adjusted according to the frequency control word corresponding to the required frequency, and the spread depth coefficient is not limited by the clock circuit, which can maximize the spread depth coefficient (Modulation Depth) without affecting the quality of the output clock signal.
  • the spread depth coefficient can maximize the spread depth coefficient (Modulation Depth) without affecting the quality of the output clock signal.
  • this method can be applied to all types of spread spectrum modulation curve shapes.
  • FIG. 1 is a flowchart of a method for determining a parameter of a spreading circuit provided by some embodiments of the present disclosure
  • FIG. 2 is a flowchart of determining a spreading depth coefficient provided by some embodiments of the present disclosure.
  • the method for determining the parameters of the spread spectrum circuit may include:
  • S20 Determine the spreading depth coefficient according to the reference time unit and the target frequency
  • step S40 is executed, that is, the spreading depth coefficient is determined as the nominal spreading depth coefficient, and the nominal frequency control word is determined according to the nominal spreading depth coefficient;
  • step S50 is executed, that is, the reference time unit is adjusted until the corresponding spreading depth coefficient is greater than or equal to the reference spreading depth coefficient.
  • the method for determining the parameters of the spread spectrum circuit can be applied to various circuit systems, and the circuit system can include a clock spread spectrum circuit based on the time average frequency direct cycle synthesis technology. Based on the TAF-DPS technology, the same
  • the clock spreading circuit realizes the spreading function of opening various modulation modes, and can not introduce additional noise when the spreading function is turned on, that is, to achieve greater dynamic frequency adjustment without affecting the normal operation of the circuit system Range, solve the problem of the limited depth of traditional spread spectrum clock modulation, and significantly improve the electromagnetic interference suppression performance of the circuit system.
  • the target frequency is the operating frequency of the circuit system, and the operating frequency can be set according to the requirements of the user, that is, the target frequency can be determined by the user based on the operating requirements of the circuit system.
  • the target frequency remains unchanged.
  • the circuit system may include a reference time unit generator, and in step S10, the reference time unit may be generated by the reference time unit generator.
  • the reference time unit generator may include a reference time unit generation sub-circuit and an adjustment sub-circuit.
  • the reference time unit generation sub-circuit can generate the initial reference time unit.
  • the initial reference time unit may be a fixed period clock provided by the circuit system, and the reference time unit generation sub-circuit may include crystal oscillators (for example, active crystal oscillators and passive crystal oscillators), phase locked loops (PLLs). ), Delay Locked Loop (DLL), Johnson Counter (Johnson Counter), etc.
  • the adjustment sub-circuit can make an initial adjustment to the initial reference time unit to obtain the reference time unit.
  • the initial reference time unit can be acquired as the reference time unit in step S10.
  • the adjustment sub-circuit may include a frequency divider, a frequency multiplier, etc., to perform operations such as frequency division or frequency multiplication on the initial reference time unit.
  • determining the spreading depth coefficient may include:
  • S201 Determine the frequency control word according to the reference time unit and the target frequency
  • S202 Determine the spreading depth coefficient according to the frequency control word.
  • step S201 the frequency control word can be expressed as:
  • F T represents the frequency control word
  • f T represents the target frequency
  • ⁇ 0 denotes a reference time unit
  • I ad represents the integer part of the frequency control word
  • r ad represent the fractional portion of the frequency control word.
  • the spreading depth coefficient may represent the coefficient corresponding to the maximum spreading depth corresponding to the target frequency.
  • the maximum spreading depth corresponding to the target frequency is 20MHz, that is, the frequency range after spreading is 90MHz to 110MHz, then the spreading depth coefficient can be 0.2 (that is, the maximum spreading depth /Target frequency).
  • step S202 may include: determining the spreading mode; determining the spreading depth coefficient according to the spreading mode and the frequency control word.
  • step S202 when the spreading mode is determined, the spreading depth coefficient is determined based on the frequency control word, so that adjusting the frequency control word can realize the adjustment of the spreading depth coefficient.
  • the spreading mode may include boundary spreading, center spreading, upper spreading or lower spreading.
  • the spread spectrum mode can be set by users according to their needs.
  • Boundary spreading is a spreading method proposed based on the characteristics of the TAF-DPS clock generation circuit.
  • the goal of boundary spreading is to maximize the spreading depth, thereby effectively reducing the impact of EMI, and accurately controlling the clock’s impact on the circuit system.
  • the influence of operation can solve the problem of uncontrolled clock quality when the spreading depth increases.
  • the clock spreading circuit can realize the maximum spreading depth based on boundary spreading, thereby enhancing the ability to suppress EMI without affecting the normal operation of the circuit system.
  • the clock spreading circuit When the circuit system uses the TAF-DPS-based clock spreading circuit for clock spreading, in order to ensure that the normal operation of the circuit system is not affected, when the circuit system opens the spreading function and does not open the spreading function, the clock spreading circuit generates The period of the signal only has a two-week period type, then the difference between the maximum value and the minimum value of the frequency control word corresponding to the clock signal is not greater than 1, that is, the frequency control word changes between two integers. Based on this, the expressions of the spreading depth coefficient under different spreading modes are discussed below.
  • the spreading depth coefficient is expressed as:
  • the spreading depth coefficient is expressed as:
  • the spreading depth coefficient is expressed as:
  • the spreading depth coefficient is expressed as:
  • ⁇ max represents the depth of the spreading factor, I ad the above equation (1) is the integer part of the frequency control word T, F, r ad fractional part frequency of the above formula (1) in the control word F T.
  • the spreading depth coefficient is determined by formula (3), and if r ad is less than 0.5, the spreading depth coefficient is determined by formula (4).
  • the reference spreading depth coefficient can be set by the user according to actual needs.
  • the user can set a larger reference spreading depth coefficient.
  • the spreading clock signal generated based on the current reference time unit can meet the EMI suppression effect required by the user, so that in step S40, the current spreading
  • the depth coefficient can be regarded as the nominal spreading depth coefficient
  • the current reference time unit can be regarded as the nominal reference time unit.
  • determining the nominal frequency control word according to the nominal spreading depth coefficient includes: determining the integer part and the decimal part of the nominal frequency control word according to the nominal spreading depth coefficient.
  • F r I r +r r
  • Ir the integer part of the nominal frequency control word
  • r r the nominal frequency control The fractional part of the word F r .
  • the spreading depth coefficient is greater than or equal to the reference spreading depth coefficient
  • the spreading depth coefficient is determined as the nominal spreading depth coefficient, that is, when the nominal spreading depth coefficient is the aforementioned spreading depth coefficient ⁇ max , according to The above formula (2) to formula (6) can determine the integer part and the decimal part of the nominal frequency control word F r .
  • the reference time unit is determined as the nominal reference time unit, and the nominal frequency control word F r corresponds to the reference frequency, that is, the reference frequency is The frequency corresponding to the nominal frequency control word, the reference frequency can be expressed as:
  • the reference frequency Indicates the frequency corresponding to the nominal frequency control word I ad +0.5; when the spreading method is center spreading, upper spreading or lower spreading, the reference frequency Indicates the frequency corresponding to the nominal frequency control word I ad +r ad .
  • the reference frequency It is equal to the target frequency f T.
  • the nominal frequency control word can be expressed as:
  • F r represents the nominal frequency control word
  • ⁇ 1 represents the nominal reference time unit.
  • Reference frequency It can also be expressed as:
  • nominal frequency control word fractional part F r r r may be 0.5, this time, the reference frequency Expressed as:
  • the spreading clock signal generated based on the current reference time unit cannot meet the EMI suppression effect required by the user, so in step S50, the current reference time needs to be adjusted
  • the unit is such that the spread depth coefficient is increased.
  • the adjustment sub-circuit in the reference time unit generator may adjust the current reference time unit.
  • the adjustment sub-circuit can adjust the current reference time unit so that the adjusted reference time unit is greater than the current reference time unit, so that the determination based on the adjusted reference time unit The spreading depth coefficient is greater than the spreading depth coefficient determined based on the current reference time unit.
  • the "current reference time unit” may represent the reference time unit obtained in step S10, and the current reference time unit may be generated by the reference time unit generation sub-circuit
  • the "current reference time unit” can indicate the first adjusted reference time unit; After the reference time unit (ie the first adjusted reference time unit) is adjusted for the second time, that is, after the step of modulating the reference time unit in step S50 is performed twice, the second adjusted reference time unit can be obtained. At this time, The "current reference time unit” can represent the second adjusted reference time unit; and so on.
  • step S50 when the reference time unit is adjusted, it is possible to return to step S20, and determine the spreading depth coefficient based on the adjusted reference time unit and the target frequency. For example, when the reference time unit is adjusted once, the first adjusted reference time unit is obtained; then, the corresponding spread depth coefficient is re-determined based on the first adjusted reference time unit and the target frequency.
  • the current reference time unit may be repeatedly adjusted until the adjusted spread depth coefficient determined according to the modulated reference time unit is greater than or equal to the reference spread depth coefficient.
  • step S50 whenever the reference time unit is adjusted once, it is necessary to return to step S20 and repeat the above steps S20-S50 (it is worth noting that, according to actual conditions, step S40 may not be executed , Step S50 may not be executed).
  • the reference time unit when the reference time unit is adjusted, it returns to step S20, executes the determination of the corresponding spread depth coefficient according to the reference time unit and the target frequency, and then executes step S30 to determine whether the corresponding spread depth coefficient is Is greater than the reference spreading depth coefficient, step S40 or S50 is executed according to the judgment result.
  • step S40 When the judgment result is that the corresponding spreading depth coefficient is greater than or equal to the reference spreading depth coefficient, step S40 is executed; when the judgment result is that the corresponding spreading depth coefficient is less than When the reference spreading depth coefficient is used, step S50 is executed.
  • the above steps S20-S50 are executed cyclically.
  • the reference time unit is adjusted for the first time to obtain the first adjusted reference time unit; the first adjusted reference time unit is used as the current reference time unit; then, step S20: Determine the first adjusted spreading depth coefficient according to the current reference time unit (ie, the first adjusted reference time unit) and the target frequency; then, perform step S30 to determine whether the first adjusted spreading depth coefficient is greater than Equal to the reference spreading depth coefficient, and when the first adjusted spreading depth coefficient is greater than or equal to the reference spreading depth coefficient, the first adjusted spreading depth coefficient is determined as the nominal spreading depth coefficient, and the first adjusted spreading depth coefficient
  • the reference time unit is determined as the nominal reference time unit, and the nominal frequency control word is determined according to the nominal spreading depth coefficient and the nominal reference time unit; after the first adjustment, the spreading depth coefficient is less than the reference spreading depth coefficient, Step S50 is executed to adjust the current reference time unit (ie, the first adjusted reference time unit) to obtain a second adjusted reference time unit, and use the second adjusted reference time unit as the current reference time unit.
  • the above steps S20-S50 are repeatedly executed based on the second adjusted reference time.
  • N is a natural number.
  • Some embodiments of the present disclosure also provide a clock spreading method, which is implemented based on the method for determining the parameters of the spreading circuit provided in any of the foregoing embodiments.
  • FIG. 3 is a flowchart of a clock spreading method provided by some embodiments of the present disclosure
  • FIG. 4 is a schematic block diagram of a clock spreading circuit provided by some embodiments of the present disclosure.
  • the clock spreading method provided by the embodiment of the present disclosure may include:
  • S120 Determine the target frequency control word according to the reference frequency control word and the modulation parameter, where the target frequency control word changes discretely with time;
  • S130 Generate a spread-spectrum output signal after spreading according to the target frequency control word, where the spread-spectrum output signal corresponds to the target frequency control word.
  • the spreading output signal can be composed of two signals with a certain period.
  • the spreading boundary of the spreading output signal is automatically adjusted according to the target frequency control word, which can be used without affecting the spread of the output.
  • a large dynamic frequency adjustment range is realized, which solves the problem of limited modulation depth of spread-spectrum clock and significantly improves EMI suppression performance.
  • the reference frequency control word is the nominal frequency control word obtained according to the method for determining the parameters of the spreading circuit described in any of the foregoing embodiments.
  • the clock spreading method provided in the embodiments of the present disclosure can be applied to a TAF-DPS-based clock spreading circuit.
  • the following describes the embodiment of the present disclosure with reference to FIG. 4 to provide a TAF-DPS-based clock spreading circuit and a clock spreading method .
  • the clock spreading circuit may include a control circuit 11 and a signal generation circuit 12.
  • the control circuit 11 is configured to generate the target frequency control word according to the reference frequency control word and the modulation parameter;
  • the signal generation circuit 12 is configured to generate and output the spread spectrum output signal according to the target frequency control word.
  • the above steps S110 and S120 may be executed by the control circuit 11, and the above step S130 may be executed by the signal generation circuit 12.
  • control circuit 11 can be implemented in hardware or a combination of hardware and software.
  • the modulation parameters may include the reference spreading depth coefficient ⁇ re corresponding to the spreading output signal, the modulation rate V F, and the modulation mode Am.
  • the reference spread depth coefficient ⁇ r represents the modulation amplitude.
  • the reference spreading depth coefficient ⁇ re is the nominal spreading depth coefficient obtained according to the method for determining the parameters of the spreading circuit described in any of the above embodiments. It should be noted that for the relevant description of the nominal frequency control word and the nominal spreading depth coefficient, reference may be made to the relevant description in the embodiment of the method for determining the parameters of the spreading circuit, and the repetitive parts will not be repeated here.
  • the modulation rate V F represents the speed at which the target frequency control word changes over time.
  • the modulation mode Am may include a triangular modulation mode, a sinusoidal modulation mode, a random modulation mode, a sawtooth modulation mode, and the like. Users can select the corresponding modulation mode according to actual application requirements.
  • different clock spreading circuits can correspond to different modulation modes. But not limited to this, different clock spreading circuits can also correspond to the same modulation mode.
  • the same clock spreading circuit can also correspond to different modulation modes, and different modulation modes can respectively correspond to different application scenarios of the clock spreading circuit.
  • the present disclosure does not impose specific restrictions on the type and selection method of the modulation mode.
  • the reference spreading depth coefficient ⁇ re , the modulation mode Am and the modulation rate V F can all be set by the user according to actual requirements.
  • the control circuit 11 may generate the target frequency control word according to the reference spreading depth coefficient ⁇ re , the reference frequency control word F re , the modulation mode Am and the modulation rate V F.
  • the expression of the frequency of the spreading output signal after spreading can be expressed as:
  • f s represents the frequency of the spread spectrum output signal
  • f re can represent the frequency corresponding to the reference frequency control word F re
  • ⁇ re represents the reference spread depth coefficient
  • M(t) represents the modulation function determined according to the modulation mode Am
  • the frequency of the spread spectrum output signal generated based on TAF-DPS corresponds to the frequency control word one-to-one and is inversely proportional, and has a small amount of linearity. Therefore, when the TAF-DPS-based clock spreading circuit is applied to the clock spreading, the frequency control word can be directly modulated by the same modulation form as the frequency of the spreading output signal.
  • step S120 the target frequency control word is expressed as:
  • F(t) represents the target frequency control word
  • I is the integer part of the target frequency control word
  • r(t) is the decimal part of the target frequency control word
  • r(t) changes discretely with time
  • F re represents the reference frequency control
  • the word is the nominal frequency control word in the above formula (7).
  • the range of r(t) is [0,1), that is to say, r(t) varies from 0 to 1, r(t) can be 0 but cannot be 1, so the target frequency control word F (t) varies between two integers.
  • the maximum value of the target frequency control word and the minimum value of the target frequency control word satisfy the following formula:
  • Fmin represents the minimum value of the frequency control word
  • Fmax represents the maximum value of the frequency control word
  • the integer part I of the target frequency control word F(t) is determined by the reference frequency control word Fre .
  • the fractional part r(t) of the target frequency control word F(t) is determined by the reference spreading depth coefficient ⁇ re , the reference frequency control word F re , the modulation mode Am and the modulation rate V F.
  • the target frequency control word F (t) be the integer part of the control word I F r is the nominal frequency (i.e., the reference frequency control word F re) R & lt integer part I, in order to ensure the output The quality of the spread spectrum output signal, the integer part I of the target frequency control word F(t) remains unchanged during the spread spectrum process.
  • the reference spread depth coefficient ⁇ re is a positive number.
  • the reference spread depth coefficient ⁇ re , the reference frequency control word F re , the modulation mode Am and the modulation rate V F can be directly used by the user through an input device (for example, keyboard, touch screen, touch pad, mouse, knob, etc.) through a data interface. Input to the control circuit 11.
  • control circuit 11 may include a modulation mode sub-circuit, the modulation mode sub-circuit is configured to use any of the modulation modes such as triangular modulation mode, sawtooth modulation mode, sinusoidal modulation mode, and random modulation mode to generate different shapes (for example, Triangular wave shape, sine wave shape, sawtooth shape and random curve, etc.) time series of modulation function M(t).
  • modulation modes such as triangular modulation mode, sawtooth modulation mode, sinusoidal modulation mode, and random modulation mode to generate different shapes (for example, Triangular wave shape, sine wave shape, sawtooth shape and random curve, etc.) time series of modulation function M(t).
  • the modulation mode sub-circuit may include a sequential logic module, a PRBS (Pseudo-Random Binary Sequence) module, a look-up table, etc.
  • the sequential logic module may include an adder, a memory, a subtractor, and a comparator.
  • the modulation function M(t) is an approximate curve that changes regularly. Therefore, an adder, a memory, a subtractor, and a comparator can be used to generate the time series of the modulation function M(t).
  • the modulation function M(t) is composed of a series of irregularly varying random values, so the PRBS module can be used to generate the time series of the modulation function M(t).
  • the pseudo-random value generated by the PRBS module has a large Therefore, it can be approximated that the pseudo-random value changes irregularly.
  • the PRBS circuit may include a set of registers.
  • the modulation function M(t) is a controlled function that changes with time
  • the changing curve is a modulation curve (for example, sine wave curve, triangle wave curve, sawtooth curve, Hershey-Kiss curve, random curve, etc.), and the modulation function
  • the range of M(t) changes determines the different spreading methods.
  • the value range of the modulation function M(t) when the spreading mode is center spreading, can be [-1,1], that is, -1 ⁇ M(t) ⁇ 1 ;
  • the value range of the modulation function M(t) when the spreading mode is up spreading, can be [0,2], that is, 0 ⁇ M(t) ⁇ 2; when the spreading way is down spreading
  • the value range of the modulation function M(t) when the spreading way is down spreading
  • the value range of the modulation function M(t) can be [-2,0], that is, -2 ⁇ M(t) ⁇ 0.
  • the value range of the modulation function M(t) can be set according to actual requirements. The present disclosure does not specifically limit the value range and form of the modulation function M(t).
  • the modulation function M(t) may be the original modulation function, and the modulation function M(t) may be expressed as:
  • the target frequency control word can be expressed as:
  • the original modulation function ⁇ (t) is determined based on the modulation mode.
  • the modulation mode is a triangular modulation mode
  • the original modulation function ⁇ (t) may be a trigonometric function
  • the modulation mode is a sinusoidal modulation mode
  • the original modulation function ⁇ (t) may be a sine function.
  • step S130 may include: determining the reference reference time unit; determining the modulation function according to the modulation mode; and determining the spread spectrum output signal based on the modulation function, the reference reference time unit and the target frequency control word.
  • the signal generation circuit 12 includes a reference time unit generator 120 and a spread spectrum sub-circuit 121.
  • the reference time unit generator 12 is configured to generate and output a reference reference time unit ⁇ re , and the reference reference time unit ⁇ re may be a nominal reference time unit ⁇ 1 determined according to the parameter determination method of the above-mentioned spreading circuit.
  • the reference time unit generator 12 includes a reference time unit generation sub-circuit 1201 and an adjustment sub-circuit 1202.
  • the reference time unit generation sub-circuit 1201 is configured to generate and output an initial reference time unit.
  • FIG. 5A shows a schematic block diagram of a reference time unit generation sub-circuit provided by some embodiments of the present disclosure
  • FIG. 5B shows a schematic structure diagram of another reference time unit generation sub-circuit provided by some embodiments of the present disclosure
  • FIG. 6 shows a schematic diagram of K reference output signals with evenly spaced phases provided by some embodiments of the present disclosure.
  • the reference time unit generation sub-circuit 1201 is configured to generate and output K reference output signals with evenly spaced phases and an initial reference time unit.
  • the reference time unit generation sub-circuit 1201 can use a phase locked loop (Phase Locked Loop, PLL), a delay locked loop (Delay Locked Loop, DLL), or a Johnson counter (Johnson Counter) to generate K reference output signals with evenly spaced phases.
  • PLL Phase Locked Loop
  • DLL delay locked loop
  • Johnson counter Johnson Counter
  • the reference time unit generation sub-circuit 1201 may include a voltage controlled oscillator (VCO) 1211, a phase locked loop circuit 1212, and K output terminals 1213.
  • the voltage controlled oscillator 1211 is configured to oscillate at a predetermined oscillation frequency.
  • the phase locked loop circuit 1212 is configured to lock the output frequency of the voltage controlled oscillator 1211 to the reference output frequency.
  • the initial reference time unit can be expressed as ⁇ in
  • the initial reference output frequency can be expressed as f d .
  • the initial reference time unit ⁇ in a time span (time span) between any two of K output terminals 1203 adjacent the output signal.
  • the initial reference time unit ⁇ in is usually generated by the multi-stage voltage controlled oscillator 1211.
  • the initial reference time unit ⁇ in can be calculated using the following formula:
  • T d represents the period of the signal generated by the multi-stage voltage controlled oscillator 1201.
  • the phase-locked loop circuit 1212 includes a phase detector PFD, a loop filter LPF, and a frequency divider FN.
  • a phase detector PFD phase detector
  • a loop filter LPF loop filter
  • a frequency divider FN frequency divider
  • an input signal having an input frequency may be input to the phase detector, then enter the loop filter, then enter the voltage-controlled oscillator, and finally the voltage-controlled oscillator generates a predetermined oscillation
  • the signal of frequency f vco can be divided by the frequency divider to obtain the frequency division frequency f vco /N 0 of the divided signal, where N 0 represents the frequency division coefficient of the frequency divider, N 0 is a real number, and N 0 is greater than Or equal to 1.
  • the dividing frequency f vco /N 0 is fed back to the phase detector.
  • the phase detector is used to compare the input frequency of the reference signal with the dividing frequency f vco /N 0. When the frequency and phase of the input frequency and the dividing frequency f vco /N are both When they are equal, the error between the two is zero. At this time, the phase-locked loop circuit 1212 is in the locked state.
  • circuit structure shown in FIG. 5B is only an exemplary implementation of the reference time unit generation sub-circuit 1201.
  • the specific structure of the reference time unit generating sub-circuit 1201 is not limited to this, it can also be constructed by other circuit structures, and the present disclosure is not limited herein.
  • K and ⁇ in advance may be set according to actual demand, and fixed.
  • the adjustment sub-circuit 1202 is configured to obtain the reference time unit according to the initial reference time unit.
  • the adjustment sub-circuit 1202 is configured to adjust the initial reference time unit ⁇ in to obtain the reference reference time unit ⁇ re , or, in other examples, the adjustment sub-circuit 1202 is configured to directly
  • the reference time unit ⁇ in is output as the reference reference time unit ⁇ re .
  • Fig. 7 shows a schematic block diagram of a frequency spreading sub-circuit provided by some embodiments of the present disclosure
  • Fig. 8 shows a schematic diagram of the working principle of a frequency spreading sub-circuit provided by some embodiments of the present disclosure.
  • the spread spectrum sub-circuit 121 includes a first input module 1211, a second input module 1212, and an output module 1213.
  • the first input module 1211 is configured to receive K reference output signals with evenly spaced phases and a reference reference time unit ⁇ re from the reference time unit generator 120.
  • the second input module 1212 is configured to receive the target frequency control word F(t) from the control circuit 11.
  • the output module 1213 is used to generate a first period and a second period, generate a spread spectrum output signal according to the first period and the second period, and output the spread spectrum output signal.
  • the occurrence probability of the first cycle and the second cycle is controlled by the value of the fractional part r(t) of the target frequency control word F(t).
  • the frequency spreading sub-circuit 121 may include a time average frequency direct period (TAF-DPS) synthesizer, that is, the TAF-DPS synthesizer may be used as a specific implementation of the frequency spreading sub-circuit 121 in the embodiment of the present disclosure.
  • TAF-DPS synthesizer can be implemented using an application specific integrated circuit (for example, ASIC) or a programmable logic device (for example, FPGA).
  • the TAF-DPS synthesizer can be implemented using traditional analog circuit devices. The present disclosure is not limited here.
  • the spread spectrum sub-circuit 121 based on the TAF-DPS synthesizer 510 has two inputs: a reference time unit 520 and a target frequency control word 530.
  • the TAF-DPS synthesizer 510 has an output CLK 550.
  • the output CLK 550 is a synthesized time average frequency clock signal.
  • the output CLK 550 is the spread spectrum output signal.
  • the spread spectrum output signal CLK 550 is a clock pulse train 540, and the clock pulse train 540 is composed of a first period T A 541 and a second period T B 542 in an interleaved manner.
  • the score r(t) is used to control the occurrence probability of the second period T B. Therefore, r(t) can also determine the occurrence probability of the first period T A.
  • the period T TAF of the spread spectrum output signal CLK 550 can be expressed by the following formula:
  • T TAF (1-r(t)) ⁇ T A +r(t) ⁇ T B
  • T TAF F(t) ⁇ re (10)
  • the frequency f css of the spread spectrum output signal CLK 550 can be expressed as:
  • the period T TAF of the spread spectrum output signal CLK 550 output by the TAF-DPS synthesizer 510 is linearly proportional to the target frequency control word 530 and corresponds to each other.
  • the spread spectrum output The frequency f css of the signal CLK 550 is inversely proportional to the frequency control word 530 and has a small linear shape.
  • the target frequency control word 530 changes, the period T TAF of the spread spectrum output signal CLK 550 output by the TAF-DPS synthesizer 510 will also change in the same form, and the frequency of the spread spectrum output signal CLK 550 will also change accordingly.
  • Fig. 9A is a schematic diagram of frequency modulation in a sinusoidal modulation mode provided by some embodiments of the present disclosure
  • Fig. 9B is a schematic diagram of frequency modulation in a triangular modulation mode provided by some embodiments of the present disclosure
  • Embodiments provide a schematic diagram of frequency modulation in a sawtooth modulation mode
  • FIG. 9D is a schematic diagram of frequency modulation in a random modulation mode provided by some embodiments of the present disclosure.
  • the modulation function M(t) when the time interval of the modulation function M(t) changing with time is short, the modulation function M(t) approximates to a sine wave curve, thus, the target frequency control word F(t) is also approximate It is a sine wave curve, as shown in formula (11), the frequency f css of the spread spectrum output signal generated based on TAF-DPS and the target frequency control word 530 are in the corresponding reciprocal form, which has a small amount of linearity, so as As shown in Figure 9A, the frequency f css of the spread spectrum output signal is also approximately a sine wave curve varying with time.
  • the frequency f css of the spread spectrum output signal is approximately a triangular wave curve that changes with time; in the sawtooth modulation mode, as shown in Figure 9C, the frequency of the spread spectrum output signal is approximately The frequency f css is approximately a sawtooth curve that changes with time; in the random modulation mode, as shown in Figure 9D, the frequency f css of the spread spectrum output signal is approximately a random curve that changes with time.
  • the abscissa represents the time t
  • the ordinate represents the frequency f css of the spread spectrum output signal.
  • the frequency of the spreading output signal can be controlled.
  • the control frequency control word F(t) has Waveforms in different modulation modes can achieve the spreading effect of the corresponding modulation mode, that is, in the frequency domain, it is displayed as a sweep in a certain frequency range. If the maximum and minimum values of the frequency control word have a larger frequency difference , The wider the range of spread spectrum, that is, the better the effect of reducing electromagnetic interference.
  • the integer part I of the target frequency control word is related.
  • the fractional part r(t) of the target frequency control word F(t) is changed with time, so that the target frequency control word F(t) changes with time.
  • the frequency of the spreading output signal f The css changes within a certain range to achieve clock spreading. Due to the open-loop direct digital synthesis principle of the TAF-DPS circuit, additional clock jitter (jitter) will not be introduced during the spreading process. When the integer part I of the target frequency control word F(t) remains unchanged, the spreading can be guaranteed The frequency of the output signal varies within an effective range, so that it can maintain the integrity of data synchronization between circuit systems.
  • the target frequency control word can be expressed as:
  • I I r
  • the range of r(t) is [0, 1), that is When I remains unchanged, then I r ⁇ F(t) ⁇ I r +1, so the maximum value Fmax of the target frequency control word is I r +1, and the minimum value Fmin of the target frequency control word is I r .
  • boundary spreading the first boundary frequency of the frequency of the spreading output signal And the second boundary frequency Corresponding to the adjacent integer end values respectively, which fully utilizes the adjustment ability of the frequency control word and maximizes the spreading depth.
  • FIG. 10 is a schematic diagram of the distribution of the first boundary frequency, the second boundary frequency, and the reference frequency provided by some embodiments of the disclosure.
  • the reference frequency corresponding to the nominal frequency control word F r It can be expressed as:
  • the first boundary frequency It can be expressed as:
  • the second boundary frequency Corresponding to the maximum value Fmax of the target frequency control word which is the second boundary frequency Represents the minimum value 1/(Fmax* ⁇ re ) of the frequency of the spread spectrum output signal.
  • the second boundary frequency It can be expressed as:
  • the reference frequency Less than the first boundary frequency And greater than the second boundary frequency Tr shown in Figure 10 represents the reference frequency The corresponding period.
  • the difference between the first period T A and the second period T B is ⁇ re .
  • f css the range of the frequency f css of the spread spectrum output signal CLK 550 is
  • f css is expressed as:
  • the spread frequency of the spread spectrum output signal can be expressed as:
  • f(M(t)) represents the spread frequency
  • F(t) represents the target frequency control word
  • F re represents the reference frequency control word
  • ⁇ re represents the reference spreading depth coefficient
  • M(t) represents the modulation function
  • ⁇ re represents the reference reference time unit
  • f re represents the frequency corresponding to the reference frequency control word.
  • the spread frequency of the spread spectrum output signal can be expressed as:
  • the target frequency control word F(t) is inversely related to the spread frequency of the spread spectrum output signal. Therefore, the spread frequency of the spread spectrum output signal determined based on the above formula (13) exists The relationship between nonlinear distortion and range shift. To accurately compensate for the nonlinear distortion and range shift caused by the reciprocal relationship, the original modulation function can be compensated and transformed, and the compensated modulation function can be used for frequency modulation, so that the spread frequency of the spread spectrum output signal is more accurate .
  • the modulation function M(t) may be a compensated modulation function after compensating the original modulation function, and the modulation function M(t) may be expressed as:
  • E( ⁇ (t)) represents the compensation modulation function
  • ⁇ (t) represents the original modulation function
  • the target frequency control word F(t) after compensation can be expressed as:
  • the frequency of the compensated spread spectrum output signal can be expressed as:
  • FIG. 11 is a schematic diagram of spectrum comparison results before and after spreading at different spreading depths according to some embodiments of the present disclosure.
  • K 16
  • the initial reference output frequency f d is 100 MHz
  • the initial reference time unit ⁇ in is obtained as
  • the reference time unit ⁇ re is referred to, so that the reference time unit ⁇ re is also 0.625 ns.
  • the output signal with a frequency of 140 MHz is synthesized, that is, the target frequency f T is 140 MHz.
  • a curve 500 represents a frequency curve without spreading, for example, a curve of a target frequency.
  • Curve 501 represents the curve of the first spreading frequency when the spreading depth coefficient is 5000ppm
  • curve 502 represents the curve of the second spreading frequency when the spreading depth coefficient is 10000ppm
  • curve 503 represents when the spreading depth coefficient is 50000ppm
  • Curve 504 represents the curve of the fourth spreading frequency when spreading at the boundary.
  • the first spread spectrum frequency, the second spread spectrum frequency and the third spread spectrum frequency are all obtained by spreading using the downward spreading method.
  • Both the frequency and the fourth spread frequency are obtained by spreading using the triangular modulation mode.
  • the modulation rate (modulation rate) corresponding to the first spreading frequency, the second spreading frequency, the third spreading frequency, and the fourth spreading frequency are all 30 kHz.
  • the maximum value of the fourth spread frequency is 145.455 MHz, and the minimum value of the fourth spread frequency is 133.333 MHz.
  • the spreading depth coefficient is expressed as:
  • the energy of the frequency spectrum of the clock signal can be better dispersed.
  • the spreading depth coefficient of the fourth spreading frequency is greater than the spreading depth coefficient of any one of the first spreading frequency, the second spreading frequency, and the third spreading frequency, that is, the spreading depth of the fourth spreading frequency is greater than that of the first spreading frequency.
  • the spreading depth of any one of the first spreading frequency, the second spreading frequency, and the third spreading frequency can achieve the maximum dispersion of energy. It can be seen from the experimental results that boundary spreading can maximize the spreading depth while maintaining the quality of the clock signal, effectively suppressing spectral peaks, and reducing EMI spike noise.
  • Boundary spread spectrum can be applied to all types of spread spectrum modulation curve shapes.
  • FIG. 12 is a schematic block diagram of an apparatus for determining a parameter of a spread spectrum circuit provided by some embodiments of the present disclosure.
  • an apparatus 600 for determining a parameter of a spread spectrum circuit may include a memory 60 and a processor 61.
  • the memory 60 may be used to store computer readable instructions.
  • the processor 61 may be used to run computer-readable instructions, and when the computer-readable instructions are executed by the processor 61, the method for determining the parameters of the spread spectrum circuit according to any of the foregoing embodiments can be executed.
  • the processor 61 may be a central processing unit (CPU), a tensor processor (TPU) and other devices with data processing capabilities and/or program execution capabilities, and may control other components in the parameter determination device 600 of the spread spectrum circuit.
  • the central processing unit (CPU) can be an X86 or ARM architecture.
  • the memory 60 may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and/or nonvolatile memory.
  • the volatile memory may include random access memory (RAM) and/or cache memory (cache), for example.
  • the non-volatile memory may include, for example, read only memory (ROM), hard disk, erasable programmable read only memory (EPROM), portable compact disk read only memory (CD-ROM), USB memory, flash memory, etc.
  • One or more computer-readable instructions may be stored on the computer-readable storage medium, and the processor 61 may run the computer-readable instructions to implement various functions of the device 600 for determining the parameters of the spread spectrum circuit.
  • data transmission between the memory 60 and the processor 61 may be implemented through a network or a bus system.
  • the memory 60 and the processor 61 may directly or indirectly communicate with each other.
  • the memory 60 may also store data such as the reference spread depth coefficient, the nominal spread depth coefficient, and the nominal frequency control word.
  • FIG. 13 is a schematic block diagram of a clock spreading device provided by some embodiments of the present disclosure.
  • the clock spreading apparatus 700 may include a memory 70 and a processor 71.
  • the memory 70 may be used to store computer readable instructions.
  • the processor 71 may be used to run computer-readable instructions, and when the computer-readable instructions are executed by the processor 71, the clock spreading method according to any of the foregoing embodiments can be executed.
  • the processor 71 may be a central processing unit (CPU), a tensor processor (TPU) and other devices with data processing capabilities and/or program execution capabilities, and may control other components in the clock spreading device 700 to perform desired Function.
  • the central processing unit (CPU) can be an X86 or ARM architecture.
  • the memory 70 may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory.
  • the volatile memory may include random access memory (RAM) and/or cache memory (cache), for example.
  • the non-volatile memory may include, for example, read only memory (ROM), hard disk, erasable programmable read only memory (EPROM), portable compact disk read only memory (CD-ROM), USB memory, flash memory, etc.
  • One or more computer-readable instructions may be stored on the computer-readable storage medium, and the processor 71 may run the computer-readable instructions to implement various functions of the clock spreading apparatus 700.
  • data transmission between the memory 70 and the processor 71 may be implemented through a network or a bus system.
  • the memory 70 and the processor 71 may directly or indirectly communicate with each other.
  • the memory 70 may also store the reference frequency control word F re , the modulation rate V F , the reference spreading depth coefficient ⁇ re and the like.
  • the clock spreading device may include a parameter determining circuit of the spreading circuit, a control circuit, and a signal generating circuit.
  • the parameter determination circuit of the spread spectrum circuit is used to generate and output parameters such as the nominal frequency control word and the nominal spread depth coefficient.
  • the control circuit is used to obtain the reference frequency control word and the modulation parameter, and determine the target frequency control word according to the reference frequency control word and the modulation parameter, where the target frequency control word changes discretely with time.
  • the reference frequency control word is the nominal frequency control word generated by the parameter determination circuit of the spread spectrum circuit, that is, the control circuit is used to obtain the nominal frequency control word as the reference frequency control word.
  • the signal generating circuit is configured to generate and output a spread-spectrum output signal after spreading according to the target frequency control word.
  • the parameter determination circuit of the spread spectrum circuit may include the parameter determination device of the spread spectrum circuit described in any of the above embodiments.
  • the control circuit and the signal generation circuit please refer to the related descriptions of the control circuit 11 and the signal generation circuit 12 in the embodiment of the clock spreading method, which will not be repeated here.
  • At least one embodiment of the present disclosure also provides an electronic device.
  • the electronic device may include the clock spreading device described in any one of the above.
  • the electronic device may be a liquid crystal display device or the like, and the clock spreading device may be applied to the logic board (TCON) of the liquid crystal display device. Since the clock spreading device implements clock spreading based on TAF-DPS, when the spreading function of the liquid crystal display device is turned on, the display effect of the liquid crystal display device is not affected.
  • TCON logic board

Landscapes

  • Manipulation Of Pulses (AREA)
  • Noise Elimination (AREA)

Abstract

一种展频电路的参数确定方法、时钟展频方法、展频电路的参数确定装置、时钟展频装置。展频电路的参数确定方法，包括：获取基准时间单位和目标频率(S10)；根据所述基准时间单位和所述目标频率，确定展频深度系数(S20)；判断所述展频深度系数是否大于等于基准展频深度系数(S30)；在所述展频深度系数大于等于所述基准展频深度系数的情况下，将所述展频深度系数确定为标称展频深度系数，并根据所述标称展频深度系数，确定标称频率控制字(S40)；在所述展频深度系数小于所述基准展频深度系数时，调整所述基准时间单位直至其对应的展频深度系数大于等于所述基准展频深度系数(S50)。

Description

展频电路的参数确定方法及装置、时钟展频方法及装置 技术领域
本公开的实施例涉及一种展频电路的参数确定方法、时钟展频方法、展频电路的参数确定装置、时钟展频装置。
背景技术
电磁干扰(EMI)是指电路系统通过传导或者辐射的方式，对于周边电路系统产生的影响，电磁干扰会引起电路性能的降低，甚至可能导致整个电路系统失效。时钟信号常常是电路系统中频率最高和边沿最陡的信号，多数电磁干扰问题的产生与高频的时钟信号有关。降低电磁干扰的方法包括屏蔽、滤波、隔离、信号边沿控制以及印刷电路板(Printed Circuit Board，PCB)的布局布线(例如，在PCB中增加电源和接地(GND)层)等。然而，这些方法成本较高、效率低，同时对电路系统的性能也有一定负面影响。
展频时钟生成(Spread Spectrum Clock Generation,SSCG)是指通过在一定范围内动态调整时钟的输出频率，达到分散时钟信号的频谱的能量，从而降低电子系统电磁干扰的效果。
发明内容
本公开至少一些实施例提供一种展频电路的参数确定方法，包括：获取基准时间单位和目标频率；根据所述基准时间单位和所述目标频率，确定展频深度系数；判断所述展频深度系数是否大于等于基准展频深度系数；在所述展频深度系数小于所述基准展频深度系数时，调整所述基准时间单位直至其对应的展频深度系数大于等于所述基准展频深度系数；在所述展频深度系数大于等于所述基准展频深度系数的情况下，将所述展频深度系数确定为标称展频深度系数，并根据所述标称展频深度系数，确定标称频率控制字。
例如，在本公开一些实施例提供的展频电路的参数确定方法中，确定展频深度系数包括：根据所述基准时间单位和所述目标频率确定频率控制字；根据所述频率控制字，确定所述展频深度系数。
例如，在本公开一些实施例提供的展频电路的参数确定方法中，根据所述频率控制字，确定所述展频深度系数包括：确定展频方式；根据所述展频方式 和所述频率控制字，确定所述展频深度系数。
例如，在本公开一些实施例提供的展频电路的参数确定方法中，所述展频方式包括边界展频、中心展频、上展频或下展频；当所述展频方式为所述边界展频时，所述展频深度系数表示为：
Figure PCTCN2019083899-appb-000001
当所述展频方式为所述中心展频时，所述展频深度系数表示为：
Figure PCTCN2019083899-appb-000002
或
Figure PCTCN2019083899-appb-000003
当所述展频方式为所述上展频时，所述展频深度系数表示为：
Figure PCTCN2019083899-appb-000004
当所述展频方式为所述下展频时，所述展频深度系数表示为：
Figure PCTCN2019083899-appb-000005
其中，δ max表示所述展频深度系数，I ad为所述频率控制字的整数部分，r ad为所述频率控制字的小数部分。
例如，在本公开一些实施例提供的展频电路的参数确定方法中，根据所述标称展频深度系数，确定标称频率控制字包括：根据所述标称展频深度系数，确定所述标称频率控制字的整数部分和小数部分，其中，所述标称频率控制字表示为：F r＝I r+r r，F r表示所述标称频率控制字，I r表示所述标称频率控制字F r的整数部分，r r表示所述标称频率控制字F r的小数部分。
例如，在本公开一些实施例提供的展频电路的参数确定方法中，在所述展频深度系数大于等于所述基准展频深度系数，且将所述展频深度系数确定为标称展频深度系数时，在所述展频方式为所述边界展频的情况下，所述标称频率控制字的整数部分I r＝I ad，所述标称频率控制字的小数部分r r＝0.5；在所述展频方式为所述中心展频、所述上展频或所述下展频的情况下，所述标称频率控制字的整数部分I r＝I ad，所述标称频率控制字的小数部分r r＝r ad。
例如，在本公开一些实施例提供的展频电路的参数确定方法中，在所述展频深度系数大于等于所述基准展频深度系数时，将所述基准时间单位确定为标称基准时间单位，所述标称频率控制字与参考频率对应，所述参考频率表示为：
Figure PCTCN2019083899-appb-000006
其中，
Figure PCTCN2019083899-appb-000007
表示所述参考频率，f T表示所述目标频率，F T表示所述频率控制字，所述标称频率控制字表示为：
Figure PCTCN2019083899-appb-000008
Δ 1表示所述标称基准时间单位。
本公开一些实施例还提供一种基于上述任一实施例所述的展频电路的参数确定方法的时钟展频方法，包括：获取参考频率控制字，其中，所述参考频率控制字为根据上述任一实施例所述的展频电路的参数确定方法得到的所述标称频率控制字；根据所述参考频率控制字和调制参数，确定目标频率控制字，其中，所述目标频率控制字随时间离散变化；根据所述目标频率控制字，生成展频后的展频输出信号，其中，所述展频输出信号与所述目标频率控制字对应。
例如，在本公开一些实施例提供的时钟展频方法中，所述调制参数包括调制模式和参考展频深度系数，所述参考展频深度系数为根据上述任一实施例所述的展频电路的参数确定方法得到的所述标称展频深度系数，所述目标频率控制字表示为：
Figure PCTCN2019083899-appb-000009
其中，F(t)表示所述目标频率控制字，F re表示所述参考频率控制字，δ re表示所述参考展频深度系数，M(t)表示根据所述调制模式确定的调制函数，t表示时间。
例如，在本公开一些实施例提供的时钟展频方法中，所述调制函数为原始调制函数，则所述调制函数表示为：
M(t)＝ξ(t)，
其中，ξ(t)表示所述原始调制函数；或者，
所述调制函数为对原始调制函数进行补偿后的补偿调制函数，则所述调制函数表示为：
Figure PCTCN2019083899-appb-000010
或
Figure PCTCN2019083899-appb-000011
其中，E(ξ(t))表示所述补偿调制函数，ξ(t)表示所述原始调制函数。
例如，在本公开一些实施例提供的时钟展频方法中，所述调制参数包括调制模式，根据所述目标频率控制字，生成展频后的展频输出信号包括：确定参考基准时间单位；根据所述调制模式确定调制函数；基于所述调制函数、所述参考基准时间单位和所述目标频率控制字，确定所述展频输出信号，其中，所 述展频输出信号的展频频率表示为：
Figure PCTCN2019083899-appb-000012
其中，f(M(t))表示所述展频频率，F(t)表示所述目标频率控制字，且
Figure PCTCN2019083899-appb-000013
F re表示所述参考频率控制字，δ re表示所述参考展频深度系数，M(t)表示所述调制函数，Δ re表示所述参考基准时间单位，f re表示与所述参考频率控制字对应的频率。
例如，在本公开一些实施例提供的时钟展频方法中，所述调制模式包括三角调制模式、锯齿调制模式、正弦调制模式或随机调制模式。
例如，在本公开一些实施例提供的时钟展频方法中，所述目标频率控制字的最大值Fmax和所述目标频率控制字的最小值Fmin满足以下公式：0≤Fmax-Fmin＜1。
本公开一些实施例还提供一种展频电路的参数确定装置，包括：存储器，用于存储计算机可读指令；处理器，用于运行所述计算机可读指令，所述计算机可读指令被所述处理器运行时执行根据上述任一实施例所述的展频电路的参数确定方法。
本公开一些实施例还提供一种时钟展频装置，包括：存储器，用于存储计算机可读指令；处理器，用于运行所述计算机可读指令，所述计算机可读指令被所述处理器运行时执行根据上述任一实施例所述的时钟展频方法。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开一些实施例提供的一种展频电路的参数确定方法的流程图；
图2为本公开一些实施例提供的一种确定展频深度系数的流程图；
图3为本公开一些实施例提供的一种时钟展频方法的流程图；
图4为本公开一些实施例提供的一种时钟展频电路的示意性框图；
图5A示出了本公开一些实施例提供一种基准时间单位生成子电路的示意性框图；
图5B示出了本公开一些实施例提供另一种基准时间单位生成子电路的示 意性结构图；
图6示出了本公开一些实施例提供的一种K个相位均匀间隔的基准输出信号的示意图；
图7示出了本公开一些实施例提供的一种展频子电路的示意性框图；
图8示出了本公开一些实施例提供的一种展频子电路的工作原理示意图；
图9A为本公开一些实施例提供的一种正弦调制模式下的频率调制的示意图；
图9B为本公开一些实施例提供的一种三角调制模式下的频率调制的示意图；
图9C为本公开一些实施例提供的一种锯齿调制模式下的频率调制的示意图；
图9D为本公开一些实施例提供的一种随机调制模式下的频率调制的示意图；
图10为本公开一些实施例提供的第一边界频率、第二边界频率和参考频率的分布示意图；
图11为本公开一些实施例提供的一种在不同展频深度下的展频前后频谱对比结果的示意图；
图12为本公开一些实施例提供的一种展频电路的参数确定装置的示意性框图；
图13为本公开一些实施例提供的一种时钟展频装置的示意性框图。
具体实施方式
为了使得本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物 件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
为了保持本公开实施例的以下说明清楚且简明，本公开省略了部分已知功能和已知部件的详细说明。
随着技术的发展，时钟信号的频率越来越高，而高频的时钟信号具有较强的电磁干扰(EMI)。尽管理论分析表明，较大的调制深度(即频率偏移范围)能够确定性地提供更好的EMI抑制效果，然而在实际设计中，由于各种因素(例如，电路结构、工作过程等)的限制，在调制深度的设计上很保守，即调制深度具有一定的范围限制，并不能被设计得很大。受限于传统的时钟生成器，尤其是基于锁相环(Phase Locked Loop，PLL)的闭环方案实现上的困难，目前无法在不影响所驱动的电路正常工作的前提下实现所期望的大动态频率范围。由于传统时钟生成器在开启展频后输出的信号的频率具有较大的不确定性，在展频边界类型(展频边界类型包括中心展频、上展频和下展频)上，一般应用场景只倾向于使用下展频进行展频，因为以此种方式进行展频后，信号的频率仅向比该信号的原始频率降低的方向调制，理论上不会破坏现有电路设计的时间约束。由此可见，基于传统时钟生成器的时钟展频，展频深度系数和展频边界类型均被限制。
本公开至少一些实施例提供一种展频电路的参数确定方法、时钟展频方法、展频电路的参数确定装置、时钟展频装置。该展频电路的参数确定方法，包括：获取基准时间单位和目标频率；根据基准时间单位和目标频率，确定展频深度系数；判断展频深度系数是否大于等于基准展频深度系数；在展频深度系数小于基准展频深度系数时，调整基准时间单位直至其对应的展频深度系数大于等于基准展频深度系数；在展频深度系数大于等于基准展频深度系数的情况下，将展频深度系数确定为标称展频深度系数，并根据标称展频深度系数，确定标称频率控制字。
在本公开实施例提供的展频电路的参数确定方法中，基于时间平均频率直接周期合成(Time-Average-Frequency Direct-Period-Synthesis,TAF-DPS)技术，利用TAF-DPS生成展频时钟信号，该展频时钟信号的周期仅由两种周期构成， 由此，可以解决在展频深度系数增大时，时钟品质不受控的问题；且在设计数字电路时，只需使用短周期来约束建立时间即可，因而在展频边界的选择上可以灵活处理。同时，展频边界根据所需频率对应的频率控制字自动调节，展频深度系数不受时钟电路限制，能够在不影响输出时钟信号品质的前提下实现展频深度系数(Modulation Depth)的最大化，解决传统展频时钟调制深度受限的问题，明显提高抑制EMI的能力。此外，该方法可以应用于所有类型的展频调制曲线形状。
下面结合附图对本公开的实施例进行详细说明，但是本公开并不限于这些具体的实施例。
图1为本公开一些实施例提供的一种展频电路的参数确定方法的流程图；图2为本公开一些实施例提供的一种确定展频深度系数的流程图。
例如，如图1所示，本公开一些实施例提供的展频电路的参数确定方法可以包括：
S10：获取基准时间单位和目标频率；
S20：根据基准时间单位和目标频率，确定展频深度系数；
S30：判断展频深度系数是否大于等于基准展频深度系数；
在展频深度系数大于等于基准展频深度系数的情况下，执行步骤S40，即将展频深度系数确定为标称展频深度系数，并根据标称展频深度系数，确定标称频率控制字；
在展频深度系数小于基准展频深度系数时，执行步骤S50，即调整基准时间单位直至其对应的展频深度系数大于等于基准展频深度系数。
本公开的实施例提供展频电路的参数确定方法可以应用于各种电路系统，且该电路系统可以包括基于时间平均频率直接周期合成技术的时钟展频电路，基于TAF-DPS技术，能够通过相同的时钟展频电路实现开启各种调制模式的展频功能，且能够在开启展频功能时不引入额外的噪声，即在不不影响电路系统正常工作的情况下，实现较大的频率动态调节范围，解决传统展频时钟调制深度受限的问题，明显提高电路系统的电磁干扰抑制性能。
例如，在步骤S10中，目标频率为电路系统的工作频率，工作频率可以根据用户的需求设置，也就是说，目标频率可以由用户基于电路系统的工作需求而确定。在本公开的实施例提供的展频电路的参数确定方法中，目标频率保持不变。
例如，电路系统可以包括基准时间单位生成器，在步骤S10中，基准时间单位可以由基准时间单位生成器生成。基准时间单位生成器可以包括基准时间单位生成子电路和调节子电路。基准时间单位生成子电路可以生成初始基准时间单位。初始基准时间单位可以为电路系统提供的固定周期时钟，基准时间单位生成子电路可以包括晶体振荡器(例如，有源晶体振荡器和无源晶体振荡器)、锁相环(Phase Locked Loop，PLL)、延迟锁相环(Delay locked Loop，DLL)、约翰逊计数器(Johnson Counter)等。调节子电路可以对该初始基准时间单位进行初始调整，以得到基准时间单位。或者，该初始基准时间单位即可被获取作为步骤S10中的基准时间单位。例如，调节子电路可以包括分频器、倍频器等，以对初始基准时间单位进行分频或倍频等操作。
例如，如图2所示，在步骤S20中，确定展频深度系数可以包括：
S201：根据基准时间单位和目标频率确定频率控制字；
S202：根据频率控制字，确定展频深度系数。
例如，在步骤S201中，频率控制字可以表示为：
F T＝1/(f T*Δ 0)＝I ad+r ad    (1)
其中，F T表示频率控制字，f T表示目标频率，Δ 0表示基准时间单位，I ad表示频率控制字的整数部分，r ad表示频率控制字的小数部分。当目标频率不变时，可以通过调节基准时间单位以调节频率控制字。
例如，展频深度系数可以表示目标频率对应的最大展频深度对应的系数。在一些实施例中，若目标频率为100MHz，该目标频率对应的最大展频深度为20MHz，即展频后的频率范围为90MHz至110MHz，则展频深度系数可以为0.2(即最大展频深度/目标频率)。
例如，步骤S202可以包括：确定展频方式；根据展频方式和频率控制字，确定展频深度系数。
例如，在步骤S202中，在展频方式确定的情况下，展频深度系数是基于频率控制字确定的，从而调节频率控制字即可实现调节展频深度系数。
例如，展频方式可以包括边界展频、中心展频、上展频或下展频。展频方式可以由用户根据需求而设定。边界展频是基于TAF-DPS时钟生成电路的特点而被提出的一种展频方式，边界展频的目标是最大化展频深度，从而有效地降低EMI影响，同时精确控制时钟对电路系统的操作的影响，可以解决在展频深度增大时，时钟品质不受控的问题。时钟展频电路可以基于边界展频实现最 大化展频深度，从而在不影响电路系统正常工作的情况下，增强抑制EMI的能力。
当电路系统利用基于TAF-DPS的时钟展频电路进行时钟展频时，为了保证电路系统的正常工作不受影响，当电路系统开启展频功能和不开启展频功能时，时钟展频电路生成的信号的周期都只存在两周周期类型，则该时钟信号对应的频率控制字的最大值和最小值之差不大于1，即频率控制字在两个整数之间变化。基于此，下面讨论在不同的展频方式下，展频深度系数的表达式。
例如，当展频方式为边界展频时，展频深度系数表示为：
Figure PCTCN2019083899-appb-000014
当展频方式为中心展频时，展频深度系数表示为：
Figure PCTCN2019083899-appb-000015
并且
Figure PCTCN2019083899-appb-000016
当展频方式为上展频时，展频深度系数表示为：
Figure PCTCN2019083899-appb-000017
当展频方式为所述下展频时，展频深度系数表示为：
Figure PCTCN2019083899-appb-000018
其中，δ max表示展频深度系数，I ad为上述公式(1)的频率控制字F T的整数部分，r ad为上述公式(1)中的频率控制字F T的小数部分。
例如，当展频方式为中心展频时，若r ad大于或等于0.5，则展频深度系数由公式(3)确定，若r ad小于0.5，则展频深度系数由公式(4)确定。
例如，在步骤S30中，基准展频深度系数可以由用户根据实际需求设置。基准展频深度系数越大，则最终得到的标称展频深度系数越大，从而抑制EMI的效果越好。例如，当电路系统需要具有较强的抑制EMI的能力时，则用户可以设置较大的基准展频深度系数。
例如，当展频深度系数大于等于基准展频深度系数时，则基于当前的基准时间单位生成的展频时钟信号即可满足用户需要的EMI的抑制效果，从而在步骤S40中，当前的展频深度系数即可以为标称展频深度系数，当前的基准时间单位即可以为标称基准时间单位。
例如，在步骤S40中，根据标称展频深度系数，确定标称频率控制字包括：根据标称展频深度系数，确定标称频率控制字的整数部分和小数部分。
例如，标称频率控制字可以表示为：F r＝I r+r r，F r表示标称频率控制字，I r表示标称频率控制字F r的整数部分，r r表示标称频率控制字F r的小数部分。例如，在展频深度系数大于等于基准展频深度系数，且将展频深度系数确定为标称展频深度系数时，即标称展频深度系数即为上述展频深度系数δ max时，根据上述公式(2)至公式(6)则可以确定标称频率控制字F r的整数部分和小数部分，例如，在展频方式为边界展频的情况下，标称频率控制字的整数部分I r＝I ad，标称频率控制字的小数部分r r＝0.5，即在展频方式为边界展频的情况下，标称频率控制字F r＝I r+0.5，标称频率控制字F r的整数部分与上述频率控制字F T的整数部分相同；在展频方式为所述中心展频、上展频或下展频的情况下，标称频率控制字的整数部分为I r＝I ad，标称频率控制字F r的小数部分为r r＝r ad，即展频方式为中心展频、上展频或下展频的情况下，标称频率控制字F r即为上述频率控制字F T。
例如，在步骤S40中，在展频深度系数大于等于基准展频深度系数时，将基准时间单位确定为标称基准时间单位，标称频率控制字F r与参考频率对应，即参考频率为与标称频率控制字对应的频率，参考频率可以表示为：
Figure PCTCN2019083899-appb-000019
其中，
Figure PCTCN2019083899-appb-000020
表示参考频率。
例如，参考上面的公式(2)至公式(6)，当展频方式为边界展频时，参考频率
Figure PCTCN2019083899-appb-000021
表示标称频率控制字I ad+0.5对应的频率；当展频方式为中心展频、上展频或下展频时，参考频率
Figure PCTCN2019083899-appb-000022
表示标称频率控制字I ad+r ad对应的频率。也就是说，当展频方式为中心展频、上展频或下展频时，参考频率
Figure PCTCN2019083899-appb-000023
与目标频率f T相等。
例如，基于TAF-DPS的原理，标称频率控制字可以表示为：
Figure PCTCN2019083899-appb-000024
其中，F r表示标称频率控制字，Δ 1表示标称基准时间单位。即参考频率
Figure PCTCN2019083899-appb-000025
还可以表示为：
Figure PCTCN2019083899-appb-000026
例如，由于标称频率控制字F r是与参考频率
Figure PCTCN2019083899-appb-000027
对应的频率控制字，参考上面的公式(2)，当展频方式为边界展频时，标称频率控制字F r的整数部分与频率控制字F T的整数部分相同，即I r＝I ad，标称频率控制字F r的小数部分r r可以为0.5，此时，参考频率
Figure PCTCN2019083899-appb-000028
表示为：
Figure PCTCN2019083899-appb-000029
Figure PCTCN2019083899-appb-000030
例如，当展频深度系数小于基准展频深度系数时，则基于当前的基准时间 单位生成的展频时钟信号无法满足用户需求的EMI的抑制效果，从而在步骤S50中，需要调整当前的基准时间单位以使得展频深度系数被增大。例如，在步骤S50中，基准时间单位生成器中的调节子电路可以对当前的基准时间单位进行调整。
例如，对于边界展频，根据上面的公式(1)和(2)可知，在目标频率f T不变的情况下，当基准时间单位Δ 0增大时，目标频率f T对应的频率控制字F T减小，则频率控制字F T的整数部分I ad也可能减小，从而展频深度系数增大，即当基准时间单位增大时，展频深度系数也增大，基准时间单位和展频深度系数成正相关，从而，在步骤S50中，调节子电路可以调整当前的基准时间单位以使得调整后的基准时间单位大于当前的基准时间单位，从而使基于调整后的基准时间单位确定的展频深度系数大于基于当前的基准时间单位确定的展频深度系数。
需要说明的是，在未对基准时间单位进行调整前，“当前的基准时间单位”可以表示步骤S10中获取的基准时间单位，该当前的基准时间单位可以为由基准时间单位生成子电路生成的初始基准时间单位或者由调节子电路对该初始基准时间单位进行初始调整后得到的基准时间单位；在对当前的基准时间单位(即步骤S10中获取的基准时间单位)进行第一次调整后，即在执行步骤S50中的调制基准时间单位的步骤一次后，可以得到第一调整后基准时间单位，此时，“当前的基准时间单位”可以表示第一调整后基准时间单位；在对当前的基准时间单位(即第一调整后基准时间单位)进行第二次调整后，即在执行步骤S50中的调制基准时间单位的步骤两次后，可以得到第二调整后基准时间单位，此时，“当前的基准时间单位”可以表示第二调整后基准时间单位；以此类推。
例如，在步骤S50后，当对基准时间单位进行调整后，可以返回到步骤S20中，并基于调整后的基准时间单位和目标频率确定展频深度系数。例如，当基准时间单位进行一次调整后，得到第一调整后基准时间单位；然后，基于第一调整后基准时间单位和目标频率重新确定其对应的展频深度系数。
例如，在步骤S50中，可以反复调整当前的基准时间单位，直到根据调制后的基准时间单位确定的调整后的展频深度系数大于等于基准展频深度系数。
需要说明的是，在步骤S50中，每当对基准时间单位进行一次调整，则需要返回到步骤S20，重复执行上述各个步骤S20-S50(值得注意的是，根据实 际情况，步骤S40可能不执行，步骤S50也可能不执行)。例如，当对基准时间单位进行调整后，返回到步骤S20中，执行根据基准时间单位和目标频率确定与其对应的展频深度系数，然后，执行步骤S30，即判断该对应的展频深度系数是否大于基准展频深度系数，根据判断结果执行步骤S40或S50，当判断结果为对应的展频深度系数大于等于基准展频深度系数时，执行步骤S40；当判断结果为对应的展频深度系数小于基准展频深度系数时，执行步骤S50。循环执行上述步骤S20-S50。
例如，在一些示例中，在步骤S50中，对基准时间单位进行第一次调整以得到第一调整后基准时间单位；将第一调整后基准时间单位作为当前的基准时间单位；然后，执行步骤S20，根据该当前的基准时间单位(即第一调整后基准时间单位)和目标频率，确定第一调整后展频深度系数；然后，执行步骤S30，判断第一调整后展频深度系数是否大于等于基准展频深度系数，在第一调整后展频深度系数大于等于基准展频深度系数的情况下，将第一调整后展频深度系数确定为标称展频深度系数，将第一调整后基准时间单位确定为标称基准时间单位，并根据标称展频深度系数和标称基准时间单位，确定标称频率控制字；在第一调整后展频深度系数小于基准展频深度系数时，执行步骤S50，调整当前的基准时间单位(即第一调整后基准时间单位)以得到第二调整后基准时间单位，将第二调整后基准时间单位作为当前的基准时间单位。然后，基于第二调整后基准时间重复执行上述各个步骤S20-S50。依次类推，直到例如基于第N调整后基准时间单位确定的第N调整后展频深度系数大于等于基准展频深度系数，则结束上述循环过程。N为自然数。
本公开的一些实施例还提供一种时钟展频方法，该时钟展频方法是基于上述任一实施例提供的展频电路的参数确定方法实现的。
图3为本公开一些实施例提供的一种时钟展频方法的流程图，图4为本公开一些实施例提供的一种时钟展频电路的示意性框图。
例如，如图3所示，本公开的实施例提供的时钟展频方法可以包括：
S110：获取参考频率控制字；
S120：根据参考频率控制字和调制参数，确定目标频率控制字，其中，目标频率控制字随时间离散变化；
S130：根据目标频率控制字，生成展频后的展频输出信号，其中，展频输出信号与目标频率控制字对应。
在本公开实施例提供的时钟展频方法中，展频输出信号可以由两种确定周期的信号构成，展频输出信号的展频边界根据目标频率控制字自动调节，能够在不影响输出的展频输出信号的前提下实现较大的频率动态调节范围，解决展频时钟调制深度受限的问题，明显提高EMI抑制性能。
例如，在步骤S110中，参考频率控制字为根据上述任一实施例所述的展频电路的参数确定方法得到的标称频率控制字。
本公开实施例提供的时钟展频方法可以应用于基于TAF-DPS的时钟展频电路，下面结合图4描述本公开的实施例提供一种基于TAF-DPS的时钟展频电路和时钟展频方法。
例如，如图4所示，该时钟展频电路可以包括控制电路11和信号生成电路12。控制电路11被配置为根据参考频率控制字和调制参数生成目标频率控制字；信号生成电路12被配置为根据目标频率控制字，生成并输出展频后的展频输出信号。也就是说，上述步骤S110和步骤S120可以由控制电路11执行，上述步骤S130可以由信号生成电路12执行。
例如，控制电路11可以通过硬件的方式或者硬件和软件结合的方式实现。
例如，如图4所示，在步骤S120中，调制参数可以包括与展频输出信号对应的参考展频深度系数δ re、调制速率V F和调制模式Am等。
例如，参考展频深度系数δ r表示调制幅度。参考展频深度系数δ re为根据上述任一实施例所述的展频电路的参数确定方法得到的标称展频深度系数。需要说明的是，关于标称频率控制字和标称展频深度系数的相关说明可以参考上述展频电路的参数确定方法的实施例中的相关描述，重复之处在此不再赘述。
例如，调制速率V F表示目标频率控制字随时间变化的速度。
例如，调制模式Am可以包括三角调制模式、正弦调制模式、随机调制模式和锯齿调制模式等。用户可以根据实际应用需求选择相应的调制模式，例如，不同时钟展频电路可以对应不同的调制模式。但不限于此，不同时钟展频电路也可以对应相同的调制模式。例如，同一个时钟展频电路也可以对应不同的调制模式，不同的调制模式可以分别与时钟展频电路的不同应用场景对应。本公开对调制模式的类型、选择方式等不作具体限制。
例如，在一些实施例中，参考展频深度系数δ re、调制模式Am和调制速率V F均可以由用户根据实际需求设置。
例如，如图4所示，控制电路11可以根据参考展频深度系数δ re、参考频 率控制字F re、调制模式Am和调制速率V F生成目标频率控制字。
例如，基于参考展频深度系数δ re和调制模式Am，展频后的展频输出信号的频率的表达式可以表示为：
Figure PCTCN2019083899-appb-000031
其中，f s表示展频输出信号的频率，f re可以表示参考频率控制字F re对应的频率，δ re表示参考展频深度系数，M(t)表示根据调制模式Am确定的调制函数，t表示时间。基于TAF-DPS生成的展频输出信号的频率与频率控制字一一对应且成反比例关系，具有小量线性的性质。因此，在将基于TAF-DPS的时钟展频电路应用于时钟展频时，可以采用与展频输出信号的频率相同的调制形式对频率控制字进行直接调制。
例如，基于上述分析，在步骤S120中，目标频率控制字表示为：
Figure PCTCN2019083899-appb-000032
其中，F(t)表示目标频率控制字，I为目标频率控制字的整数部分，r(t)为目标频率控制字的小数部分，r(t)随时间离散变化，F re表示参考频率控制字，即上面的公式(7)中的标称频率控制字。
例如，r(t)的范围为[0，1)，也就是说，r(t)在0至1之间变化，r(t)可以为0，但不能为1，从而目标频率控制字F(t)在两个整数之间变化。目标频率控制字的最大值和目标频率控制字的最小值满足以下公式：
0≤Fmax-Fmin＜1，
其中，Fmin表示频率控制字的最小值，Fmax表示频率控制字的最大值。
例如，目标频率控制字F(t)的整数部分I由参考频率控制字F re确定。目标频率控制字F(t)的小数部分r(t)由参考展频深度系数δ re、参考频率控制字F re、调制模式Am和调制速率V F确定。例如，参考上面的公式(7)，目标频率控制字F(t)的整数部分I可以为标称频率控制字F r(即参考频率控制字F re)的整数部分I r，为了保证输出的展频输出信号的品质，目标频率控制字F(t)的整数部分I在展频过程中始终保持不变。
例如，参考展频深度系数δ re为正数。
例如，参考展频深度系数δ re、参考频率控制字F re、调制模式Am和调制速率V F可以通过数据接口由用户通过输入装置(例如，键盘、触摸屏、触摸板、鼠标、旋钮等)直接输入至控制电路11。
例如，控制电路11可以包括调制模式子电路，调制模式子电路被配置为采用三角调制模式、锯齿调制模式、正弦调制模式和随机调制模式等调制模式中的任一种调制模式生成不同形状(例如三角波形状、正弦波形状、锯齿波形状和随机曲线等)的调制函数M(t)的时间序列。
例如，调制模式子电路可以包括时序逻辑模块、PRBS(Pseudo-Random Binary Sequence，伪随机二进制序列)模块、查找表等，时序逻辑模块可以包括加法器、存储器、减法器和比较器等。例如，对于三角调制模式、锯齿调制模式和正弦调制模式，调制函数M(t)是规律变化的近似曲线。因此，可以采用加法器、存储器、减法器和比较器等生成调制函数M(t)的时间序列。对于随机调制模式，调制函数M(t)是由一系列不规则变化的随机数值组成的，因此可以采用PRBS模块生成调制函数M(t)的时间序列，PRBS模块产生的伪随机数值有一个大的循环周期，从而可以近似的认为该伪随机数值是不规则变化。例如，PRBS电路可以包括一组寄存器。
例如，调制函数M(t)为随时间变化的受控函数，其变化的曲线为调制曲线(例如，正弦波曲线、三角波曲线、锯齿波曲线、Hershey-Kiss曲线、随机曲线等)，调制函数M(t)的变化的范围决定了不同的展频方式。例如，在一些实施例中，当展频方式为中心展频时，调制函数M(t)的取值范围可以为[-1,1]，也就是说，-1≤M(t)≤1；当展频方式为上展频时，调制函数M(t)的取值范围可以为[0,2]，也就是说，0≤M(t)≤2；当展频方式为下展频时，调制函数M(t)的取值范围可以为[-2,0]，也就是说，-2≤M(t)≤0。但不限于此，调制函数M(t)的取值范围可以根据实际需求设置，本公开对调制函数M(t)的取值范围和形式等不作具体限制。
例如，在一些实施例中，调制函数M(t)可以为原始调制函数，则调制函数M(t)可以表示为：
M(t)＝ξ(t)      (9)，
其中，ξ(t)表示原始调制函数。从而，将公式(9)代入上述公式(8)中，可以得到目标频率控制字表示为：
Figure PCTCN2019083899-appb-000033
例如，原始调制函数ξ(t)基于调制模式确定。例如，当调制模式为三角调制模式时，原始调制函数ξ(t)可以为三角函数；当调制模式为正弦调制模式时， 原始调制函数ξ(t)可以为正弦函数。
例如，步骤S130可以包括：确定参考基准时间单位；根据调制模式确定调制函数；以及基于调制函数、参考基准时间单位和目标频率控制字，确定展频输出信号。
例如，如图4所示，信号生成电路12包括基准时间单位生成器120和展频子电路121。基准时间单位生成器12被配置生成并输出参考基准时间单位Δ re，参考基准时间单位Δ re可以为根据上述展频电路的参数确定方法确定的标称基准时间单位Δ 1。
例如，基准时间单位生成器12包括基准时间单位生成子电路1201和调节子电路1202。
例如，基准时间单位生成子电路1201被配置生成并输出初始基准时间单位。
图5A示出了本公开一些实施例提供一种基准时间单位生成子电路的示意性框图；图5B示出了本公开一些实施例提供另一种基准时间单位生成子电路的示意性结构图；图6示出了本公开一些实施例提供的一种K个相位均匀间隔的基准输出信号的示意图。
例如，基准时间单位生成子电路1201被配置为生成并输出K个相位均匀间隔的基准输出信号以及初始基准时间单位。基准时间单位生成子电路1201可以利用锁相环(Phase Locked Loop，PLL)、延迟锁相环(Delay locked Loop，DLL)或约翰逊计数器(Johnson Counter)等来产生K个相位均匀间隔的基准输出信号。如图5A所示，在一些实施例中，基准时间单位生成子电路1201可以包括压控振荡器(VCO)1211、锁相环回路电路1212和K个输出端1213。压控振荡器1211被配置为以预定振荡频率振荡。锁相环回路电路1212被配置为将压控振荡器1211的输出频率锁定为基准输出频率。K个输出端1213被配置为输出K个相位均匀间隔的基准输出信号，其中，K为大于1的正整数。例如，K＝16、32、128或其他数值。
例如，初始基准时间单位可以表示为Δ in，初始基准输出频率可以表示为f d。如图6所示，初始基准时间单位Δ in是K个输出端1203输出的任意两个相邻的输出信号之间的时间跨度(time span)。初始基准时间单位Δ in通常由多级压控振荡器1211生成。压控振荡器1211生成的信号的频率f vco可以通过锁相环回路电路1212锁定到已知的初始基准输出频率f d，即f d＝f vco。
例如，初始基准时间单位Δ in可以使用以下公式计算：
Δ in＝T d/K＝1/(K·f d)
其中，T d表示多级压控振荡器1201生成的信号的周期。f Δ表示初始基准时间单位的频率的值，即f Δ＝1/Δ in＝K·f d。
例如，如图5B所示，锁相环回路电路1212包括相位检测器PFD、环路滤波器LPF和分频器FN。例如，在本公开实施例中，首先，例如具有输入频率的输入信号可以被输入到相位检测器，然后进入环路滤波器，接着进入压控振荡器，最后压控振荡器生成的具有预定振荡频率f vco的信号可以通过分频器进行分频以得到分频信号的分频频率f vco/N 0，其中，N 0表示分频器的分频系数，N 0为实数，且N 0大于或等于1。分频频率f vco/N 0反馈到相位检测器，相位检测器用于比较参考信号的输入频率与分频频率f vco/N 0，当输入频率与分频频率f vco/N的频率和相位均相等时，两者之间的误差为零，此时，锁相环回路电路1212处于锁定状态。
值得注意的是，图5B所示的电路结构仅是基准时间单位生成子电路1201的一种示例性的实现方式。基准时间单位生成子电路1201的具体结构并不限于此，其还可以由其他电路结构构建而成，本公开在此不作限制。例如，K和Δ in可以根据实际需求预先设置，且固定不变。
例如，调节子电路1202被配置为根据初始基准时间单位得到基准时间单位。例如，在一些示例中，调节子电路1202被配置为对初始基准时间单位Δ in进行调整以得到参考基准时间单位Δ re，或者，在另一些示例中，调节子电路1202被配置为直接将初始基准时间单位Δ in输出作为参考基准时间单位Δ re。
图7示出了本公开一些实施例提供的一种展频子电路的示意性框图；图8示出了本公开一些实施例提供的一种展频子电路的工作原理示意图。
例如，如图7所示，展频子电路121包括第一输入模块1211、第二输入模块1212和输出模块1213。
例如，第一输入模块1211被配置为接收来自基准时间单位生成器120的K个相位均匀间隔的基准输出信号和参考基准时间单位Δ re。第二输入模块1212被配置为接收来自控制电路11的目标频率控制字F(t)。输出模块1213用于生成第一周期和第二周期，根据第一周期和第二周期生成展频输出信号，以及输出该展频输出信号。第一周期和第二周期的出现可能性由目标频率控制字F(t)的小数部分r(t)的值控制。
例如，展频子电路121可以包括时间平均频率直接周期(TAF-DPS)合成器，即TAF-DPS合成器可以作为本公开实施例中的展频子电路121的一种具体实现方式。例如，TAF-DPS合成器可以使用专用集成电路(例如，ASIC)或者可编程逻辑器件(例如，FPGA)来实现。或者，TAF-DPS合成器可以使用传统的模拟电路器件来实现。本公开在此不作限定。
下面，将参考图8描述基于TAF-DPS合成器的展频子电路121的工作原理。
例如，如图8所示，基于TAF-DPS合成器510的展频子电路121具有两个输入：参考基准时间单位520和目标频率控制字530。目标频率控制字530表示为F(t)，F(t)＝I+r(t)，且I是大于1的整数，r(t)是分数，且随时间离散变化。
例如，TAF-DPS合成器510具有一个输出CLK 550。该输出CLK 550是合成的时间平均频率时钟信号。在本公开的实施例中，输出CLK 550即为展频输出信号。根据参考基准时间单位520，TAF-DPS合成器510可以产生两种类型的周期，即第一周期T A＝I·Δ re和第二周期T B＝(I+1)·Δ re。展频输出信号CLK 550是时钟脉冲串540，且该时钟脉冲串540由第一周期T A 541和第二周期T B 542以交织的方式构成。分数r(t)用于控制第二周期T B的出现概率，因此，r(t)也可以确定第一周期T A的出现概率。
例如，如图8所示，展频输出信号CLK 550的周期T TAF可以用下面的公式表示：
T TAF＝(1-r(t))·T A+r(t)·T B
＝T A+r(t)·(T B-T A)＝T A+r(t)·Δ re＝I·Δ re+r(t)·Δ re＝(I+r(t))·Δ re
因此，当目标频率控制字530为F(t)＝I+r(t)时，可以得到：
T TAF＝F(t)·Δ re      (10)
例如，基于上述公式(10)，展频输出信号CLK 550的频率f css可以表示为：
f css＝1/T TAF＝1/(F(t)·Δ re)    (11)
由上面的公式(10)和公式(11)可知，TAF-DPS合成器510输出的展频输出信号CLK 550的周期T TAF与目标频率控制字530成线性比例，且一一对应，展频输出信号CLK 550的频率f css与频率控制字530成反比例，具有小量线性的形状。当目标频率控制字530发生变化时，TAF-DPS合成器510输出的展频输出信号CLK 550的周期T TAF也将以相同的形式发生变化，展频输出信 号CLK 550的频率也相应变化。
图9A为本公开一些实施例提供的一种正弦调制模式下的频率调制的示意图；图9B为本公开一些实施例提供的一种三角调制模式下的频率调制的示意图；图9C为本公开一些实施例提供的一种锯齿调制模式下的频率调制的示意图；图9D为本公开一些实施例提供的一种随机调制模式下的频率调制的示意图。
例如，在正弦调制模式下，当调制函数M(t)随时间变化的时间间隔较短时，调制函数M(t)近似为正弦波曲线，由此，目标频率控制字F(t)也近似为正弦波曲线，如公式(11)所示，基于TAF-DPS生成的展频输出信号的频率f css与目标频率控制字530为对应的倒数形式，其具有小量线性的性质，从而，如图9A所示，展频输出信号的频率f css也近似为一条随时间变化的正弦波曲线。类似地，在三角波调制模式下，如图9B所示，展频输出信号的频率f css近似为一条随时间变化的三角波曲线；在锯齿调制模式下，如图9C所示，展频输出信号的频率f css近似为一条随时间变化的锯齿波曲线；在随机调制模式下，如图9D所示，展频输出信号的频率f css近似为一条随时间变化的随机曲线。
需要说明的是，在图9A至图9D中，横坐标表示时间t，纵坐标表示展频输出信号的频率f css。
由此，在本公开实施例提供的时钟展频方法中，仅通过控制频率控制字F(t)，即可以实现对展频输出信号的频率的控制，当控制频率控制字F(t)具有不同调制模式下的波形，则可以实现相应调制模式的展频效果，即在频域上表现为在某个频段范围内扫频，如果频率控制字的最大值和最小值对应的频率差越大，则展频的范围就越宽，即降低电磁干扰的效果就越好。同时，当电路系统开启展频功能时，该电路系统的基本功能并不受影响，从而在电路系统正常工作时，可以一直开启展频功能，既保证了电路系统的安全性，又降低了电路系统的电磁干扰。
另外，当F(t)在两个整数之间变化时，展频输出信号CLK 550的周期只有两种类型，一种长周期T B，一种短周期T A。由此，在设计数字电路时，只需使用短周期来约束建立时间即可，保持时间与周期无关，只与边缘有关。对于包含该时钟展频电路的电路系统，当电路系统开启展频功能和不开启展频功能时，TAF-DPS合成器510输出的信号的周期都只存在两周周期类型，不影响电路系统的正常功能，既保证了电路系统的正常工作，又降低了电磁干扰。
例如，第一周期T A＝I·Δ re和第二周期T B＝(I+1)·Δ re，即用于合成展频输出信号的周期的两种基本周期T A和T B均与目标频率控制字的整数部分I有关，为保证输出的展频输出信号的品质，目标频率控制字F(t)的整数部分I在展频过程中始终保持不变，即I＝I r(即标称频率控制字的整数部分)。在展频过程中，通过使目标频率控制字F(t)的小数部分r(t)随时间变化，从而使目标频率控制字F(t)随时间变化，最终，展频输出信号的频率f css在一定范围内变化，实现时钟展频。由于TAF-DPS电路的开环直接数字合成原理，在展频过程中并不会引入额外的时钟抖动(jitter)，当目标频率控制字F(t)的整数部分I不变，则可以保证展频输出信号的频率在有效的范围内变化，使其能够保持电路系统间数据同步的完整性。
例如，结合上述的公式(7)和(8)，可以得到目标频率控制字表示为：
Figure PCTCN2019083899-appb-000034
其中，I＝I r，
Figure PCTCN2019083899-appb-000035
由于r(t)的范围为[0，1)，即
Figure PCTCN2019083899-appb-000036
当I保持不变时，则I r≤F(t)<I r+1，从而目标频率控制字的最大值Fmax为I r+1，目标频率控制字的最小值Fmin为I r。当采用边界展频时，则展频输出信号的频率的第一边界频率
Figure PCTCN2019083899-appb-000037
和第二边界频率
Figure PCTCN2019083899-appb-000038
分别对应相邻的整数端值，即充分利用了频率控制字的调节能力，最大化展频深度。
需要说明的是，当采用中心展频、上展频或下展频时，当标称频率控制字F r确定的小数部分r r接近于0或者1时，则造成展频深度大幅受限。
图10为本公开一些实施例提供的第一边界频率、第二边界频率和参考频率的分布示意图。
例如，基于上述公式(11)，与标称频率控制字F r对应的参考频率
Figure PCTCN2019083899-appb-000039
可以表示为：
Figure PCTCN2019083899-appb-000040
例如，基于上述参考频率
Figure PCTCN2019083899-appb-000041
的公式，参考基准时间单位Δ re可以表示为：
Figure PCTCN2019083899-appb-000042
例如，根据公式(11)可知，展频输出信号的频率与频率控制字成反比例关系，从而展频输出信号的频率的最大值为1/(Fmin*Δ re)，展频输出信号的频率的最小值为1/(Fmax*Δ re)，从而展频输出信号的频率的展频深度可以表示为：FD＝1/(Fmin*Δ re)-1/(Fmax*Δ re)，其中，FD表示展频深度。
例如，第一边界频率
Figure PCTCN2019083899-appb-000043
对应目标频率控制字的最小值Fmin，即第一边界频率
Figure PCTCN2019083899-appb-000044
表示展频输出信号的频率的最大值1/(Fmin*Δ re)。例如，第一边界频率
Figure PCTCN2019083899-appb-000045
可以表示为：
Figure PCTCN2019083899-appb-000046
例如，第二边界频率
Figure PCTCN2019083899-appb-000047
对应目标频率控制字的最大值Fmax，即第二边界频率
Figure PCTCN2019083899-appb-000048
表示展频输出信号的频率的最小值1/(Fmax*Δ re)。例如，第二边界频率
Figure PCTCN2019083899-appb-000049
可以表示为：
Figure PCTCN2019083899-appb-000050
例如，如图10所示，参考频率
Figure PCTCN2019083899-appb-000051
小于第一边界频率
Figure PCTCN2019083899-appb-000052
且大于第二边界频率
Figure PCTCN2019083899-appb-000053
图10所示的Tr表示参考频率
Figure PCTCN2019083899-appb-000054
对应的周期。
例如，如图10所示，当展频输出信号的频率为第一边界频率
Figure PCTCN2019083899-appb-000055
时，展频输出信号的周期均由第一周期T A组成；当展频输出信号的频率为第二边界频率
Figure PCTCN2019083899-appb-000056
时，展频输出信号的周期均由第二周期T B组成；当展频输出信号的频率为参考频率
Figure PCTCN2019083899-appb-000057
时，展频输出信号的周期由第一周期T A和第二周期T B组成，第二周期T B的出现概率由r r确定，因此，r r也可以确定第一周期T A的出现概率。
例如，如图10所示，第一周期T A和第二周期T B之差为Δ re。
例如，展频输出信号CLK 550的频率f css的取值范围为
Figure PCTCN2019083899-appb-000058
从而f css表示为：
Figure PCTCN2019083899-appb-000059
例如，基于上述公式(8)和公式(11)，展频输出信号的展频频率可以表示为：
Figure PCTCN2019083899-appb-000060
其中，f(M(t))表示展频频率，F(t)表示目标频率控制字，且
Figure PCTCN2019083899-appb-000061
F re表示参考频率控制字，δ re表示参考展频深度系数，M(t)表示调制函数，Δ re表示参考基准时间单位，f re表示与参考频率控制字对应的频率。
例如，当调制函数M(t)为原始调制函数时，即将公式(9)代入上述公式(12)中，可以得到展频输出信号的展频频率可以表示为：
Figure PCTCN2019083899-appb-000062
例如，根据上述公式(11)可知，目标频率控制字F(t)与展频输出信号的展频频率成反相关，因此，基于上述公式(13)确定的展频输出信号的展频频率存在关系非线性畸变和值域偏移。若要精确补偿倒数关系造成的非线性畸变和值域偏移，可以对原始调制函数进行补偿变换，并将补偿后的调制函数用于频率调制，从而使展频输出信号的展频频率更准确。
例如，在另一些实施例中，调制函数M(t)可以为对原始调制函数进行补偿后的补偿调制函数，则调制函数M(t)可以表示为：
Figure PCTCN2019083899-appb-000063
或
Figure PCTCN2019083899-appb-000064
其中，E(ξ(t))表示补偿调制函数，ξ(t)表示原始调制函数。
例如，将补偿调制函数E(ξ(t))代入上述公式(8)中，可以得到补偿后的目标频率控制字F(t)表示为：
Figure PCTCN2019083899-appb-000065
或者
Figure PCTCN2019083899-appb-000066
例如，将补偿调制函数E(ξ(t))代入上述公式(12)中，可以得到补偿后的展频输出信号的频率可以表示为：
Figure PCTCN2019083899-appb-000067
或者
Figure PCTCN2019083899-appb-000068
图11为本公开一些实施例提供的一种在不同展频深度下的展频前后频谱对比结果的示意图。
例如，在一些实施例中，K＝16，初始基准输出频率f d为100MHz，从而初始基准时间单位Δ in＝(16*100MHz) -1＝0.625ns，将该初始基准时间单位Δ in获取为 参考基准时间单位Δ re，从而参考基准时间单位Δ re也为0.625ns。基于参考基准时间单位Δ re合成频率为140MHz的输出信号，即目标频率f T为140MHz。图11所示的各条频谱曲线均是基于参考基准时间单位Δ re＝0.625ns得到的。
例如，如图11所示，曲线500表示没有经过展频的频率曲线，例如，目标频率的曲线。曲线501表示当展频深度系数为5000ppm时的第一展频频率的曲线，曲线502表示当展频深度系数为10000ppm时的第二展频频率的曲线，曲线503表示当展频深度系数为50000ppm时的第三展频频率的曲线，曲线504表示在边界展频时的第四展频频率的曲线。例如，第一展频频率、第二展频频率和第三展频频率均是采用下展频的方式进行展频而得到的，第一展频频率、第二展频频率、第三展频频率和第四展频频率均是采用三角调制模式进行展频而得到的。第一展频频率、第二展频频率、第三展频频率和第四展频频率对应的调制速率(modulation rate)均为30kHz。
例如，在边界展频下，第四展频频率的最大值为145.455MHZ，第四展频频率的最小值为133.333MHZ。
例如，目标频率对应的频率控制字为：F T＝I ad+r ad＝1/(f T*Δ re)＝(140MHz*0.625ns) -1＝11.4285，也就是说，I ad为11，r ad为0.4285。
例如，当展频方式为边界展频时，基于上述公式(2)，展频深度系数表示为：
Figure PCTCN2019083899-appb-000069
例如，如图11所示，当展频深度系数越大，即展频深度越大，则能更好地分散时钟信号的频谱的能量。第四展频频率的展频深度系数大于第一展频频率、第二展频频率、第三展频频率中的任一个的展频深度系数，即第四展频频率的展频深度大于第一展频频率、第二展频频率、第三展频频率中任意一个的的展频深度。也就是说，边界展频能够实现最大化地分散能量。从实验结果可以看出，边界展频能够在保持时钟信号质量的同时实现展频深度的最大化，有效抑制频谱峰值，降低EMI尖峰噪声。边界展频可以应用于所有类型的展频调制曲线形状。
本公开一些实施例还提供一种展频电路的参数确定装置。图12为本公开一些实施例提供的一种展频电路的参数确定装置的示意性框图。
例如，如图12所示，本公开一些实施例提供的展频电路的参数确定装置 600可以包括存储器60和处理器61。
例如，存储器60可以用于存储计算机可读指令。例如，处理器61可以用于运行计算机可读指令，计算机可读指令被处理器61运行时能够执行根据上述任一实施例所述的展频电路的参数确定方法。
例如，处理器61可以是中央处理单元(CPU)、张量处理器(TPU)等具有数据处理能力和/或程序执行能力的器件，并且可以控制展频电路的参数确定装置600中的其它组件以执行期望的功能。中央处理元(CPU)可以为X86或ARM架构等。
例如，存储器60可以包括一个或多个计算机程序产品，所述计算机程序产品可以包括各种形式的计算机可读存储介质，例如易失性存储器和/或非易失性存储器。所述易失性存储器例如可以包括随机存取存储器(RAM)和/或高速缓冲存储器(cache)等。所述非易失性存储器例如可以包括只读存储器(ROM)、硬盘、可擦除可编程只读存储器(EPROM)、便携式紧致盘只读存储器(CD-ROM)、USB存储器、闪存等。在所述计算机可读存储介质上可以存储一个或多个计算机可读指令，处理器61可以运行所述计算机可读指令，以实现展频电路的参数确定装置600的各种功能。
例如，存储器60和处理器61之间可以通过网络或总线系统实现数据传输。存储器60和处理器61之间可以直接或间接地互相通信。
例如，存储器60还可以存储基准展频深度系数、标称展频深度系数和标称频率控制字等数据。
需要说明的是，关于利用展频电路的参数确定装置60执行展频电路的参数确定方法的过程的详细说明可以参考展频电路的参数确定方法的实施例中的相关描述，重复之处不再赘述。
本公开一些实施例还提供一种时钟展频装置。图13为本公开一些实施例提供的一种时钟展频装置的示意性框图。
例如，如图13所示，本公开一些实施例提供的时钟展频装置700可以包括存储器70和处理器71。
例如，存储器70可以用于存储计算机可读指令。处理器71可以用于运行计算机可读指令，计算机可读指令被处理器71运行时能够执行根据上述任一实施例所述的时钟展频方法。
例如，处理器71可以是中央处理单元(CPU)、张量处理器(TPU)等具 有数据处理能力和/或程序执行能力的器件，并且可以控制时钟展频装置700中的其它组件以执行期望的功能。中央处理元(CPU)可以为X86或ARM架构等。
例如，存储器70可以包括一个或多个计算机程序产品，所述计算机程序产品可以包括各种形式的计算机可读存储介质，例如易失性存储器和/或非易失性存储器。所述易失性存储器例如可以包括随机存取存储器(RAM)和/或高速缓冲存储器(cache)等。所述非易失性存储器例如可以包括只读存储器(ROM)、硬盘、可擦除可编程只读存储器(EPROM)、便携式紧致盘只读存储器(CD-ROM)、USB存储器、闪存等。在所述计算机可读存储介质上可以存储一个或多个计算机可读指令，处理器71可以运行所述计算机可读指令，以实现时钟展频装置700的各种功能。
例如，存储器70和处理器71之间可以通过网络或总线系统实现数据传输。存储器70和处理器71之间可以直接或间接地互相通信。
例如，存储器70还可以存储参考频率控制字F re、调制速率V F、参考展频深度系数δ re等。
需要说明的是，关于利用时钟展频装置700执行时钟展频方法的过程的详细说明可以参考时钟展频方法的实施例中的相关描述，重复之处在此不再赘述。
本公开一些实施例还提供一种时钟展频装置。例如，时钟展频装置可以包括展频电路的参数确定电路、控制电路和信号生成电路。例如，展频电路的参数确定电路用于生成并输出标称频率控制字、标称展频深度系数等参数。控制电路用于获取参考频率控制字和调制参数，以及根据参考频率控制字和调制参数确定目标频率控制字，其中，目标频率控制字随时间离散变化。例如，参考频率控制字即为展频电路的参数确定电路生成的标称频率控制字，也就是说，控制电路用于获取标称频率控制字作为参考频率控制字。信号生成电路被配置为根据目标频率控制字，生成并输出展频后的展频输出信号。
需要说明的是，展频电路的参数确定电路可以包括上述任一实施例所述的展频电路的参数确定装置。关于控制电路和信号生成电路的相关说明可以分别参考上述时钟展频方法的实施例中关于控制电路11和信号生成电路12的相关描述，在此不再赘述。
本公开至少一实施例还提供一种电子设备。例如，电子设备可以包括上述任一项所述的时钟展频装置。
例如，该电子设备可以为液晶显示装置等，时钟展频装置可以应用于液晶显示装置的逻辑板(TCON)中。由于该时钟展频装置基于TAF-DPS实现时钟展频，当开启液晶显示装置的展频功能，该液晶显示装置的显示效果不受影响。
需要说明的是，关于时钟展频装置的详细说明可以参考上述时钟展频装置的实施例中的相关描述，在此不再赘述。
对于本公开，还有以下几点需要说明：
(1)本公开实施例附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本发明的实施例的附图中，层或结构的厚度和尺寸被放大。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
(3)在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种展频电路的参数确定方法，包括：
    获取基准时间单位和目标频率；
    根据所述基准时间单位和所述目标频率，确定展频深度系数；
    判断所述展频深度系数是否大于等于基准展频深度系数；
    在所述展频深度系数小于所述基准展频深度系数时，调整所述基准时间单位直至其对应的展频深度系数大于等于所述基准展频深度系数；
    在所述展频深度系数大于等于所述基准展频深度系数的情况下，将所述展频深度系数确定为标称展频深度系数，并根据所述标称展频深度系数，确定标称频率控制字。
  2. 根据权利要求1所述的展频电路的参数确定方法，其中，确定展频深度系数包括：
    根据所述基准时间单位和所述目标频率确定频率控制字；
    根据所述频率控制字，确定所述展频深度系数。
  3. 根据权利要求2所述的展频电路的参数确定方法，其中，根据所述频率控制字，确定所述展频深度系数包括：
    确定展频方式；
    根据所述展频方式和所述频率控制字，确定所述展频深度系数。
  4. 根据权利要求3所述的展频电路的参数确定方法，其中，所述展频方式包括边界展频、中心展频、上展频或下展频；
    当所述展频方式为所述边界展频时，所述展频深度系数表示为：
    Figure PCTCN2019083899-appb-100001
    当所述展频方式为所述中心展频时，所述展频深度系数表示为：
    Figure PCTCN2019083899-appb-100002
    或
    Figure PCTCN2019083899-appb-100003
    当所述展频方式为所述上展频时，所述展频深度系数表示为：
    Figure PCTCN2019083899-appb-100004
    当所述展频方式为所述下展频时，所述展频深度系数表示为：
    Figure PCTCN2019083899-appb-100005
    其中，δ max表示所述展频深度系数，I ad为所述频率控制字的整数部分，r ad为所述频率控制字的小数部分。
  5. 根据权利要求4所述的展频电路的参数确定方法，其中，根据所述标称展频深度系数，确定标称频率控制字包括：
    根据所述标称展频深度系数，确定所述标称频率控制字的整数部分和小数部分，
    其中，所述标称频率控制字表示为：F r＝I r+r r，F r表示所述标称频率控制字，I r表示所述标称频率控制字F r的整数部分，r r表示所述标称频率控制字F r的小数部分。
  6. 根据权利要求5所述的展频电路的参数确定方法，其中，在所述展频深度系数大于等于所述基准展频深度系数，且将所述展频深度系数确定为标称展频深度系数时，
    在所述展频方式为所述边界展频的情况下，所述标称频率控制字的整数部分I r＝I ad，所述标称频率控制字的小数部分r r＝0.5；
    在所述展频方式为所述中心展频、所述上展频或所述下展频的情况下，所述标称频率控制字的整数部分I r＝I ad，所述标称频率控制字的小数部分r r＝r ad。
  7. 根据权利要求5或6所述的展频电路的参数确定方法，其中，在所述展频深度系数大于等于所述基准展频深度系数时，将所述基准时间单位确定为标称基准时间单位，
    所述标称频率控制字与参考频率对应，所述参考频率表示为：
    Figure PCTCN2019083899-appb-100006
    其中，f s r表示所述参考频率，f T表示所述目标频率，F T表示所述频率控制字，
    所述标称频率控制字表示为：F r＝I r+r r＝1/(f s r*Δ 1)，Δ 1表示所述标称基准时间单位。
  8. 一种基于权利要求1-7的任一所述的展频电路的参数确定方法的时钟展频方法，包括：
    获取参考频率控制字，其中，所述参考频率控制字为根据所述权利要求1-7的任一所述的展频电路的参数确定方法得到的所述标称频率控制字；
    根据所述参考频率控制字和调制参数，确定目标频率控制字，其中，所述目标频率控制字随时间离散变化；
    根据所述目标频率控制字，生成展频后的展频输出信号，其中，所述展频输出信号与所述目标频率控制字对应。
  9. 根据权利要求8所述的时钟展频方法，其中，所述调制参数包括调制模式和参考展频深度系数，所述参考展频深度系数为根据所述权利要求1-7的任一所述的展频电路的参数确定方法得到的所述标称展频深度系数，
    所述目标频率控制字表示为：
    Figure PCTCN2019083899-appb-100007
    其中，F(t)表示所述目标频率控制字，F re表示所述参考频率控制字，δ re表示所述参考展频深度系数，M(t)表示根据所述调制模式确定的调制函数，t表示时间。
  10. 根据权利要求9所述的时钟展频方法，其中，所述调制函数为原始调制函数，则所述调制函数表示为：
    M(t)＝ξ(t)，
    其中，ξ(t)表示所述原始调制函数；或者，
    所述调制函数为对原始调制函数进行补偿后的补偿调制函数，则所述调制函数表示为：
    Figure PCTCN2019083899-appb-100008
    或
    Figure PCTCN2019083899-appb-100009
    其中，E(ξ(t))表示所述补偿调制函数，ξ(t)表示所述原始调制函数。
  11. 根据权利要求8所述的时钟展频方法，其中，所述调制参数包括调制模式，
    根据所述目标频率控制字，生成展频后的展频输出信号包括：
    确定参考基准时间单位；
    根据所述调制模式确定调制函数；
    基于所述调制函数、所述参考基准时间单位和所述目标频率控制字，确定所述展频输出信号，
    其中，所述展频输出信号的展频频率表示为：
    Figure PCTCN2019083899-appb-100010
    其中，f(M(t))表示所述展频频率，F(t)表示所述目标频率控制字，且
    Figure PCTCN2019083899-appb-100011
    F re表示所述参考频率控制字，δ re表示所述参考展频深度系数，M(t)表示所述调制函数，Δ re表示所述参考基准时间单位，f re表示与所述参考频率控制字对应的频率。
  12. 根据权利要求11所述的时钟展频方法，其中，所述调制函数为原始调制函数，则所述调制函数表示为：
    M(t)＝ξ(t)，
    其中，ξ(t)表示所述原始调制函数；或者，
    所述调制函数为对原始调制函数进行补偿后的补偿调制函数，则所述调制函数表示为：
    Figure PCTCN2019083899-appb-100012
    或
    Figure PCTCN2019083899-appb-100013
    其中，E(ξ(t))表示所述补偿调制函数，ξ(t)表示所述原始调制函数。
  13. 根据权利要求9-12任一项所述的时钟展频方法，其中，所述调制模式包括三角调制模式、锯齿调制模式、正弦调制模式或随机调制模式。
  14. 根据权利要求8-13任一项所述的时钟展频方法，其中，所述目标频率控制字的最大值Fmax和所述目标频率控制字的最小值Fmin满足以下公式：0≤Fmax-Fmin＜1。
  15. 一种展频电路的参数确定装置，包括：
    存储器，用于存储计算机可读指令；以及
    处理器，用于运行所述计算机可读指令，所述计算机可读指令被所述处理器运行时执行根据权利要求1-7任一项所述的展频电路的参数确定方法。
  16. 一种时钟展频装置，包括：
    存储器，用于存储计算机可读指令；以及
    处理器，用于运行所述计算机可读指令，所述计算机可读指令被所述处理器运行时执行根据权利要求8-14任一项所述的时钟展频方法。
PCT/CN2019/083899 2019-04-23 2019-04-23 展频电路的参数确定方法及装置、时钟展频方法及装置 WO2020215206A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201980000531.1A CN110214418B (zh) 2019-04-23 2019-04-23 展频电路的参数确定方法及装置、时钟展频方法及装置
US16/651,511 US11139819B2 (en) 2019-04-23 2019-04-23 Parameter determination method and device for spread spectrum circuit, and clock spread spectrum method and device
PCT/CN2019/083899 WO2020215206A1 (zh) 2019-04-23 2019-04-23 展频电路的参数确定方法及装置、时钟展频方法及装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/083899 WO2020215206A1 (zh) 2019-04-23 2019-04-23 展频电路的参数确定方法及装置、时钟展频方法及装置

Publications (1)

Publication Number Publication Date
WO2020215206A1 true WO2020215206A1 (zh) 2020-10-29

Family

ID=67797955

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/083899 WO2020215206A1 (zh) 2019-04-23 2019-04-23 展频电路的参数确定方法及装置、时钟展频方法及装置

Country Status (3)

Country Link
US (1) US11139819B2 (zh)
CN (1) CN110214418B (zh)
WO (1) WO2020215206A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115733601A (zh) * 2022-10-12 2023-03-03 龙芯中科技术股份有限公司 时钟信号的展频处理方法、装置、电子设备及存储介质

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111446962B (zh) * 2020-04-03 2023-12-12 京东方科技集团股份有限公司 时钟信号产生电路、时钟信号产生方法及电子设备
CN111710313B (zh) * 2020-07-14 2022-06-03 京东方科技集团股份有限公司 显示面板水波纹的消除方法及消除装置、显示装置
CN113972902B (zh) 2020-07-23 2024-08-02 京东方科技集团股份有限公司 时钟信号产生电路、时钟信号产生方法及电子设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6591230B1 (en) * 1999-11-12 2003-07-08 Texas Instruments Incorporated Coprocessor for synthesizing signals based upon quadratic polynomial sinusoids
CN104283557A (zh) * 2013-10-17 2015-01-14 广州硅芯电子科技有限公司 Led显示屏驱动装置、方法和锁相环电路
CN106708166A (zh) * 2017-01-09 2017-05-24 京东方科技集团股份有限公司 信号生成器和信号生成方法
CN107665661A (zh) * 2017-10-24 2018-02-06 惠科股份有限公司 一种显示装置及其驱动方法和驱动系统
CN108446084A (zh) * 2018-03-05 2018-08-24 深圳创维数字技术有限公司 一种展频控制方法、电子设备及存储介质
CN109217846A (zh) * 2018-07-30 2019-01-15 重庆湃芯入微科技有限公司 一种用于时钟展频的可重构三角波发生器

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791387A (en) * 1986-12-16 1988-12-13 Matsushita Electric Industrial Co., Ltd. Microwave band frequency synthesizer
US5631920A (en) 1993-11-29 1997-05-20 Lexmark International, Inc. Spread spectrum clock generator
US5488627A (en) 1993-11-29 1996-01-30 Lexmark International, Inc. Spread spectrum clock generator and associated method
US6850554B1 (en) * 1999-11-09 2005-02-01 Cypress Semiconductor Corp. Circuit and method for controlling a spread spectrum transition
US6975148B2 (en) * 2002-12-24 2005-12-13 Fujitsu Limited Spread spectrum clock generation circuit, jitter generation circuit and semiconductor device
JP4373267B2 (ja) * 2003-07-09 2009-11-25 株式会社ルネサステクノロジ スプレッドスペクトラムクロック発生器及びそれを用いた集積回路装置
US20080080655A1 (en) * 2006-10-02 2008-04-03 International Business Machines Corporation Precise frequency rail to rail spread spectrum generation
US7894564B2 (en) * 2006-11-07 2011-02-22 Via Technologies, Inc. Phase modulation method for spread spectrum clock generator
CN101404569B (zh) * 2007-11-23 2011-04-27 硅谷数模半导体（北京）有限公司 对参考时钟信号进行展频的装置和方法
US8120389B2 (en) * 2008-08-05 2012-02-21 Texas Instruments Incorporated Digital to frequency synthesis using flying-adder with dithered command input
US8085106B2 (en) * 2008-10-09 2011-12-27 Muzahid Bin Huda Method and apparatus for dynamic modulation
JP5257089B2 (ja) * 2009-01-15 2013-08-07 株式会社リコー 画像読取装置および画像形成装置
WO2012117531A1 (ja) * 2011-03-01 2012-09-07 富士通株式会社 クロックジェネレータ及びそれを含むシステム
JP6360386B2 (ja) * 2014-08-12 2018-07-18 ルネサスエレクトロニクス株式会社 スペクトラム拡散クロック生成回路
US10973440B1 (en) * 2014-10-26 2021-04-13 David Martin Mobile control using gait velocity
JP6572542B2 (ja) * 2015-01-26 2019-09-11 株式会社ソシオネクスト 論理シミュレーション方法、論理シミュレーション装置及びプログラム
CN105049002B (zh) * 2015-07-02 2018-07-31 深圳市韬略科技有限公司 一种电磁兼容的展频装置和产生展频时钟信号的方法
US10164529B2 (en) * 2015-09-16 2018-12-25 Semiconductor Components Industries, Llc Spread spectrum clock generator and method
CN105933001B (zh) * 2016-04-19 2018-11-20 福州瑞芯微电子股份有限公司 一种减少电路中电磁干扰的装置及方法
US9923566B1 (en) * 2016-08-30 2018-03-20 Stmicroelectronics International N.V. Spread spectrum clock generator
US10686458B1 (en) * 2017-08-01 2020-06-16 Liming Xiu Method and apparatus for improving frequency source frequency accuracy and frequency stability
CN108429551B (zh) * 2018-01-31 2022-07-05 京东方科技集团股份有限公司 一种电子设备的控制方法及电子设备
EP3907890A4 (en) * 2019-01-02 2022-08-17 BOE Technology Group Co., Ltd. FREQUENCY ADJUSTMENT DEVICE AND ASSOCIATED FREQUENCY ADJUSTMENT METHOD, AND ELECTRONIC DEVICE
CN111642138B (zh) * 2019-01-02 2023-12-26 京东方科技集团股份有限公司 锁频环、电子设备和频率生成方法
US11381229B2 (en) * 2019-04-23 2022-07-05 Beijing Boe Technology Development Co., Ltd. Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method
JP2021057635A (ja) * 2019-09-26 2021-04-08 京セラドキュメントソリューションズ株式会社 画像処理装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6591230B1 (en) * 1999-11-12 2003-07-08 Texas Instruments Incorporated Coprocessor for synthesizing signals based upon quadratic polynomial sinusoids
CN104283557A (zh) * 2013-10-17 2015-01-14 广州硅芯电子科技有限公司 Led显示屏驱动装置、方法和锁相环电路
CN106708166A (zh) * 2017-01-09 2017-05-24 京东方科技集团股份有限公司 信号生成器和信号生成方法
CN107665661A (zh) * 2017-10-24 2018-02-06 惠科股份有限公司 一种显示装置及其驱动方法和驱动系统
CN108446084A (zh) * 2018-03-05 2018-08-24 深圳创维数字技术有限公司 一种展频控制方法、电子设备及存储介质
CN109217846A (zh) * 2018-07-30 2019-01-15 重庆湃芯入微科技有限公司 一种用于时钟展频的可重构三角波发生器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115733601A (zh) * 2022-10-12 2023-03-03 龙芯中科技术股份有限公司 时钟信号的展频处理方法、装置、电子设备及存储介质

Also Published As

Publication number Publication date
CN110214418B (zh) 2022-12-27
CN110214418A (zh) 2019-09-06
US20210242874A1 (en) 2021-08-05
US11139819B2 (en) 2021-10-05

Similar Documents

Publication Publication Date Title
WO2020215206A1 (zh) 展频电路的参数确定方法及装置、时钟展频方法及装置
US11916557B2 (en) Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method
JP5672092B2 (ja) スペクトラム拡散クロック発生回路
US8024598B2 (en) Apparatus and method for clock generation with piecewise linear modulation
US9742447B2 (en) Clock signal generating apparatus, clock signal generating method, and medium
US8120389B2 (en) Digital to frequency synthesis using flying-adder with dithered command input
US8433024B2 (en) Spread spectrum clock generator and method for adjusting spread amount
US9280928B2 (en) Apparatus and method for driving LED display
US11949420B2 (en) Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method
US20060091964A1 (en) Method and apparatus for jitter reduction in phase locked loops
Li et al. Dual-loop spread-spectrum clock generator
TW201424271A (zh) 展頻時脈產生器
US8009719B2 (en) Digital spread spectrum method based on precise phase delta-sigma algorithm
JP2010288073A (ja) スペクトラム拡散クロック生成器及び半導体装置
US7443905B1 (en) Apparatus and method for spread spectrum clock generator with accumulator
US10666271B1 (en) Frequency synthesizer and method of operating the same
TWI285028B (en) Phase locked loop system capable of deskewing and method therefor
US8692594B2 (en) Phase-locked loop frequency stepping
US7167059B2 (en) Circuit for generating spread spectrum clock
US8106687B2 (en) Spread spectrum clock system and spread spectrum clock generator
TWI552532B (zh) 展頻時脈產生器與展頻時脈信號產生方法
JPWO2019008672A1 (ja) Ｐｌｌ回路
JP2009290733A (ja) 周波数変調機能付きクロック生成回路
JP2017169189A (ja) スペクトラム拡散クロック発生回路
KR100844960B1 (ko) 확산 스펙트럼 클럭 생성기

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19925651

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19925651

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 19925651

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 09.05.2022)

122 Ep: pct application non-entry in european phase

Ref document number: 19925651

Country of ref document: EP

Kind code of ref document: A1