WO2020211215A1 - 一种显示面板及其制备方法 - Google Patents

一种显示面板及其制备方法 Download PDF

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Publication number
WO2020211215A1
WO2020211215A1 PCT/CN2019/098095 CN2019098095W WO2020211215A1 WO 2020211215 A1 WO2020211215 A1 WO 2020211215A1 CN 2019098095 W CN2019098095 W CN 2019098095W WO 2020211215 A1 WO2020211215 A1 WO 2020211215A1
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WIPO (PCT)
Prior art keywords
cathode
metal layer
black matrix
auxiliary cathode
color filter
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PCT/CN2019/098095
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English (en)
French (fr)
Inventor
方俊雄
吴元均
吕伯彦
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深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/613,085 priority Critical patent/US20210359248A1/en
Publication of WO2020211215A1 publication Critical patent/WO2020211215A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/824—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8723—Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80524—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/50—Forming devices by joining two substrates together, e.g. lamination techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/851—Division of substrate

Definitions

  • This application relates to the field of display technology, in particular to a display panel and a manufacturing method thereof.
  • top-emission AMOLED displays are more convenient to increase the resolution of the display.
  • transparent or semi-transparent cathode materials are usually used to make the light source penetrate the cathode, the high sheet resistance of the cathode will cause a voltage drop, resulting in poor display brightness. Evenly.
  • the auxiliary cathode is usually made on the color film substrate to improve this situation.
  • the substrate surface of the auxiliary cathode is uneven in height, or the distance between the two glass substrates is not controlled during the bonding, the auxiliary cathode is easy to appear.
  • the cathode is in poor contact with the OLED cathode and cannot achieve the desired effect of the auxiliary cathode, so that the uneven brightness of the display still exists.
  • the present application provides a display panel and a manufacturing method thereof, which can improve the phenomenon of poor contact between the auxiliary cathode and the cathode, thereby improving the uneven brightness of the display panel.
  • the present application provides a display panel, including an array substrate and a color filter substrate that are arranged oppositely;
  • the array substrate includes an anode, a cathode, and a light-emitting layer disposed between the anode and the cathode, a pixel area is defined on the array substrate, and the light-emitting layer is disposed corresponding to the pixel area;
  • the color filter substrate includes a color filter corresponding to the pixel area, and a black matrix located between two adjacent color filters;
  • the color filter substrate is provided with an auxiliary cathode at a position corresponding to the black matrix, and a metal layer is provided on the auxiliary cathode;
  • the cathode is in parallel contact with the auxiliary cathode through the metal layer, and the cathode is made of a transparent or semi-transparent material.
  • a buffer pad is provided on the surface of the black matrix, and the auxiliary cathode is provided on the buffer pad.
  • the buffer pad, the auxiliary cathode, and the metal layer are all located within the range shielded by the black matrix.
  • the surface of the cushion pad adjacent to the color filter and the surface of the black matrix are inclined at a predetermined angle, and the cushion pad is wrapped in the auxiliary cathode.
  • the metal layer is formed on the surface of the auxiliary cathode and is in contact with the black matrix.
  • the temperature at which the metal layer reaches the melting point is within 100°C.
  • the present application also provides a method for manufacturing a display panel.
  • the method includes the following steps:
  • step S10 an anode, a cathode, and a light-emitting layer disposed between the anode and the cathode are prepared on an array substrate, a pixel area is defined on the array substrate, and the light-emitting layer is disposed corresponding to the pixel area;
  • Step S20 a black matrix and a color film corresponding to the pixel area are prepared on a color filter substrate, and an auxiliary cathode and a metal layer are sequentially prepared on the black matrix;
  • Step S30 heating the color filter substrate until the metal layer reaches a molten state, and aligning the array substrate and the color filter substrate, so that the cathode is connected in parallel with the auxiliary cathode through the metal layer contact.
  • the step S20 includes the following steps:
  • Step S201 preparing a buffer pad on the black matrix
  • Step S202 preparing the auxiliary cathode on the buffer pad
  • step S203 the metal layer is prepared on the auxiliary cathode, wherein the buffer pad, the auxiliary cathode and the metal layer are all located within the range of the black matrix.
  • the heating temperature of the color filter substrate is within 100° C., so that the metal layer reaches a molten state.
  • the present application also provides a display panel, which includes an array substrate and a color filter substrate arranged oppositely;
  • the array substrate includes an anode, a cathode, and a light-emitting layer disposed between the anode and the cathode, a pixel area is defined on the array substrate, and the light-emitting layer is disposed corresponding to the pixel area;
  • the color filter substrate includes a color filter corresponding to the pixel area, and a black matrix located between two adjacent color filters;
  • the color filter substrate is provided with an auxiliary cathode at a position corresponding to the black matrix, and a metal layer is provided on the auxiliary cathode;
  • the cathode is in parallel contact with the auxiliary cathode through the metal layer.
  • a buffer pad is provided on the surface of the black matrix, and the auxiliary cathode is provided on the buffer pad.
  • the buffer pad, the auxiliary cathode, and the metal layer are all located within the range shielded by the black matrix.
  • the surface of the cushion pad adjacent to the color filter and the surface of the black matrix are inclined at a predetermined angle, and the cushion pad is wrapped in the auxiliary cathode.
  • the metal layer is formed on the surface of the auxiliary cathode and is in contact with the black matrix.
  • the temperature at which the metal layer reaches the melting point is within 100°C.
  • the beneficial effects of the present application are: compared with the existing display panels, the display panel and the preparation method thereof provided by the present application are provided by forming a metal layer with a low melting point above the auxiliary cathode, and the array substrate and the color film substrate are aligned During bonding, because the array substrate is at room temperature, when the color filter substrate is heated to the molten state of the metal layer, the molten metal layer will cool down and solidify when it touches the cathode at room temperature, so it can maintain a good relationship between the auxiliary cathode and the cathode. Electrical contact can improve the uneven brightness of the display panel. In addition, since the auxiliary cathode and the cathode are in parallel contact, the resistance of the cathode can be reduced overall, the uniformity of the light emission of the display panel can be ensured, and the resolution of the display panel can be improved.
  • FIG. 1 is a schematic diagram of the structure when the array substrate and the color filter substrate are not aligned and bonded according to an embodiment of the application;
  • FIG. 2 is a schematic diagram of the structure after the array substrate and the color filter substrate are aligned and bonded according to an embodiment of the application;
  • FIG. 3 is a schematic structural diagram of another display panel provided by an embodiment of the application.
  • FIG. 4 is a flowchart of a manufacturing method of a display panel provided by an embodiment of the application.
  • the present application is directed to the technical problem of the existing display panel that the auxiliary cathode is in poor contact with the cathode, which cannot achieve the desired effect of the auxiliary cathode, resulting in uneven brightness of the display.
  • This embodiment can solve this defect.
  • the array substrate 1 includes: a base substrate 10 on which a pixel definition layer 11 is provided, and the pixel definition layer 11 defines a pixel area; an anode 12, a cathode 14 and an anode 12 and The light-emitting layer 13 between the cathodes 14 forms a plurality of light-emitting elements, and the light-emitting layer 13 is arranged corresponding to the pixel area; the array substrate 1 further includes thin film transistors (not labeled) distributed in an array, and the light-emitting The piece corresponds to the thin film transistor.
  • the anodes 12 are arranged in an array, and one anode 12 is correspondingly connected to the drain of the thin film transistor.
  • the color filter substrate 2 includes: a glass substrate 20; a color filter 21, which is arranged in an array corresponding to the pixel area; a black matrix 22, which is located at the gap between two adjacent color filters 21;
  • the black matrix 22 is provided with a photoresist layer (not labeled);
  • the black matrix 22 is provided with a buffer pad 23 on the surface, and an auxiliary cathode 24 is provided on the buffer pad 23.
  • the buffer pads 23 are distributed at intervals at the corresponding positions of the black matrix 22, or the buffer pads 23 are arranged in an integrated mesh structure at the corresponding positions of the black matrix 22.
  • a metal layer 25 is provided on the auxiliary cathode 24, and the metal layer 25 is a low melting point metal material. Wherein, the cathode 14 is in parallel contact with the auxiliary cathode 24 through the metal layer 25.
  • the buffer pad 23, the auxiliary cathode 24 and the metal layer 25 are all located within the range shielded by the black matrix 22.
  • the area of the metal layer 25 is smaller than the area corresponding to the auxiliary cathode 24.
  • the material of the auxiliary cathode 24 includes but is not limited to Al, Mo, Cu or alloys thereof.
  • the surface of the buffer pad 23 adjacent to the color filter 21 and the surface of the black matrix 22 are inclined at a predetermined angle, and the buffer pad 23 is wrapped in the auxiliary cathode 24.
  • the cross-sectional shape of the cushion pad 23 includes but is not limited to trapezoid, rectangle, triangle, semicircle, etc., wherein the height of the cushion pad 23 is kept uniform.
  • the height of the cushion pad 23 is between 0.2um and 10um. In other embodiments, the height of the cushioning pad 23 is between 1um and 5um, such as 2um, 3um, 4um.
  • the cathode 14 is made of a transparent or semi-transparent material, a transparent cathode material such as a transparent oxide (such as indium zinc oxide), and the thickness of the cathode 14 ranges from 100 nm to 500 nm.
  • Translucent materials such as thin metals (such as Ag, MgAg, etc.), in order to maintain a translucent cathode with a light transmittance of more than 40%, the thickness of the film is generally between 10 and 200 nm.
  • the color filter substrate 2 is provided with a sealant 26 on the periphery of the color filter substrate 2, and the sealant 26 is used to seal the array substrate 1 and the color filter substrate 2.
  • the surface of the color filter substrate 2 is filled with a transparent filling material (not labeled), and the transparent filling material is used for buffering when the array substrate 1 and the color filter substrate 2 are attached.
  • the metal layer 25 is a low melting point metal material, including but not limited to indium bismuth (InxBiy) alloy, tin-bismuth indium (InxBiySnz) alloy, and the like.
  • the proportion of individual metals in the above alloys can be adjusted (x, y, z)
  • the melting point temperature of the alloy metal can be controlled. In this embodiment, the temperature at which the metal layer 25 reaches the melting point is within 100°C.
  • the array substrate 1 also includes other conventional film layers, such as thin film transistors distributed in an array, and the anode 12 is connected to the drain of the thin film transistor.
  • FIG. 2 it is a schematic diagram of the structure after the array substrate and the color filter substrate are aligned and bonded according to the embodiment of the application.
  • the color filter substrate 2 is placed on a heating carrier 3, and the heating carrier 3 is used to heat the color filter substrate 2, and the temperature is generally controlled within 100°C.
  • the metal layer 25 reaches a molten state, the array substrate 1 and the color filter substrate 2 are aligned and attached.
  • the cathode 14 is in parallel contact with the auxiliary cathode 24 through the metal layer 25 .
  • FIG. 3 it is a schematic structural diagram of another display panel provided by an embodiment of this application.
  • the metal layer 25 is formed on the surface of the auxiliary cathode 24 and is in contact with the black matrix 22, that is, the metal layer 25 includes the auxiliary cathode 24 and the Buffer pad 23. Since the reflectivity of the metal layer 25 is higher than the reflectivity of the auxiliary cathode 24, this design can improve the electrical contact between the cathode 14 and the auxiliary cathode 24 without affecting the electrical contact between the cathode 14 and the auxiliary cathode 24.
  • the transmittance of the display panel That is, the light originally emitted from the light-emitting layer 13 toward the black matrix 22 is reflected by the metal layer 25 and then emitted through the color film 21, thereby improving the transmittance of the display panel.
  • auxiliary cathode 24 of the present application is arranged on one side of the color filter substrate 2 and does not occupy the area of the array substrate 1, which is beneficial to the improvement of the display resolution. Furthermore, the auxiliary cathode 24 will not cause an increase in the density of metal traces on the array substrate 1, which is beneficial to avoid short circuits caused by excessively high metal trace density, which may cause defective panels.
  • the present application also provides a method for manufacturing a display panel. As shown in FIG. 4, with reference to FIG. 1, the method includes the following steps:
  • step S10 an anode, a cathode, and a light-emitting layer disposed between the anode and the cathode are prepared on an array substrate, a pixel area is defined on the array substrate, and the light-emitting layer is disposed corresponding to the pixel area;
  • a thin film transistor layer, an anode 12, a pixel defining layer 11, a light-emitting layer 13, and a cathode 14 are sequentially prepared on the array substrate.
  • the preparation method of the array substrate is the same as the existing preparation method, and will not be repeated here.
  • Step S20 a black matrix and a color film corresponding to the pixel area are prepared on a color filter substrate, and an auxiliary cathode and a metal layer are sequentially prepared on the black matrix;
  • the black matrix 22 and the color film 21 are sequentially fabricated on the glass substrate 20, and then a photoresist layer (OC photoresist) is fabricated.
  • the step S20 includes the following steps:
  • Step S201 preparing a buffer pad on the black matrix
  • the cushion pad 23 is prepared at the position of the photoresist layer corresponding to the black matrix 22, and the cushion pad 23 is located in the range of the black matrix 22.
  • Step S202 preparing the auxiliary cathode on the buffer pad
  • step S203 the metal layer is prepared on the auxiliary cathode, wherein the buffer pad, the auxiliary cathode, and the metal layer are all located within the range of the black matrix 22.
  • a UV-cured encapsulating glue is coated around the color filter substrate, and an appropriate amount of transparent filler is coated on the color filter substrate.
  • Step S30 heating the color filter substrate until the metal layer reaches a molten state, and aligning the array substrate and the color filter substrate, so that the cathode is connected in parallel with the auxiliary cathode through the metal layer contact.
  • the color filter substrate 2 is transferred to the laminating equipment, the film surface of the color filter substrate 2 faces upward, and the metal layer 25 heated by the heating carrier 3 to a low melting point reaches a molten state, wherein The heating temperature of the color filter substrate 2 is within 100° C., so that the metal layer 25 reaches a molten state.
  • the array substrate 1 is transferred to the bonding equipment, the film surface of the array substrate 1 is facing down, and the pressure of the bonding cavity is pumped to a low pressure state.
  • a CCD is used to accurately align the array substrate 1 and the color filter substrate 2, and after bonding, the bonding cavity is inflated to return to atmospheric pressure, and the bonded display panel is taken out to cure the packaging glue and cut the panel.
  • the display panel and the preparation method thereof provided in the present application, by forming a low melting point metal layer above the auxiliary cathode, when the array substrate and the color filter substrate are aligned and bonded, the array substrate is at room temperature.
  • the color film substrate is heated to the molten state of the metal layer, the molten metal layer will cool down and solidify when it touches the cathode at room temperature. Therefore, it can maintain good electrical contact between the auxiliary cathode and the cathode, thereby improving the brightness of the display panel. Homogeneous phenomenon.
  • the resistance of the cathode can be reduced as a whole to ensure the uniformity of the display panel's light emission, and the auxiliary cathode is located on the side of the color film substrate, which is beneficial to the improvement of the resolution of the display panel.

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  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种显示面板及其制备方法，包括阵列基板（1）及彩膜基板（2）；阵列基板（1）包括阳极（12）、发光层（13）、阴极（14），发光层（13）对应阵列基板（1）上的像素区域设置；彩膜基板（2）包括对应像素区域的彩膜（21），及位于相邻两彩膜（21）之间的黑色矩阵（22）；彩膜基板（2）在对应黑色矩阵（22）的位置设置有辅助阴极（24），辅助阴极（24）上设置有金属层（25），且阴极（14）通过金属层（25）与辅助阴极（24）并联接触。

Description

一种显示面板及其制备方法 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制备方法。
 背景技术
在AMOLED显示器中，顶发光型AMOLED显示器更便于显示器分辨率的提高，由于通常采用透明或半透明的阴极材料使光源穿透阴极，然而阴极的高方块电阻会产生电压降，导致显示器光亮度不均匀。目前通常采用将辅助阴极制作在彩膜基板上来改善此状况，不过当辅助阴极的衬底表面有高度不均一时，或是在贴合时没控制好两片玻璃基板的间距，会容易出现辅助阴极与OLED阴极接触不良，无法达到辅助阴极应有的效果，使得显示器光亮度不均匀的现象仍然存在。
因此，现有技术存在缺陷，急需改进。
 技术问题
本申请提供一种显示面板及其制备方法，能够改善辅助阴极与阴极接触不良的现象，从而改善显示面板光亮度不均匀的现象。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请提供一种显示面板，包括对向设置的阵列基板以及彩膜基板；
所述阵列基板包括阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
所述彩膜基板包括对应所述像素区域的彩膜，以及位于相邻两所述彩膜之间的黑色矩阵；
所述彩膜基板在对应所述黑色矩阵的位置设置有辅助阴极，所述辅助阴极上设置有金属层；
其中，所述阴极通过所述金属层与所述辅助阴极并联接触，且所述阴极为透明或半透明材料。
在本申请的显示面板中，所述黑色矩阵表面设置有缓冲垫，所述辅助阴极设置于所述缓冲垫上。
在本申请的显示面板中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵遮蔽的范围内。
在本申请的显示面板中，所述缓冲垫与所述彩膜相邻的表面与所述黑色矩阵表面呈预设角度倾斜设置，所述缓冲垫包裹于所述辅助阴极内。
在本申请的显示面板中，所述金属层形成于所述辅助阴极表面，并与所述黑色矩阵接触。
在本申请的显示面板中，所述金属层达到融点的温度为100℃以内。
本申请还提供一种显示面板的制备方法，所述方法包括以下步骤：
步骤S10，一阵列基板上制备有阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
步骤S20，一彩膜基板上制备有黑色矩阵以及对应所述像素区域的彩膜，在所述黑色矩阵上依次制备辅助阴极与金属层；
步骤S30，将所述彩膜基板加热到所述金属层达到熔融状态，将所述阵列基板与所述彩膜基板对位贴合，使得所述阴极通过所述金属层与所述辅助阴极并联接触。
在本申请的制备方法中，所述步骤S20包括以下步骤：
步骤S201，在所述黑色矩阵上制备缓冲垫；
步骤S202，在所述缓冲垫上制备所述辅助阴极；
步骤S203，在所述辅助阴极上制备所述金属层，其中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵的范围内。
在本申请的制备方法中，在所述步骤S30中，所述彩膜基板的加热温度为100℃以内，使得所述金属层达到熔融状态。
为解决上述问题，本申请还提供一种显示面板，包括对向设置的阵列基板以及彩膜基板；
所述阵列基板包括阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
所述彩膜基板包括对应所述像素区域的彩膜，以及位于相邻两所述彩膜之间的黑色矩阵；
所述彩膜基板在对应所述黑色矩阵的位置设置有辅助阴极，所述辅助阴极上设置有金属层；
其中，所述阴极通过所述金属层与所述辅助阴极并联接触。
在本申请的显示面板中，所述黑色矩阵表面设置有缓冲垫，所述辅助阴极设置于所述缓冲垫上。
在本申请的显示面板中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵遮蔽的范围内。
在本申请的显示面板中，所述缓冲垫与所述彩膜相邻的表面与所述黑色矩阵表面呈预设角度倾斜设置，所述缓冲垫包裹于所述辅助阴极内。
在本申请的显示面板中，所述金属层形成于所述辅助阴极表面，并与所述黑色矩阵接触。
在本申请的显示面板中，所述金属层达到融点的温度为100℃以内。
 有益效果
本申请的有益效果为：相较于现有的显示面板，本申请提供的显示面板及其制备方法，通过在辅助阴极上方制作一层低融点的金属层，在阵列基板与彩膜基板对位贴合时，因阵列基板处于室温，在彩膜基板加热到金属层为融熔状态时，融熔的金属层碰触到室温的阴极时会降温固化，因此能维持辅助阴极与阴极间良好的电性接触，从而改善显示面板光亮度不均匀的现象。另外，由于辅助阴极与阴极并联接触，可整体降低阴极电阻，保证显示面板发光的均匀性，且有利于显示面板分辨率的提升。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的阵列基板与彩膜基板未对位贴合时的结构示意图；
图2为本申请实施例提供的阵列基板与彩膜基板对位贴合后的结构示意图；
图3为本申请实施例提供的另一种显示面板结构示意图；
图4为本申请实施例提供的显示面板的制备方法流程图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
本申请针对现有的显示面板，存在辅助阴极与阴极接触不良，无法达到辅助阴极应有的效果，使得显示器光亮度不均匀的技术问题，本实施例能够解决该缺陷。
如图1所示，为本申请实施例提供的阵列基板与彩膜基板未对位贴合时的结构示意图。所述阵列基板1包括：衬底基板10，所述衬底基板10上设置有像素定义层11，所述像素定义层11定义出像素区域；阳极12、阴极14以及设置于所述阳极12与所述阴极14之间的发光层13形成多个发光件，所述发光层13对应所述像素区域设置；所述阵列基板1上还包括阵列分布的薄膜晶体管(未标示)，一所述发光件对应一所述薄膜晶体管。所述阳极12呈阵列分布，一所述阳极12对应连接一所述薄膜晶体管的漏极。
所述彩膜基板2包括：玻璃基板20；彩膜21，对应所述像素区域阵列设置；黑色矩阵22，位于相邻两所述彩膜21之间的间隙处；所述彩膜21以及所述黑色矩阵22上设置有光阻层（未标示）；所述黑色矩阵22表面设置有缓冲垫23，辅助阴极24设置于所述缓冲垫23上。所述缓冲垫23间隔的分布在所述黑色矩阵22对应的位置，或者所述缓冲垫23呈一体的网状结构设置于所述黑色矩阵22的对应位置。所述辅助阴极24上设置有金属层25，所述金属层25为低融点金属材料。其中，所述阴极14通过所述金属层25与所述辅助阴极24并联接触。
所述缓冲垫23、所述辅助阴极24以及所述金属层25均位于所述黑色矩阵22遮蔽的范围内。在一种实施例中，所述金属层25的面积小于所述辅助阴极24对应的面积。所述辅助阴极24的材料包括但不限于Al、Mo、Cu或是其合金。
所述缓冲垫23与所述彩膜21相邻的表面与所述黑色矩阵22表面呈预设角度倾斜设置，所述缓冲垫23包裹于所述辅助阴极24内。所述缓冲垫23的截面形状包括但不限于梯形、矩形、三角形、半圆形等，其中所述缓冲垫23的高度保持均一。所述缓冲垫23的高度介于0.2um~10um之间。在其他实施例中，所述缓冲垫23的高度介于1um~5um之间，如2um、3um、4um。
所述阴极14采用透明或是半透明材料，透明阴极材料如透明氧化物(如氧化铟锌)，所述阴极14的厚度范围在100~500nm之间。半透明材料如薄金属(例如Ag, MgAg等)，为了使半透明阴极保持40%以上的光穿透率，一般膜层的厚度在10~200nm之间。
所述彩膜基板2的四周边缘位置设置有框胶26，所述框胶26用于密封所述阵列基板1与所述彩膜基板2。所述彩膜基板2表面上填充有透明填充材料（未标示），所述透明填充材料用于在所述阵列基板1与所述彩膜基板2贴合时起缓冲作用。
在一种实施例中，所述金属层25为低融点金属材料，包括但不限于铋化铟（InxBiy）合金、锡铋铟（InxBiySnz）合金等。可以调整上述合金中个别金属的比例(x, y, z)可以控制合金金属的融点温度，本实施例中所述金属层25达到融点的温度为100℃以内。
可以理解的是，所述阵列基板1上还包括其他常规膜层，比如阵列分布的薄膜晶体管，所述阳极12与所述薄膜晶体管的漏极连接。
如图2所示，为本申请实施例提供的阵列基板与彩膜基板对位贴合后的结构示意图。所述彩膜基板2置于加热载板3上，所述加热载板3用于对所述所述彩膜基板2进行加热，温度一般控制在100℃以内。待所述金属层25达到熔融状态时，将所述阵列基板1与所述彩膜基板2对位贴合，冷却后，所述阴极14通过所述金属层25与所述辅助阴极24并联接触。
采用此设计能维持所述辅助阴极24与所述阴极14间良好的电性接触，避免了传统方式因对位贴合时所述辅助阴极24的衬底表面有高度不均一，或是在贴合时没控制好两片基板的间距，而出现所述辅助阴极24与所述阴极14接触不良的现象。本申请由于保证所述辅助阴极24与所述阴极14间的良好电接触性，因此可以有效解决面板电压降的问题，提高面板封装效果。
如图3所示，为本申请实施例提供的另一种显示面板结构示意图。该图与图2相比，区别特征在于：所述金属层25形成于所述辅助阴极24表面，并与所述黑色矩阵22接触，即所述金属层25包括所述辅助阴极24以及所述缓冲垫23。由于所述金属层25的反射率高于所述所述辅助阴极24的反射率，因此，采用此设计在不影响所述阴极14与所述辅助阴极24的电性接触的情况下，可提高所述显示面板的穿透率。即原本所述发光层13射向所述黑色矩阵22方向的光经所述金属层25的反射后，经所述彩膜21射出，从而提高所述显示面板的穿透率。
另外，本申请的所述辅助阴极24设置于所述彩膜基板2一侧，不占据所述阵列基板1的面积，有利于显示器分辨率的提升。再者，所述辅助阴极24不会导致所述阵列基板1上金属走线密度增加，有利于避免金属走线密度过高产生短路而造成面板不良缺陷。
本申请还提供一种显示面板的制备方法，如图4所示，结合图1，所述方法包括以下步骤：
步骤S10，一阵列基板上制备有阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
其中，在所述阵列基板上依次制备薄膜晶体管层、阳极12、像素定义层11、发光层13以及阴极14，所述阵列基板的制备方法与现有制备方法相同，此处不再赘述。
步骤S20，一彩膜基板上制备有黑色矩阵以及对应所述像素区域的彩膜，在所述黑色矩阵上依次制备辅助阴极与金属层；
其中，在玻璃基板20上依序制作所述黑色矩阵22、所述彩膜21，然后再制备一层光阻层（OC光阻）。其中，所述步骤S20包括以下步骤：
步骤S201，在所述黑色矩阵上制备缓冲垫；
即在所述光阻层对应所述黑色矩阵22的位置制备所述缓冲垫23，所述缓冲垫23位于所述黑色矩阵22的范围内。
步骤S202，在所述缓冲垫上制备所述辅助阴极；
步骤S203，在所述辅助阴极上制备所述金属层，其中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵22的范围内。
之后，在所述彩膜基板的四周涂上UV固化的封装胶材，并在所述彩膜基板上涂布适量的透明填充材。
步骤S30，将所述彩膜基板加热到所述金属层达到熔融状态，将所述阵列基板与所述彩膜基板对位贴合，使得所述阴极通过所述金属层与所述辅助阴极并联接触。
具体地，将所述彩膜基板2传送到贴合设备，所述彩膜基板2膜面朝上，加热载板3加温至低融点的所述金属层25达到融熔状态，其中，所述彩膜基板2的加热温度为100℃以内，使得所述金属层25达到熔融状态。将所述阵列基板1传送到所述贴合设备，所述阵列基板1膜面朝下，抽贴合腔体气压并抽至低压状态。利用CCD进行所述阵列基板1与所述彩膜基板2的精准对位，贴合后将贴合腔体充气恢复至大气压力，取出贴合后的显示面板进行封装胶固化以及面板切割。
综上所述，本申请提供的显示面板及其制备方法，通过在辅助阴极上方制作一层低融点的金属层，在阵列基板与彩膜基板对位贴合时，因阵列基板处于室温，在彩膜基板加热到金属层为融熔状态时，融熔的金属层碰触到室温的阴极时会降温固化，因此能维持辅助阴极与阴极间良好的电性接触，从而改善显示面板光亮度不均匀的现象。另外，由于辅助阴极与阴极并联接触，可整体降低阴极电阻，保证显示面板发光的均匀性，且辅助阴极位于彩膜基板侧，有利于显示面板分辨率的提升。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种显示面板，其包括对向设置的阵列基板以及彩膜基板；
    所述阵列基板包括阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
    所述彩膜基板包括对应所述像素区域的彩膜，以及位于相邻两所述彩膜之间的黑色矩阵；
    所述彩膜基板在对应所述黑色矩阵的位置设置有辅助阴极，所述辅助阴极上设置有金属层；
    其中，所述阴极通过所述金属层与所述辅助阴极并联接触，且所述阴极为透明或半透明材料。
  2. 根据权利要求1所述的显示面板，其中，所述黑色矩阵表面设置有缓冲垫，所述辅助阴极设置于所述缓冲垫上。
  3. 根据权利要求2所述的显示面板，其中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵遮蔽的范围内。
  4. 根据权利要求2所述的显示面板，其中，所述缓冲垫与所述彩膜相邻的表面与所述黑色矩阵表面呈预设角度倾斜设置，所述缓冲垫包裹于所述辅助阴极内。
  5. 根据权利要求4所述的显示面板，其中，所述金属层形成于所述辅助阴极表面，并与所述黑色矩阵接触。
  6. 根据权利要求1所述的显示面板，其中，所述金属层达到融点的温度为100℃以内。
  7. 一种显示面板的制备方法，其中，所述方法包括以下步骤：
    步骤S10，一阵列基板上制备有阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
    步骤S20，一彩膜基板上制备有黑色矩阵以及对应所述像素区域的彩膜，在所述黑色矩阵上依次制备辅助阴极与金属层；
    步骤S30，将所述彩膜基板加热到所述金属层达到熔融状态，将所述阵列基板与所述彩膜基板对位贴合，使得所述阴极通过所述金属层与所述辅助阴极并联接触。
  8. 根据权利要求7所述的制备方法，其中，所述步骤S20包括以下步骤：
    步骤S201，在所述黑色矩阵上制备缓冲垫；
    步骤S202，在所述缓冲垫上制备所述辅助阴极；
    步骤S203，在所述辅助阴极上制备所述金属层，其中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵的范围内。
  9. 根据权利要求7所述的制备方法，其中，在所述步骤S30中，所述彩膜基板的加热温度为100℃以内，使得所述金属层达到熔融状态。
  10. 一种显示面板，其包括对向设置的阵列基板以及彩膜基板；
    所述阵列基板包括阳极、阴极以及设置于所述阳极与所述阴极之间的发光层，所述阵列基板上定义有像素区域，所述发光层对应所述像素区域设置；
    所述彩膜基板包括对应所述像素区域的彩膜，以及位于相邻两所述彩膜之间的黑色矩阵；
    所述彩膜基板在对应所述黑色矩阵的位置设置有辅助阴极，所述辅助阴极上设置有金属层；
    其中，所述阴极通过所述金属层与所述辅助阴极并联接触。
  11. 根据权利要求10所述的显示面板，其中，所述黑色矩阵表面设置有缓冲垫，所述辅助阴极设置于所述缓冲垫上。
  12. 根据权利要求11所述的显示面板，其中，所述缓冲垫、所述辅助阴极以及所述金属层均位于所述黑色矩阵遮蔽的范围内。
  13. 根据权利要求11所述的显示面板，其中，所述缓冲垫与所述彩膜相邻的表面与所述黑色矩阵表面呈预设角度倾斜设置，所述缓冲垫包裹于所述辅助阴极内。
  14. 根据权利要求13所述的显示面板，其中，所述金属层形成于所述辅助阴极表面，并与所述黑色矩阵接触。
  15. 根据权利要求10所述的显示面板，其中，所述金属层达到融点的温度为100℃以内。
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