WO2020199553A1 - 电平转换控制电路与电平转换电路 - Google Patents

电平转换控制电路与电平转换电路 Download PDF

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Publication number
WO2020199553A1
WO2020199553A1 PCT/CN2019/111553 CN2019111553W WO2020199553A1 WO 2020199553 A1 WO2020199553 A1 WO 2020199553A1 CN 2019111553 W CN2019111553 W CN 2019111553W WO 2020199553 A1 WO2020199553 A1 WO 2020199553A1
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WIPO (PCT)
Prior art keywords
level
control circuit
input terminal
switch tube
reference level
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PCT/CN2019/111553
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English (en)
French (fr)
Inventor
张先明
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020199553A1 publication Critical patent/WO2020199553A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present invention relates to the field of display technology, in particular to a display panel with GOA unit.
  • the bezel of the display is gradually narrowed, and it is developing towards a borderless display panel.
  • the array substrate row drive (Gate On Array, GOA) display technology is to integrate the array substrate row drive unit (GOA unit) on the array substrate in the existing array substrate with thin film transistors arranged in an array. It replaces the conventional gate driver unit and source driver unit located on the longitudinal and lateral sides of the display panel.
  • the GOA unit has gate drive units corresponding to the number of data lines.
  • the gate drive units are arranged on one side of the array substrate.
  • the gate drive units can scan several parallel gate lines row by row.
  • the signal turns on the thin film transistors located on the array substrate row by row, thereby driving the pixel units of the display to display gray scales.
  • the process of progressive scanning needs to sequentially output high levels to the gate lines, and provide low levels to the gate lines except for the expected scanning time. Therefore, the GOA unit usually has a level conversion chip (Level shift IC), used to switch high and low levels to provide the required level of the gate line to facilitate the correct scanning of the display panel.
  • Level shift IC level conversion chip
  • the lowest level will be used as the substrate.
  • VGL is the low-level signal provided to the gate line
  • VSS is the level The zero-level reference signal of the conversion circuit.
  • VGL is the lowest level in the level conversion circuit, which means that the level of VSS will be greater than or equal to VGL.
  • the power management IC Power manage IC, PMIC
  • the levels of VGL and VSS will be unstable, resulting in the level of VGL may be higher than VSS. Since the VGL as the substrate is no longer the lowest level, the parasitic diode in the level conversion circuit will be turned on, causing the level conversion circuit to have a latch up effect, causing chip failure and even chip damage And affect the operation of the display.
  • the object of the present invention is to provide an array substrate and a level conversion control circuit, using a switch tube or a control circuit to control the connection between the terminals that output low-level signals and two negative levels of the reference signal, so that the base of the level conversion circuit The signal is kept at the lowest level to prevent the parasitic diode in the chip from turning on and forming a latching effect.
  • the present invention provides a level conversion control circuit switch tube, a control circuit, a first comparator and a second comparator, which are used to output high level and low level to the gate line of an array substrate, and have a first reference circuit. level.
  • the drain of the switch tube is connected to the first reference level, and the source of the switch tube is connected to the low level.
  • the control circuit is connected to the gate of the switching tube and used to control the on and off of the switching tube. When the control circuit turns on the switching tube, the drain of the switching tube is shorted to the source of the switching tube to make the low level and the first reference level equal to the level.
  • the first comparator has a first positive input terminal and a first negative input terminal, the first positive input terminal is connected to the low level, and the first negative input terminal is connected to the first reference level
  • the control circuit turns on the switch tube, and when the low level is lower than the first reference level, the control circuit makes the The switch tube is cut off.
  • the second comparator has a second positive input terminal and a second negative input terminal, the second positive input terminal is connected to a second reference level, the second negative input terminal is connected to a detection result, when the When the second reference level is greater than the detection result, the control circuit turns on the switch tube, and when the second reference level is lower than the detection result, and the low level is lower than At the first reference level, the control circuit turns off the switch tube.
  • the present invention also provides a level conversion control circuit including a switch tube and a control circuit for outputting a high level and a low level to the gate line of the array substrate and having a first reference level.
  • the drain of the switch tube is connected to the first reference level, and the source of the switch tube is connected to the low level.
  • the control circuit is connected to the gate of the switching tube and used to control the on and off of the switching tube. When the control circuit turns on the switching tube, the drain of the switching tube is shorted to the source of the switching tube to make the low level and the first reference level equal to the level.
  • the control circuit includes a comparator with a positive input terminal and a negative input terminal, the positive input terminal is connected to the low level, and the negative input terminal is connected to the first reference level, when When the low level is greater than the first reference level, the control circuit turns on the switch tube, and when the low level is lower than the first reference level, the control circuit makes the switch Tube cut off.
  • control circuit is a double-throw switch
  • the double-throw switch is used to connect the low level or the ground level, the low level is lower than the ground level, when the double-throw switch When the ground level is connected, the switch tube is turned on to short-circuit the low level and the first reference level to form an equal level.
  • the control circuit includes a first comparator and a second comparator, the first comparator has a first positive input terminal and a first negative input terminal, and the first positive input terminal is connected to the Low level, the first negative input terminal is connected to the first reference level, when the low level is greater than the first reference level, the control circuit turns on the switch tube, when the When the low level is lower than the first reference level, the control circuit turns off the switch tube.
  • the second comparator has a second positive input terminal and a second negative input terminal, the second positive input terminal is connected to a second reference level, and the second negative input terminal is connected to the detection result ,
  • the control circuit turns on the switch tube, and when the second reference level is lower than the detection result, and the low
  • the control circuit turns off the switch.
  • the level conversion control circuit is an integrated circuit.
  • the level conversion control circuit includes a power management chip, and when the power management chip stops working, the switch tube is turned on so that the low level and the first reference level are short-circuited to form Equal level.
  • the present invention also provides a level conversion circuit including a switch tube, a first comparator and a second comparator.
  • the level conversion circuit has a low level and a first reference level.
  • the drain of the switch tube is connected to the first reference level, and the source of the switch tube is connected to the low level.
  • the first comparator has a first positive input terminal and a first negative input terminal, the first positive input terminal is connected to the low level, and the first negative input terminal is connected to the first reference level When the low level is greater than the first reference level, the switch tube is turned on, and when the low level is lower than the first reference level, the switch tube is turned off.
  • the second comparator has a second positive input terminal and a second negative input terminal, the second positive input terminal is connected to a second reference level, the second negative input terminal is connected to a detection result, when the When the second reference level is greater than the detection result, the switch is turned on, when the second reference level is lower than the detection result, and the low level is lower than the first reference voltage
  • the switch tube is normally turned off.
  • the level conversion circuit is connected to a power management chip, and when the power management chip stops working, the switch tube is turned on so that the low level is shorted to the first reference level to form Equal level.
  • the advantage of the present invention is that the low-level signal and reference level provided by the level conversion control circuit are respectively connected to the source and drain of the switch tube, and a simple switch unit or control circuit is used to control the conduction of the switch tube. And cut off, when the operating voltage of the power management chip or the level conversion control circuit is abnormal, the switch is turned on to make the reference level and the low-level signal short-circuited to form an equal level to avoid the low-level signal. The level is higher than the reference level, causing a latch-up effect.
  • the level conversion control circuit provided by the present invention, only simple components are needed, no additional control components and control signals are needed to control the low-level signal and the reference level, and the level conversion control circuit is prevented from displaying When the panel is turned on and off, a latching effect is generated and cannot be operated or even damaged, thereby maintaining the normal operation of the GOA unit and the display panel on the array substrate.
  • FIG. 1 is a schematic diagram of the structure of the GOA display panel of the present invention.
  • FIG. 2 is a schematic circuit diagram of the first embodiment of the level conversion control circuit of the present invention.
  • FIG. 3 is a schematic circuit diagram of a second embodiment of the level conversion control circuit of the present invention.
  • FIG. 4 is a schematic circuit diagram of a third embodiment of the level conversion control circuit of the present invention.
  • FIG. 5 is a schematic circuit diagram of a fourth embodiment of the level conversion control circuit of the present invention.
  • FIG. 1 is a schematic diagram of the structure of the GOA display panel of the present invention.
  • the display panel 10 of the present invention includes an array substrate 12, a plurality of gate lines 14, an array substrate row driving (GOA) unit 16 and a level shift (Level Shift) circuit 18.
  • the GOA unit 16 is integrally disposed on the array substrate 12 to provide scan driving signals to the gate line 14.
  • a total of n gate lines 14 on the display panel 10 are arranged in parallel on the array substrate 12, and the GOA unit 16 outputs scan signals to the gate lines Gate(1) ⁇ Gate(n).
  • the GOA unit 16 needs to send high-level signals to the gate lines of each row in order to drive the gate lines on the array substrate 12.
  • the GOA unit 16 For thin film transistors, only one row of thin film transistors is driven at the same time, which means that only the row of gate lines that output scan signals receive high level, and the rest of the gate lines receive low level signals, so the GOA unit
  • the level conversion circuit 18 is needed in 16 to realize fast switching of high and low signals.
  • the base level in the level conversion circuit 18 that is, the signal with the lowest level in the chip
  • the power management chip 15 is not operating.
  • the present invention provides a control circuit for controlling the level conversion circuit to keep the substrate level of the chip at the lowest level.
  • FIG. 2 shows a schematic diagram of the level conversion control circuit of the first embodiment of the present invention.
  • the level conversion control circuit 20 includes a level conversion circuit 18 and a control circuit 200.
  • the level conversion circuit 18 can quickly switch the gate signals VGL and VGH, where VGL is a low-level signal (ie negative voltage), VGH is a high-level signal (ie positive voltage), and VGL and VGH are used to provide the display panel 10
  • VGL is a low-level signal (ie negative voltage)
  • VGH is a high-level signal (ie positive voltage)
  • VGL and VGH are used to provide the display panel 10
  • the gate line Gata 1 receives the high-level signal VGH
  • Gate 2 ⁇ Gate n receives the low-level signal VGL
  • the gate line Gate 2 receives To the high-level signal VGH
  • the signal received by Gate 1 is converted from the high-level signal VGH to the low-level signal VGL
  • Gate 3 ⁇ Gate n continue to receive the low-level signal VGL, and so on. Therefore, the level conversion circuit 18 in the GOA unit 16 is used to quickly switch the high-level signal VGH and the low-level signal VGL, so as to scan the gate line 14 row by row.
  • the level conversion circuit 18 also provides a reference level VSS as a common reference potential.
  • VSS a reference level
  • the level conversion circuit 18 When the level conversion circuit 18 is operating normally, the level of the reference level VSS will be higher than the low level signal VGL. However, when the display panel is turned on or off, the power management chip 15 may not operate or has stopped operating, resulting in the level The voltage of the conversion circuit 18 is unstable, so that the potential of the low-level signal VGL may be higher than the reference level VSS, so that the level conversion circuit 18 generates a latching effect due to the parasitic diode being turned on.
  • the control circuit 200 uses a switch tube 22 to prevent the potential of the low-level signal VGL from being higher than the reference level VSS.
  • the drain of the switch 22 is connected to the reference level VSS, and the source of the switch 22 is connected to the low-level signal VGL.
  • the control of the switch 22 is The terminal (the gate of the switch tube 22) receives a low level to turn it off, so the independent operation of the reference level VSS and the low level signal VGL will not affect each other.
  • the control terminal of the switch tube 22 receives a high level to turn it on, so the level conversion circuit 18 is used to output the reference level VSS and the low level signal VGL The two pins of will be shorted, so that the reference level VSS and the low level signal VGL form an equal level. In this way, it can be avoided that the potential of the low-level signal VGL is higher than the reference level VSS when the power management chip 15 stops operating.
  • the control terminal can control the input level through a controller, control circuit or switch unit.
  • FIG. 3 shows a schematic diagram of a level conversion control circuit according to a second embodiment of the present invention.
  • the level conversion control circuit 30 includes a level conversion circuit 18 and a control circuit 300.
  • the level conversion circuit 18 also has a reference level VSS, a low level signal VGL, and a high level signal VGH.
  • the control circuit 300 in the second embodiment also has a comparator 34.
  • the positive input terminal of the comparator 34 receives the low-level signal VGL, and the negative input terminal of the comparator 34 is connected to the reference level VSS.
  • the drain of the switch tube 32 is connected to the reference level VSS, and the source is connected to the low level signal VGL.
  • the comparator 34 will output a low-level to the control terminal of the switch 32 so that the switch 32 does not Therefore, the independent operation of the reference level VSS and the low level signal VGL will not affect each other.
  • the comparator 34 will output a high level to the control terminal of the switch tube 32 to make the switch tube 32 turn on. Therefore, the two pins of the level conversion circuit 18 for outputting the reference level VSS and the low level signal VGL will be short-circuited, and the reference level VSS and the low level signal VGL will have the same level.
  • FIG. 4 shows a schematic diagram of a level conversion control circuit according to a third embodiment of the present invention.
  • the level conversion control circuit 40 of the third embodiment includes a level conversion circuit 18 and a control circuit 400.
  • the level conversion circuit 18 also provides three potentials, a reference level VSS, a low level signal VGL, and a high level signal VGH.
  • the control circuit 400 of the third embodiment includes a switch tube 42 and a comparator 44.
  • the drain of the switch tube 42 is also connected to the reference level VSS, and the source is connected to the low level signal VGL.
  • the positive input terminal of the comparator inputs the comparison reference voltage Vref, and the negative input terminal inputs the result voltage Vi.
  • Vi is the result voltage of the detected input voltage Vin, which is the input voltage of the GOA unit 16 or the display panel 10 in this embodiment Working voltage
  • Vref can be under-voltage-lockout (Under-voltage-Lockout, UVLO) voltage, used to monitor the operating voltage of the GOA unit 16 or the display panel 10.
  • UVLO Under-voltage-Lockout
  • the operating voltage of the GOA unit 16 or the display panel 10 is lower than the UVLO voltage, it means that the GOA unit 16 or the display panel 10 is not operating normally or is not operating Status, so the input voltage Vin will be lower than the UVLO voltage. Therefore, when the input voltage Vin is lower than UVLO, it means that the power management chip 15 is not in working state.
  • the comparator 44 will output a high level to the switch tube 42 because the comparison reference voltage Vref is greater than the result voltage Vi. Therefore, the switch tube 42 It will be turned on so that the two pins of the level conversion circuit 18 for outputting the reference level VSS and the low level signal VGL will be short-circuited, so that the reference level VSS and the low level VGL have the same level.
  • Fig. 5 shows a fourth embodiment of the level conversion control circuit of the present invention.
  • the level conversion control circuit 50 includes a level conversion circuit 18 and a control circuit 500.
  • the level conversion circuit 18 also provides three potentials, a reference level VSS, a low level signal VGL, and a high level signal VGH.
  • the control circuit 500 in the fourth embodiment includes a switch tube 52, a first comparator 54, a second comparator 56 and a switch unit 58.
  • the switch unit 58 controls the signal input to the control terminal of the switch tube 52 according to the control signal EN.
  • the control signal EN of the switch unit is generated according to the output signals of the first comparator 54 and the second comparator 56.
  • the positive input terminal of the first comparator 54 receives the low-level signal VGL, and the negative input terminal is connected to the reference level VSS.
  • the positive input terminal of the second comparator 56 inputs the comparison reference voltage Vref, and the negative input terminal inputs the result voltage Vi. Vi is the result voltage of detecting the input voltage Vin.
  • Vin can also be the input of the GOA unit 16
  • the voltage or the operating voltage of the display panel 10 and Vin can also be a detection result of a detection circuit in the display panel 10 monitoring the operating voltage of the source driving unit of the display panel 10, or other detection circuits for the display panel The detection result of the working voltage of other components in 10.
  • the reference voltage Vref can be under-voltage-lockout (Under-voltage-Lockout, UVLO) voltage, used to monitor the operating voltage of the GOA unit 16 or the display panel 10, or the reference voltage Vref can also be the reference voltage of the source driving unit of the monitor display panel 10 or used to monitor other components working in the display panel 10. Reference voltage for working status. Therefore, when the input voltage Vin is lower than Vref, it means that the display panel 10, the GOA unit 16 or the specific components located therein are not in an operating state, and therefore the second comparator 56 will output a high level. When the first comparator 54 or the second comparator 56 outputs a high level, the control signal EN of the switch unit 58 controls the switch unit 58 to be in an on state.
  • UVLO Under-voltage-lockout
  • the switch unit 58 outputs a high level to the switch tube 52.
  • the control terminal turns on the switch tube 52, so the two pins of the level conversion circuit 18 for outputting the reference level VSS and the low level signal VGL are short-circuited, and the reference level VSS and the low level VGL form an equipotential.
  • the switch unit 58 does not receive the turn-on instruction of the control signal EN, the switch unit 58 is in the off state, so the control terminal of the switch tube 52 receives the low level and is in the off state, so that the reference level VSS is The independent operation of low-level VGL will not affect each other.
  • the switch unit 58 may be a single-pole double-throw switch 580.
  • One end of the single-pole double-throw switch 580 is the reference level GND, and the other end is the low-level signal VGL.
  • the control signal EN of the switch unit 58 is at a low level
  • the single-pole double-throw switch 580 is connected to the low-level signal VGL, so that the control terminal of the switch tube 52 is connected to the level signal VGL and is not turned on, so the level is converted
  • the reference level VSS and the low level signal VSS of the circuit 18 do not affect each other.
  • the single-pole double-throw switch 580 When the control signal EN of the single-on unit 58 is at a high level, the single-pole double-throw switch 580 is connected to the reference level GND, which is relative to the two negative voltage input signals of the switch tube (reference level VSS and low level).
  • VGL is high level, so the switch tube 52 is turned on so that the two pins of the level conversion circuit 18 for outputting the reference level VSS and the low level signal VGL will be shorted, the reference level VSS and the low level VGL Form an equipotential.
  • GND may be the reference ground level of the display panel 10, or may be an external reference ground signal.
  • the single-pole double-throw switch 580 is selected to be connected to the reference level GND or the low-level signal VGL to determine the level of the input switch tube 52.
  • the low-level signal VGL is originally the level signal provided by the level conversion circuit 18.
  • the reference signal GND can also be the reference level of any element in the display panel 10. Therefore, the shut-off unit 58 does not need to provide the control signal EN through an additional control circuit.
  • the level signal originally existing in the display panel 10 is used. Reaching to control the on or off of the switch tube 52 can not only simplify the circuit, but also prevent the level of the low-level signal VGL from being higher than the reference level VSS.
  • the level conversion control circuit and the level conversion circuit can be integrated into one chip, that is, integrated into a level shift chip used in the driving circuit.
  • the level shift IC Level Shift IC
  • the level shift IC used in the GOA drive circuit can be used to prevent the low level VGL from being higher than the reference level VSS and causing the chip to latch up , Making the chip invalid or damaged.
  • a switch tube is connected between the two pins of the level conversion chip outputting the low-level signal and the reference signal.
  • the control signal can control whether the switch tube is turned on or not.
  • the level of the low level signal which is the base level (ie the lowest level signal) in the level conversion circuit
  • it will output low level
  • the two terminals of the signal and the reference signal are short-circuited, so that the low-level signal and the reference signal are short-circuited to form an equal level, thereby avoiding the formation of a latch-up effect due to the chip's substrate level being higher than other signals and achieving protection

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Abstract

一种电平转换控制电路（20）包括开关管（22）以及控制电路（200），用来输出高电平（VGH）以及低电平（VGL）至阵列基板（12）的栅极线（14），并具有第一参考电平（VSS）。开关管（22）的漏极连接第一参考电平（VSS），开关管（22）的源极连接低电平（VGL）。控制电路（200）连接开关管（22）的栅极，用来控制开关管（22）的导通与截止。当控制电路（200）使开关管（22）导通时，开关管（22）的漏极与开关管（22）的源极短接使低电平（VGL）与第一参考电平（VSS）形成等电平。电平转换控制电路（20）使得电平转换电路（18）中的基底信号保持在最低电平，避免芯片中的寄生二极管导通而形成闩锁效应。

Description

电平转换控制电路与电平转换电路 技术领域
本发明涉及显示技术领域，尤其是涉及一种具有GOA单元的显示面板。
 背景技术
随着显示技术的进步，现今显示器除了显示质量进步外，为了让使用者的视觉有更好的视觉体验，显示器的边框也渐渐地窄化，朝向无边框显示面板的方向发展。
其中，阵列基板行驱动(Gate On Array, GOA)显示技术，即是在现有具有以阵列排列的薄膜晶体管的阵列基板中，将阵列基板行驱动单元(GOA单元)整合制作于阵列基板上，取代旧有的栅级驱动单元与源级驱动单元分别位于显示面板的纵向与横向侧边的设置。GOA显示技术中，GOA单元中具有与数据线数量对应的栅极驱动单元，栅极驱动单元排列于阵列基板的一侧，栅级驱动单元可以对数条平行排列的栅极线逐行送出扫描信号，以逐行地开启位于阵列基板上的薄膜晶体管，藉此来驱动显示器的像素单元显示灰阶。通过GOA单元整合于阵列基板上的设置，节省旧有的栅极驱动单元所占用的边框面积，以此来实现窄边框面板的设计。
在GOA显示技术中，逐行扫描的过程需要依序对栅极线输出高电平，而除了预计的扫描时间外皆提供低电平给栅极线，因此GOA单元通常具有一电平转换芯片(Level shift IC)，用来切换高低电平，以提供栅极线所需的电平，以利显示面板的进行正确的扫描工作。
 技术问题
在芯片的制程中，会采用最低的电平作为基底，在电平转换电路中，会有两组负电压VGL与VSS，其中VGL为提供给栅极线的低电平信号，VSS为电平转换电路的零电平参考信号。电平转换电路正常运作时，VGL的电平为电平转换电路中最低的电平，意即VSS的电平会大于或等于VGL。然而在显示器开关机的过程中，在电源管理芯片(Power manage IC, PMIC)尚未完全运作或停止运作时，VGL与VSS的电平会不稳定，导致VGL的电平可能会高于VSS。由于作为基底的VGL不再是最低的电平，因此电平转换电路中的寄生二极管会被导通，导致电平转换电路可能产生闩锁(Latch Up)效应，使得芯片失效，甚至导致芯片损坏而影响显示器的运作。
因此，需要提供一种GOA单元，可以避免其中的电平转换电路的VSS电平低于VGL，以维持电平转换电路的正常运作。
 技术解决方案
本发明的目的在于提供一阵列基板与电平转换控制电路，利用开关管或控制电路控制输出低电平信号及参考信号两种负电平的端子之间的连接，使得电平转换电路中的基底信号保持在最低电平，避免芯片中的寄生二极管导通而形成闩锁效应。
本发明提供一种电平转换控制电路开关管、控制电路、第一比较器以及第二比较器，用来输出高电平以及低电平至阵列基板的栅极线，并具有第一参考电平。所述开关管的漏极连接所述第一参考电平，所述开关管的源极连接所述低电平。所述控制电路连接所述开关管的栅极，用来控制开关管的导通与截止。当所述控制电路使所述开关管导通时，所述开关管的漏极与所述开关管的源极短接使所述低电平与所述第一参考电平形成等电平。所述第一比较器具有第一正输入端以及第一负输入端，所述第一正输入端接入所述低电平，所述第一负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时，所述控制电路使所述开关管导通，当所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。所述第二比较器具有第二正输入端以及第二负输入端，所述第二正输入端接入第二参考电平，所述第二负输入端接入侦测结果，当所述第二参考电平大于所述侦测结果时，所述控制电路使所述开关管导通，当所述第二参考电平低于所述侦测结果时，且所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
本发明另提供一种电平转换控制电路包括开关管以及控制电路，用来输出高电平以及低电平至阵列基板的栅极线，并具有第一参考电平。所述开关管的漏极连接所述第一参考电平，所述开关管的源极连接所述低电平。所述控制电路连接所述开关管的栅极，用来控制开关管的导通与截止。当所述控制电路使所述开关管导通时，所述开关管的漏极与所述开关管的源极短接使所述低电平与所述第一参考电平形成等电平。
较佳地，所述控制电路包括比较器，具有正输入端以及负输入端，所述正输入端接入所述低电平，所述负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时，所述控制电路使所述开关管导通，当所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
较佳地，所述控制电路为一双掷开关，所述双掷开关用来连接所述低电平或接地电平，所述低电平低于所述接地电平，当所述双掷开关连接所接地电平时，所述开关管导通使所述低电平与所述第一参考电平短接而形成等电平。
较佳地，所述控制电路包括一第一比较器与第二比较器，所述第一比较器具有第一正输入端以及第一负输入端，所述第一正输入端接入所述低电平，所述第一负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时，所述控制电路使所述开关管导通，当所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
较佳地，所述第二比较器具有第二正输入端以及第二负输入端，所述第二正输入端接入第二参考电平，所述第二负输入端接入侦测结果，当所述第二参考电平大于所述侦测结果时，所述控制电路使所述开关管导通，当所述第二参考电平低于所述侦测结果时，且所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
较佳地，所述电平转换控制电路为集成电路。
较佳地，所述电平转换控制电路包括电源管理芯片，当所述电源管理芯片停止工作时，所述开关管导通使所述低电平与所述第一参考电平短接而形成等电平。
本发明另提供一种电平转换电路包括开关管、第一比较器以及第二比较器，所述电平转换电路具有低电平及第一参考电平。所述开关管的漏极连接所述第一参考电平，所述开关管的源极连接所述低电平。所述第一比较器具有第一正输入端以及第一负输入端，所述第一正输入端接入所述低电平，所述第一负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时所述开关管导通，当所述低电平低于所述第一参考电平时所述开关管截止。所述第二比较器具有第二正输入端以及第二负输入端，所述第二正输入端接入第二参考电平，所述第二负输入端接入侦测结果，当所述第二参考电平大于所述侦测结果时所述开关管导通，当所述第二参考电平低于所述侦测结果时，且所述低电平低于所述第一参考电平时所述开关管截止。
较佳地，所述电平转换电路连接至电源管理芯片，当所述电源管理芯片停止工作时，所述开关管导通使所述低电平与所述第一参考电平短接而形成等电平。
 有益效果
本发明的优点在于，将电平转换控制电路所提供的低电平信号及参考电平分别连接于开关管的源极及漏极，利用简单的开关单元或控制电路来控制开关管的导通及截止，当电源管理芯片或电平转换控制电路的工作电压异常时，将开管关导通使考参考电平与低电平信号短接形成等电平，以避免低电平信号的电平高于参考电平而造成闩锁效应。通过本发明所提供的阵列基板以及电平转换控制电路，只需简单的元件，不需额外的控制元件及控制信号便可控制低电平信号及参考电平，避免电平转换控制电路在显示面板开关机时产生闩锁效应而无法运作甚至毁损，藉此维持阵列基板上的GOA单元及显示面板的正常运作。
 附图说明
图1绘示本发明GOA显示面板的结构示意图。
图2绘示本发明电平转换控制电路第一实施例的电路示意图。
图3绘示本发明电平转换控制电路第二实施例的电路示意图。
图4绘示本发明电平转换控制电路第三实施例的电路示意图。
图5绘示本发明电平转换控制电路第四实施例的电路示意图。
 本发明的最佳实施方式
下面结合附图对本发明提供的显示面板及显示装置做详细说明。显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
图1为本发明GOA显示面板的结构示意图。本发明的显示面板10包含阵列基板12、数条栅极线14、阵列基板行驱动(GOA)单元16以及电平转换(Level Shift)电路18。GOA单元16整合设置于阵列基板12上，用来提供扫描驱动信号至栅极线14。显示面板10上共有n条栅极线14平行设置在阵列基板12，GOA单元16输出扫描信号至栅极线Gate(1)~Gate(n)。显示面板10在显示画面时，需要对每行的栅极线依序送出扫描信号，即GOA单元16需要依序送出高电平信号至每行的栅极线上，以驱动位于阵列基板12上的薄膜晶体管，同时间只会有一行的薄膜晶体管被驱动，意即只有输出扫描信号的该行栅极线接收到高电平，其余的栅极线则接收到低电平信号，因此GOA单元16中需要电平转换电路18以实现快速的切换高低电平信号。然而在显示面板10开关机的过程中，电平转换电路18中的基底电平(即芯片中电平最低的信号)可能因电源管理芯片15未运作使其高于电平转换电路18中的其他电压信号，造成电平转换电路产生闩锁效应而无法正常运作，甚至会过热而造成损坏。因此，为了避免电转转换芯片18产生闩锁效应，本发明提供一种用于控制电平转换电路的控制电路，使芯片的基底电平保持在最低的电平。
图2绘示的是本发明第一实施例的电平转换控制电路示意图。
如图2所示，电平转换控制电路20包含电平转换电路18与控制电路200。电平转换电路18可以快速切换栅极信号VGL及VGH，其中VGL为低电平信号(即负电压)，VGH为高电平信号(即正电压)，VGL及VGH用来提供至显示面板10中的栅极线14，当栅极线14接收到VGH时，则驱动该行的薄膜晶体管，其他栅极线则收到VGL信号。举例来说，在时间t1时，栅极线Gata 1接收到高电平信号VGH，而Gate 2~ Gate n则收到低电平信号VGL，接着在时间点t2时，栅极线Gate 2接收到高电平信号VGH，Gate 1所接收到的信号由高电平信号VGH转换成低电平信号VGL，Gate 3~Gate n持续接收低电平信号VGL，以此类推。因此GOA单元16中的电平转换电路18则用来快速切换高电平信号VGH与低电平信号VGL，以对栅极线14进行逐行扫描。
电平转换电路18中还提供一参考电平VSS，作为共同参考电位。当电平转换电路18正常运作时，参考电平VSS的电平会高于低电平信号VGL，然而当显示面板开关机时，由于电源管理芯片15可能尚未运作或已停止运作，造成电平转换电路18的电压不稳，使得低电平信号VGL的电位可能高于参考电平VSS，使得电平转换电路18因寄生二极管被导通而产生闩锁效应。
因此本发明第一实施例中，控制电路200利用一个开关管22来避免低电平信号VGL的电位高于参考电平VSS。具体来说，开关管22的漏极接入参考电平VSS，开关管22的源极则连接低电平信号VGL，当GOA单元16中的电源管理芯片15正常运作时，开关管22的控制端(开关管22的栅极)接收一低电平使其截止，因此参考电平VSS与低电平信号VGL独立运作不会相互影响。然而当GOA单元16中的电源管理芯片15停止运作时，开关管22的控制端接收一高电平使其导通，因此电平转换电路18用来输出参考电平VSS与低电平信号VGL的两个接脚会短接，使参考电平VSS与低电平信号VGL形成等电平。如此一来，便能避免在电源管理芯片15停止运作时，低电平信号VGL的电位高于参考电平VSS。其中控制端可以通过一控制器、控制电路或开关单元来控制输入的电平。
图3绘示的是本发明第二实施例的电平转换控制电路示意图。如图所示，电平转换控制电路30包含电平转换电路18与控制电路300。电平转换电路18同样具有参考电平VSS、低电平信号VGL以及高电平信号VGH。而第二实施例中的控制电路300除了开关管32外，还具有一比较器34。比较器34的正输入端接收低电平信号VGL，比较器34的负输入端接入参考电平VSS。开关管32的漏极接入参考电平VSS，源极则连接低电平信号VGL。因此当GOA单元16中的电源管理芯片15正常运作时，低电平信号VGL的电位低于参考电平VSS，比较器34会输出一低电平至开关管32的控制端使开关管32不导通，因此参考电平VSS与低电平信号VGL独立运作不会相互影响。当GOA单元16中的电源管理芯片15未正常运作而导致低电平信号VGL的电位高于参考电平VSS时，比较器34会输出高电平至开关管32的控制端使开关管32导通，因此电平转换电路18用来输出参考电平VSS与低电平信号VGL的两个接脚会短接，而参考电平VSS与低电平信号VGL会形成等电平。
图4绘示的是本发明第三实施例的电平转换控制电路示意图。第三实施例电平转换控制电路40包含电平转换电路18与控制电路400。电平转换电路18同样提供参考电平VSS、低电平信号VGL以及高电平信号VGH三种电位。而第三实施例的控制电路400包括开关管42以及比较器44，开关管42的漏极同样接入参考电平VSS，源极则连接低电平信号VGL。比较器的正输入端输入比较参考电压Vref，而负输入端则输入结果电压Vi，Vi为侦测输入电压Vin的结果电压，Vin在本实施例中为GOA单元16的输入电压或显示面板10的工作电压，而Vref可以是低电压锁定(Under-voltage-Lockout, UVLO)电压，用来监测GOA单元16或显示面板10的工作电压，当GOA单元16或显示面板10的工作电压低于UVLO电压时，代表GOA单元16或显示面板10未正常运作或处于非工作状态，因此输入电压Vin则会低于UVLO电压。因此当输入电压Vin低于UVLO时，代表电源管理芯片15未处于工作状态，此时比较器44会因比较参考电压Vref大于结果电压Vi而输出一高电平至开关管42，因此开关管42会导通使电平转换电路18用来输出参考电平VSS与低电平信号VGL的两个接脚会短接，使得参考电平VSS与低电平VGL形成等电平。
图5所示为本发明电平转换控制电路的第四实施例。电平转换控制电路50包含电平转换电路18与控制电路500。电平转换电路18同样提供参考电平VSS、低电平信号VGL以及高电平信号VGH三种电位。第四实施例中的控制电路500包括开关管52、第一比较器54、第二比较器56以及开关单元58。开关单元58根据控制信号EN来控制输入开关管52控制端的信号。而开关单元的控制信号EN是根据第一比较器54以及第二比较器56的输出信号而产生。具体而言，第一比较器54的正输入端接收低电平信号VGL，负输入端接入参考电平VSS。第二比较器56的正输入端输入比较参考电压Vref，而负输入端则输入结果电压Vi，Vi为侦测输入电压Vin的结果电压，Vin在第四实施例中同样可以是GOA单元16输入电压或显示面板10的工作电压，而Vin也可以是一个位于显示面板10中的侦测电路对监控显示面板10的源驱动单元的工作电压的侦测结果，或是其他侦测电路对显示面板10中其他元件的工作电压的侦测结果。参考电压Vref可以是低电压锁定(Under- voltage-Lockout, UVLO)电压，用来监测GOA单元16或显示面板10的工作电压，或是参考电压Vref也可以是监测显示面板10的源驱动单元参考电压或用来监测其他工作于显示面板10中的元件的工作状态的参考电压。因此当输入电压Vin低于Vref时，代表显示面板10、GOA单元16或是位于其中的特定元件并未处于工作状态，因此第二比较器56会输出一高电平。当第一比较器54或第二比较器56输出高电平时，开关单元58的控制信号EN则控制开关单元58处于开启的状态，此时开关单元58会输出一高电平至开关管52的控制端使开关管52导通，因此电平转换电路18用来输出参考电平VSS与低电平信号VGL的两个接脚会短接，参考电平VSS与低电平VGL形成等电位。然而当开关单元58未接收到控制信号EN的开启指令时，开关单元58处于关闭(off)状态，因此开关管52的控制端接收到低电平而处于断开状态，使参考电平VSS与低电平VGL独立运作不会相互影响。
在第四实施例中，开关单元58可以是一单刀双掷开关580，单刀双掷开关580一端为参考电平GND，另一端为低电平信号VGL。当开关单元58的控制信号EN为低电平时，则单刀双掷开关580与低电平信号VGL相接，使得开关管52的控制端接入电平信号VGL而不导通，因此电平转换电路18的参考电平VSS与低电平信号VSS不会相互影响。而当单开单元58的控信号EN为高电平时，则单刀双掷开关580与参考电平GND相连，GND相对于开关管的两个负电压的输入信号(参考电平VSS与低电平VGL)为高电平，因此开关管52导通使得电平转换电路18用来输出参考电平VSS与低电平信号VGL的两个接脚会短接，参考电平VSS与低电平VGL形成等电位。GND可以是显示面板10的参考接地电平，也可以是外接的参考接地信号。通过单刀双掷开关580选择于参考电平GND或低电平信号VGL相连，决定输入开关管52的电平，而低电平信号VGL原本就是电平转换电路18所提供的电平信号，而参考信号GND也可以是显示面板10中任一个元件的参考电平，因此关单元58不需再通过额外的控制电路来提供控制信号EN，藉由原本就存在于显示面板10中的电平信号达到控制开关管52的导通或截止，不仅可以简化电路，同时也可以避免低电平信号VGL的电平高于参考电平VSS。
在本发明的第一到第四实施例中，电平转换控制电路可与电平转换电路整合成一个芯片，即整合成用于驱动电路中的level shift芯片。通过第一到第四实施例中的电平转换控制电路，可以使用于GOA驱动电路中的电平转换芯片(Level Shift IC)，避免低电平VGL高于参考电平VSS而导致芯片闩锁，使得芯片失效或毁损。
通过本发明实施例所提供的技术方案，在转换电平芯片输出低电平信号与参考信号的两个接脚之间以一个开关管相连，藉由简单的电路及元件，不需提供额外的控制信号便可控制开关管的导通与否，当作为电平转换电路中基底电平(即电平最低的信号)的低电平信号的电平高于参考信号时，将输出低电平信号与参考信号的两个端子短接，使低电平信号与参考信号因此端的短接而形成等电平，藉此避免因芯片的基底电平高于其他信号而形成闩锁效应，达到保护电平转换电路及维持电平转换电路正常运作的目的。
以上所述仅是本发明的优选实施方式，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

  1. 一种电平转换控制电路，用来输出高电平以及低电平至阵列基板的栅极线，并具有第一参考电平，其中所述电平转换控制电路包括：
    开关管，所述开关管的漏极连接所述第一参考电平，所述开关管的源极连接所述低电平；
    控制电路，连接所述开关管的栅极，用来控制开关管的导通与截止，当所述控制电路使所述开关管导通时，所述开关管的漏极与所述开关管的源极短接使所述低电平与所述第一参考电平形成等电平；
    第一比较器，具有第一正输入端以及第一负输入端，所述第一正输入端接入所述低电平，所述第一负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时，所述控制电路使所述开关管导通，当所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止；以及
    第二比较器，具有第二正输入端以及第二负输入端，所述第二正输入端接入第二参考电平，所述第二负输入端接入侦测结果，当所述第二参考电平大于所述侦测结果时，所述控制电路使所述开关管导通，当所述第二参考电平低于所述侦测结果时，且所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
  2. 一种电平转换控制电路，用来输出高电平以及低电平至阵列基板的栅极线，并具有第一参考电平，其中所述电平转换控制电路包括：
    开关管，所述开关管的漏极连接所述第一参考电平，所述开关管的源极连接所述低电平；以及
    控制电路，连接所述开关管的栅极，用来控制开关管的导通与截止；
    当所述控制电路使所述开关管导通时，所述开关管的漏极与所述开关管的源极短接使所述低电平与所述第一参考电平形成等电平。
  3. 如权利要求2所述的电平转换控制电路，其中所述控制电路包括比较器，具有正输入端以及负输入端，所述正输入端接入所述低电平，所述负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时，所述控制电路使所述开关管导通，当所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
  4. 如权利要求2所述的电平转换控制电路，其中所述控制电路为一双掷开关，所述双掷开关用来连接所述低电平或接地电平，所述低电平低于所述接地电平，当所述双掷开关连接所接地电平时，所述开关管导通使所述低电平与所述第一参考电平短接而形成等电平。
  5. 如权利要求2所述的电平转换控制电路，其中所述控制电路包括第一比较器与第二比较器，所述第一比较器具有第一正输入端以及第一负输入端，所述第一正输入端接入所述低电平，所述第一负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时，所述控制电路使所述开关管导通，当所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
  6. 如权利要求5所述的电平转换控制电路，其中所述第二比较器具有第二正输入端以及第二负输入端，所述第二正输入端接入第二参考电平，所述第二负输入端接入侦测结果，当所述第二参考电平大于所述侦测结果时，所述控制电路使所述开关管导通，当所述第二参考电平低于所述侦测结果时，且所述低电平低于所述第一参考电平时，所述控制电路使所述开关管截止。
  7. 如权利要求2所述的电平转换控制电路，其中所述电平转换控制电路为集成电路。
  8. 如权利要求7所述的电平转换控制电路，其中所述的电平转换控制电路包括电源管理芯片，当所述电源管理芯片停止工作时，所述开关管导通使所述低电平与所述第一参考电平短接而形成等电平。
  9. 一种电平转换电路，具有低电平及第一参考电平，其中所述电平转换电路包括：
    开关管，所述开关管的漏极连接所述第一参考电平，所述开关管的源极连接所述低电平；
    第一比较器，具有第一正输入端以及第一负输入端，所述第一正输入端接入所述低电平，所述第一负输入端接入所述第一参考电平，当所述低电平大于所述第一参考电平时所述开关管导通，当所述低电平低于所述第一参考电平时所述开关管截止；以及
    第二比较器，具有第二正输入端以及第二负输入端，所述第二正输入端接入第二参考电平，所述第二负输入端接入侦测结果，当所述第二参考电平大于所述侦测结果时所述开关管导通，当所述第二参考电平低于所述侦测结果时，且所述低电平低于所述第一参考电平时，所述开关管截止。
  10. 如权利要求9所述的电平转换电路，其中所述电平转换电路连接至电源管理芯片，当所述电源管理芯片停止工作时，所述开关管导通使所述低电平与所述第一参考电平短接而形成等电平。
PCT/CN2019/111553 2019-04-04 2019-10-17 电平转换控制电路与电平转换电路 WO2020199553A1 (zh)

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