WO2020181591A1 - 显示面板的制作方法、显示面板及电子设备 - Google Patents
显示面板的制作方法、显示面板及电子设备 Download PDFInfo
- Publication number
- WO2020181591A1 WO2020181591A1 PCT/CN2019/080205 CN2019080205W WO2020181591A1 WO 2020181591 A1 WO2020181591 A1 WO 2020181591A1 CN 2019080205 W CN2019080205 W CN 2019080205W WO 2020181591 A1 WO2020181591 A1 WO 2020181591A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- water blocking
- blocking layer
- display panel
- quantum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/873—Encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/871—Self-supporting sealing arrangements
- H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants
Definitions
- This application relates to the field of display technology, in particular to a manufacturing method of a display panel, a display panel and an electronic device.
- Quantum Dot is an inorganic nanoscale semiconductor material. By applying a certain light pressure and electric field to it, it will emit light of a specific frequency, and the frequency of the emitted light will vary with the size of the quantum dot Therefore, by precisely controlling the size of the quantum dots, it is possible to emit very pure RGB three primary colors, thereby significantly improving the color gamut. It has been widely used in QD-LCD TVs.
- Organic light-emitting diode Light-Emitting Diode, OLED has self-luminous, ultra-thin, fast response speed, wide viewing angle and other characteristics. Blue organic light-emitting diode devices (Blue Organic Light-Emitting Diode (BOLED) is an ideal light source for excitation of quantum dots. Therefore, the combination of quantum dots and BOLED (QD-BOLED) panels will have the advantages of both quantum dots and OLEDs, thereby improving product performance.
- QD and OLED are both susceptible to moisture and must be packaged.
- the mainstream packaging of QD-LCD quantum dots is the On-Surface method, that is, the sheet material with quantum dots sandwiched between the films is pasted between the backlight and the LCD panel.
- the quantum dot material is on the panel.
- the On-Surface method is more mature in QD-LCD, it is not suitable for QD-BOLED. Therefore, it is necessary to develop new packaging methods and structures to improve QD-BOLED The TV panel is packaged.
- the embodiments of the present application provide a method for manufacturing a display panel, a display panel, and an electronic device, which can effectively improve the packaging effect of the display panel, and can simultaneously meet the packaging requirements for quantum dots and organic light emitting diodes of a large-size display panel.
- An embodiment of the present application provides a manufacturing method of a display panel, including:
- the manufacturing the blue organic light emitting diode device and the first water blocking layer on the thin film transistor substrate to obtain the thin film transistor substrate packaging structure includes:
- a first water blocking layer is formed on the blue organic light emitting diode device to obtain a thin film transistor substrate packaging structure.
- the manufacturing a blue organic light emitting diode device on the thin film transistor substrate includes:
- the blue organic light emitting diode device is fabricated on the thin film transistor substrate by evaporation or inkjet printing.
- the forming a first water blocking layer on the blue organic light emitting diode device includes:
- the first water blocking layer is formed on the blue organic light emitting diode device by means of plasma enhanced chemical vapor deposition.
- the forming a color film, a quantum layer and a second water blocking layer on the cover plate to obtain a cover plate packaging structure includes:
- a moisture absorption layer and a sealant are sequentially coated on the periphery of the second water blocking layer, and the filling glue is coated on the inner side of the moisture absorption layer to obtain a cover plate packaging structure.
- the forming a color film on the cover plate includes:
- a color film with red pixel units, green pixel units, blue pixel units and black matrix is formed on the cover plate, wherein the black matrix is distributed on the periphery of the color film and each adjacent red pixel unit, green Between the pixel unit and the blue pixel unit.
- the forming a barrier layer on the color film includes:
- the barrier layer is deposited on the color film by means of plasma enhanced chemical vapor deposition.
- the pixel definition layer includes a plurality of pixel definition units arranged at intervals, and the formation of a quantum layer on the pixel definition layer includes:
- a quantum dot is arranged between the pixel definition units arranged at each interval to form the quantum layer.
- the arranging quantum dots between the pixel defining units arranged at each interval includes:
- the quantum dots are arranged between each of the pixel defining units arranged at intervals by means of inkjet printing.
- the forming a second water blocking layer on the quantum layer includes:
- the second water blocking layer is formed on the quantum layer by means of plasma enhanced chemical vapor deposition or atomic layer deposition.
- the vacuum bonding of the thin film transistor substrate packaging structure and the cover plate packaging structure includes:
- the thin film transistor substrate packaging structure and the cover plate packaging structure are vacuum bonded through the moisture absorption layer, frame glue and filling glue, wherein the first water blocking layer and the second water blocking layer are correspondingly pasted through the filling glue And the moisture absorption layer and sealant extend to the periphery of the first water blocking layer;
- the moisture absorption layer, sealant and filler are cured by ultraviolet curing or heating.
- An embodiment of the present application also provides a display panel, including: a thin film transistor substrate packaging structure and a cover plate packaging structure;
- the thin film transistor substrate packaging structure includes a thin film transistor substrate, a blue organic light emitting diode device and a first water blocking layer which are arranged in sequence;
- the cover plate packaging structure includes a cover plate, a color film, a quantum layer, and a second water blocking layer arranged in sequence, wherein the first water blocking layer and the second water blocking layer are correspondingly attached by filling glue.
- the cover package structure further includes a barrier layer and a pixel definition layer
- the barrier layer is disposed on the color filter
- the pixel definition layer is disposed on the blocking layer
- the quantum layer is disposed on the pixel definition layer
- the second water blocking layer is disposed on the On the quantum layer
- the periphery of the second water blocking layer is further coated with a moisture absorption layer and a sealant in sequence, and a filler is coated on the inner side of the moisture absorption layer; the first water blocking layer and the second water blocking layer pass through the The filling glue is attached correspondingly, and the moisture absorption layer and the sealant extend to the periphery of the first water blocking layer.
- the pixel definition layer includes a plurality of pixel definition units arranged at intervals, and quantum dots are arranged between each of the pixel definition units arranged at intervals to form the quantum Floor.
- the first water blocking layer covers the blue organic light emitting diode device
- the second water blocking layer and the barrier layer cover the quantum layer
- the first A water blocking layer, a second water blocking layer and a barrier layer are located inside the moisture absorption layer.
- the first water blocking layer is made of any one or more materials among silicon nitride, silicon oxynitride and silicon oxide.
- the second water blocking layer is made of any one or more materials of silicon nitride, silicon oxynitride, silicon oxide, aluminum oxide, and silicon dioxide. to make.
- An embodiment of the present application further provides an electronic device, including a housing and a display panel, the display panel is mounted on the housing, and the display panel includes a thin film transistor substrate packaging structure and a cover packaging structure;
- the thin film transistor substrate packaging structure includes a thin film transistor substrate, a blue organic light emitting diode device and a first water blocking layer which are arranged in sequence;
- the cover plate packaging structure includes a cover plate, a color film, a quantum layer, and a second water blocking layer arranged in sequence, wherein the first water blocking layer and the second water blocking layer are correspondingly attached by filling glue.
- the cover package structure further includes a barrier layer and a pixel definition layer
- the barrier layer is disposed on the color filter
- the pixel definition layer is disposed on the blocking layer
- the quantum layer is disposed on the pixel definition layer
- the second water blocking layer is disposed on the On the quantum layer
- the periphery of the second water blocking layer is further coated with a moisture absorption layer and a sealant in sequence, and a filler is coated on the inner side of the moisture absorption layer; the first water blocking layer and the second water blocking layer pass through the The filling glue is attached correspondingly, and the moisture absorption layer and the sealant extend to the periphery of the first water blocking layer.
- the pixel definition layer includes a plurality of pixel definition units arranged at intervals, and quantum dots are arranged between the pixel definition units arranged at intervals to form the quantum Floor.
- An embodiment of the present application provides a method for fabricating a display panel by providing a thin film transistor substrate; fabricating a blue organic light emitting diode device and a first water blocking layer on the thin film transistor substrate to obtain a thin film transistor substrate packaging structure; and providing a cover Plate; forming a color film, a quantum layer, and a second water blocking layer on the cover plate to obtain a cover plate packaging structure; vacuum bonding the thin film transistor substrate packaging structure and the cover plate packaging structure, wherein the first water blocking layer and The second water blocking layer is correspondingly bonded by the filling glue.
- BOLED is fabricated and encapsulated on a TFT substrate, and then QD is fabricated and encapsulated on the cover plate, and finally the TFT substrate packaging structure and the cover plate packaging structure are vacuum bonded, which can effectively improve the packaging effect of the display panel. It can also meet the packaging requirements of large-size display panels for quantum dots and organic light-emitting diodes.
- FIG. 1 is a schematic structural diagram of an electronic device provided by an embodiment of the application.
- FIG. 2 is a schematic structural diagram of a display panel provided by an embodiment of the application.
- FIG. 3 is a schematic diagram of a first process of a method for manufacturing a display panel provided by an embodiment of the application.
- FIG. 4 is a schematic diagram of a second process of a method for manufacturing a display panel provided by an embodiment of the application.
- FIG. 5 is a schematic diagram of a third process of a method for manufacturing a display panel provided by an embodiment of the application.
- FIG. 6 is a schematic diagram of a fourth process of a method for manufacturing a display panel provided by an embodiment of the application.
- FIG. 7 is a schematic diagram of the fifth process of the manufacturing method of the display panel provided by the embodiment of the application.
- FIG 8 and 9 are schematic diagrams of the manufacturing process flow of the display panel provided by the embodiments of the application.
- first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of this application, “multiple” means two or more than two, unless otherwise specifically defined.
- connection should be interpreted broadly unless otherwise clearly specified and limited.
- it can be a fixed connection or a detachable connection.
- Connected or integrally connected it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal communication of two components or the interaction of two components relationship.
- connection should be interpreted broadly unless otherwise clearly specified and limited.
- it can be a fixed connection or a detachable connection.
- Connected or integrally connected it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal communication of two components or the interaction of two components relationship.
- the "on” or “under” of the first feature of the second feature may include the first and second features in direct contact, or may include the first and second features Not in direct contact but through other features between them.
- “above”, “above” and “above” the second feature of the first feature include the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature is higher in level than the second feature.
- the “below”, “below” and “below” the first feature of the second feature include the first feature directly below and obliquely below the second feature, or it simply means that the level of the first feature is smaller than the second feature.
- the embodiments of the present application provide a method for manufacturing a display panel, a display panel, and an electronic device.
- the display panel can be integrated in an electronic device.
- the display panel can be made using the method for manufacturing a display panel.
- the electronic device can be a smart wearable device. , Smart phones, tablets, smart TVs and other devices.
- An embodiment of the application provides an electronic device including a housing and a display panel, the display panel is mounted on the housing, and the display panel includes a thin film transistor substrate packaging structure and a cover packaging structure;
- the thin film transistor substrate packaging structure includes a thin film transistor substrate, a blue organic light emitting diode device and a first water blocking layer which are arranged in sequence;
- the cover plate packaging structure includes a cover plate, a color film, a quantum layer, and a second water blocking layer arranged in sequence, wherein the first water blocking layer and the second water blocking layer are correspondingly attached by filling glue.
- the cover package structure further includes a barrier layer and a pixel definition layer
- the barrier layer is disposed on the color filter
- the pixel definition layer is disposed on the blocking layer
- the quantum layer is disposed on the pixel definition layer
- the second water blocking layer is disposed on the On the quantum layer
- the periphery of the second water blocking layer is further coated with a moisture absorption layer and a sealant in sequence, and a filler is coated on the inner side of the moisture absorption layer; the first water blocking layer and the second water blocking layer pass through the The filling glue is attached correspondingly, and the moisture absorption layer and the sealant extend to the periphery of the first water blocking layer.
- the pixel definition layer includes a plurality of pixel definition units arranged at intervals, and quantum dots are arranged between the pixel definition units arranged at intervals to form the quantum Floor.
- FIG. 1 is a schematic structural diagram of an electronic device provided by an embodiment of the application.
- the electronic device 100 may include a display panel 10, a control circuit 20, and a housing 30. It should be noted that the electronic device 100 shown in FIG. 1 is not limited to the above content, and may also include other devices, such as a camera, an antenna structure, a pattern unlocking module, and the like.
- the display panel 10 is disposed on the housing 30.
- the display panel 10 may be fixed to the housing 30, and the display panel 10 and the housing 30 form a closed space to accommodate the control circuit 20 and other devices.
- the housing 30 may be made of a flexible material, such as a plastic housing or a silicone housing.
- control circuit 20 is installed in the housing 30.
- the control circuit 20 can be the main board of the electronic device 100.
- the control circuit 20 can be integrated with a battery, an antenna structure, a microphone, a speaker, a headphone interface, a universal serial bus interface, One, two or more of functional components such as camera, distance sensor, ambient light sensor, receiver, and processor.
- the display panel 10 is installed in the housing 30, and at the same time, the display panel 10 is electrically connected to the control circuit 20 to form the display surface of the electronic device 100.
- the display panel 10 may include a display area and a non-display area.
- the display area can be used to display the screen of the electronic device 100 or for the user to perform touch manipulation.
- This non-display area can be used to set various functional components.
- FIG. 2 is a schematic structural diagram of a display panel provided by an embodiment of the application.
- the display panel 10 may include a thin film transistor substrate packaging structure 11 and a cover packaging structure 12.
- the thin film transistor substrate packaging structure 11 includes thin film transistor substrates (Thin Film Transistor, TFT) 111, a blue organic light emitting diode device 112, and a first water blocking layer 113.
- thin film transistor substrates Thin Film Transistor, TFT
- TFT Thin Film Transistor
- the cover package structure 12 includes a cover 121, a color film 122, a quantum layer 123, and a second water blocking layer 124 arranged in sequence.
- first water-blocking layer 113 and the second water-blocking layer 124 are correspondingly attached by the filler 125.
- the color film 122 may be a color filter (Color filter, CF).
- the color film 122 includes a red pixel unit 1221, a green pixel unit 1222, a blue pixel unit 1223, and a black matrix 1224, wherein the black matrix 1224 is distributed on the periphery of the color film 122 and each adjacent red pixel unit 1221 , The green pixel unit 1222, the blue pixel unit 1223.
- the first water blocking layer 113 may be made of any one or more materials such as silicon nitride (SiNx), silicon oxynitride (SiON), and silicon oxide (SiOx).
- the second water blocking layer 124 may be made of silicon nitride (SiNx), silicon oxynitride (SiON), silicon oxide (SiOx), aluminum oxide (Al2O3), silicon dioxide (SiO2), etc. Made of one material or multiple materials.
- the first water blocking layer 113 and the second water blocking layer 124 may have a single-layer structure or a multilayer structure.
- it can be made of multiple layers of inorganic material films; or can be made of multiple layers of metal material films; or it can be made of alternating inorganic material films and metal material films.
- the cover package structure 12 further includes a barrier layer 126 and a pixel definition layer 127.
- the blocking layer 126 is disposed on the color film 122, the pixel defining layer 127 is disposed on the blocking layer 126, the quantum layer 123 is disposed on the pixel defining layer 127, and the second water blocking layer 124 is disposed on the quantum layer 123.
- the periphery of the second water blocking layer 124 is further coated with a moisture absorption layer 128 and a sealant 129 in sequence, and a filler 125 is coated on the inner side of the moisture absorption layer 128; the first water blocking layer 113 and the second water blocking layer 124
- the filling glue 125 is correspondingly attached, and the moisture absorption layer 128 and the sealant 129 extend to the periphery of the first water blocking layer 113.
- the pixel definition layer 127 includes a plurality of pixel definition units 1271 arranged at intervals, and quantum dots 1231 are arranged between the pixel definition units 1271 arranged at intervals to form the quantum layer 123.
- the first water blocking layer 113 covers the blue organic light emitting diode device 112
- the second water blocking layer 124 and the blocking layer 126 cover the quantum layer 123
- the first water blocking layer 113 and the second water blocking layer 124 and the barrier layer 126 are located inside the moisture absorption layer 128.
- the display panel 10 provided by the embodiment of the application includes a thin film transistor substrate packaging structure 11 and a cover plate packaging structure 12;
- the thin film transistor substrate packaging structure 11 includes a thin film transistor substrate (Thin Film Transistor, TFT) 111 and a blue organic light emitting diode arranged in sequence
- the cover plate package structure 12 includes a cover plate 121, a color film 122, a quantum layer 123 and a second water blocking layer 124 arranged in sequence, wherein the first water blocking layer 113 and the second blocking layer
- the water layer 124 is correspondingly attached by the filler 125.
- the BOLED is packaged in the TFT substrate packaging structure, and the QD is packaged in the cover plate packaging structure, and finally the TFT substrate packaging structure and the cover plate packaging structure are vacuum bonded, which can effectively improve the packaging effect of the display panel, and It can simultaneously meet the packaging requirements of quantum dots and organic light-emitting diodes for large-size display panels.
- FIGS. 3 to 6 are schematic diagrams of the first to fourth processes of the manufacturing method of the display panel provided by the embodiments of the present application.
- the manufacturing method of the display panel includes:
- Step 101 Provide a thin film transistor substrate 111.
- Step 102 fabricating a blue organic light emitting diode device 112 and a first water blocking layer 113 on the thin film transistor substrate 111 to obtain the thin film transistor substrate packaging structure 11.
- step 102 may be implemented through steps 1021 to 1022, specifically:
- Step 1021 fabricate a blue organic light emitting diode device 112 on the thin film transistor substrate 111.
- fabricating the blue organic light emitting diode device 112 on the thin film transistor substrate 111 includes:
- the blue organic light emitting diode device 112 is fabricated on the thin film transistor substrate 111 by evaporation or inkjet printing.
- Step 1022 forming a first water blocking layer 113 on the blue organic light emitting diode device 112 to obtain a thin film transistor substrate packaging structure.
- forming the first water blocking layer 113 on the blue organic light emitting diode device 112 includes:
- the first water blocking layer 113 is formed on the blue organic light emitting diode device 112 by means of Plasma Enhanced Chemical Vapor Deposition (PECVD).
- PECVD Plasma Enhanced Chemical Vapor Deposition
- the first water blocking layer 113 may also be formed on the blue organic light emitting diode device 112 by means of atomic layer deposition (ALD).
- ALD atomic layer deposition
- Step 103 Provide a cover 121.
- step 104 a color film 122, a quantum layer 123 and a second water blocking layer 124 are formed on the cover plate 121 to obtain the cover plate package structure 12.
- step 104 may be implemented through steps 1041 to 1045, specifically:
- Step 1041 forming a color film 122 on the cover 121.
- forming the color film 122 on the cover 121 includes:
- a color film 122 having red pixel units 1221, green pixel units 1222, blue pixel units 1223, and black matrix 1224 is formed on the cover 121, wherein the black matrix 1224 is distributed on the periphery of the color film 122 and each adjacent red pixel unit 1221 between the green pixel unit 1222 and the blue pixel unit 1223.
- a barrier layer 126 is formed on the color film 122, and a pixel definition layer 127 is formed on the barrier layer 126.
- forming the barrier layer 126 on the color film 122 includes:
- the barrier layer 126 is deposited on the color film 122 by means of plasma enhanced chemical vapor deposition.
- Step 1043 forming a quantum layer 123 on the pixel defining layer 127.
- the pixel definition layer 127 includes a plurality of pixel definition units 1271 arranged at intervals, and the quantum layer 123 is formed on the pixel definition layer 127, including:
- Quantum dots 1231 are arranged between the pixel defining units 1271 arranged at each interval to form the quantum layer 123.
- the quantum dots 1231 are arranged between the pixel definition units 1271 arranged at each interval, including:
- the quantum dots 1231 are arranged between the pixel defining units 1271 arranged at each interval by inkjet printing.
- Step 1044 forming a second water blocking layer 124 on the quantum layer 123.
- forming the second water blocking layer 124 on the quantum layer 123 includes:
- the second water blocking layer 124 is formed on the quantum layer 123 by means of plasma enhanced chemical vapor deposition or atomic layer deposition.
- step 1045 the moisture absorption layer 128 and the sealant 129 are sequentially coated on the periphery of the second water blocking layer 124, and the filler 125 is coated on the inner side of the moisture absorption layer 128 to obtain the cover package structure 12.
- the moisture absorption layer 128 and the sealant 129 can be sequentially coated on the periphery of the second water blocking layer 124 by a dispenser, and the filler 125 can be coated on the inner side of the moisture absorption layer 128.
- Step 105 vacuum bonding the thin film transistor substrate packaging structure 11 and the cover packaging structure 12, wherein the first water blocking layer 113 and the second water blocking layer 124 are correspondingly bonded through the filling glue 125.
- step 105 can be implemented through steps 1051 to 1052, specifically:
- Step 1051 vacuum bonding the thin film transistor substrate package structure 11 and the cover package structure 12 through the moisture absorption layer 128, the sealant 120 and the filling glue 125, wherein the first water blocking layer 113 and the second water blocking layer 124 pass through the filling glue 125 is attached correspondingly, and the moisture absorption layer 128 and the sealant 129 extend to the periphery of the first water blocking layer 113.
- Step 1052 curing the moisture absorption layer 128, the sealant 129 and the filler 125 by means of ultraviolet curing or heating.
- FIG. 7 is a schematic diagram of the fifth process of the manufacturing method of the display panel provided by the embodiment of the application
- FIG. 8 and FIG. 9 are the preparation of the display panel provided by the embodiment of the application. Schematic diagram of the process flow.
- the manufacturing method of the display panel includes:
- Step 201 providing a thin film transistor substrate 111.
- a blue organic light emitting diode device 112 is fabricated on the thin film transistor substrate 111 by evaporation or inkjet printing.
- Step 203 forming a first water blocking layer 113 on the blue organic light emitting diode device 112 by means of plasma enhanced chemical vapor deposition.
- Step 204 provide a cover 121.
- Step 205 forming a color film 122 having a red pixel unit 1221, a green pixel unit 1222, a blue pixel unit 1223, and a black matrix 1224 on the cover 121.
- the black matrix 1224 is distributed between the periphery of the color filter 122 and the adjacent red pixel units 1221, green pixel units 1222, and blue pixel units 1223.
- a barrier layer 126 is deposited on the color film 122 by means of plasma enhanced chemical vapor deposition, and a pixel definition layer 127 is formed on the barrier layer 126.
- step 207 the quantum layer 123 is formed on the pixel defining layer 127 by inkjet printing.
- the pixel definition layer 127 includes a plurality of pixel definition units 1271 arranged at intervals.
- the quantum dots 1231 may be arranged between the pixel defining units 1271 arranged at intervals by inkjet printing to form the quantum layer 123.
- Step 208 forming a second water blocking layer 124 on the quantum layer 123.
- the second water blocking layer 124 may be formed on the quantum layer 123 by means of plasma enhanced chemical vapor deposition or atomic layer deposition.
- step 209 the moisture absorption layer 128 and the sealant 129 are sequentially coated on the periphery of the second water blocking layer 124, and the filler 125 is coated on the inner side of the moisture absorption layer 128 to obtain the cover package structure 12.
- Step 210 vacuum bonding the thin film transistor substrate packaging structure 11 and the cover packaging structure 12 together.
- the first water-blocking layer 113 and the second water-blocking layer 124 are correspondingly attached by the filler 125.
- the thin film transistor substrate package structure 11 and the cover package structure 12 can be vacuum bonded through the moisture absorption layer 128, the sealant 120 and the filling glue 125, wherein the first water blocking layer 113 and the second water blocking layer 124 is correspondingly attached by the filler 125, and the moisture absorption layer 128 and the sealant 129 extend to the periphery of the first water blocking layer 113.
- step 211 the moisture absorption layer 128, the sealant 129 and the filler 125 are cured by ultraviolet curing or heating.
- An embodiment of the present application provides a method for fabricating a display panel by providing a thin film transistor substrate; fabricating a blue organic light emitting diode device and a first water blocking layer on the thin film transistor substrate to obtain a thin film transistor substrate packaging structure; and providing a cover Plate; forming a color film, a quantum layer, and a second water blocking layer on the cover plate to obtain a cover plate packaging structure; vacuum bonding the thin film transistor substrate packaging structure and the cover plate packaging structure, wherein the first water blocking layer and The second water blocking layer is correspondingly bonded by the filling glue.
- BOLED is fabricated and encapsulated on a TFT substrate, and then QD is fabricated and encapsulated on the cover plate, and finally the TFT substrate packaging structure and the cover plate packaging structure are vacuum bonded, which can effectively improve the packaging effect of the display panel. It can also meet the packaging requirements of large-size display panels for quantum dots and organic light-emitting diodes.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
本申请公开一种显示面板的制作方法、显示面板及电子设备,其方法包括:提供一TFT基板;在TFT基板上制作BOLED及第一阻水层,以得到TFT基板封装结构;提供一盖板;在盖板上形成彩膜、量子层及第二阻水层,以得到盖板封装结构;将TFT基板封装结构与盖板封装结构进行真空贴合,其中第一阻水层与第二阻水层通过填充胶对应贴合。
Description
本申请涉及显示技术领域,具体涉及一种显示面板的制作方法、显示面板及电子设备。
量子点(Quantum Dot,QD)是一种无机纳米级半导体材料,通过对其施加一定的光压和电场,它便会发出特定频率的光,而发出的光的频率会随着量子点的尺寸的改变而变化,因而通过精准控制量子点的尺寸就可以发出非常纯的RGB三原色,从而显著提高色域,目前已在QD-LCD TV中广泛应用。有机发光二极管(Organic
Light-Emitting Diode, OLED)拥有自发光、超轻薄、响应速度快、宽视角等特性,蓝光有机发光二极管器件(Blue
Organic Light-Emitting Diode, BOLED)是理想的量子点激发光源。因此量子点与BOLED的结合(QD-BOLED)制作的面板将同时拥有量子点与OLED的优点,从而提升产品性能。
但QD和OLED都容易受水汽影响,必须进行封装。目前QD-LCD量子点的主流封装为On-Surface方式,即将薄膜之间夹有量子点的片状材料贴在背光源和液晶面板之间,但在QD-BOLED面板中,量子点材料在面板内部,因此On-Surface方法虽然在QD-LCD较成熟,但并不适用于QD-BOLED。因此需要开发新的封装方法和结构来对QD-BOLED
TV面板进行封装。
本申请实施例提供一种显示面板的制作方法、显示面板及电子设备,可以有效提升显示面板的封装效果,且能同时满足大尺寸显示面板对量子点和有机发光二极管的封装要求。
本申请实施例提供一种显示面板的制作方法,包括:
提供一薄膜晶体管基板;
在所述薄膜晶体管基板上制作蓝光有机发光二极管器件以及第一阻水层,以得到薄膜晶体管基板封装结构;
提供一盖板;
在所述盖板上形成彩膜、量子层以及第二阻水层,以得到盖板封装结构;
将所述薄膜晶体管基板封装结构与盖板封装结构进行真空贴合,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
在本申请实施例所述的显示面板的制作方法中,所述在所述薄膜晶体管基板上制作蓝光有机发光二极管器件以及第一阻水层,以得到薄膜晶体管基板封装结构,包括:
在所述薄膜晶体管基板上制作蓝光有机发光二极管器件;
在所述蓝光有机发光二极管器件上形成第一阻水层,以得到薄膜晶体管基板封装结构。
在本申请实施例所述的显示面板的制作方法中,所述在所述薄膜晶体管基板上制作蓝光有机发光二极管器件,包括:
通过蒸镀或喷墨打印的方式在所述薄膜晶体管基板上制作所述蓝光有机发光二极管器件。
在本申请实施例所述的显示面板的制作方法中,所述在所述蓝光有机发光二极管器件上形成第一阻水层,包括:
通过等离子体增强化学气相沉积的方式在所述蓝光有机发光二极管器件上形成所述第一阻水层。
在本申请实施例所述的显示面板的制作方法中,所述在所述盖板上形成彩膜、量子层以及第二阻水层,以得到盖板封装结构,包括:
在所述盖板上形成彩膜;
在所述彩膜上形成阻挡层,以及在所述阻挡层上形成像素定义层;
在所述像素定义层上形成量子层;
在所述量子层上形成第二阻水层;
在所述第二阻水层的周缘依次涂布吸湿层和框胶,并在所述吸湿层的内侧涂布所述填充胶,以得到盖板封装结构。
在本申请实施例所述的显示面板的制作方法中,所述在所述盖板上形成彩膜,包括:
在所述盖板上形成具有红色像素单元、绿色像素单元、蓝色像素单元以及黑色矩阵的彩膜,其中所述黑色矩阵分布于所述彩膜的周缘以及各相邻的红色像素单元、绿色像素单元、蓝色像素单元之间。
在本申请实施例所述的显示面板的制作方法中,所述在所述彩膜上形成阻挡层,包括:
通过等离子体增强化学气相沉积的方式在所述彩膜上沉积所述阻挡层。
在本申请实施例所述的显示面板的制作方法中,所述像素定义层包括多个间隔设置的像素定义单元,所述在所述像素定义层上形成量子层,包括:
在每一所述间隔设置的像素定义单元之间设置量子点,以形成所述量子层。
在本申请实施例所述的显示面板的制作方法中,所述在每一所述间隔设置的像素定义单元之间设置量子点,包括:
通过喷墨打印的方式在每一所述间隔设置的像素定义单元之间设置量子点。
在本申请实施例所述的显示面板的制作方法中,所述在所述量子层上形成第二阻水层,包括:
通过等离子体增强化学气相沉积或者原子层沉积的方式在所述量子层上形成所述第二阻水层。
在本申请实施例所述的显示面板的制作方法中,所述将所述薄膜晶体管基板封装结构与盖板封装结构真空贴合,包括:
通过所述吸湿层、框胶以及填充胶将所述薄膜晶体管基板封装结构与盖板封装结构真空贴合,其中,所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘;
通过紫外固化或者加热的方式对所述吸湿层、框胶及填充胶进行固化。
本申请实施例还提供一种显示面板,包括:薄膜晶体管基板封装结构与盖板封装结构;
其中,所述薄膜晶体管基板封装结构包括依次设置的薄膜晶体管基板、蓝光有机发光二极管器件以及第一阻水层;
所述盖板封装结构包括依次设置的盖板、彩膜、量子层以及第二阻水层,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
在本申请实施例所述的显示面板中,所述盖板封装结构还包括阻挡层和像素定义层;
其中,所述阻挡层设置在所述彩膜上,所述像素定义层设置在所述阻挡层上,所述量子层设置在所述像素定义层上,所述第二阻水层设置在所述量子层上;
所述第二阻水层的周缘还依次涂布有吸湿层和框胶,且在所述吸湿层的内侧涂布有填充胶;所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘。
在本申请实施例所述的显示面板中,所述像素定义层包括多个间隔设置的像素定义单元,在每一所述间隔设置的像素定义单元之间设有量子点,以形成所述量子层。
在本申请实施例所述的显示面板中,所述第一阻水层包覆所述蓝光有机发光二极管器件,所述第二阻水层和阻挡层包覆所述量子层,且所述第一阻水层、第二阻水层和阻挡层位于所述吸湿层的内侧。
在本申请实施例所述的显示面板中,所述第一阻水层由氮化硅、氮氧化硅和氧化硅中的任一种材料或者多个材料制成。
在本申请实施例所述的显示面板中,所述第二阻水层由氮化硅、氮氧化硅、氧化硅、三氧化二铝和二氧化硅中的任一种材料或者多个材料制成。
本申请实施例还提供一种电子设备,包括壳体和显示面板,所述显示面板安装在所述壳体上,所述显示面板包括:薄膜晶体管基板封装结构与盖板封装结构;
其中,所述薄膜晶体管基板封装结构包括依次设置的薄膜晶体管基板、蓝光有机发光二极管器件以及第一阻水层;
所述盖板封装结构包括依次设置的盖板、彩膜、量子层以及第二阻水层,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
在本申请实施例所述的电子设备中,所述盖板封装结构还包括阻挡层和像素定义层;
其中,所述阻挡层设置在所述彩膜上,所述像素定义层设置在所述阻挡层上,所述量子层设置在所述像素定义层上,所述第二阻水层设置在所述量子层上;
所述第二阻水层的周缘还依次涂布有吸湿层和框胶,且在所述吸湿层的内侧涂布有填充胶;所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘。
在本申请实施例所述的电子设备中,所述像素定义层包括多个间隔设置的像素定义单元,在每一所述间隔设置的像素定义单元之间设有量子点,以形成所述量子层。
本申请实施例提供的一种显示面板的制作方法,通过提供一薄膜晶体管基板;在薄膜晶体管基板上制作蓝光有机发光二极管器件以及第一阻水层,以得到薄膜晶体管基板封装结构;提供一盖板;在盖板上形成彩膜、量子层以及第二阻水层,以得到盖板封装结构;将薄膜晶体管基板封装结构与盖板封装结构进行真空贴合,其中,第一阻水层与第二阻水层通过填充胶对应贴合。本申请实施例通过在TFT基板上制作BOLED并进行封装,然后在盖板上制作QD并进行封装,最后将TFT基板封装结构与盖板封装结构真空贴合,可以有效提升显示面板的封装效果,且能同时满足大尺寸显示面板对量子点和有机发光二极管的封装要求。
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的电子设备的结构示意图。
图2为本申请实施例提供的显示面板的结构示意图。
图3为本申请实施例提供的显示面板的制备方法的第一流程示意图。
图4为本申请实施例提供的显示面板的制备方法的第二流程示意图。
图5为本申请实施例提供的显示面板的制备方法的第三流程示意图。
图6为本申请实施例提供的显示面板的制备方法的第四流程示意图。
图7为本申请实施例提供的显示面板的制备方法的第五流程示意图。
图8和图9为本申请实施例提供的显示面板的制备工艺流程示意图。
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
在本申请的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接或可以相互通讯;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中,除非另有明确的规定和限定,第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触,也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且,第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方,或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开,下文中对特定例子的部件和设置进行描述。当然,它们仅仅为示例,并且目的不在于限制本申请。此外,本申请可以在不同例子中重复参考数字和/或参考字母,这种重复是为了简化和清楚的目的,其本身不指示所讨论各种实施方式和/或设置之间的关系。此外,本申请提供了的各种特定的工艺和材料的例子,但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
本申请实施例提供一种显示面板的制作方法、显示面板及电子设备,该显示面板可以集成在电子设备中,该显示面板可以采用显示面板的制作方法制成,该电子设备可以是智能穿戴设备、智能手机、平板电脑、智能电视等设备。
本申请实施例提供一种电子设备,包括壳体和显示面板,所述显示面板安装在所述壳体上,所述显示面板包括:薄膜晶体管基板封装结构与盖板封装结构;
其中,所述薄膜晶体管基板封装结构包括依次设置的薄膜晶体管基板、蓝光有机发光二极管器件以及第一阻水层;
所述盖板封装结构包括依次设置的盖板、彩膜、量子层以及第二阻水层,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
在本申请实施例所述的电子设备中,所述盖板封装结构还包括阻挡层和像素定义层;
其中,所述阻挡层设置在所述彩膜上,所述像素定义层设置在所述阻挡层上,所述量子层设置在所述像素定义层上,所述第二阻水层设置在所述量子层上;
所述第二阻水层的周缘还依次涂布有吸湿层和框胶,且在所述吸湿层的内侧涂布有填充胶;所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘。
在本申请实施例所述的电子设备中,所述像素定义层包括多个间隔设置的像素定义单元,在每一所述间隔设置的像素定义单元之间设有量子点,以形成所述量子层。
请参阅图1,图1为本申请实施例提供的电子设备的结构示意图。该电子设备100可以包括显示面板10、控制电路20、以及壳体30。需要说明的是,图1所示的电子设备100并不限于以上内容,其还可以包括其他器件,比如还可以包括摄像头、天线结构、纹解锁模块等。
其中,显示面板10设置于壳体30上。
在一些实施例中,显示面板10可以固定到壳体30上,显示面板10和壳体30形成密闭空间,以容纳控制电路20等器件。
在一些实施例中,壳体30可以为由柔性材料制成,比如为塑胶壳体或者硅胶壳体等。
其中,该控制电路20安装在壳体30中,该控制电路20可以为电子设备100的主板,控制电路20上可以集成有电池、天线结构、麦克风、扬声器、耳机接口、通用串行总线接口、摄像头、距离传感器、环境光传感器、受话器以及处理器等功能组件中的一个、两个或多个。
其中,该显示面板10安装在壳体30中,同时,该显示面板10电连接至控制电路20上,以形成电子设备100的显示面。该显示面板10可以包括显示区域和非显示区域。该显示区域可以用来显示电子设备100的画面或者供用户进行触摸操控等。该非显示区域可用于设置各种功能组件。
请参阅图2,图2为本申请实施例提供的显示面板的结构示意图。该显示面板10可以包括薄膜晶体管基板封装结构11与盖板封装结构12。
其中,薄膜晶体管基板封装结构11包括依次设置的薄膜晶体管基板(Thin Film
Transistor,TFT)111、蓝光有机发光二极管器件112以及第一阻水层113。
盖板封装结构12包括依次设置的盖板121、彩膜122、量子层123以及第二阻水层124。
其中,第一阻水层113与第二阻水层124通过填充胶125对应贴合。
其中,彩膜122可以为彩色滤光片(Color filter,CF)。
在一些实施例中,彩膜122包括红色像素单元1221、绿色像素单元1222、蓝色像素单元1223以及黑色矩阵1224,其中黑色矩阵1224分布于彩膜122的周缘以及各相邻的红色像素单元1221、绿色像素单元1222、蓝色像素单元1223之间。
在一些实施例中,第一阻水层113可以由氮化硅(SiNx)、氮氧化硅(SiON)、氧化硅(SiOx)等任一种材料或者多个材料制成。
在一些实施例中,第二阻水层124可以由氮化硅(SiNx)、氮氧化硅(SiON)、氧化硅(SiOx)、三氧化二铝(Al2O3)、二氧化硅(SiO2)等任一种材料或者多个材料制成。
其中,第一阻水层113与第二阻水层124可以为单层结构或是多层结构。当为多层结构时,可以由多层无机材料薄膜制成;或者可以由多层金属材料薄膜制成;或者由无机材料薄膜与金属材料薄膜交替设置而制成。
在一些实施例中,盖板封装结构12还包括阻挡层126和像素定义层127。
其中,阻挡层126设置在彩膜122上,像素定义层127设置在阻挡层126上,量子层123设置在像素定义层127上,第二阻水层124设置在量子层123上。
其中,第二阻水层124的周缘还依次涂布有吸湿层128和框胶129,且在吸湿层128的内侧涂布有填充胶125;第一阻水层113与第二阻水层124通过填充胶125对应贴合,且吸湿层128和框胶129延伸至第一阻水层113的周缘。
在一些实施例中,像素定义层127包括多个间隔设置的像素定义单元1271,在每一间隔设置的像素定义单元1271之间设有量子点1231,以形成量子层123。
在一些实施例中,第一阻水层113包覆蓝光有机发光二极管器件112,第二阻水层124和阻挡层126包覆量子层123,且第一阻水层113、第二阻水层124和阻挡层126位于吸湿层128的内侧。
本申请实施例提供的显示面板10,包括薄膜晶体管基板封装结构11与盖板封装结构12;薄膜晶体管基板封装结构11包括依次设置的薄膜晶体管基板(Thin Film Transistor,TFT)111、蓝光有机发光二极管器件112以及第一阻水层113;盖板封装结构12包括依次设置的盖板121、彩膜122、量子层123以及第二阻水层124,其中,第一阻水层113与第二阻水层124通过填充胶125对应贴合。本申请实施例通过将BOLED封装于TFT基板封装结构内,且QD封装于盖板封装结构内,最后将TFT基板封装结构与盖板封装结构真空贴合,可以有效提升显示面板的封装效果,且能同时满足大尺寸显示面板对量子点和有机发光二极管的封装要求。
为了进一步描述本申请,下面从显示面板的制作方法的方向进行描述。
请参阅图3至图6,图3至图6为本申请实施例提供的显示面板的制作方法的第一至第四流程示意图。该显示面板的制作方法包括:
步骤101,提供一薄膜晶体管基板111。
步骤102,在薄膜晶体管基板111上制作蓝光有机发光二极管器件112以及第一阻水层113,以得到薄膜晶体管基板封装结构11。
在一些实施例中,如图4所示,步骤102可通过步骤1021至1022来实现,具体为:
步骤1021,在薄膜晶体管基板111上制作蓝光有机发光二极管器件112。
在一些实施例中,在薄膜晶体管基板111上制作蓝光有机发光二极管器件112,包括:
通过蒸镀或喷墨打印的方式在薄膜晶体管基板111上制作蓝光有机发光二极管器件112。
步骤1022,在蓝光有机发光二极管器件112上形成第一阻水层113,以得到薄膜晶体管基板封装结构。
在一些实施例中,在蓝光有机发光二极管器件112上形成第一阻水层113,包括:
通过等离子体增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition,PECVD)的方式在蓝光有机发光二极管器件112上形成第一阻水层113。
在一些实施例中,还可以通过原子层沉积(Atomic Layer Deposition,ALD)的方式在蓝光有机发光二极管器件112上形成第一阻水层113。
步骤103,提供一盖板121。
步骤104,在盖板121上形成彩膜122、量子层123以及第二阻水层124,以得到盖板封装结构12。
在一些实施例中,如图5所示,步骤104可通过步骤1041至1045来实现,具体为:
步骤1041,在盖板121上形成彩膜122。
在一些实施例中,在盖板121上形成彩膜122,包括:
在盖板121上形成具有红色像素单元1221、绿色像素单元1222、蓝色像素单元1223以及黑色矩阵1224的彩膜122,其中黑色矩阵1224分布于彩膜122的周缘以及各相邻的红色像素单元1221、绿色像素单元1222、蓝色像素单元1223之间。
步骤1042,在彩膜122上形成阻挡层126,以及在阻挡层126上形成像素定义层127。
在一些实施例中,在彩膜122上形成阻挡层126,包括:
通过等离子体增强化学气相沉积的方式在彩膜122上沉积阻挡层126。
步骤1043,在像素定义层127上形成量子层123。
在一些实施例中,像素定义层127包括多个间隔设置的像素定义单元1271,在像素定义层127上形成量子层123,包括:
在每一间隔设置的像素定义单元1271之间设置量子点1231,以形成所述量子层123。
在一些实施例中,在每一间隔设置的像素定义单元1271之间设置量子点1231,包括:
通过喷墨打印的方式在每一间隔设置的像素定义单元1271之间设置量子点1231。
步骤1044,在量子层123上形成第二阻水层124。
在一些实施例中,在量子层123上形成第二阻水层124,包括:
通过等离子体增强化学气相沉积或者原子层沉积的方式在量子层123上形成第二阻水层124。
步骤1045,在第二阻水层124的周缘依次涂布吸湿层128和框胶129,并在吸湿层128的内侧涂布填充胶125,以得到盖板封装结构12。
例如,可以通过点胶机在第二阻水层124的周缘依次涂布吸湿层128和框胶129,并在吸湿层128的内侧涂布填充胶125。
步骤105,将薄膜晶体管基板封装结构11与盖板封装结构12进行真空贴合,其中,第一阻水层113与第二阻水层124通过填充胶125对应贴合。
在一些实施例中,如图6所示,步骤105可通过步骤1051至1052来实现,具体为:
步骤1051,通过吸湿层128、框胶120以及填充胶125将薄膜晶体管基板封装结构11与盖板封装结构12真空贴合,其中,第一阻水层113与第二阻水层124通过填充胶125对应贴合,且吸湿层128和框胶129延伸至第一阻水层113的周缘。
步骤1052,通过紫外固化或者加热的方式对吸湿层128、框胶129及填充胶125进行固化。
为了进一步描述本申请,请参阅图7至图9,图7为本申请实施例提供的显示面板的制作方法的第五流程示意图,图8和图9为本申请实施例提供的显示面板的制备工艺流程示意图。该显示面板的制作方法包括:
步骤201,提供一薄膜晶体管基板111。
步骤202,通过蒸镀或喷墨打印的方式在薄膜晶体管基板111上制作蓝光有机发光二极管器件112。
步骤203,通过等离子体增强化学气相沉积的方式在蓝光有机发光二极管器件112上形成第一阻水层113。
步骤204,提供一盖板121。
步骤205,在盖板121上形成具有红色像素单元1221、绿色像素单元1222、蓝色像素单元1223以及黑色矩阵1224的彩膜122。
其中,黑色矩阵1224分布于彩膜122的周缘以及各相邻的红色像素单元1221、绿色像素单元1222、蓝色像素单元1223之间。
步骤206,通过等离子体增强化学气相沉积的方式在彩膜122上沉积阻挡层126,以及在阻挡层126上形成像素定义层127。
步骤207,通过喷墨打印的方式在像素定义层127上形成量子层123。
在一些实施例中,像素定义层127包括多个间隔设置的像素定义单元1271。可以通过喷墨打印的方式在每一间隔设置的像素定义单元1271之间设置量子点1231,以形成所述量子层123。
步骤208,在量子层123上形成第二阻水层124。
在一些实施例中,可以通过等离子体增强化学气相沉积或者原子层沉积的方式在量子层123上形成第二阻水层124。
步骤209,在第二阻水层124的周缘依次涂布吸湿层128和框胶129,并在吸湿层128的内侧涂布填充胶125,以得到盖板封装结构12。
步骤210,将薄膜晶体管基板封装结构11与盖板封装结构12进行真空贴合。其中,第一阻水层113与第二阻水层124通过填充胶125对应贴合。
在一些实施例中,可以通过吸湿层128、框胶120以及填充胶125将薄膜晶体管基板封装结构11与盖板封装结构12真空贴合,其中,第一阻水层113与第二阻水层124通过填充胶125对应贴合,且吸湿层128和框胶129延伸至第一阻水层113的周缘。
步骤211,通过紫外固化或者加热的方式对吸湿层128、框胶129及填充胶125进行固化。
本申请实施例提供的一种显示面板的制作方法,通过提供一薄膜晶体管基板;在薄膜晶体管基板上制作蓝光有机发光二极管器件以及第一阻水层,以得到薄膜晶体管基板封装结构;提供一盖板;在盖板上形成彩膜、量子层以及第二阻水层,以得到盖板封装结构;将薄膜晶体管基板封装结构与盖板封装结构进行真空贴合,其中,第一阻水层与第二阻水层通过填充胶对应贴合。本申请实施例通过在TFT基板上制作BOLED并进行封装,然后在盖板上制作QD并进行封装,最后将TFT基板封装结构与盖板封装结构真空贴合,可以有效提升显示面板的封装效果,且能同时满足大尺寸显示面板对量子点和有机发光二极管的封装要求。
以上对本申请实施例提供的显示面板的制作方法、显示面板及电子设备进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请。同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。
Claims (20)
- 一种显示面板的制作方法,其包括:提供一薄膜晶体管基板;在所述薄膜晶体管基板上制作蓝光有机发光二极管器件以及第一阻水层,以得到薄膜晶体管基板封装结构;提供一盖板;在所述盖板上形成彩膜、量子层以及第二阻水层,以得到盖板封装结构;将所述薄膜晶体管基板封装结构与盖板封装结构进行真空贴合,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
- 如权利要求1所述的显示面板的制作方法,其中所述在所述薄膜晶体管基板上制作蓝光有机发光二极管器件以及第一阻水层,以得到薄膜晶体管基板封装结构,包括:在所述薄膜晶体管基板上制作蓝光有机发光二极管器件;在所述蓝光有机发光二极管器件上形成第一阻水层,以得到薄膜晶体管基板封装结构。
- 如权利要求2所述的显示面板的制作方法,其中所述在所述薄膜晶体管基板上制作蓝光有机发光二极管器件,包括:通过蒸镀或喷墨打印的方式在所述薄膜晶体管基板上制作所述蓝光有机发光二极管器件。
- 如权利要求2所述的显示面板的制作方法,其中所述在所述蓝光有机发光二极管器件上形成第一阻水层,包括:通过等离子体增强化学气相沉积的方式在所述蓝光有机发光二极管器件上形成所述第一阻水层。
- 如权利要求1所述的显示面板的制作方法,其中所述在所述盖板上形成彩膜、量子层以及第二阻水层,以得到盖板封装结构,包括在所述盖板上形成彩膜;在所述彩膜上形成阻挡层,以及在所述阻挡层上形成像素定义层;在所述像素定义层上形成量子层;在所述量子层上形成第二阻水层;在所述第二阻水层的周缘依次涂布吸湿层和框胶,并在所述吸湿层的内侧涂布所述填充胶,以得到盖板封装结构。
- 如权利要求5所述的显示面板的制作方法,其中所述在所述盖板上形成彩膜,包括:在所述盖板上形成具有红色像素单元、绿色像素单元、蓝色像素单元以及黑色矩阵的彩膜,其中所述黑色矩阵分布于所述彩膜的周缘以及各相邻的红色像素单元、绿色像素单元、蓝色像素单元之间。
- 如权利要求5所述的显示面板的制作方法,其中所述在所述彩膜上形成阻挡层,包括:通过等离子体增强化学气相沉积的方式在所述彩膜上沉积所述阻挡层。
- 如权利要求5所述的显示面板的制作方法,其中所述像素定义层包括多个间隔设置的像素定义单元,所述在所述像素定义层上形成量子层,包括:在每一所述间隔设置的像素定义单元之间设置量子点,以形成所述量子层。
- 如权利要求8所述的显示面板的制作方法,其中所述在每一所述间隔设置的像素定义单元之间设置量子点,包括:通过喷墨打印的方式在每一所述间隔设置的像素定义单元之间设置量子点。
- 如权利要求5所述的显示面板的制作方法,其中所述在所述量子层上形成第二阻水层,包括:通过等离子体增强化学气相沉积或者原子层沉积的方式在所述量子层上形成所述第二阻水层。
- 如权利要求5所述的显示面板的制作方法,其中所述将所述薄膜晶体管基板封装结构与盖板封装结构真空贴合,包括:通过所述吸湿层、框胶以及填充胶将所述薄膜晶体管基板封装结构与盖板封装结构真空贴合,其中,所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘;通过紫外固化或者加热的方式对所述吸湿层、框胶及填充胶进行固化。
- 一种显示面板,其包括:薄膜晶体管基板封装结构与盖板封装结构;其中,所述薄膜晶体管基板封装结构包括依次设置的薄膜晶体管基板、蓝光有机发光二极管器件以及第一阻水层;所述盖板封装结构包括依次设置的盖板、彩膜、量子层以及第二阻水层,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
- 如权利要求12所述的显示面板,其中所述盖板封装结构还包括阻挡层和像素定义层;其中,所述阻挡层设置在所述彩膜上,所述像素定义层设置在所述阻挡层上,所述量子层设置在所述像素定义层上,所述第二阻水层设置在所述量子层上;所述第二阻水层的周缘还依次涂布有吸湿层和框胶,且在所述吸湿层的内侧涂布有填充胶;所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘。
- 如权利要求13所述的显示面板,其中所述像素定义层包括多个间隔设置的像素定义单元,在每一所述间隔设置的像素定义单元之间设有量子点,以形成所述量子层。
- 如权利要求13所述的显示面板,其中所述第一阻水层包覆所述蓝光有机发光二极管器件,所述第二阻水层和阻挡层包覆所述量子层,且所述第一阻水层、第二阻水层和阻挡层位于所述吸湿层的内侧。
- 如权利要求12所述的显示面板,其中所述第一阻水层由氮化硅、氮氧化硅和氧化硅中的任一种材料或者多个材料制成。
- 如权利要求12所述的显示面板,其中所述第二阻水层由氮化硅、氮氧化硅、氧化硅、三氧化二铝和二氧化硅中的任一种材料或者多个材料制成。
- 一种电子设备,其包括壳体和显示面板,所述显示面板安装在所述壳体上,所述显示面板包括:薄膜晶体管基板封装结构与盖板封装结构;其中,所述薄膜晶体管基板封装结构包括依次设置的薄膜晶体管基板、蓝光有机发光二极管器件以及第一阻水层;所述盖板封装结构包括依次设置的盖板、彩膜、量子层以及第二阻水层,其中,所述第一阻水层与第二阻水层通过填充胶对应贴合。
- 如权利要求18所述的电子设备,其中所述盖板封装结构还包括阻挡层和像素定义层;其中,所述阻挡层设置在所述彩膜上,所述像素定义层设置在所述阻挡层上,所述量子层设置在所述像素定义层上,所述第二阻水层设置在所述量子层上;所述第二阻水层的周缘还依次涂布有吸湿层和框胶,且在所述吸湿层的内侧涂布有填充胶;所述第一阻水层与第二阻水层通过所述填充胶对应贴合,且所述吸湿层和框胶延伸至所述第一阻水层的周缘。
- 如权利要求19所述的电子设备,其中所述像素定义层包括多个间隔设置的像素定义单元,在每一所述间隔设置的像素定义单元之间设有量子点,以形成所述量子层。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910176611.4A CN109950425A (zh) | 2019-03-08 | 2019-03-08 | 显示面板的制作方法、显示面板及电子设备 |
| CN201910176611.4 | 2019-03-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2020181591A1 true WO2020181591A1 (zh) | 2020-09-17 |
Family
ID=67009360
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2019/080205 Ceased WO2020181591A1 (zh) | 2019-03-08 | 2019-03-28 | 显示面板的制作方法、显示面板及电子设备 |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109950425A (zh) |
| WO (1) | WO2020181591A1 (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12408497B2 (en) | 2021-12-27 | 2025-09-02 | Industrial Technology Research Institute | Light color conversion layer structure, method of manufacturing the same and light-emitting device containing the same |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110854291A (zh) * | 2019-10-30 | 2020-02-28 | 深圳市华星光电半导体显示技术有限公司 | 一种显示面板及其制备方法 |
| CN111403462B (zh) * | 2020-03-27 | 2023-08-29 | 京东方科技集团股份有限公司 | 显示基板及其制作方法、显示面板和显示装置 |
| CN112820761B (zh) * | 2020-12-31 | 2022-10-21 | 长沙惠科光电有限公司 | Oled显示器 |
| CN113193132A (zh) * | 2021-04-26 | 2021-07-30 | 睿馨(珠海)投资发展有限公司 | 一种量子点oled发光器件、显示装置及其制备方法 |
| CN113689784A (zh) * | 2021-09-01 | 2021-11-23 | 广东瑞捷光电股份有限公司 | 一种高亮量子点扩散板结构及其制成工艺 |
| CN115050796B (zh) * | 2022-06-15 | 2025-11-25 | 武汉华星光电半导体显示技术有限公司 | 显示面板 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104377226A (zh) * | 2013-08-14 | 2015-02-25 | 业鑫科技顾问股份有限公司 | 显示面板 |
| CN105304684A (zh) * | 2015-11-18 | 2016-02-03 | 深圳市华星光电技术有限公司 | 彩色显示装置及其制作方法 |
| CN106298691A (zh) * | 2015-05-29 | 2017-01-04 | 鸿富锦精密工业(深圳)有限公司 | 有机发光显示装置及其制造方法 |
| CN107591431A (zh) * | 2017-09-15 | 2018-01-16 | 深圳市华星光电半导体显示技术有限公司 | 一种彩膜基板及显示设备 |
| CN108983490A (zh) * | 2018-07-04 | 2018-12-11 | 惠州市华星光电技术有限公司 | 量子点膜片、背光模组及显示装置 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105097878B (zh) * | 2015-07-17 | 2018-02-13 | 京东方科技集团股份有限公司 | 有机电致发光显示面板及制备方法、显示装置 |
| CN105278153B (zh) * | 2015-11-13 | 2018-03-06 | 深圳市华星光电技术有限公司 | 量子点彩膜基板的制备方法及量子点彩膜基板 |
| KR102770337B1 (ko) * | 2016-10-11 | 2025-02-21 | 삼성디스플레이 주식회사 | 고휘도 디스플레이 표시 장치 |
-
2019
- 2019-03-08 CN CN201910176611.4A patent/CN109950425A/zh active Pending
- 2019-03-28 WO PCT/CN2019/080205 patent/WO2020181591A1/zh not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104377226A (zh) * | 2013-08-14 | 2015-02-25 | 业鑫科技顾问股份有限公司 | 显示面板 |
| CN106298691A (zh) * | 2015-05-29 | 2017-01-04 | 鸿富锦精密工业(深圳)有限公司 | 有机发光显示装置及其制造方法 |
| CN105304684A (zh) * | 2015-11-18 | 2016-02-03 | 深圳市华星光电技术有限公司 | 彩色显示装置及其制作方法 |
| CN107591431A (zh) * | 2017-09-15 | 2018-01-16 | 深圳市华星光电半导体显示技术有限公司 | 一种彩膜基板及显示设备 |
| CN108983490A (zh) * | 2018-07-04 | 2018-12-11 | 惠州市华星光电技术有限公司 | 量子点膜片、背光模组及显示装置 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12408497B2 (en) | 2021-12-27 | 2025-09-02 | Industrial Technology Research Institute | Light color conversion layer structure, method of manufacturing the same and light-emitting device containing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109950425A (zh) | 2019-06-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2020181591A1 (zh) | 显示面板的制作方法、显示面板及电子设备 | |
| WO2020181569A1 (zh) | 显示面板的制作方法、显示面板及电子设备 | |
| CN108682751B (zh) | Oled显示面板及其制作方法、oled显示装置 | |
| US9909725B2 (en) | Flexible light-emitting device | |
| TWI755000B (zh) | 發光裝置、模組、電子裝置和製造發光裝置的方法 | |
| JP6896635B2 (ja) | フレキシブル表示パネル、フレキシブル表示パネルを有するフレキシブル表示装置、並びにその製造方法 | |
| CN107565066A (zh) | Oled面板的制作方法及oled面板 | |
| WO2019223456A1 (zh) | 显示面板及其制备方法、显示装置 | |
| CN111900260A (zh) | 一种显示面板及其制备方法、显示装置 | |
| WO2020181587A1 (zh) | 显示面板的制作方法、显示面板及电子设备 | |
| CN104517994B (zh) | 有机发光二极管显示装置及其制造方法 | |
| CN104112764A (zh) | 一种amoled显示面板及其制备方法和显示装置 | |
| WO2020098135A1 (zh) | 显示模组及其制作方法、电子装置 | |
| CN107403883A (zh) | Oled显示面板的封装方法 | |
| CN106025095A (zh) | 一种柔性oled器件的封装结构及显示装置 | |
| US20210367193A1 (en) | Flexible light-emitting panel, method of manufacturing flexible light-emitting panel, and display device | |
| CN108470854A (zh) | Woled显示面板及其制作方法 | |
| CN115498124A (zh) | 显示面板和显示装置 | |
| CN109524563A (zh) | 基板及其制备方法、显示面板 | |
| KR20170050848A (ko) | 유기발광 표시장치 | |
| US20220190284A1 (en) | Display panel and manufacturing method thereof | |
| WO2024027117A1 (zh) | 显示面板、显示装置及显示面板的制备方法 | |
| WO2020199272A1 (zh) | 量子点柔性oled显示装置及制备方法 | |
| WO2020056862A1 (zh) | Oled封装结构的保护膜、oled封装结构及其保护膜的制备方法 | |
| WO2020237958A1 (zh) | 发光面板及显示装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19918965 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 19918965 Country of ref document: EP Kind code of ref document: A1 |