WO2020164317A1 - 阵列基板及其制备方法、显示面板和显示装置 - Google Patents

阵列基板及其制备方法、显示面板和显示装置 Download PDF

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WO2020164317A1
WO2020164317A1 PCT/CN2019/128735 CN2019128735W WO2020164317A1 WO 2020164317 A1 WO2020164317 A1 WO 2020164317A1 CN 2019128735 W CN2019128735 W CN 2019128735W WO 2020164317 A1 WO2020164317 A1 WO 2020164317A1
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pixel defining
defining layer
pixel
layer
array substrate
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PCT/CN2019/128735
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English (en)
French (fr)
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崔颖
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京东方科技集团股份有限公司
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Priority to US16/957,369 priority Critical patent/US11315992B2/en
Publication of WO2020164317A1 publication Critical patent/WO2020164317A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing

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  • the present disclosure relates to the field of display technology, in particular to an array substrate and a preparation method thereof, a display panel and a display device.
  • PLED Inkjet printing polymer electroluminescence display
  • the solvent vapor evaporates faster at the edge of the droplet, which will cause the droplet to flow from the center to the edge of the solution. This flow will drive the solute to migrate to the edge of the droplet, and finally at the edge.
  • the formation of a thicker edge and a thinner edge is called the “coffee ring effect", which makes the film formation in the pixel very uneven, which will cause uneven light emission of the device.
  • an array substrate including: a base substrate; a planarization layer formed on the base substrate; a plurality of pixel electrodes formed on the planarization layer; and a pixel defining layer, including a first A pixel defining layer and a second pixel defining layer, the first pixel defining layer covers the outer periphery of the pixel electrode and exposing the central area of the pixel electrode, and the second pixel defining layer is formed between adjacent pixel electrodes
  • the planarization layer has a plurality of openings defining each sub-pixel unit; the bottom of the bank of the second pixel defining layer is spaced a predetermined distance from the bottom of the bank of the adjacent first pixel defining layer, and The thickness of the second pixel defining layer is greater than the thickness of the first pixel defining layer.
  • the thickness of the first pixel defining layer is 100-500 nanometers, and the thickness of the second pixel defining layer is 1-3 microns.
  • the width of the first pixel defining layer covering the outer periphery of the pixel electrode is 1-10 microns.
  • the first pixel defining layer includes one or more of silicon nitride and silicon oxide.
  • the second pixel defining layer includes a photoresist material.
  • Another aspect of the present disclosure provides a display panel including any of the above-mentioned array substrates.
  • the plurality of openings of the second pixel defining layer are formed with organic light emitting layers of each sub-pixel unit, and the thickness of the organic light emitting layer is greater than the thickness of the first pixel defining layer.
  • Another aspect of the present disclosure also provides a display device including any of the above-mentioned display panels.
  • the present disclosure provides a method for preparing an array substrate, including: forming a planarization layer on a base substrate; forming a plurality of pixel electrodes corresponding to each sub-pixel unit on the planarization layer; A pixel defining layer to cover the outer circumference of the pixel electrode, the first pixel defining layer exposing the central area of the pixel electrode; and forming a second pixel defining layer on the planarization layer between adjacent pixel electrodes
  • the second pixel defining layer has a plurality of openings defining each sub-pixel unit; wherein the bottom of the bank of the second pixel defining layer is spaced apart from the bottom of the bank of the adjacent first pixel defining layer. And the thickness of the second pixel defining layer is greater than the thickness of the first pixel defining layer.
  • forming the first pixel defining layer includes: forming an insulating dielectric layer covering the planarization layer and the pixel electrode; and etching the insulating dielectric layer to form the first pixel defining layer Floor.
  • the insulating dielectric layer includes one or more of silicon nitride and silicon oxide.
  • forming the second pixel defining layer includes: forming a photoresist material layer covering the planarization layer, the first pixel defining layer, and the pixel electrode; and patterning the light The resist material layer forms the second pixel defining layer.
  • FIG. 1 is a schematic diagram of an array substrate according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present disclosure.
  • 3A to 3E are schematic diagrams of the manufacturing process of the array substrate according to an embodiment of the present disclosure.
  • 4A to 4C are schematic diagrams of the principle of forming an organic light-emitting layer according to the present disclosure.
  • Inkjet printing technology is to spray hole injection materials, hole injection materials, and solutions of red, green, and blue luminescent materials on a pre-patterned ITO substrate through a micron-level print nozzle. In the pit, a light-emitting pixel unit of three primary colors of red, green and blue is formed. The thickness of the film is determined by the amount of solute printed in the pixel. Because this method can greatly save expensive luminescent materials, and printing with multiple nozzles (128 or 256 nozzles) can greatly shorten the film production time. Therefore, inkjet printing color patterning technology is used in PLED The manufacturing field has been recognized as the mainstream technology for industrialization.
  • Fig. 1 shows a schematic diagram of an array substrate according to an embodiment of the present disclosure. As shown in FIG. 1, it includes a base substrate 10, a planarization layer 20, a plurality of pixel electrodes 30, and a pixel defining layer.
  • the pixel defining layer includes a first pixel defining layer 41 and a second pixel defining layer 51.
  • the first pixel defining layer 41 covers the periphery of the pixel electrode 30 and exposing the central area of the pixel electrode 30.
  • the second pixel defining layer 51 is formed on the adjacent pixel electrode 30
  • the planarization layer 20 in between has multiple openings defining each sub-pixel unit.
  • the bottom of the bank of the second pixel defining layer 51 is spaced apart from the bottom of the bank of the adjacent first pixel defining layer 41 by a predetermined distance.
  • the thickness of the second pixel defining layer 51 is greater than the thickness of the first pixel defining layer 41.
  • the thickness of the first pixel defining layer 41 is 100-500 nanometers, and the thickness of the second pixel defining layer 51 is 1-3 micrometers.
  • the thickness of the first pixel defining layer 41 is 300 nanometers, and the thickness of the second pixel defining layer 51 is 1.5 micrometers.
  • the first pixel defining layer 41 covers the outer periphery of the pixel electrode 30 to prevent device leakage. Therefore, the width of the first pixel defining layer 41 covering the outer periphery of the pixel electrode 30 is too narrow to prevent leakage of the device; if it is too wide, the area covering the pixel electrode 30 is too large and affects the light-emitting area, thereby reducing the light-emitting efficiency. Therefore, the width of the first pixel defining layer 41 covering the outer periphery of the pixel electrode 30 can be 1-10 microns, for example, 3 microns.
  • the first pixel defining layer 41 may be formed of an inorganic insulating material, such as one or more of silicon nitride and silicon oxide.
  • the second pixel defining layer 51 may be formed of an organic insulating material, such as but not limited to a photoresist material.
  • the bottom of the bank of the second pixel defining layer 51 is spaced apart from the bottom of the bank of the first pixel defining layer 41 by a predetermined distance, so that the bank of the second pixel defining layer 51 in the opening defined by the second pixel defining layer 51 and its adjacent first There is no pixel electrode 30 in the area between the banks of the pixel defining layer 41. Refer to FIG. 1 for the specific structure.
  • FIG. 2 shows a display panel including the array substrate shown in FIG. 1, in which the thickness of the organic light emitting layer 62 is greater than the thickness of the first pixel defining layer 41. That is, the organic light emitting layer 62 covers the first pixel defining layer 41 in the display panel.
  • 3A to 3E show a method of manufacturing an array substrate according to an embodiment of the present disclosure.
  • a planarization layer 20 is formed on the base substrate 10 first.
  • a plurality of pixel electrodes 30 corresponding to each sub-pixel unit are formed on the planarization layer 20.
  • an insulating dielectric layer 40 covering the planarization layer 20 and the pixel electrode 30 is formed.
  • the insulating dielectric layer 40 may be formed of one or more of silicon nitride and silicon oxide.
  • the insulating dielectric layer 40 may be formed in any form, for example, the insulating dielectric layer 40 may be formed by vapor deposition or the like.
  • the insulating dielectric layer 40 is etched by a dry etching or wet etching process to form a first pixel defining layer 41.
  • the first pixel defining layer 41 covers the outer periphery of the pixel electrode 30 to avoid device leakage.
  • a photoresist material layer 50 covering the planarization layer 20, the first pixel defining layer 41 and the pixel electrode 30 is formed.
  • the photoresist material layer 50 is patterned, such as exposure and development, to form the second pixel defining layer 51.
  • the second pixel defining layer 51 is formed on the planarization layer 20 spaced apart from adjacent pixel electrodes 30.
  • the bottom of the bank of the second pixel defining layer 51 is spaced apart from the bottom of the bank of the first pixel defining layer 41 by a predetermined distance.
  • FIG. 3E shows the structure of the array substrate after the second pixel defining layer 51 is formed.
  • the array substrate of the present disclosure has two pixel defining layers, and adjacent banks of the two pixel defining layers are separated by a predetermined distance, thereby avoiding edge climbing defects generated during the ink drying process in the opening.
  • the specific principle is shown in Figure 4A to Figure 4C.
  • the edge solvent evaporates faster, which will cause the droplets to flow from the center to the edge of the solution. This flow will drive the solute to migrate to the edge. This is the reason why the conventional pixel boundary layer causes the edge to climb.
  • the liquid level of the incompletely dried ink 61 in the opening is similar to the second pixel defining layer 51, and the incompletely dried ink 61 changes from a solution to a sol-like shape, and the viscosity increases.
  • the height of the incompletely dried ink 61 is close to that of the second pixel defining layer 51, since the drying solvent volatilizes very quickly under high vacuum, the volatilization volume of the solvent is basically the same at all positions. Since the adjacent banks of the two pixel defining layers are separated by a predetermined distance, and there is no pixel electrode 30 at the bottom of this area, the incompletely dried ink in this area contains more solvent than the ink in other areas.
  • the viscosity of the ink is lower than that in other areas, so the Marangoni reflow effect will occur in this area, so that the solute flows back from the edge to the middle, which alleviates the phenomenon of edge climbing and improves the uniformity of film formation.
  • This situation is maintained for a predetermined time, the viscosity of the ink in the opening continues to increase, and finally the residual solvent is basically removed, the ink no longer flows, and a flat organic light-emitting layer 62 is formed at the bottom of the opening of the pixel defining layer.
  • the specific structure is shown in FIG. 4C.
  • the "predetermined distance" between the bottom of the bank of the second pixel defining layer 51 and the bottom of the first pixel defining layer 41 is to prevent the incompletely dried ink 61 from forming the organic light emitting layer 62.
  • the Marangoni backflow effect is formed inside, thereby alleviating the edge climbing phenomenon. Therefore, those skilled in the art can reasonably set the "predetermined distance” according to the type and viscosity of the ink; the drying pressure and temperature; the size of the array substrate to achieve the above-mentioned purpose.
  • the organic light emitting layer 62 is formed adjacent to the edge of the bank of the second pixel defining layer 51 there is no corresponding pixel electrode 30, so the edge portion of the organic light emitting layer 62 adjacent to the second pixel defining layer 51 does not emit light, which can effectively suppress the light emission of the organic layer at the edge of the pixel defining layer, thereby further improving the uniformity of light emission within the pixel.
  • adjacent banks in the two pixel defining layers are separated by a predetermined distance, so that the ink climbing at the edge can be relieved and the uniformity of film formation can be improved. Furthermore, in the display panel including the above-mentioned array substrate, since the first pixel defining layer and the second pixel defining layer are separated by a predetermined distance, the organic light-emitting layer formed adjacent to the edge of the second pixel defining layer does not have a corresponding pixel electrode. The edge position of the layer does not emit light, which can effectively suppress the light emission of the organic layer at the edge of the pixel defining layer, thereby further improving the uniformity of light emission within the pixel.
  • an embodiment of the present disclosure further provides a display device, which may include the above-mentioned display panel, and the display device may be: a liquid crystal panel, an electronic paper, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigation Any product or component with display function such as instrument.

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  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

本公开提供一种阵列基板，包括：衬底基板；形成于所述衬底基板的平坦化层；形成在所述平坦化层上的多个像素电极；及像素界定层，包括第一像素界定层和第二像素界定层，所述第一像素界定层覆盖所述像素电极外周并露出所述像素电极中央区域，所述第二像素界定层形成于相邻所述像素电极之间的所述平坦化层上、并具有限定各个子像素单元的多个开口；所述第二像素界定层堤部的底部与其相邻的所述第一像素界定层堤部的底部间隔预定距离，且所述第二像素界定层的厚度大于所述第一像素界定层的厚度。还提供该阵列基板的制备方法及包含该阵列基板的显示装置。

Description

阵列基板及其制备方法、显示面板和显示装置
相关申请的交叉引用
本申请主张在2019年2月15日在中国提交的中国专利申请号No.201910117700.1的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，具体涉及阵列基板及其制备方法、显示面板和显示装置。
背景技术
喷墨打印聚合物电致发光显示(PLED)技术具有操作简单、成本低廉、及工艺简单、易于实现大尺寸等优点，随着高性能聚合物材料的不断研发和薄膜制备技术的进一步完善，PLED技术有望快速实现产业化。
在喷墨打印干燥成膜过程中，溶剂蒸汽在液滴边缘区域挥发较快，这样会造成液滴由中心向边缘的溶液流动，这种流动会带动溶质向液滴边缘迁移，并最终在边缘沉积，而形成边缘厚中心薄的沉积形貌，称为“咖啡环效应”，从而使得像素内成膜很不均匀，这样会导致器件发光不均。
发明内容
本公开一方面提供一种阵列基板，包括：衬底基板；形成于所述衬底基板的平坦化层；形成在所述平坦化层上的多个像素电极；及像素界定层，包括第一像素界定层和第二像素界定层，所述第一像素界定层覆盖所述像素电极外周并露出所述像素电极中央区域，所述第二像素界定层形成于相邻所述像素电极之间的所述平坦化层上、并具有限定各个子像素单元的多个开口；所述第二像素界定层堤部的底部与其相邻的所述第一像素界定层堤部的底部间隔预定距离，且所述第二像素界定层的厚度大于所述第一像素界定层的厚度。
根据本公开的一实施方式，所述第一像素界定层的厚度为100-500纳米， 所述第二像素界定层的厚度为1-3微米。
根据本公开的另一实施方式，所述第一像素界定层覆盖所述像素电极外周的宽度为1-10微米。
根据本公开的另一实施方式，所述第一像素界定层包括氮化硅、氧化硅中的一种或多种。
根据本公开的另一实施方式，所述第二像素界定层包括光阻材料。
本公开另一方面提供一种显示面板，包括上述任一阵列基板。
根据本公开的一实施方式，所述第二像素界定层的多个开口形成有各个子像素单元的有机发光层，所述有机发光层的厚度大于所述第一像素界定层的厚度。
本公开另一方面还提供一种显示装置，包括上述任一显示面板。
本公开另一方面又提供一种阵列基板的制备方法，包括：在衬底基板上形成平坦化层；在所述平坦化层上形成对应于各个子像素单元的多个像素电极；在形成第一像素界定层以覆盖所述像素电极外周，所述第一像素界定层露出所述像素电极的中央区域；及在相邻所述像素电极之间的所述平坦化层上形成第二像素界定层，所述第二像素界定层具有限定各个子像素单元的多个开口；其中，所述第二像素界定层堤部的底部与其相邻的所述第一像素界定层堤部的底部间隔预定距离，且所述第二像素界定层的厚度大于所述第一像素界定层的厚度。
根据本公开的一实施方式，形成所述第一像素界定层包括：形成覆盖所述平坦化层和所述像素电极的绝缘介质层；及刻蚀所述绝缘介质层形成所述第一像素界定层。
根据本公开的另一实施方式，所述绝缘介质层包括氮化硅、氧化硅中的一种或多种。
根据本公开的另一实施方式，形成所述第二像素界定层包括：形成覆盖所述平坦化层、所述第一像素界定层和所述像素电极的光阻材料层；图案化所述光阻材料层形成所述第二像素界定层。
附图说明
通过参照附图详细描述其示例实施方式，本公开的上述和其它特征及优点将变得更加明显。
图1是本公开一实施例的阵列基板的示意图。
图2是本公开一实施例的显示面板的示意图。
图3A至图3E是本公开一实施例的阵列基板的制备过程示意图。
图4A至图4C是本公开的形成有机发光层的原理示意图。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以多种形式实施，且不应被理解为限于在此阐述的实施方式；相反，提供这些实施方式使得本公开将全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。在图中，为了清晰，夸大了区域和层的厚度。在图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。
需要说明的是，本公开中上、下等用语，仅为互为相对概念或是以产品的正常使用状态为参考的，而不应该认为是具有限制性的。
喷墨打印技术是通过微米级的打印喷头将空穴注入材料，空穴注入材料，以及红、绿、蓝三色发光材料的溶液分别喷涂在预先已经图案化了的ITO衬底上的子像素坑中，形成红绿蓝三基色发光像素单元。膜层的厚度由打印在像素内的溶质数量决定。由于这种方法能极大地节省昂贵的发光材料，而且通过使用有多个喷射口的喷头打印(128或256个喷射口)可以大幅缩短制膜时间，因此，喷墨打印彩色图案化技术在PLED制造领域已被确认为向产业化发展的主流技术。
如图1示出了本公开一实施例的阵列基板的示意图。如图1所示，包括衬底基板10、平坦化层20、多个像素电极30和像素界定层。像素界定层包括第一像素界定层41和第二像素界定层51，第一像素界定层41覆盖像素电极30外周并露出像素电极30中央区域，第二像素界定层51形成于相邻像素电极30之间的平坦化层20上并具有限定各个子像素单元的多个开口。第二像素界定层51堤部的底部与其相邻的第一像素界定层41堤部的底部间隔预定距离。第二像素界定层51的厚度大于第一像素界定层41的厚度。
可选地，第一像素界定层41的厚度为100-500纳米，第二像素界定层51的厚度为1-3微米。可选地，第一像素界定层41的厚度是300纳米，第二像素界定层51的厚度是1.5微米。
第一像素界定层41覆盖像素电极30的外周，以防止器件漏电。因此，第一像素界定层41覆盖像素电极30外周的宽度太窄，则不能起到防止器件漏电的作用；太宽则覆盖像素电极30的面积太大而影响发光面积，进而降低发光效率。因此，第一像素界定层41覆盖所述像素电极30外周的宽度可选是1-10微米，例如，3微米。
第一像素界定层41可以由无机绝缘材料形成，例如氮化硅、氧化硅中的一种或多种。第二像素界定层51可以由有机绝缘材料形成，例如但不限于光阻材料等。
第二像素界定层51堤部的底部与第一像素界定层41堤部的底部间隔预定距离，使得第二像素界定层51限定的开口内第二像素界定层51堤部与其相邻的第一像素界定层41堤部之间的区域内没有像素电极30，具体结构参见图1。
图2示出包括图1所示阵列基板的显示面板，其中有机发光层62的厚度大于第一像素界定层41的厚度。即，在显示面板中有机发光层62覆盖了第一像素界定层41。
如图3A至图3E示出本公开一实施例的阵列基板的制备方法。如图3A所示，首先在衬底基板10上形成平坦化层20。之后，在平坦化层20上形成对应于各个子像素单元的多个像素电极30。
之后，如图3B所示，形成覆盖平坦化层20、像素电极30的绝缘介质层40。绝缘介质层40可以是氮化硅、氧化硅中的一种或多种形成。可以通过任何形式形成绝缘介质层40，例如可以是气相沉积等方式形成绝缘介质层40。
然后，如图3C所示，通过干刻或湿刻工艺刻蚀绝缘介质层40形成第一像素界定层41。第一像素界定层41覆盖在像素电极30的外周以避免器件漏电。
随后，如图3D所示，形成覆盖平坦化层20、第一像素界定层41和像素电极30的光阻材料层50。
之后，对光阻材料层50进行图案化处理，例如曝光、显影形成第二像素界定层51。第二像素界定层51形成在相邻像素电极30间隔的平坦化层20上。第二像素界定层51堤部的底部与第一像素界定层41堤部的底部间隔预定距离。图3E示出形成第二像素界定层51后的阵列基板结构。
本公开的阵列基板具有两层像素界定层，两层像素界定层的相邻堤部间隔预定距离，从而避免了开口内墨水干燥过程中产生的边缘攀爬缺陷。具体原理如图4A至图4C所示。首先，如图4A所示，刚打印完墨水60后，开口内的墨水60由于表面张力远高于第二像素界定层51，之后对上述结构进行干燥成膜。在干燥过程中边缘溶剂挥发较快，这样会造成液滴由中心向边缘的溶液流动，这种流动会带动溶质向边缘迁移，这就是常规像素界定层导致边缘攀爬的原因。随着干燥过程的进行，如图4B所示，开口内的未完全干燥的墨水61的液面与第二像素界定层51相近，未完全干燥的墨水61从溶液变成溶胶状，粘度提高。当未完全干燥的墨水61高度与第二像素界定层51相近时，由于高真空下干燥溶剂挥发非常快，使得各个位置溶剂挥发体积基本一致。由于两层像素界定层的相邻堤部间隔预定距离，该区域底部没有像素电极30，因此该区域的未完全干燥的墨水所含有的溶剂比其他区域墨水含有的溶剂多，所以在该区域的墨水的黏度比其他区域的墨水黏度小，从而在该区域会发生马兰格尼回流效应，使得溶质由边缘回流到中间，这样缓解了边缘攀爬的现象，从而提高成膜均匀性。这种情形维持预定时间，开口内墨水粘度不断增高，最终残余溶剂基本去除，墨水不再流动，在像素界定层开口底部形成较平坦有机发光层62，具体结构如图4C所示这。从上述表述可以看出，第二像素界定层51堤部的底部与第一像素界定层41底部的底部间隔“预定距离”是为了形成有机发光层62的过程中，在未完全干燥的墨水61内形成马兰格尼回流效应，进而缓解边缘攀爬现象。因此本领域技术人员可以根据墨水的种类、黏度；干燥的压力、温度；阵列基板的尺寸等参数合理设置“预定距离”以实现上述目的。
综上所述，本公开的阵列基板，两层像素界定层中相邻堤部间隔预定距离，从而可以缓解墨水的在堤部的攀爬，提高成膜的均匀性。更进一步，包含上述阵列基板的显示面板，由于第一像素界定层41和第二像素界定层51 之间间隔预定距离，从而形成的有机发光层62邻近第二像素界定层51堤部的边缘部没有对应像素电极30，因此有机发光层62邻近第二像素界定层51的边缘部分不发光，可以有效抑制像素界定层边缘有机层的发光，从而进一步提高像素内发光均匀性。
本公开的阵列基板，两层像素界定层中相邻堤部间隔预定距离，从而可以缓解墨水在边缘的攀爬，提高成膜的均匀性。更进一步，包含上述阵列基板的显示面板，由于第一像素界定层和第二像素界定层间隔预定距离，从而形成的有机发光层邻近第二像素界定层的边缘部没有对应像素电极，因此有机发光层边缘位置不发光，可以有效抑制像素界定层边缘有机层的发光，从而进一步提高像素内发光均匀性。
可选地，本公开实施例还提供一种显示装置，可以包括上述显示面板，该显示装置可以为：液晶面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
当然，本公开还可有其它多种实施例，在不背离本公开精神及其实质的情况下，熟悉本领域的技术人员当可根据本公开作出各种相应的改变和变形，但这些相应的改变和变形都应属于本公开所附的权利要求的保护范围。

Claims (12)

  1. 一种阵列基板，包括：
    衬底基板；
    形成于所述衬底基板的平坦化层；
    形成在所述平坦化层上的多个像素电极；及
    像素界定层，包括第一像素界定层和第二像素界定层，所述第一像素界定层覆盖所述像素电极外周并露出所述像素电极中央区域，所述第二像素界定层形成于相邻所述像素电极之间的所述平坦化层上、并具有限定各个子像素单元的多个开口；所述第二像素界定层堤部的底部与其相邻的所述第一像素界定层堤部的底部间隔预定距离，且所述第二像素界定层的厚度大于所述第一像素界定层的厚度。
  2. 根据权利要求1所述的阵列基板，其中，所述第一像素界定层的厚度为100纳米-500纳米，所述第二像素界定层的厚度为1微米-3微米。
  3. 根据权利要求1所述的阵列基板，其中，所述第一像素界定层覆盖所述像素电极外周的宽度为1微米-10微米。
  4. 根据权利要求1所述的阵列基板，其中，所述第一像素界定层包括氮化硅、氧化硅中的一种或多种。
  5. 根据权利要求1所述的阵列基板，其中，所述第二像素界定层包括光阻材料。
  6. 一种显示面板，包括权利要求1-5任一项所述的阵列基板。
  7. 根据权利要求6所述的显示面板，其中，所述第二像素界定层的多个开口内形成有各个子像素单元的有机发光层，所述有机发光层的厚度大于所述第一像素界定层的厚度。
  8. 一种显示装置，包括权利要求6或7所述的显示面板。
  9. 一种阵列基板的制备方法，包括：
    在衬底基板上形成平坦化层；
    在所述平坦化层上形成对应于各个子像素单元的多个像素电极；
    在形成第一像素界定层以覆盖所述像素电极外周，所述第一像素界定层 露出所述像素电极的中央区域；及
    在相邻所述像素电极之间的所述平坦化层上形成第二像素界定层，所述第二像素界定层具有限定各个子像素单元的多个开口；
    其中，所述第二像素界定层堤部的底部与其相邻的所述第一像素界定层堤部的底部间隔预定距离，且所述第二像素界定层的厚度大于所述第一像素界定层的厚度。
  10. 根据权利要求9所述的制备方法，其中，形成所述第一像素界定层包括：
    形成覆盖所述平坦化层和所述像素电极的绝缘介质层；及
    刻蚀所述绝缘介质层形成所述第一像素界定层。
  11. 根据权利要求10所述的制备方法，其中，所述绝缘介质层包括氮化硅、氧化硅中的一种或多种。
  12. 根据权利要求9所述的制备方法，其中，形成所述第二像素界定层包括：
    形成覆盖所述平坦化层、所述第一像素界定层和所述像素电极的光阻材料层；
    图案化所述光阻材料层形成所述第二像素界定层。
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