WO2020160868A1 - Systemkomponente mit konfigurierbarem kommunikationsverhalten und verfahren zum betreiben einer solchen systemkomponente - Google Patents
Systemkomponente mit konfigurierbarem kommunikationsverhalten und verfahren zum betreiben einer solchen systemkomponente Download PDFInfo
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- WO2020160868A1 WO2020160868A1 PCT/EP2020/050417 EP2020050417W WO2020160868A1 WO 2020160868 A1 WO2020160868 A1 WO 2020160868A1 EP 2020050417 W EP2020050417 W EP 2020050417W WO 2020160868 A1 WO2020160868 A1 WO 2020160868A1
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- WIPO (PCT)
- Prior art keywords
- system component
- register
- data
- bus
- communication
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
Definitions
- the present invention relates to a system component with configurable communication behavior and a method for operating such a system component.
- the present invention relates to systems that include several
- System components which communicate over a data bus, i. Exchange data via the data bus.
- a master i. Exchange data via the data bus.
- system components acts as what is known as a master, in that it
- System components exchange data between at least two
- At least one other system component functions as a so-called slave by participating in a data communication that is coordinated by the master.
- Examples of such systems are sensor systems in consumer electronic applications, such as smartphones, wearables, etc., loT systems,
- MIPI Alliance is a Mobile Industry Processor Interface Alliance
- the I3C standard is based on the I2C standard, the de facto most widespread 2-pin serial bus protocol standard for low-speed peripheral devices and sensors.
- the I3C bus protocol offers some significant features compared to the I2C bus protocol
- Each system component 1 comprises a first register, a bus characteristic register (BCR) and a device characteristic register (DCR).
- BCR bus characteristic register
- DCR device characteristic register
- System component 1 is a sensor and possibly other sensor-specific ones
- the Bus Characteristic Register includes defines the role of system component 1, i.e. whether the system component 1 acts as a master or as a slave. Furthermore, the communication behavior of the
- System component 1 defined. In particular, it is stored in the bus characteristic register whether the system component 1 supports an in-band interrupt (I Bl) function with or without payload.
- I Bl in-band interrupt
- the I3C bus protocol provides that the master queries the communication behavior of the slave stored in the bus characteristic register in order to then adapt its own communication behavior accordingly.
- the master queries the communication behavior of the slave stored in the bus characteristic register in order to then adapt its own communication behavior accordingly.
- the master queries the communication behavior of the slave stored in the bus characteristic register in order to then adapt its own communication behavior accordingly.
- the master can support both IBI without payload and IBI with payload.
- a master that only supports IBI without payload can therefore not communicate with slaves for their
- Communication behavior IBI is specified with payload.
- the subject matter of the present invention is a system component with configurable communication behavior according to claim 1 and a method for operating such a system component according to claim 9.
- the present invention creates a system component with at least one interface for a data bus for communication with at least one further system component.
- Communication protocol used for sending and receiving data and bus commands. Furthermore, the communication protocol provides that the at least one further system component queries the communication behavior of the system component via the data bus for its own
- the system component includes a register for configuration data that define the communication behavior of the system component on the data bus.
- the register of the system component is connected to the data bus so that the configuration data stored in the register are available on the data bus or are made available for further system components via the data bus.
- the system component is characterized by the fact that the functional scope of the system component is different
- Communication behavior enables. Furthermore, the communication behavior of the system component can be selected within the scope of the functional scope in that the configuration data corresponding to the selected communication behavior can be loaded into the register.
- the communication behavior describes the behavior of a
- System component in relation to other system components that are connected to the same data bus.
- the communication behavior of a system component according to the invention can be within the scope of its
- Communication behavior includes the definition of the system component as master or slave.
- the communication behavior describes whether the system component in the role of a slave provides the IBI function with or without payload.
- the IBI function with payload means that the master is obliged to read out the payload (data, e.g. measurement data from a sensor).
- the master is obliged to reserve the data bus for the corresponding slave as long as until it has sent the data.
- the data are therefore always sent as soon as a slave has received approval for the data bus. This can be disadvantageous in the case of very large data packets, for example with data from a
- the IBI function without payload means that the slave sends a request to the master that, for example, data is available for transmission via the data bus and the master has control over the start of the data transmission.
- the present invention also provides a method for operating a system component.
- the system component is for communication with at least one further system component via at least one
- a defined communication protocol is used on the data bus for sending and receiving data and bus commands.
- the communication protocol provides that the at least one further system component queries the communication behavior of the system component via the data bus for its own
- the system component also includes at least one register for
- Configuration data The configuration data define that
- the system component is connected to the data bus, so that the configuration data stored in the register are available on the data bus or are made available for other system components via the data bus.
- the functionality of the system component enables
- the method is characterized in that the
- Communication behavior of the system component is configured by the corresponding to a selected communication behavior
- Configuration data are loaded into the register.
- a preferred field of application of the present invention are
- Sensor components for acquiring and converting measured variables into electrical sensor signals that act as system components of a higher-level system.
- this can be, for example, a navigation system or a mobile device that evaluates the sensor data for higher-level applications, such as for a pedometer.
- the idea on which the present invention is based is to design a system component in such a way that its communication behavior can be configured within the scope of its functional scope, so that it alternatively supports IBI with payload or IBI without payload.
- the system component can thus advantageously be used in any system, regardless of the variant (with or without IBI payload) for which the system was designed by a developer.
- the functional scope of the system component can advantageously be adapted to the requirements of the system by configuring the bus characteristic register.
- system component I2C and / or I3C is compatible.
- This embodiment is advantageous in that the system components can be used both in a system in accordance with the I2C bus protocol or the I3C
- the I3C bus protocol standard is advantageously downward compatible.
- the functional scope of the system component according to the invention enables operation alternatively as a master or as a slave.
- system component can communicate with other system components via the data bus both as a slave and as a master.
- the scope of functions includes an in-band interrupt capability, alternatively with or without payload.
- the in-band interrupt capability with payload includes sending the payload, for example sensor data, with the interrupt set by the slave.
- a master In the case of the in-band interrupt capability without payload, a master must determine in advance how the payload
- a slave can advantageously be configured for the corresponding application or for the corresponding system and for use in it.
- At least one internal or external memory device is provided for configuration data, in particular a non-volatile memory.
- the chosen communication behavior Corresponding configuration data can be loaded into the register from this memory device.
- This embodiment is advantageous in that, for example, the IBI value (with or without payload) can be read from the memory and loaded into the register in order to adapt the communication behavior of the system component functioning as a slave to the requirements of the master
- the IBI value in the BCR register of a system component is usually defined in advance by the manufacturer of the system component.
- the IBI behavior of the system component can be configured by taking an IBI value from an internal or external storage device at the beginning of the initialization of the
- Communication behavior register s the bus component on the data bus and informs the master how it communicates.
- the IBI value written in the register remains during the entire operation of the
- the system component By configuring the register before or after initializing the system component and before or after logging on to the data bus, the system component can be used in any system, regardless of the communication behavior of the master.
- the communication behavior can be selected on the basis of bus commands and / or data received via the data bus and corresponding configuration data are in the
- Storage device loadable and loadable from the storage device into the register.
- a BCR value can advantageously be agreed between a master and a slave using an I3C Custom Command Code (CCC).
- CCC I3C Custom Command Code
- custom command codes are available or custom command codes can be defined in the protocol. With these, the value in the register can be changed or adapted according to the requirements of the system.
- Command code should be predefined and device-specific via a private protocol.
- a BCR value can be agreed between the master and slave using a private I3C protocol.
- the private I3C protocol used for this function is either predefined or device-specific. This
- Embodiment has the advantage that a custom command code does not first have to be defined in consultation with the MIPI Alliance. Rather, a private protocol can be defined internally with which the BCR register can be accessed directly without CCC in order to change the value of the BCR register.
- the configuration data are loaded into the register each time the system component is switched on, but before the first interrogation of the communication behavior by the further system component.
- the system component is advantageously initialized to the value stored in the BCR register before the system component is initialized by the master on the data bus.
- the system component can thus be initialized accordingly for each system and can be used in this.
- the value of the BCR register is provided with a default value, for example IBI without payload.
- the system component is used during its
- Initialization reconfigured accordingly so that it can also be used in the system.
- the value for IBI with payload is stored in the memory device. This is read out and the value in the BCR register is
- the configuration data are loaded into the register from an internal or external storage device for configuration data, in particular from a non-volatile memory.
- the communication behavior is configured on the basis of at least one predefined and / or device-specific bus command and corresponding configuration data are loaded into the register or the storage device.
- the communication behavior is configured on the basis of at least one predefined and / or device-specific data communication and corresponding configuration data are loaded into the register or the storage device.
- Fig. 1 is a schematic illustration to explain a
- FIG. 2 shows a schematic illustration to explain an I3C bus system
- 3 shows a schematic illustration to explain the in-band interrupt capability with payload
- 4 shows a schematic illustration to explain the in-band interrupt capability without payload
- Fig. 5 is a schematic illustration to explain a
- FIG. 6 is a schematic illustration to explain a
- Fig. 1 is a schematic diagram for explaining a
- reference numeral 1 designates a system component comprising an interface 5.
- the system component 1 is connected to the data bus 3 (not shown) via the interface 5.
- the data bus 3 comprises a serial clock line 6 and a serial data line 7. Furthermore, the
- System component 1 a processor unit 8, a register 4 and a
- the storage device 11 is designed
- the storage device 11 is formed in Fig. 1 as an internal storage device, i. it is part of the
- the configuration data can, however, also be loaded into the register 4 from an external storage device, for example a non-volatile memory, an electrical switch, an electrically conductive pin.
- the external storage device is not limited to the examples given here.
- further versions of devices can be used which are designed to store data and to load them into the register 4.
- the register 4, in particular the BCR register receives from the Storage device 11 stores a value prior to the initialization of system component 1.
- the communication behavior of system component 1 is configured via this value.
- the I Bl function is configured with or without a payload and thus how the system component 1 communicates via the data bus 3.
- the processor unit 8 is configured to form a CCC machine 9 and a CCC I3C core 10.
- the CCC machine 9 and the CCC I3C core 10 can also be on two separate ones
- the CCC machine 9 is part of the slave in the I3C protocol and is used for normal reading and writing of data.
- the CCC machine 9 provides direct access to the data. Further communication with the slave according to the I3C bus protocol can take place via custom command codes CCC.
- custom command codes for example, the PowerModi and the data protocol can be changed to "single data rate” and "double data rate”.
- the CCC I3C core 10 receives the custom command codes via the interface 5 and decodes them and accordingly implements the instructions or reacts to them.
- An exemplary custom command code sent by the master of the data bus 3 is the reading of the BCR register of the system component 1 while the system component 1 is logged on to the data bus 3.
- the system component 1 receives the CCC and the CCC I3C core 10 decodes the received command and gives corresponding instructions to the CCC machine 9, which reads out the register 4.
- Register 4 is transmitted via the interface 5 of the system component 1 via the data bus 3 to the further system component 2, for example in the function of a master.
- Fig. 2 is a schematic illustration to explain an I3C bus system.
- the I3C bus system 10 comprises a system component 1 which is connected to further via a data bus 3
- System components 2 is connected for communication.
- System component 1 can be a slave or a Master's degree. If the system component 1 functions as a slave, then one of the further components 2 is designed as a master.
- 3 is a schematic illustration to explain the in-band interrupt capability with payload.
- the in-band interrupt 12 is a possibility for the system component 1 functioning as a slave to inform the master via the data bus 3 that communication is to be established between the master and the slave.
- the slave has no way of starting communication or sending data via the bus without receiving a clock from the master.
- the slave can inform the master that, for example, data is available that is to be sent via the data bus 3.
- the master reacts to the IBI according to a prioritization and controls the communication of the slave by sending the master to the corresponding clocks
- a start bit “Start (S)” is sent from the master to system component 1 via data bus 3.
- the IBI slave sends its address to the master via the bus when the master provides a clock.
- the master With the "Master_ACK”, the master signals to the slave that it has recognized that a slave wants to access the bus.
- the in-band interrupt 12 is designed with a payload. The master is therefore obliged to provide the slave with further clocks for at least one byte and to send data via the data bus 3 as long as the slave is providing data.
- the data bus 3 is only released again after the communication has been completed.
- FIG. 4 is a schematic illustration to explain the in-band interrupt capability without payload.
- the master can decide which one after sending the "Master_ACK" Function is to be performed. For example, the master can start reading the data from the slave or establish communication with another slave, since this slave may have a higher priority. The master is not bound to the slave's request.
- Fig. 5 is a schematic diagram for explaining a
- reference numeral 1 designates a system component comprising an interface 5.
- the system component 1 is connected to the data bus 3 (not shown) via the interface 5.
- the data bus 3 comprises a serial clock line 6 and a serial data line 7. Furthermore, the
- System component 1 a processor unit 8 and a register 4.
- Processor unit 8 is configured to form a CCC machine 9 and a CCC I3C core 10.
- the CCC machine 9 and the I3C core 10 can also be formed on two separate processor units.
- the CCC machine 9 is part of the slave in the I3C protocol and is used for normal reading and writing of data.
- the CCC machine 9 provides direct access to the data. Another
- Custom command codes for example, the PowerModi
- the data protocol for example, can be changed to “single data rate” and “double data rate”.
- the CCC I3C core 10 receives the custom command codes via the interface 5 and decodes them and accordingly implements the instructions or reacts to them.
- An exemplary custom command code sent by the master of the data bus 3 is the reading of the BCR register of the system component 1 during the registration of the bus component on the data bus 3.
- the system component 1 receives the CCC and the CCC I3C core 10 decodes the received command and issues the appropriate Instruction to the CCC machine 9, which reads out register 4.
- the read out value of the register 4 is transmitted via the interface 5 of the System component 1 via the data bus 3 to the further system component 2, for example in the function of a master.
- the value of register 4 is changed via a received custom command code (CCC) and thus the communication behavior of system component 1.
- CCC custom command code
- Device-specific CCCs are provided in the I3C bus protocol that can be used for this purpose. With these the values of the BCR register 4 can be configured. Furthermore, new CCC can be defined and the I3C bus protocol can be expanded. With the newly defined CCC, the values of the BCR register 4 can be configured.
- the I3C CCC core 10 has a connection to the register 4.
- the register 4 is not configured using the custom command codes of the I3C bus protocol.
- write and read requests are provided via the direct connection of the I3C CCC core 10 to the register 4.
- the communication between the master and the slave is defined in a private protocol that is executed on the I3C CCC core 10.
- the master can thus write to the BCR register 4 and read from it.
- the address of register 4 and commands for reading and writing register 4 are defined in the private protocol.
- Fig. 7 a combination of the variants of Figures 1, 4 and 5 is shown.
- the system component 1 shown in FIG. 7 comprises a
- Storage device 11 via which the register 4 can be configured. Besides, that is Register 4 can be configured using custom command codes and a private protocol.
- the memory device 11 also has a connection to the processor 8. Via this connection, the value stored in the storage device 11 can be configured and loaded using custom command codes and a private protocol.
- the memory device 11 is designed to provide the register 4 with corresponding configuration data for the configuration of the functional scope of the system component 1.
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021546252A JP7241191B2 (ja) | 2019-02-07 | 2020-01-09 | 通信動作を設定可能なシステムコンポーネントおよびそのようなシステムコンポーネントの作動方法 |
US17/289,526 US11556493B2 (en) | 2019-02-07 | 2020-01-09 | System component having a configurable communication behavior, and method for operating such a system component |
CN202080013088.4A CN113424498B (zh) | 2019-02-07 | 2020-01-09 | 具有可配置通信行为的系统部件和用于运行这种系统部件的方法 |
KR1020217028461A KR20210123386A (ko) | 2019-02-07 | 2020-01-09 | 구성 가능한 통신 거동을 갖는 시스템 컴포넌트 및 그러한 시스템 컴포넌트의 작동 방법 |
Applications Claiming Priority (2)
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DE102019201533.6 | 2019-02-07 | ||
DE102019201533.6A DE102019201533A1 (de) | 2019-02-07 | 2019-02-07 | Systemkomponente mit konfigurierbarem Kommunikationsverhalten und Verfahren zum Betreiben einer solchen Systemkomponente |
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WO2020160868A1 true WO2020160868A1 (de) | 2020-08-13 |
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PCT/EP2020/050417 WO2020160868A1 (de) | 2019-02-07 | 2020-01-09 | Systemkomponente mit konfigurierbarem kommunikationsverhalten und verfahren zum betreiben einer solchen systemkomponente |
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US (1) | US11556493B2 (de) |
JP (1) | JP7241191B2 (de) |
KR (1) | KR20210123386A (de) |
CN (1) | CN113424498B (de) |
DE (1) | DE102019201533A1 (de) |
TW (1) | TWI810430B (de) |
WO (1) | WO2020160868A1 (de) |
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- 2019-02-07 DE DE102019201533.6A patent/DE102019201533A1/de active Pending
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- 2020-01-09 JP JP2021546252A patent/JP7241191B2/ja active Active
- 2020-01-09 WO PCT/EP2020/050417 patent/WO2020160868A1/de active Application Filing
- 2020-01-09 KR KR1020217028461A patent/KR20210123386A/ko active Search and Examination
- 2020-01-09 US US17/289,526 patent/US11556493B2/en active Active
- 2020-01-09 CN CN202080013088.4A patent/CN113424498B/zh active Active
- 2020-02-05 TW TW109103495A patent/TWI810430B/zh active
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Publication number | Publication date |
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CN113424498A (zh) | 2021-09-21 |
US20210397579A1 (en) | 2021-12-23 |
JP7241191B2 (ja) | 2023-03-16 |
JP2022520057A (ja) | 2022-03-28 |
KR20210123386A (ko) | 2021-10-13 |
TWI810430B (zh) | 2023-08-01 |
CN113424498B (zh) | 2023-07-04 |
TW202046134A (zh) | 2020-12-16 |
DE102019201533A1 (de) | 2020-08-13 |
US11556493B2 (en) | 2023-01-17 |
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