WO2020147637A1

WO2020147637A1 - Reference voltage generation circuit and switched-mode power supply

Info

Publication number: WO2020147637A1
Application number: PCT/CN2020/071078
Authority: WO
Inventors: 张海军; 张启帆
Original assignee: 上海艾为电子技术股份有限公司
Priority date: 2019-01-14
Filing date: 2020-01-09
Publication date: 2020-07-23
Also published as: CN109495078A; CN109495078B

Abstract

A reference voltage generation circuit (510) and a switched-mode power supply, comprising: a first conversion circuit (210), a second conversion circuit (220), a bias conversion circuit (300), and a summing resistor (400). A sampling circuit (100) is used to sample potentials of two output stages (VOP1, VON1) of a first operational amplifier of a class-AB audio power amplifier, or to sample potentials of two output stages (VOP, VON) of the class-AB audio power amplifier. Moreover, a summing resistor (Rt), an input conversion circuit (200) and the bias conversion circuit (300) are employed, such that a reference voltage (VREF_IS) changes along with changes in the potentials of the two output stages (VOP1, VON1) of the first operational amplifier of the class-AB audio power amplifier, or along with changes in the potentials of the two output stages (VOP, VON) of the class-AB audio power amplifier change. As a result, an output voltage (VOUT) of a switched-mode power supply changes along with changes in the potentials of the two output stages (VOP1, VON1) of the first operational amplifier of the class-AB audio power amplifier, or along with changes in the potentials of the two output stages (VOP, VON) of the class-AB audio power amplifier, thereby reducing conduction losses at power stages of a power tube and improving system efficiency.

Description

Reference voltage generating circuit and switching power supply

This application claims the priority of a Chinese patent application filed with the Chinese Patent Office, the application number is 201910031836.0, and the invention title is "a reference voltage generating circuit and switching power supply" on January 14, 2019, the entire content of which is incorporated herein by reference Applying.

Technical field

The present invention relates to the technical field of switching power supplies, in particular to a reference voltage generating circuit and a switching power supply.

Background technique

In recent years, with the rapid development of portable electronic products, the requirements of portable electronic products on the sound quality of their speakers have gradually increased. Among them, Class AB audio power amplifiers are widely used in portable electronic products because of their good linearity, sound quality, and simple design structure.

Because the switching power supply has the advantages of high working efficiency and low heat generation, usually the power supply of the output stage of the class AB audio power amplifier is provided by the switching power supply.

But when the output signal of the AB class audio power amplifier changes, such as when it decreases, because the output voltage value provided by the switching power supply remains unchanged, the voltage drop on the output stage PMOS power tube increases, and the power consumption increases; and when AB When the output signal of the audio-like power amplifier increases, the voltage divider on the NMOS power tube of the output stage increases, and the consumed power increases. Therefore, a greater power waste is caused in the power stage of the AB audio power amplifier, which makes The efficiency of Class AB audio power amplifier is low.

Summary of the invention

In view of this, the present invention provides a reference voltage generating circuit and a switching power supply to solve the problems of high power consumption and low efficiency of the class AB audio power amplifier.

In order to achieve the foregoing objective, the embodiments of the present invention provide the following technical solutions:

The first aspect of the present invention discloses a reference voltage generation circuit, which is characterized in that it is used to provide a reference voltage for the switching power supply of the output stage of the class AB audio power amplifier; the reference voltage generation circuit includes: a sampling circuit, an input conversion circuit, Bias conversion circuit and sum module; among them:

The first input terminal and the second input terminal of the sampling circuit are respectively used as the first input terminal and the second input terminal of the reference voltage generating circuit, respectively receiving the output stage of the first operational amplifier in the class AB audio power amplifier The potential sampling values of VOP1 and the output stage VON1, or the potential sampling values of the output stage VOP and the output stage VON of the AB audio power amplifier are respectively received;

The input terminal of the bias conversion circuit serves as the third input terminal of the reference voltage generating circuit, and is connected to a fixed bias voltage;

The first output terminal of the sampling circuit is connected to the first input terminal of the input conversion circuit; the second output terminal of the sampling circuit is connected to the second input terminal of the input conversion circuit;

The output terminal of the input conversion circuit, the output terminal of the bias conversion circuit, and the input terminal of the summation module are all connected, and the output terminal of the summation module serves as the output terminal of the reference voltage generating circuit.

Optionally, the first output terminal of the sampling circuit outputs the output stage VOP1 or the potential sampling value of the output stage VOP, and the second output terminal of the sampling circuit outputs the output stage VON1 or the output stage VON potential sampling value;

The input conversion circuit is used to convert and sum the sampled values of the received potentials, and output an input current signal through its own output terminal;

The bias conversion circuit is used to convert the fixed bias voltage and output a bias current signal through its own output terminal;

The summation module is used to sum the input current signal and the bias current signal, and output the voltage value corresponding to the summed current as a reference voltage signal.

Optionally, the input conversion circuit includes: a first conversion circuit and a second conversion circuit; wherein:

The input terminal of the first conversion circuit is used as the first input terminal of the input conversion circuit, and is used to receive the output stage VOP1 or the potential sampling value of the output stage VOP, convert it into a first current signal and pass it through itself Output terminal for output;

The input terminal of the second conversion circuit is used as the second input terminal of the input conversion circuit, and is used to receive the output stage VON1 or the potential sampling value of the output stage VON, convert it into a second current signal and pass it through itself Output terminal for output;

The output terminal of the first conversion circuit is connected to the output terminal of the second conversion circuit, and the connection point serves as the output terminal of the input conversion circuit.

Optionally, the first conversion circuit includes: a first comparator, a first NMOS transistor, a first resistor, a first PMOS transistor, and a second PMOS transistor; wherein:

The non-inverting input terminal of the first comparator serves as the input terminal of the first conversion circuit; the inverting input terminal of the first comparator is connected to the source of the first NMOS transistor, and the connection point is connected to one end of the first resistor Connected; the other end of the first resistor is grounded;

The output terminal of the first comparator is connected to the gate of the first NMOS transistor;

The gate of the first PMOS transistor is connected to its drain, and the connection point is connected to the drain of the first NMOS transistor;

The source of the first PMOS transistor and the source of the second PMOS transistor are both connected to a power source;

The gate of the second PMOS transistor is connected to the gate of the first PMOS transistor; the drain of the second PMOS transistor serves as the output terminal of the first conversion circuit.

Optionally, the second conversion circuit includes: a second comparator, a second NMOS transistor, a second resistor, a third PMOS transistor, and a fourth PMOS transistor; wherein:

The non-inverting input terminal of the second comparator is used as the input terminal of the second conversion circuit; the inverting input terminal of the second comparator is connected to the source of the second NMOS transistor, and the connection point is with one end of the second resistor Connected; the other end of the second resistor is grounded;

The output terminal of the second comparator is connected to the gate of the second NMOS transistor;

The gate of the third PMOS transistor is connected to its drain, and the connection point is connected to the drain of the second NMOS transistor;

The source of the third PMOS transistor and the source of the fourth PMOS transistor are both connected to a power source;

The gate of the fourth PMOS transistor is connected to the gate of the third PMOS transistor; the drain of the fourth PMOS transistor serves as the output terminal of the second conversion circuit.

Optionally, the bias conversion circuit includes: a third comparator, a third NMOS transistor, a third resistor, a fifth PMOS transistor, and a sixth PMOS transistor; wherein:

The non-inverting input terminal of the third comparator serves as the input terminal of the bias conversion circuit; the inverting input terminal of the third comparator is connected to the source of the third NMOS transistor, and the connection point is connected to one end of the third resistor Connected; the other end of the third resistor is grounded;

The output terminal of the third comparator is connected to the gate of the third NOMS transistor;

The gate of the fifth PMOS transistor is connected to its drain, and the connection point is connected to the drain of the third NOMS transistor;

The source of the fifth PMOS transistor and the source of the sixth PMOS transistor are both connected to a power source;

The gate of the sixth PMOS transistor is connected to the gate of the fifth PMOS transistor; the drain of the sixth PMOS transistor is used as the output terminal of the bias conversion circuit.

Optionally, the summation module includes a summation resistor, wherein: one end of the summation resistor serves as an input end of the summation module and an output end of the summation module, and the summation resistance The other end is grounded.

A second aspect of the present invention discloses a switching power supply, which is characterized in that it is used to provide a supply voltage for the output stage of a class AB audio power amplifier, and includes: a main circuit, and a reference voltage generator as described in any one of the first aspects Circuit; where:

The reference voltage supply end of the main circuit is connected to the output end of the reference voltage generation circuit; the input end of the main circuit is used as the input end of the switching power supply; the output end of the main circuit is used as the switching power supply The output terminal.

Optionally, the main circuit is configured to receive the reference voltage signal output by the reference voltage generating circuit, and obtain at least one control signal after conversion, and the at least one control signal is used to control the input terminal and the output terminal of the main circuit Between on and off and voltage conversion.

Optionally, the main circuit is any one of BUCK topology, BOOST topology, and BUCK_BOOST topology.

Optionally, the BOOST topology includes:

The non-inverting input terminal is used as an error amplifier of the control terminal of the BOOST topology, and the inverting input terminal of the error amplifier receives a feedback voltage signal;

A pulse width modulation comparator whose positive input terminal is connected to the output terminal of the error amplifier; the negative input terminal of the pulse width modulation comparator receives a slope compensation voltage signal;

The input terminal of the switch tube driving unit is connected with the output terminal of the pulse width modulation comparator, the first output terminal of the switch driving unit is connected with the control terminal of the first power tube, and the second output terminal of the switch tube driving unit Connected to the control end of the second power tube;

The second end of the first power tube and the second end of the second power tube are connected to one end of the inductor;

The other end of the inductor is used as the input end of the BOOST topology;

The first end of the first power tube is used as the output end of the BOOST topology; the first end of the second power tube is grounded.

Optionally, the first power tube is a PMOS power tube; the second power tube is an NMOS power tube.

Optionally, the first ends of the first power tube and the second power tube are both source electrodes, and the second ends of the first power tube and the second power tube are both drain electrodes. The control ends of the first power tube and the second power tube are both grids.

Compared with the prior art, the present invention uses a sampling circuit to sample the potentials of the two output stages of the first operational amplifier of the class AB audio power amplifier or the two output stages of the class AB audio power amplifier; The input conversion circuit converts and sums the potentials collected by the two input terminals of the acquisition circuit to obtain an input current signal, and converts the fixed bias voltage through a bias conversion circuit to obtain a bias current signal; and then through a summation module The input current signal and the bias current signal are summed and converted into a reference voltage signal; thus, the reference voltage signal can follow the two output stages of the first operational amplifier of the class AB audio power amplifier or the class AB audio The potential of the two output stages of the power amplifier changes, so that the output voltage of the switching power supply changes with the two output stages of the first operational amplifier of the class AB audio power amplifier or the class AB audio power amplifier. The potentials of the two output stages change, thereby reducing the conduction loss on the power tube of the power stage and improving the efficiency of the system.

BRIEF DESCRIPTION

FIG. 1 is a schematic diagram of a reference voltage generating circuit disclosed in an embodiment of the present invention;

2 is a schematic diagram of an input conversion circuit in a reference voltage generating circuit disclosed in another embodiment of the present invention;

3 is a schematic diagram of a first conversion circuit in an input conversion circuit disclosed in another embodiment of the present invention;

4 is a schematic diagram of a second conversion circuit in the input conversion circuit disclosed in another embodiment of the present invention;

5 is a schematic diagram of a bias conversion circuit 300 in a reference voltage generation circuit disclosed in an embodiment of the present invention;

Fig. 6 is a schematic diagram of a switching power supply disclosed in an embodiment of the present invention.

detailed description

In order to further understand the present invention, the preferred embodiments of the present invention are described below in conjunction with examples, but it should be understood that these descriptions are only to further illustrate the features and advantages of the present invention, and not to limit the claims of the present invention.

In order to solve the problem of high power consumption and low efficiency of the class AB audio power amplifier, an embodiment of the present invention provides a reference voltage generating circuit for providing a reference voltage for the switching power supply of the output stage of the class AB audio power amplifier, as shown in Figure 1 As shown, the specific structure includes: a sampling circuit 100, an input conversion circuit 200, a bias conversion circuit 300, and a summation module 400; among them:

The first input terminal and the second input terminal of the sampling circuit 100 are used as the first input terminal and the second input terminal of the reference voltage generating circuit, respectively, for receiving the output of the first operational amplifier in the class AB audio power amplifier. The sampling values of the potentials of the stage VOP1 and the output stage VON1, or the sampling values of the potentials of the output stage VOP and the output stage VON of the AB class audio power amplifier, respectively. Since the output signal of the class AB audio power amplifier fluctuates with the input signal, in actual applications, the sampling value received by the sampling circuit 100 can reflect the fluctuation of the input/output signal of the class AB audio power amplifier, depending on its specific application. Depending on the environment, all are within the protection scope of this application.

The input terminal of the bias conversion circuit 300 is used as the third input terminal of the reference voltage generating circuit for connecting a fixed bias voltage DV.

The first output terminal of the sampling circuit 100 is connected to the first input terminal of the input conversion circuit 200; the second output terminal of the sampling circuit 100 is connected to the second input terminal of the input conversion circuit 200.

Specifically, the first output terminal of the sampling circuit 100 outputs the sampled value of the potential of VOP1/VOP, and the second output terminal outputs the sampled value of the potential of VON1/VON. The input conversion circuit 200 is configured to convert and sum the sampled values of the received potentials to obtain the input current signal I3, and output the input current signal I3 to the summation module 400.

The output terminal of the input conversion circuit 200, the output terminal of the bias conversion circuit 300, and the input terminal of the summation module 400 are all connected, and the output terminal of the summation module 400 serves as the output terminal of the reference voltage generating circuit.

Specifically, the bias conversion circuit 300 is configured to receive the fixed bias voltage DV and perform conversion to obtain the bias current signal I4, and output the bias current signal I4 to the summation module 400. The summation module 400 is used to sum the input current signal I3 and the bias current signal I4, and output the voltage value corresponding to the summed current.

Optionally, the summing module 400 includes a summing resistor Rt. One end of the summing resistor Rt is connected to the input conversion circuit 200 and the bias conversion circuit 300, and the other end is grounded, where: the input current signal I3 and the bias current signal I4 pass through The summing resistor Rt flows into the ground, and the end of the summing resistor Rt connected to the input conversion circuit 200 and the bias conversion circuit 300 is the output end of the reference voltage generation circuit.

What needs to be explained is how to implement the summation module 400. This embodiment only uses a summing resistor as an example. In practical applications, it can also be realized by other devices, such as an adder. There is no limitation here, as long as it can be combined with the summation resistor. Other implementations for the resistance Rt to achieve the same purpose are all within the protection scope of this application.

In an optional solution, the specific working principle of the reference voltage generating circuit is:

The first input terminal and the second input terminal of the sampling circuit 100 respectively receive the sampled values of the potentials of the output stage VOP1 and the output stage VON1 of the first operational amplifier in the class AB audio power amplifier, or sample the class AB audio power amplifier respectively The sampling value of the potential of the output stage VOP and the output stage VON.

The input conversion circuit 200 converts and sums the sampled values of the potentials received at the two input ends of the sampling circuit 100 to obtain the input current signal I3; the bias conversion circuit 300 converts the fixed bias voltage DV received at its input ends to obtain the bias current Signal I4.

Since the input conversion circuit 200 and the bias conversion circuit 300 are connected in parallel, the current flowing through the summing resistor Rt is the sum of the currents output by the input conversion circuit 200 and the bias conversion circuit 300, that is, the summing resistor Rt will The input current signal I3 and the bias current signal I4 are added together.

And because current flows through the summing resistor Rt, a voltage division is generated, that is, the summing resistor Rt converts the current signal into a voltage signal, and one end of the summing resistor is the output terminal of the reference voltage generating circuit, and the other end is grounded Therefore, the potential of the reference voltage signal VREF_IS output by the reference voltage generating circuit is the divided voltage of the summing resistor Rt.

Compared with the prior art, the present invention samples the potentials of the two output stages of the first operational amplifier of the class AB audio power amplifier or the two output stages of the class AB audio power amplifier through a sampling circuit, and then uses a summing resistor , The input conversion circuit and the bias conversion circuit make the reference voltage change with the potential changes of the two output stages of the first operational amplifier of the class AB audio power amplifier or the two output stages of the class AB audio power amplifier, thereby making The output voltage of the switching power supply changes with the potential changes of the two output stages of the first operational amplifier of the class AB audio power amplifier or the two output stages of the class AB audio power amplifier, thereby reducing the power of the power stage The conduction loss on the tube improves the efficiency of the system.

Optionally, as shown in FIG. 2, in another embodiment of the present invention, an implementation of the input conversion circuit 200 includes: a first conversion circuit 210 and a second conversion circuit 220; wherein:

The input terminal of the first conversion circuit 210 serves as the first input terminal of the input conversion circuit 200, and receives the output stage VOP1 or the sampled value of the potential of the output stage VOP; the input terminal of the second conversion circuit 220 serves as the second input of the input conversion circuit 200 The terminal receives the sampled value of the potential of the output stage VON1 or the output stage VIN.

The output terminal of the first conversion circuit 210 is connected to the output terminal of the second conversion circuit 220, and the connection point serves as the output terminal of the input conversion circuit 200. Specifically, the first conversion circuit 210 outputs the first current signal I1, the second conversion circuit 220 outputs the second current signal I2, and is input to the conversion circuit 200. The externally provided input current signal I3 is the first current signal I1 and the second current signal. The sum of I2.

The specific working principle is:

The first conversion circuit 210 converts the sample value of the potential received by the first input terminal of the input conversion circuit 200 to obtain the first current signal I1; the second conversion circuit 220 inputs the sample value of the potential received by the second input terminal of the input conversion circuit 200 The second current signal I2 is obtained by conversion.

Also, because the first conversion circuit 210 and the second conversion circuit 220 are in a parallel relationship, the input conversion circuit 200 sums the first current signal I1 and the second current signal I2 to output the input current signal I3.

It should be noted that this embodiment only takes a specific implementation of the first conversion circuit 210 and the second conversion circuit 220 as an example for description. The other embodiments have the same working principles as this embodiment, and you can refer to this embodiment. The working principle is not repeated here.

The rest of the structure and principle are the same as the above-mentioned embodiment, and will not be repeated here.

Optionally, as shown in FIG. 3, in another embodiment of the present invention, an implementation of the first conversion circuit 210 includes: a first comparator 211, a first NMOS transistor M1, a first resistor R1, a first PMOS transistor P1 and second PMOS transistor P2; among them:

The non-inverting input terminal of the first comparator 211 is used as the input terminal of the first conversion circuit 210; the inverting input terminal of the first comparator 211 is connected to the source of the first NMOS transistor M1, and the connection point is connected to one end of the first resistor R1 ; The other end of the first resistor R1 is grounded.

The output terminal of the first comparator 211 is connected to the gate of the first NMOS transistor M1.

The gate of the first PMOS transistor P1 is connected to its drain, and the connection point is connected to the drain of the first NMOS transistor M1; the source of the first PMOS transistor P1 and the source of the second PMOS transistor P2 are both connected to the power terminal.

The gate of the second PMOS transistor P2 is connected to the gate of the first PMOS transistor; the drain of the second PMOS transistor serves as the output terminal of the first conversion circuit 210.

The specific working principle is:

If the first input terminal of the sampling circuit 100 receives the potential sampling value of the output stage VOP1, that is, the potential of the non-inverting input terminal of the first comparator 211 is the potential sampling value of the output stage VOP1, then when the potential of the output stage VOP1 is high, Since the inverting input terminal of the first comparator 211 is grounded through the first resistor R1, that is, the potential of the inverting input terminal of the first comparator 211 is 0, so the potential of the non-inverting input terminal of the first comparator 211 is that of the output stage VOP1 The potential sampling value is greater than the potential of the inverting input terminal of the first comparator 211, so the output terminal of the first comparator 211 outputs a high-level first control signal.

When the gate of the first NMOS transistor M1 receives a high-level first control signal, the first NMOS transistor is turned on; and because the gate of the first PMOS transistor P1 is connected to its drain, that is, the first NMOS transistor After M1 is turned on, the potential of the gate and drain of the first PMOS transistor P1 is 0, that is, low level, so the first PMOS transistor P1 is turned on, so the first resistor R1, the first NMOS transistor M1 and the first A current flows through the PMOS transistor P1.

And because the second PMOS transistor P2 and the first PMOS transistor P1 are connected to form a mirror circuit, when current flows in the first PMOS transistor P1, current also flows in the second PMOS transistor P2, that is, the first current signal I1.

It should be noted that the ratio of the current in the second PMOS transistor P2 to the current in the first PMOS transistor P1 is equal to the ratio of the sizes of the second PMOS transistor P2 to the first PMOS transistor P1, and the ratio between the two can be based on actual conditions. The requirements are determined, and there are no restrictions here.

Further, after the first conversion circuit 210 is turned on, the potential of the inverting input terminal of the first comparator 211 is the divided voltage of the first resistor R1, so that when the output stage VOP1 is at a high level, the first conversion circuit 210 can be maintained. It is in the on state, so it is necessary to ensure that after the first conversion circuit 210 is turned on, the voltage division of the first resistor R1 is less than the potential of the output stage VOP1.

When the potential of the output stage VOP1 is low, the first conversion circuit 210 is not turned on.

If the non-inverting input terminal of the first comparator 211 samples the potential of the output stage VOP, the working principle is basically the same as the above working principle. It only needs to ensure that after the first conversion circuit 210 is turned on, the voltage division of the first resistor R1 is less than the output stage VOP The potential is sufficient, so I won’t repeat them here.

It should be noted that this embodiment only provides a specific implementation of the first conversion circuit 210. In practical applications, it can also be implemented in a circuit structure or chip composed of other discrete devices, as long as it can implement other aspects of the above-mentioned working principle. The implementation modes are all within the protection scope of this application.

Optionally, as shown in FIG. 4, in another embodiment of the present invention, an implementation of the second conversion circuit 220 includes: a second comparator 221, a second NMOS transistor M2, a second resistor R2, a third PMOS transistor P3 and fourth PMOS transistor P4; among them:

The non-inverting input terminal of the second comparator 221 is used as the input terminal of the second conversion circuit 220; the inverting input terminal of the second comparator 221 is connected to the source of the second NMOS transistor M2, and the connection point is connected to one end of the second resistor R2 ; The other end of the second resistor R2 is grounded.

The output terminal of the second comparator 221 is connected to the gate of the second NMOS transistor M2.

The gate of the third PMOS transistor P3 is connected to its drain, and the connection point is connected to the drain of the second NOMS transistor M2.

The source of the third PMOS transistor P3 and the source of the fourth PMOS transistor P4 are both connected to the power supply; the gate of the fourth PMOS transistor P4 is connected to the gate of the third PMOS transistor P3; the drain of the fourth PMOS transistor P4 As the output terminal of the second conversion circuit 220.

The working principle of the second conversion circuit 220 is basically the same as the working principle of the first conversion circuit 210, and will not be repeated here.

Optionally, as shown in FIG. 5, in another embodiment of the present invention, an implementation manner of the bias conversion circuit 300 includes: a third comparator 310, a third NMOS transistor M3, a third resistor R3, and a fifth PMOS transistor P5 and sixth PMOS transistor P6; among them:

The non-inverting input terminal of the third comparator 310 is used as the input terminal of the bias conversion circuit 300; the inverting input terminal of the third comparator 310 is connected to the source of the third NMOS transistor M3, and the connection point is connected to one end of the third resistor R3 ; The other end of the third resistor R3 is grounded.

The output terminal of the third comparator 310 is connected to the gate of the third NMOS transistor M3.

The gate of the fifth PMOS transistor P5 is connected to its drain, and the connection point is connected to the drain of the third NMOS transistor M3.

The source of the fifth PMOS transistor P5 and the source of the sixth PMOS transistor P6 are both connected to the power source.

The gate of the sixth PMOS transistor P6 is connected to the gate of the fifth PMOS transistor P5; the drain of the sixth PMOS transistor serves as the output terminal of the bias conversion circuit 300.

The working principle of the bias conversion circuit 300 is basically the same as the working principle of the first conversion circuit 210, and will not be repeated here.

The present invention also provides a switching power supply, as shown in FIG. 6, the specific structure includes: a main circuit 520 and the reference voltage generating circuit 510 disclosed in any of the above embodiments, wherein:

The reference voltage control terminal of the main circuit 520 is connected to the output terminal of the reference voltage generating circuit 510; the input terminal of the main circuit 520 serves as the input terminal of the switching power supply; the output terminal of the main circuit 520 serves as the output terminal of the switching power supply.

Specifically, the main circuit 520 receives the reference voltage signal VREF_IS output by the reference voltage generating circuit 510 through its reference voltage control terminal; then the main circuit 520 converts the reference voltage signal VREF_IS to obtain at least one control signal, and the at least one control signal is used It controls the on-off and voltage conversion between the input terminal and the output terminal of the main circuit 520.

The main circuit is any one of BUCK topology, BOOST topology and BUCK_BOOST topology.

Optionally, this embodiment only takes one implementation manner of the main circuit 520 as an example, that is, BOOST topology, for specific description, and other implementation manners of the main circuit 520 will not be described in detail here, but other aspects of the main circuit 520 The implementation manners are also within the protection scope of this application. The specific structure of the BOOST topology, as shown in Fig. 6, includes: an error amplifier 521, a pulse width modulation comparator 522, and a switch tube driving unit 523; among them:

The non-inverting input terminal of the error amplifier 521 serves as the reference voltage supply terminal of the BOOST topology; the inverting input terminal of the error amplifier receives the feedback voltage signal.

One end of the fourth resistor R4 is connected to one end of the fifth resistor R5, and the connection point outputs a feedback voltage signal; the other end of the fifth resistor R5 is grounded.

The positive input terminal of the pulse width modulation comparator 522, the output terminal of the error amplifier 521, the output terminal of the clamp module 524, and the output terminal of the loop compensation capacitor 525 are all connected; the negative input terminal of the pulse width modulation comparator 522 receives slope compensation Voltage signal.

The sampling module 526 is connected to the current production module 527, and the connection point outputs a slope compensation voltage signal.

The input terminal of the switching tube driving unit 523 is connected with the output terminal of the pulse width modulation comparator 522; the first output terminal HSG of the switching tube driving unit 523 is connected with the control terminal of the first power tube Mp; the second output terminal of the switching tube driving unit 523 is connected The output terminal LSG is connected to the control terminal of the second power tube Mn.

The second end of the first power tube Mp, the second end of the second power tube Mn and one end of the inductor L are connected together, and the other end of the inductor is used as the input end of the BOOST topology; the first end of the first power tube Mp is used as The output end of the BOOST topology; the first end of the second power tube Mn is grounded.

It should be noted that the first power tube Mp is a PMOS power tube; the second power tube Mn is an NMOS power tube; and the first ends of the first power tube Mp and the second power tube Mn are both sources, the first power The second ends of the tube Mp and the second power tube Mn are both drains, and the control ends of the first power tube Mp and the second power tube Mn are both gates.

The other end of the fourth resistor R4, one end of the capacitor C and one end of the sixth resistor R6 are connected, and the connection point is connected to the first end of the first power tube; the other end of the capacitor C is grounded, and the other end of the sixth resistor R6 is grounded.

The specific working principle is:

When the potential of the reference voltage signal VREF_IS output by the reference voltage generating circuit 510 is greater than the reference voltage VFB, the error amplifier 521 amplifies the difference between the potential of the reference voltage signal and the reference voltage VFB, and outputs the error amplification signal COMP, due to the potential of the reference voltage signal VREF_IS It is greater than the reference voltage VFB, so the clamping module 524 will not clamp the potential of the error amplification signal COMP.

Therefore, the potential of the error amplification signal COMP is greater than the slope compensation voltage VSLOPE, so the potential of the drive signal output by the pulse width modulation comparator 522 is at a high level; the input terminal of the switch drive unit 523 receives a high level drive signal, and drives The first power tube Mp is turned on, and the second power tube Mn is turned off.

When the potential of the reference voltage signal VREF_IS output by the reference voltage generating circuit 510 is less than the reference voltage VFB, the error amplifier 521 amplifies the potential difference between the reference voltage VFB and the reference voltage signal, and outputs the error amplification signal COMP, due to the potential of the reference voltage signal VREF_IS It is less than the reference voltage VFB, so the clamping module 524 clamps the potential of the error amplification signal COMP at a low level.

Therefore, the potential of the error amplifier COMP is less than the slope compensation voltage VSLOPE, so the potential of the drive signal output by the pulse width modulation comparator 522 is low level; the input terminal of the switch drive unit 523 receives the low level drive signal, turning off the first A power tube Mp turns on the second power tube Mn.

It should be noted that in this embodiment, the driving signals are only distinguished by high-level and low-level, so that different driving signals can control the switch tube driving unit 523 to complete different operations. This is not a limitation; in actual applications, as long as it can Other solutions for realizing the above working principle are all within the protection scope of this application.

It should also be noted that the ratio of the reference voltage VFB to the output voltage VOUT of the BOOST topology, that is, the ratio of the reference voltage VFB to the output voltage VOUT of the switching power supply, is equal to the resistance of the fifth resistor R5 to the fourth resistor R4 And the resistance value of the fifth resistor R5, namely VFB=VOUT*R5/(R4+R5), that is to say, the reference voltage can represent the output voltage VOUT of the switching power supply to some extent.

It is further deduced that after the above working process, the output voltage VOUT of the switching power supply is closer to the reference voltage. Therefore, when the potential of the reference voltage signal output by the reference voltage generating circuit 510 changes, after the above working process, the switch The output voltage VOUT of the power supply also changes and is closer to the changed reference voltage, that is, the output voltage VOUT of the switching power supply changes with the potential change of the reference voltage signal output by the reference voltage generating circuit 510. Also, because the reference voltage signal output by 510 changes with the fluctuation of the input/output signal of the class AB audio power amplifier, the output voltage VOUT of the switching power supply can follow the fluctuation of the input/output signal of the class AB audio power amplifier. In this way, if the output signal of the AB class audio power amplifier fluctuates, the output voltage VOUT provided by the switching power supply will also change accordingly, which can minimize the voltage drop on the output stage PMOS power tube and NMOS power tube, thereby reducing the corresponding The conduction loss on the power tube improves the system efficiency.

The embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can be referred to each other.

The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown in this document, but should conform to the widest scope consistent with the principles and novel features disclosed in this document.

Claims

A reference voltage generation circuit, characterized in that it is used to provide a reference voltage for the switching power supply of the output stage of the class AB audio power amplifier; the reference voltage generation circuit includes: a sampling circuit, an input conversion circuit, a bias conversion circuit, and a summation Module; where:

The first input terminal and the second input terminal of the sampling circuit are respectively used as the first input terminal and the second input terminal of the reference voltage generating circuit, respectively receiving the output stage of the first operational amplifier in the class AB audio power amplifier The potential sampling values of VOP1 and the output stage VON1, or the potential sampling values of the output stage VOP and the output stage VON of the AB audio power amplifier are respectively received;

The input terminal of the bias conversion circuit serves as the third input terminal of the reference voltage generating circuit, and is connected to a fixed bias voltage;

The first output terminal of the sampling circuit is connected to the first input terminal of the input conversion circuit; the second output terminal of the sampling circuit is connected to the second input terminal of the input conversion circuit;

The output terminal of the input conversion circuit, the output terminal of the bias conversion circuit, and the input terminal of the summation module are all connected, and the output terminal of the summation module serves as the output terminal of the reference voltage generating circuit.
The reference voltage generating circuit according to claim 1, wherein the first output terminal of the sampling circuit outputs the output stage VOP1 or the potential sampling value of the output stage VOP, and the second output of the sampling circuit Output the output stage VON1 or the potential sampling value of the output stage VON;

The input conversion circuit is used to convert and sum the sampled values of the received potentials, and output an input current signal through its own output terminal;

The bias conversion circuit is used to convert the fixed bias voltage and output a bias current signal through its own output terminal;

The summation module is used to sum the input current signal and the bias current signal, and output the voltage value corresponding to the summed current as a reference voltage signal.
The reference voltage generating circuit according to claim 2, wherein the input conversion circuit comprises: a first conversion circuit and a second conversion circuit; wherein:

The input terminal of the first conversion circuit is used as the first input terminal of the input conversion circuit, and is used to receive the output stage VOP1 or the potential sampling value of the output stage VOP, convert it into a first current signal and pass it through itself Output terminal for output;

The input terminal of the second conversion circuit is used as the second input terminal of the input conversion circuit, and is used to receive the output stage VON1 or the potential sampling value of the output stage VON, convert it into a second current signal and pass it through itself Output terminal for output;

The output terminal of the first conversion circuit is connected to the output terminal of the second conversion circuit, and the connection point serves as the output terminal of the input conversion circuit.
The reference voltage generating circuit according to claim 3, wherein the first conversion circuit comprises: a first comparator, a first NMOS transistor, a first resistor, a first PMOS transistor, and a second PMOS transistor; wherein :

The non-inverting input terminal of the first comparator is used as the input terminal of the first conversion circuit; the inverting input terminal of the first comparator is connected with the source of the first NMOS transistor, and the connection point is with one end of the first resistor Connected; the other end of the first resistor is grounded;

The output terminal of the first comparator is connected to the gate of the first NMOS transistor;

The gate of the first PMOS transistor is connected to its drain, and the connection point is connected to the drain of the first NMOS transistor;

The source of the first PMOS transistor and the source of the second PMOS transistor are both connected to a power source;

The gate of the second PMOS transistor is connected to the gate of the first PMOS transistor; the drain of the second PMOS transistor serves as the output terminal of the first conversion circuit.
3. The reference voltage generating circuit according to claim 3, wherein the second conversion circuit comprises: a second comparator, a second NMOS transistor, a second resistor, a third PMOS transistor, and a fourth PMOS transistor; wherein :

The non-inverting input terminal of the second comparator is used as the input terminal of the second conversion circuit; the inverting input terminal of the second comparator is connected to the source of the second NMOS transistor, and the connection point is with one end of the second resistor Connected; the other end of the second resistor is grounded;

The output terminal of the second comparator is connected to the gate of the second NMOS transistor;

The gate of the third PMOS transistor is connected to its drain, and the connection point is connected to the drain of the second NMOS transistor;

The source of the third PMOS transistor and the source of the fourth PMOS transistor are both connected to a power source;

The gate of the fourth PMOS transistor is connected to the gate of the third PMOS transistor; the drain of the fourth PMOS transistor serves as the output terminal of the second conversion circuit.
The reference voltage generating circuit according to claim 2, wherein the bias conversion circuit comprises: a third comparator, a third NMOS transistor, a third resistor, a fifth PMOS transistor, and a sixth PMOS transistor; wherein :

The non-inverting input terminal of the third comparator serves as the input terminal of the bias conversion circuit; the inverting input terminal of the third comparator is connected to the source of the third NMOS transistor, and the connection point is connected to one end of the third resistor Connected; the other end of the third resistor is grounded;

The output terminal of the third comparator is connected to the gate of the third NOMS transistor;

The gate of the fifth PMOS transistor is connected to its drain, and the connection point is connected to the drain of the third NOMS transistor;

The source of the fifth PMOS transistor and the source of the sixth PMOS transistor are both connected to a power source;

The gate of the sixth PMOS transistor is connected to the gate of the fifth PMOS transistor; the drain of the sixth PMOS transistor is used as the output terminal of the bias conversion circuit.
The reference voltage generating circuit according to any one of claims 1 to 6, wherein the summing module includes a summing resistor, wherein: one end of the summing resistor is used as the input and output of the summing module The other end of the summing resistor is grounded.
A switching power supply, characterized in that it is used to provide a supply voltage for the output stage of a class AB audio power amplifier, comprising: a main circuit, and a reference voltage generating circuit according to any one of claims 1-7; wherein:

The reference voltage supply end of the main circuit is connected to the output end of the reference voltage generation circuit; the input end of the main circuit is used as the input end of the switching power supply; the output end of the main circuit is used as the switching power supply The output terminal.
The switching power supply according to claim 8, wherein the main circuit is used to receive the reference voltage signal output by the reference voltage generating circuit, and obtain at least one control signal after conversion, and the at least one control signal is used for controlling The on-off and voltage conversion between the input terminal and the output terminal of the main circuit.
The switching power supply according to claim 9, wherein the main circuit is any one of BUCK topology, BOOST topology, and BUCK_BOOST topology.
The switching power supply of claim 10, wherein the BOOST topology comprises:

The non-inverting input terminal is used as an error amplifier of the control terminal of the BOOST topology, and the inverting input terminal of the error amplifier receives a feedback voltage signal;

A pulse width modulation comparator whose positive input terminal is connected to the output terminal of the error amplifier; the negative input terminal of the pulse width modulation comparator receives a slope compensation voltage signal;

The input terminal of the switch tube driving unit is connected with the output terminal of the pulse width modulation comparator, the first output terminal of the switch driving unit is connected with the control terminal of the first power tube, and the second output terminal of the switch tube driving unit Connected to the control end of the second power tube;

The second end of the first power tube and the second end of the second power tube are connected to one end of the inductor;

The other end of the inductor is used as the input end of the BOOST topology;

The first end of the first power tube is used as the output end of the BOOST topology; the first end of the second power tube is grounded.
The switching power supply according to claim 11, wherein the first power tube is a PMOS power tube; and the second power tube is an NMOS power tube.
The switching power supply according to claim 12, wherein the first ends of the first power tube and the second power tube are both sources, and the first power tube and the second power tube have The second ends are both drains, and the control ends of the first power tube and the second power tube are both gates.