CN117294142B - Voltage conversion circuit - Google Patents

Voltage conversion circuit Download PDF

Info

Publication number
CN117294142B
CN117294142B CN202311576715.7A CN202311576715A CN117294142B CN 117294142 B CN117294142 B CN 117294142B CN 202311576715 A CN202311576715 A CN 202311576715A CN 117294142 B CN117294142 B CN 117294142B
Authority
CN
China
Prior art keywords
transistor
module
output
pole
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311576715.7A
Other languages
Chinese (zh)
Other versions
CN117294142A (en
Inventor
樊茂
葛利明
魏觅觅
张红
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Yinglian Electronic Technology Co ltd
Original Assignee
Shanghai Yinglian Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Yinglian Electronic Technology Co ltd filed Critical Shanghai Yinglian Electronic Technology Co ltd
Priority to CN202311576715.7A priority Critical patent/CN117294142B/en
Publication of CN117294142A publication Critical patent/CN117294142A/en
Application granted granted Critical
Publication of CN117294142B publication Critical patent/CN117294142B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a voltage conversion circuit. The first input end of an error amplifier in the voltage conversion circuit is used for inputting a reference signal, the second input end of the error amplifier is connected with the output end of the voltage conversion circuit, the third input end of the error amplifier is used for inputting a slope signal, the error amplifier is used for forming an error amplification signal according to the reference signal and the output voltage of the voltage conversion circuit, and the error amplification signal is offset according to the slope signal to form an error feedback signal; the comparison unit compares the error feedback signal with the current signal of the input transistor, and can output a pulse width modulation signal with gradually changing duty ratio in one period of the error feedback signal, so that the driving unit can control the switching frequencies of the input transistor and the output transistor to periodically change according to the frequency of the ramp signal according to the pulse width modulation signal, and noise interference of the voltage conversion circuit at the switching frequency point and the harmonic wave can be improved.

Description

Voltage conversion circuit
Technical Field
The embodiment of the invention relates to the technical field of voltage conversion, in particular to a voltage conversion circuit.
Background
In an electronic apparatus using a direct current source, a voltage converter is required to convert the voltage of a power supply into a desired operating voltage. Pulse width modulation (Pulse width modulation, PWM) voltage converters typically operate at a fixed switching frequency, making the voltage converters severely noisy at the switching frequency points and harmonics.
Disclosure of Invention
The invention provides a voltage conversion circuit, which is used for improving noise interference of the voltage conversion circuit at a switching frequency point and a harmonic wave.
The embodiment of the invention provides a voltage conversion circuit which comprises a comparison unit, a current detection unit, a driving unit, an input transistor, an output storage unit and an error amplifier, wherein the comparison unit is used for comparing the output voltage of the input transistor with the output voltage of the output storage unit;
the first input end of the error amplifier is used for inputting a reference signal, the second input end of the error amplifier is connected with the output end of the voltage conversion circuit, the third input end of the error amplifier is used for inputting a slope signal, the error amplifier is used for forming an error amplification signal according to the reference signal and the output voltage of the voltage conversion circuit, and the error amplification signal is offset according to the slope signal to form an error feedback signal;
The output end of the error amplifier is connected with the negative phase input end of the comparison unit, the positive phase input end of the comparison unit is connected with the output end of the current detection unit, the input end of the current detection unit and the first electrode of the input transistor are connected with the first voltage input end, the output end of the comparison unit is connected with the input end of the driving unit, the first output end of the driving unit is connected with the grid electrode of the input transistor, the second output end of the driving unit is connected with the grid electrode of the output transistor, the second electrode of the input transistor is connected with the first electrode of the output transistor and the input end of the output storage unit, the second electrode of the output transistor is connected with the second voltage input end, and the output end of the output storage unit serves as the output end of the voltage conversion circuit.
Optionally, the error amplifier includes a current control module, a first current mirror module, a current conversion module, a bias adjustment module, an error amplification module, and an output conversion module;
the input end of the current control module is used as a third input end of the error amplifier; the first end and the second end of the current control module are connected in series between the input end of the first current mirror module and the first power supply input end; the current control module is used for controlling a first mirror current of the first current mirror module according to the ramp signal;
The first power end of the first current mirror module is connected with the first power input end, the second power end of the first current mirror module is connected with the second power input end, and the output end of the first current mirror module is connected with the first end of the current conversion module and the second input end of the bias voltage adjustment module; the first current mirror module is used for providing the first mirror current for the current conversion module;
the second end of the current conversion module is connected with the first input end of the bias voltage adjustment module, and the third end of the current conversion module is connected with the second power input end; the current conversion module is used for adjusting the pressure difference between a first input end and a second input end of the bias voltage adjusting module according to the first mirror current;
the first output end of the bias voltage adjusting module is connected with the first output end of the error amplifying module and the first input end of the output conversion module, the second output end of the bias voltage adjusting module is connected with the second output end of the error amplifying module and the second input end of the output conversion module, the first input end of the error amplifying module is used as the first input end of the error amplifier, the second input end of the error amplifying module is used as the second input end of the error amplifier, and the output end of the output conversion module is used as the output end of the error amplifier; the bias adjustment module is used for outputting a bias signal according to the voltage difference between a first input end and a second input end of the bias adjustment module, the error amplification module is used for forming the error amplification signal for the reference signal and the output voltage, and the output conversion module is used for converting the bias signal and the error amplification signal into the error feedback signal.
Optionally, the error amplifier further comprises a second current mirror module;
the first power end of the second current mirror module is connected with the first power input end, the second power end of the second current mirror module is connected with the second power input end, the first output end of the second current mirror module is connected with the second power end of the bias voltage adjusting module, the second output end of the second current mirror module is connected with the power end of the error amplifying module, and the third output end of the second current mirror module is connected with the second power end of the output conversion module; the first power end of the bias voltage adjusting module and the first power end of the output conversion module are connected with the first power input end.
Optionally, the bias adjustment module includes a first transistor, a second transistor, a first resistor, and a second resistor;
the grid electrode of the first transistor is used as a first input end of the bias voltage adjusting module, the grid electrode of the second transistor is used as a second input end of the bias voltage adjusting module, a first pole of the first transistor and a first pole of the second transistor are used as second power supply ends of the bias voltage adjusting module, a second pole of the first transistor is connected with a first end of the first resistor and is used as a first output end of the bias voltage adjusting module, a second pole of the second transistor is connected with a first end of the second resistor and is used as a second output end of the bias voltage adjusting module, and a second end of the first resistor and a second end of the second resistor are used as first power supply ends of the bias voltage adjusting module.
Optionally, the current conversion module includes a third resistor and a fourth resistor;
the first end of the third resistor is used as the first end of the current conversion module, the second end of the third resistor is connected with the first end of the fourth resistor and is used as the second end of the current conversion module, and the second end of the fourth resistor is used as the third end of the current conversion module.
Optionally, the error amplification module includes a third transistor and a fourth transistor;
the grid electrode of the third transistor is used as a first input end of the error amplifying module, the grid electrode of the fourth transistor is used as a second input end of the error amplifying module, the first electrode of the third transistor and the first electrode of the fourth transistor are used as power supply ends of the error amplifying module, the second electrode of the third transistor is used as a first output end of the error amplifying module, and the second electrode of the fourth transistor is used as a second output end of the error amplifying module.
Optionally, the output conversion module includes a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor;
the grid electrode of the fifth transistor is used as the first input end of the output conversion module, the grid electrode of the sixth transistor is used as the second input end of the output conversion module, the first pole of the fifth transistor and the first pole of the sixth transistor are used as the second power supply end of the output conversion module, the second pole of the fifth transistor is connected with the first pole of the seventh transistor, the grid electrode of the seventh transistor and the grid electrode of the eighth transistor, the second pole of the sixth transistor is connected with the first pole of the eighth transistor and used as the output end of the output conversion module, and the second pole of the seventh transistor and the second pole of the eighth transistor are connected and used as the first power supply end of the output conversion module.
Optionally, the current control module includes a ninth transistor; the gate of the ninth transistor is used as the input end of the current control module, the first pole of the ninth transistor is used as the first end of the current control module, and the second pole of the ninth transistor is used as the second end of the current control module.
Optionally, the first current mirror module includes a tenth transistor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor;
the gate of the tenth transistor and the first pole of the tenth transistor are connected to the gate of the eleventh transistor and serve as the input terminal of the first current mirror module, the second pole of the tenth transistor and the second pole of the eleventh transistor serve as the second power supply terminal of the first current mirror module, the first pole of the eleventh transistor is connected to the gate of the twelfth transistor, the first pole of the twelfth transistor and the gate of the thirteenth transistor, the first pole of the thirteenth transistor serves as the output terminal of the first current mirror module, and the second pole of the twelfth transistor is connected to the second pole of the thirteenth transistor and serves as the first power supply terminal of the first current mirror module.
Optionally, the second current mirror module includes a current source, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, and a seventeenth transistor;
the first pole of the fourteenth transistor, the first pole of the fifteenth transistor, the first pole of the sixteenth transistor and the first pole of the seventeenth transistor are connected and serve as a second power supply terminal of the second current mirror module; the gate of the fourteenth transistor, the second pole of the fourteenth transistor, the gate of the fifteenth transistor, the gate of the sixteenth transistor and the gate of the seventeenth transistor are connected with the first end of the current source, the second end of the current source is used as the first power end of the second current mirror module, the second pole of the fifteenth transistor is used as the first output end of the second current mirror module, the second pole of the sixteenth transistor is used as the second output end of the second current mirror module, and the second pole of the seventeenth transistor is used as the third output end of the second current mirror module.
According to the technical scheme, an error amplifier is arranged to form an error amplified signal according to the reference signal and the output voltage of the voltage conversion circuit, and the error amplified signal is offset according to the ramp signal to form an error feedback signal. The frequency of the error feedback signal is smaller than the frequency of the current signal provided by the current detection unit. When the comparison unit compares the error feedback signal and the current signal, a pulse width modulation signal with gradually changing duty ratio can be output in one period of the error feedback signal, so that the driving unit can control the switching frequencies of the input transistor and the output transistor to periodically change according to the frequency of the ramp signal according to the pulse width modulation signal, and noise interference of the voltage conversion circuit at the switching frequency point and the harmonic wave can be improved.
Drawings
Fig. 1 is a schematic diagram of a voltage conversion circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an error amplifier according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a signal waveform according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Fig. 1 is a schematic diagram of a voltage conversion circuit according to an embodiment of the present invention. As shown in fig. 1, the voltage conversion circuit includes a comparison unit 10, a current detection unit 20, a driving unit 30, an input transistor 40, an output transistor 50, an output storage unit 60, and an error amplifier 70; the first input end VIN1 of the error amplifier 70 is used for inputting a reference signal, the second input end VIN2 of the error amplifier 70 is connected with the output end VOUT of the voltage conversion circuit, the third input end VIN3 of the error amplifier 70 is used for inputting a slope signal, the error amplifier 70 is used for forming an error amplified signal according to the reference signal and the output voltage of the voltage conversion circuit, and the error amplified signal is offset according to the slope signal to form an error feedback signal; the output terminal VOUT7 of the error amplifier 70 is connected to the negative phase input terminal VIN-of the comparison unit 10, the positive phase input terminal vin+ of the comparison unit 70 is connected to the output terminal VOUT2 of the current detection unit 20, the input terminal VIN4 of the current detection unit 20 and the first pole of the input transistor 40 are connected to the first voltage input terminal V1, the output terminal VOUT1 of the comparison unit 10 is connected to the input terminal VIN5 of the drive unit 30, the first output terminal VOUT31 of the drive unit 30 is connected to the gate of the input transistor 40, the second output terminal VOUT32 of the drive unit 30 is connected to the gate of the output transistor 50, the second pole of the input transistor 40 is connected to the first pole of the output transistor 50 and the input terminal VIN6 of the output memory unit 60, and the second pole of the output transistor 50 is connected to the second voltage input terminal V2, and the output terminal of the output memory unit 60 serves as the output terminal VOUT of the voltage conversion circuit.
Specifically, the error amplifier 70 may obtain the output voltage of the voltage conversion circuit, form an error amplified signal with the reference signal, and then offset the error amplified signal according to the ramp signal to form an error feedback signal. The error feedback signal is a ramp signal based on the error amplified signal such that the error feedback signal may vary according to the variation of the output voltage. After the error amplifier 70 outputs the error feedback signal, the error feedback signal is output to the negative phase input terminal VIN-of the comparing unit 10, and the current detecting unit 20 detects the current of the input transistor 40 when the input transistor 40 is turned on and converts the detected current into a voltage signal, and outputs the voltage signal to the positive input terminal vin+ of the comparing unit 10, so that the comparing unit 10 compares the error feedback signal with the current signal of the input transistor 40 and outputs a pulse width modulation signal. When the error feedback signal is greater than the current signal of the input transistor 40, the comparing unit 10 outputs a low level signal to the driving unit 30, the driving unit 30 can control the on time of the input transistor 40 to decrease according to the low level signal, and the on time of the output transistor 50 to increase, so that the output voltage of the voltage converting circuit can be reduced, and the error feedback signal can be further reduced. When the error feedback signal is smaller than the current signal of the input transistor 40, the comparing unit 10 outputs a high level signal to the driving unit 30, the driving unit 30 can control the on-time of the input transistor 40 according to the high level signal, and the on-time of the output transistor 50 is reduced, so that the output voltage of the voltage converting circuit can be increased, and the error feedback signal can be increased. Through the above-mentioned regulation process, the stability of the output voltage of the voltage conversion circuit can be improved.
In the above process, the frequency of the ramp signal is smaller than the frequency of the current signal, so that the frequency of the error feedback signal is smaller than the frequency of the current signal. At this time, the comparison unit 10 may compare the error feedback signal with the current signal of the input transistor 40 a plurality of times during one period of the error feedback signal. The error feedback signal gradually rises from the low level, so that the voltage of the error feedback signal gradually becomes larger when the comparison unit 10 performs comparison each time, so that the time for the comparison unit 10 to output the high level after each comparison is reduced, that is, the duty ratio of the pulse width modulation signal output by the comparison unit 10 is gradually reduced, so that the driving unit 30 can adjust the switching frequencies of the input transistor 40 and the output transistor 50 according to the pulse width modulation signal, and the switching frequencies of the input transistor 40 and the output transistor 50 are periodically changed according to the frequency of the ramp signal, thereby improving the noise interference of the voltage conversion circuit at the switching frequency point and the harmonic.
According to the technical scheme of the embodiment, an error amplifier is arranged to form an error amplified signal according to the reference signal and the output voltage of the voltage conversion circuit, and the error amplified signal is offset according to the ramp signal to form an error feedback signal. The frequency of the error feedback signal is smaller than the frequency of the current signal provided by the current detection unit. When the comparison unit compares the error feedback signal and the current signal, a pulse width modulation signal with gradually changing duty ratio can be output in one period of the error feedback signal, so that the driving unit can control the switching frequencies of the input transistor and the output transistor to periodically change according to the frequency of the ramp signal according to the pulse width modulation signal, and noise interference of the voltage conversion circuit at the switching frequency point and the harmonic wave can be improved.
Illustratively, with continued reference to fig. 1, the output storage unit 60 includes a storage inductance L1 and a storage capacitance C1, where a first end of the storage inductance L1 is connected between the input transistor 40 and the output transistor 50 as an input end VIN6 of the output storage unit 60, a second end of the storage inductance L1 is connected to the first end of the storage capacitance C1 and is used as an output end of the output storage unit 60, and a second end of the storage capacitance C1 is connected to the second voltage input end V2. The storage inductance L1 and the storage capacitance C1 may be used to store electrical energy while the output voltage may be filtered.
With continued reference to fig. 1, the voltage conversion circuit may further include a voltage dividing circuit 80, where the error amplifier 70 may be connected to the output terminal VOUT of the voltage conversion circuit through the voltage dividing circuit 80, and configured to feed back the output voltage after being divided by the voltage dividing circuit 80 to the error amplifier 70. The voltage dividing circuit 80 includes a first voltage dividing resistor RT1 and a second voltage dividing resistor RT2, where a first end of the first voltage dividing resistor RT1 is connected to an output end of the output storage unit 60, a second end of the first voltage dividing resistor RT1 is connected to a first end of the second voltage dividing resistor RT2, and is connected to a second input end VIN2 of the error amplifier 70 as an output end of the voltage dividing circuit 80, and a second end of the second voltage dividing resistor RT2 is connected to a second voltage input end V2, and by setting the voltage dividing circuit 80, the output voltage can be divided and fed back to the error amplifier 70, so that the error amplifier 70 performs error amplification according to the divided voltage.
Fig. 2 is a schematic structural diagram of an error amplifier according to an embodiment of the present invention. As shown in fig. 2, the error amplifier includes a current control module 71, a first current mirror module 72, a current conversion module 73, a bias adjustment module 74, an error amplification module 75, and an output conversion module 76; the input of the current control module 71 serves as the third input VIN3 of the error amplifier 70; the first and second ends of the current control module 71 are connected in series between the input end of the first current mirror module 72 and the first power input end VEE; the current control module 71 is configured to control a first mirror current of the first current mirror module 72 according to the ramp signal; a first power supply end of the first current mirror module 72 is connected to the first power supply input end VEE, a second power supply end of the first current mirror module 72 is connected to the second power supply input end VDD, and an output end of the first current mirror module 72 is connected to a first end of the current conversion module 73 and the second input end G2 of the bias adjustment module 74; the first current mirror module 72 is configured to provide a first mirror current to the current conversion module 73; a second end of the current conversion module 73 is connected to the first input end G1 of the bias adjustment module 74, and a third end of the current conversion module 73 is connected to the second power input end VDD; the current conversion module 73 is configured to adjust a voltage difference between the first input terminal G1 and the second input terminal G2 of the bias adjustment module 74 according to the first mirror current; the first output end S11 of the bias adjustment module 74 is connected to the first output end S21 of the error amplification module 75 and the first input end G5 of the output conversion module 76, the second output end S12 of the bias adjustment module 74 is connected to the second output end S22 of the error amplification module 75 and the second input end G6 of the output conversion module 76, the first input end S3 of the error amplification module 75 serves as the first input end VIN1 of the error amplifier, the second input end S4 of the error amplification module 75 serves as the second input end VIN2 of the error amplifier, and the output end S3 of the output conversion module 76 serves as the output end VOUT7 of the error amplifier; the bias adjustment module 74 is configured to output a bias signal according to a voltage difference between a first input terminal G1 and a second input terminal G2 of the bias adjustment module 74, the error amplification module 75 is configured to form an error amplified signal for the reference signal and the output voltage, and the output conversion module 76 is configured to convert the bias signal and the error amplified signal into an error feedback signal.
Specifically, referring to fig. 1 and 2, the input terminal of the current control module 71 inputs a ramp signal, and the conduction degree of the current control module 71 changes with the change of the ramp signal. In the period of the ramp signal, when the ramp signal gradually rises, the conduction degree of the current control module 71 increases, and the current supplied by the current control module 71 increases, so that the first mirror current of the first current mirror module 72 increases. The first current mirror module 72 mirrors the first mirror current to the first end of the current conversion module 73 through the mirror effect, the current conversion module 73 forms a voltage difference according to the first mirror current, and outputs the voltage difference to the first input end G1 and the second input end G2 of the bias adjustment module 74, the bias adjustment module 74 amplifies the voltage difference formed by the first mirror current and outputs the amplified voltage difference, meanwhile, the error amplification module 75 firstly performs error amplification on the reference signal and the output voltage input by the first input end G3 and the second input end G4 and outputs the amplified voltage, so that the output conversion module 76 can obtain the error amplification signal to overlap the bias signal output by the bias adjustment module 74, and the output conversion module 76 performs double-end to single-end conversion on the error amplification signal and the bias signal to form an error feedback signal. The ramp signal of the error feedback signal along with the change of the output voltage at this time, namely, the error information comprising the reference signal and the output voltage, and the information of the ramp signal. When the error feedback signal is output to the comparing unit 10, the comparing unit 10 can output a pulse width modulation signal with gradually changing duty ratio in one period of the error feedback signal when comparing the error feedback signal with the current signal, so that the driving unit can control the switching frequencies of the input transistor and the output transistor to periodically change according to the frequency of the ramp signal according to the pulse width modulation signal, and noise interference of the voltage converting circuit at the switching frequency point and the harmonic wave can be improved.
With continued reference to fig. 2, the error amplifier further includes a second current mirror module 78; the first power end of the second current mirror module 78 is connected to the first power input end VEE, the second power end of the second current mirror module 78 is connected to the second power input end VDD, the first output end vout1 of the second current mirror module 78 is connected to the second power end VDD1 of the bias voltage adjustment module 74, the second output end vout2 of the second current mirror module 78 is connected to the power end VDD2 of the error amplification module 75, and the third output end vout3 of the second current mirror module 78 is connected to the second power end VDD3 of the output conversion module 76; the first power terminal VEE1 of the bias voltage adjusting module 74 and the first power terminal VEE of the output converting module 76 are connected to the first power input VEE.
Specifically, the second current mirror module 78 is connected between the first power input VEE and the second power input VDD, and can provide the second mirror current to the bias voltage adjustment module 74, the error amplification module 75 and the output conversion module 76, so that the bias voltage adjustment module 74, the error amplification module 75 and the output conversion module 76 have constant currents. When the output conversion module 76 converts the bias signal and the error amplification signal into the error feedback signal, the influence of the current on the error feedback signal can be avoided.
With continued reference to fig. 2 based on the above aspects, the bias adjustment module 74 includes a first transistor T1, a second transistor T2, a first resistor R1, and a second resistor R2; the gate of the first transistor T1 is used as the first input terminal G1 of the bias adjustment module 74, the gate of the second transistor T2 is used as the second input terminal G2 of the bias adjustment module 75, the first pole of the first transistor T1 and the first pole of the second transistor T2 are used as the second power terminal vdd1 of the bias adjustment module 74, the second pole of the first transistor T1 is connected to the first end of the first resistor R1 and is used as the first output terminal S11 of the bias adjustment module 74, the second pole of the second transistor T2 is connected to the first end of the second resistor R2 and is used as the second output terminal S12 of the bias adjustment module 74, and the second end of the first resistor R1 and the second end of the second resistor R2 are used as the first power terminal vee1 of the bias adjustment module 74.
Specifically, as can be seen from fig. 2, the gate of the first transistor T1 is connected to the second terminal of the current conversion module 73, and the gate of the second transistor T2 is connected to the first terminal of the current conversion module 73. In the operation process, the potential of the third terminal of the current conversion module 73 is fixed, so that the difference between the potential of the first terminal and the potential of the second terminal of the current conversion module 73 changes along with the first mirror current, and the difference is output to the gate of the second transistor T2 and the gate of the first transistor T1, respectively, so that the voltage difference between the gate of the first transistor T1 and the gate of the second transistor T2 can change according to the first mirror current. The first mirror current varies according to the ramp signal, so that a voltage difference between the gate of the first transistor T1 and the gate of the second transistor T2 can be varied according to the ramp signal. And then amplified and output through the first transistor T1 and the second transistor T2. Meanwhile, the error amplifying module 75 performs error amplification on the reference signal and the output voltage input by the first input end G3 and the second input end G4, so that the output converting module 76 can obtain the bias signal output by the error amplifying signal superposition bias adjusting module 74, and the output converting module 76 performs double-end to single-end conversion on the error amplifying signal and the bias signal, thereby forming an error feedback signal. In addition, the resistances of the first resistor R1 and the second resistor R2 may be equal, and the accuracy of the voltage difference between the first output terminal S11 and the second output terminal S12 of the bias adjustment module 74 may be improved on the basis of limiting the current passing through the first transistor T1 and the second transistor T2.
With continued reference to fig. 2, the current conversion module 73 includes a third resistor R3 and a fourth resistor R4; the first end of the third resistor R3 is used as the first end of the current conversion module 73, the second end of the third resistor R3 is connected with the first end of the fourth resistor R4 and is used as the second end of the current conversion module 73, and the second end of the fourth resistor R4 is used as the third end of the current conversion module 73.
Specifically, when the first current mirror module 72 outputs the first mirror current, a voltage drop is formed when the first mirror current passes through the third resistor R3. As the first mirror current increases, the voltage drop across the third resistor R3 increases, so that the voltage difference across the first input terminal G1 and the second input terminal G2 of the bias adjustment module 74 increases, and the bias signal output by the bias adjustment module 74 can be changed according to the ramp signal and output to the output conversion module 76. In addition, the voltage drop across the fourth resistor R4 also increases, and when the second end of the fourth resistor R4 is connected to the second power input terminal VDD, the potential at the first end of the third resistor R3 continues to decrease. When the bias adjustment module 74 includes the first transistor T1 and the second transistor T2, the first transistor T1 and the second transistor T2 are P-type transistors, the turn-on degree of the first transistor T1 and the second transistor T2 can be increased.
With continued reference to fig. 2, the error amplifying module 75 includes a third transistor T3 and a fourth transistor T4; the gate of the third transistor T3 is used as the first input terminal G3 of the error amplifying module 75, the gate of the fourth transistor T4 is used as the second input terminal G4 of the error amplifying module 75, the first pole of the third transistor T3 and the first pole of the fourth transistor T4 are used as the power supply terminal vdd2 of the error amplifying module 75, the second pole of the third transistor T3 is used as the first output terminal S21 of the error amplifying module 75, and the second pole of the fourth transistor T4 is used as the second output terminal S22 of the error amplifying module 75.
Specifically, the gate of the third transistor T3 inputs the reference signal, and the gate of the fourth transistor T4 inputs the output voltage. The first poles of the third transistor T3 and the first poles of the fourth transistor T4 are both input with the second mirror current, so that the third transistor T3 and the fourth transistor T4 perform error amplification on the reference signal and the output voltage, and form an error amplified signal to be output to the output conversion module 76, after the output conversion module 76 obtains the error amplified signal and the bias signal, the error amplified signal and the bias signal can be superimposed, and the superimposed signal is converted into a single-ended output error feedback signal to be output to the comparison unit 10, and the comparison unit 10 forms a periodically varying pulse width modulation signal according to the error feedback signal and the detected current signal of the input transistor 40, thereby enabling the driving unit 30 to adjust the switching frequencies of the input transistor 40 and the output transistor 50 according to the pulse width modulation signal, enabling the switching frequencies of the input transistor 40 and the output transistor 50 to periodically vary according to the frequency of the ramp signal, and further improving noise interference of the voltage conversion circuit at the switching frequency point and the harmonic.
With continued reference to fig. 2 based on the above aspects, the output conversion module 76 includes a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor T8; the gate of the fifth transistor T5 is used as the first input terminal G5 of the output conversion module 76, the gate of the sixth transistor T6 is used as the second input terminal G6 of the output conversion module 76, the first pole of the fifth transistor T5 and the first pole of the sixth transistor T6 are used as the second power supply terminal vdd3 of the output conversion module 76, the second pole of the fifth transistor T5 is connected to the first pole of the seventh transistor T7, the gate of the seventh transistor T7 and the gate of the eighth transistor T8, the second pole of the sixth transistor T6 is connected to the first pole of the eighth transistor T8 and is used as the output terminal S3 of the output conversion module 76, the second pole of the seventh transistor T7 and the second pole of the eighth transistor T8 are connected and are used as the first power supply terminal vee2 of the output conversion module 76.
Specifically, the gate of the fifth transistor T5 is connected to the first output terminal S11 of the bias adjustment module 74 and the first output terminal S21 of the error amplification module 75, and the gate of the sixth transistor T6 is connected to the second output terminal S12 of the bias adjustment module 74 and the second output terminal S22 of the error amplification module 75, so that the gate of the fifth transistor T5 and the gate of the sixth transistor T6 respectively acquire the bias signal and the error amplification signal output from the two terminals. Then, the fifth transistor T5 and the sixth transistor T6 perform a second-stage amplification on the superimposed signal of the bias signal and the error amplified signal, and output the superimposed signal as an input signal to a current mirror formed by the seventh transistor T7 and the eighth transistor T8, where the mirror effect of the current mirror may enable the two-stage amplified two-terminal signal to be converted into a single-terminal signal, that is, an error feedback signal, and output the error feedback signal through the first pole of the eighth transistor T8.
With continued reference to fig. 2, the current control module 71 includes a ninth transistor T9; the gate of the ninth transistor T9 is provided as an input of the current control module 71, the first pole of the ninth transistor T9 is provided as a first terminal of the current control module 71, and the second pole of the ninth transistor T9 is provided as a second terminal of the current control module 71.
Specifically, the gate of the ninth transistor T9 serves as the third input terminal VIN3 of the error amplifier 70 for inputting the ramp signal. The ninth transistor T9 is exemplarily shown as an N-type transistor in fig. 2. When the ramp signal gradually rises in the period, the turn-on degree of the ninth transistor T9 increases, the equivalent impedance of the ninth transistor T9 decreases, so that the equivalent impedance between the two ends of the first power input terminal VEE and the second power input terminal VDD decreases, and the current increases, i.e., the first mirror current in the first current mirror module 72 increases, so that the ramp signal can control the first mirror current.
With continued reference to fig. 2, the error amplifier may further include a fifth resistor R5, the fifth resistor R5 being connected in series between the ninth transistor T9 and the first power input VEE, and the ninth transistor T9 may be current limited by connecting the fifth resistor R5 in series between the ninth transistor T9 and the first power input VEE, so that the first mirror current may be limited.
With continued reference to fig. 2 based on the above aspects, the first current mirror module 72 includes a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, and a thirteenth transistor T13; the gate of the tenth transistor T10 and the first pole of the tenth transistor T10 are connected to the gate of the eleventh transistor T11 and serve as the input terminal of the first current mirror block 72, the second pole of the tenth transistor T10 and the second pole of the eleventh transistor T11 serve as the second power supply terminal of the first current mirror block 72, the first pole of the eleventh transistor T11 is connected to the gate of the twelfth transistor T12, the first pole of the twelfth transistor T12 and the gate of the thirteenth transistor T13, the first pole of the thirteenth transistor T13 serves as the output terminal of the first current mirror block 72, and the second pole of the twelfth transistor T12 is connected to the second pole of the thirteenth transistor T13 and serves as the first power supply terminal of the first current mirror block 72.
Specifically, the gate of the tenth transistor T10 and the gates of the first pole of the tenth transistor T10 and the eleventh transistor T11 are connected to the current control module 71 for obtaining the current supplied by the current control module 71. The tenth transistor T10 and the eleventh transistor T11 constitute a first set of current mirrors, and the current supplied by the current control module 71 is mirrored to the first pole of the eleventh transistor T11 by mirroring according to the mirroring ratio of the first set of current mirrors. The first pole of the eleventh transistor T11 serves as an output terminal of the first set of current mirrors for outputting the first mirrored current provided by the current control module 71 to the first pole of the twelfth transistor T12. And the twelfth transistor T12 and the third transistor T13 form a second set of current mirrors, and by the mirroring effect of the second set of current mirrors, the currents output by the first set of current mirrors can be mirrored to the first pole of the thirteenth transistor T13 according to the mirroring ratio of the second set of current mirrors and output to the current conversion module 73 as the first mirrored currents, so that the current conversion module 73 adjusts the voltage difference between the first input terminal G1 and the second input terminal G2 of the bias adjustment module 74 according to the first mirrored currents.
With continued reference to fig. 2 based on the above aspects, the second current mirror module 78 includes a current source I1, a fourteenth transistor T14, a fifteenth transistor T15, a sixteenth transistor T16, and a seventeenth transistor T17; the first pole of the fourteenth transistor T14, the first pole of the fifteenth transistor T15, the first pole of the sixteenth transistor T16 and the first pole of the seventeenth transistor T17 are connected and serve as a second power supply terminal of the second current mirror module 78; the gate of the fourteenth transistor T14, the second pole of the fourteenth transistor T14, the gate of the fifteenth transistor T15, the gate of the sixteenth transistor T16 and the gate of the seventeenth transistor T17 are connected to the first terminal of the current source I1, the second terminal of the current source I2 is the first power terminal of the second current mirror module 78, the second pole of the fifteenth transistor T15 is the first output terminal vout1 of the second current mirror module 78, the second pole of the sixteenth transistor T16 is the second output terminal vout2 of the second current mirror module 78, and the second pole of the seventeenth transistor T17 is the third output terminal vout3 of the second current mirror module 78.
Specifically, the current source I1 is configured to provide a constant current, output the constant current to the fourteenth transistor T14, and mirror the constant current to the fifteenth transistor T15, the sixteenth transistor T16, and the seventeenth transistor T17 according to a mirror ratio through a mirror effect, so that the fifteenth transistor T15, the sixteenth transistor T16, and the seventeenth transistor T17 output mirrored currents respectively, that is, the second mirrored current. Thus, constant current can be provided for the bias voltage adjusting module 74, the error amplifying module 75 and the output converting module 76, and accuracy in the working process of the bias voltage adjusting module 74, the error amplifying module 75 and the output converting module 76 is improved.
Fig. 3 is a schematic diagram of a signal waveform according to an embodiment of the present invention. Wherein the abscissa is time and the ordinate is voltage (V). slope is a ramp signal, VIR is the voltage difference between the first and second ends of the current conversion module 73, V (G1-G2) To bias the voltage difference between the first input terminal G1 and the second input terminal G2 of the adjustment module 74, vout7 is an error feedback signal output by the error amplifier 70, vin+ is a current signal output by the current detection unit 20, and vout1 is a pulse width adjustment signal output by the comparison unit 10. As shown in fig. 3, when the error feedback signal output by the error amplifier 70 is a ramp signal and the frequency of the current signal is greater than the frequency of the error feedback signal, the comparison unit 10 may compare the error feedback signal and the current signal multiple times in one period of the error feedback signal, and the duty ratio of the pwm signal output by the comparison unit 10 is gradually reduced, so that the driving unit 30 may adjust the switching frequencies of the input transistor 40 and the output transistor 50 according to the pwm signal, so that the switching frequencies of the input transistor 40 and the output transistor 50 periodically change according to the frequency of the ramp signal, thereby improving noise interference of the voltage conversion circuit at the switching frequency point and at the harmonic.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.

Claims (9)

1. The voltage conversion circuit is characterized by comprising a comparison unit, a current detection unit, a driving unit, an input transistor, an output storage unit and an error amplifier;
the first input end of the error amplifier is used for inputting a reference signal, the second input end of the error amplifier is connected with the output end of the voltage conversion circuit, the third input end of the error amplifier is used for inputting a slope signal, the error amplifier is used for forming an error amplification signal according to the reference signal and the output voltage of the voltage conversion circuit, and the error amplification signal is offset according to the slope signal to form an error feedback signal;
The output end of the error amplifier is connected with the negative phase input end of the comparison unit, the positive phase input end of the comparison unit is connected with the output end of the current detection unit, the input end of the current detection unit and the first pole of the input transistor are connected with the first voltage input end, the output end of the comparison unit is connected with the input end of the driving unit, the first output end of the driving unit is connected with the grid electrode of the input transistor, the second output end of the driving unit is connected with the grid electrode of the output transistor, the second pole of the input transistor is connected with the first pole of the output transistor and the input end of the output storage unit, the second pole of the output transistor is connected with the second voltage input end, and the output end of the output storage unit is used as the output end of the voltage conversion circuit;
the error amplifier comprises a current control module, a first current mirror module, a current conversion module, a bias voltage adjustment module, an error amplification module and an output conversion module;
the input end of the current control module is used as a third input end of the error amplifier; the first end and the second end of the current control module are connected in series between the input end of the first current mirror module and the first power supply input end; the current control module is used for controlling a first mirror current of the first current mirror module according to the ramp signal;
The first power end of the first current mirror module is connected with the first power input end, the second power end of the first current mirror module is connected with the second power input end, and the output end of the first current mirror module is connected with the first end of the current conversion module and the second input end of the bias voltage adjustment module; the first current mirror module is used for providing the first mirror current for the current conversion module;
the second end of the current conversion module is connected with the first input end of the bias voltage adjustment module, and the third end of the current conversion module is connected with the second power input end; the current conversion module is used for adjusting the pressure difference between a first input end and a second input end of the bias voltage adjusting module according to the first mirror current;
the first output end of the bias voltage adjusting module is connected with the first output end of the error amplifying module and the first input end of the output conversion module, the second output end of the bias voltage adjusting module is connected with the second output end of the error amplifying module and the second input end of the output conversion module, the first input end of the error amplifying module is used as the first input end of the error amplifier, the second input end of the error amplifying module is used as the second input end of the error amplifier, and the output end of the output conversion module is used as the output end of the error amplifier; the bias adjustment module is used for outputting a bias signal according to the voltage difference between a first input end and a second input end of the bias adjustment module, the error amplification module is used for forming the error amplification signal for the reference signal and the output voltage, and the output conversion module is used for converting the bias signal and the error amplification signal into the error feedback signal.
2. The voltage conversion circuit of claim 1, wherein the error amplifier further comprises a second current mirror module;
the first power end of the second current mirror module is connected with the first power input end, the second power end of the second current mirror module is connected with the second power input end, the first output end of the second current mirror module is connected with the second power end of the bias voltage adjusting module, the second output end of the second current mirror module is connected with the power end of the error amplifying module, and the third output end of the second current mirror module is connected with the second power end of the output conversion module; the first power end of the bias voltage adjusting module and the first power end of the output conversion module are connected with the first power input end.
3. The voltage conversion circuit according to claim 1 or 2, wherein the bias adjustment module includes a first transistor, a second transistor, a first resistor, and a second resistor;
the grid electrode of the first transistor is used as a first input end of the bias voltage adjusting module, the grid electrode of the second transistor is used as a second input end of the bias voltage adjusting module, a first pole of the first transistor and a first pole of the second transistor are used as second power supply ends of the bias voltage adjusting module, a second pole of the first transistor is connected with a first end of the first resistor and is used as a first output end of the bias voltage adjusting module, a second pole of the second transistor is connected with a first end of the second resistor and is used as a second output end of the bias voltage adjusting module, and a second end of the first resistor and a second end of the second resistor are used as first power supply ends of the bias voltage adjusting module.
4. The voltage conversion circuit according to claim 1 or 2, wherein the current conversion module includes a third resistor and a fourth resistor;
the first end of the third resistor is used as the first end of the current conversion module, the second end of the third resistor is connected with the first end of the fourth resistor and is used as the second end of the current conversion module, and the second end of the fourth resistor is used as the third end of the current conversion module.
5. The voltage conversion circuit according to claim 1 or 2, wherein the error amplification module includes a third transistor and a fourth transistor;
the grid electrode of the third transistor is used as a first input end of the error amplifying module, the grid electrode of the fourth transistor is used as a second input end of the error amplifying module, the first electrode of the third transistor and the first electrode of the fourth transistor are used as power supply ends of the error amplifying module, the second electrode of the third transistor is used as a first output end of the error amplifying module, and the second electrode of the fourth transistor is used as a second output end of the error amplifying module.
6. The voltage conversion circuit according to claim 1 or 2, wherein the output conversion module includes a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor;
The grid electrode of the fifth transistor is used as the first input end of the output conversion module, the grid electrode of the sixth transistor is used as the second input end of the output conversion module, the first pole of the fifth transistor and the first pole of the sixth transistor are used as the second power supply end of the output conversion module, the second pole of the fifth transistor is connected with the first pole of the seventh transistor, the grid electrode of the seventh transistor and the grid electrode of the eighth transistor, the second pole of the sixth transistor is connected with the first pole of the eighth transistor and used as the output end of the output conversion module, and the second pole of the seventh transistor and the second pole of the eighth transistor are connected and used as the first power supply end of the output conversion module.
7. The voltage conversion circuit according to claim 1 or 2, wherein the current control module includes a ninth transistor; the gate of the ninth transistor is used as the input end of the current control module, the first pole of the ninth transistor is used as the first end of the current control module, and the second pole of the ninth transistor is used as the second end of the current control module.
8. The voltage conversion circuit according to claim 1 or 2, wherein the first current mirror module includes a tenth transistor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor;
the gate of the tenth transistor and the first pole of the tenth transistor are connected to the gate of the eleventh transistor and serve as the input terminal of the first current mirror module, the second pole of the tenth transistor and the second pole of the eleventh transistor serve as the second power supply terminal of the first current mirror module, the first pole of the eleventh transistor is connected to the gate of the twelfth transistor, the first pole of the twelfth transistor and the gate of the thirteenth transistor, the first pole of the thirteenth transistor serves as the output terminal of the first current mirror module, and the second pole of the twelfth transistor is connected to the second pole of the thirteenth transistor and serves as the first power supply terminal of the first current mirror module.
9. The voltage conversion circuit according to claim 2, wherein the second current mirror module includes a current source, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, and a seventeenth transistor;
The first pole of the fourteenth transistor, the first pole of the fifteenth transistor, the first pole of the sixteenth transistor and the first pole of the seventeenth transistor are connected and serve as a second power supply terminal of the second current mirror module; the gate of the fourteenth transistor, the second pole of the fourteenth transistor, the gate of the fifteenth transistor, the gate of the sixteenth transistor and the gate of the seventeenth transistor are connected with the first end of the current source, the second end of the current source is used as the first power end of the second current mirror module, the second pole of the fifteenth transistor is used as the first output end of the second current mirror module, the second pole of the sixteenth transistor is used as the second output end of the second current mirror module, and the second pole of the seventeenth transistor is used as the third output end of the second current mirror module.
CN202311576715.7A 2023-11-24 2023-11-24 Voltage conversion circuit Active CN117294142B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311576715.7A CN117294142B (en) 2023-11-24 2023-11-24 Voltage conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311576715.7A CN117294142B (en) 2023-11-24 2023-11-24 Voltage conversion circuit

Publications (2)

Publication Number Publication Date
CN117294142A CN117294142A (en) 2023-12-26
CN117294142B true CN117294142B (en) 2024-02-06

Family

ID=89252045

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311576715.7A Active CN117294142B (en) 2023-11-24 2023-11-24 Voltage conversion circuit

Country Status (1)

Country Link
CN (1) CN117294142B (en)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010051152A (en) * 2008-08-25 2010-03-04 Ricoh Co Ltd Current mode control type switching regulator
CN202524290U (en) * 2012-03-29 2012-11-07 武汉市康达电气有限公司 High-voltage power supply with linearly increasing voltage
CN106374742A (en) * 2016-11-08 2017-02-01 上海贝岭股份有限公司 Switching power supply output frequency regulating circuit
JP2018164394A (en) * 2017-03-27 2018-10-18 ローム株式会社 Switching power supply and ground fault detection method thereof
CN111934546A (en) * 2020-08-10 2020-11-13 昂宝电子（上海）有限公司 Switching regulator control system and switching regulator
CN112803770A (en) * 2021-03-17 2021-05-14 电子科技大学 Self-adaptive slope compensation circuit
CN116317996A (en) * 2023-05-23 2023-06-23 盈力半导体(上海)有限公司 Error amplifier and power supply conversion device
CN116317551A (en) * 2023-01-09 2023-06-23 晶艺半导体有限公司 Slope compensation circuit and related control circuit and method
CN116760294A (en) * 2023-08-21 2023-09-15 上海英联电子科技有限公司 Direct-current voltage conversion circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3373432B1 (en) * 2017-03-10 2021-05-12 Rohm Co., Ltd. Dc-dc converter

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010051152A (en) * 2008-08-25 2010-03-04 Ricoh Co Ltd Current mode control type switching regulator
CN202524290U (en) * 2012-03-29 2012-11-07 武汉市康达电气有限公司 High-voltage power supply with linearly increasing voltage
CN106374742A (en) * 2016-11-08 2017-02-01 上海贝岭股份有限公司 Switching power supply output frequency regulating circuit
JP2018164394A (en) * 2017-03-27 2018-10-18 ローム株式会社 Switching power supply and ground fault detection method thereof
CN111934546A (en) * 2020-08-10 2020-11-13 昂宝电子（上海）有限公司 Switching regulator control system and switching regulator
CN112803770A (en) * 2021-03-17 2021-05-14 电子科技大学 Self-adaptive slope compensation circuit
CN116317551A (en) * 2023-01-09 2023-06-23 晶艺半导体有限公司 Slope compensation circuit and related control circuit and method
CN116317996A (en) * 2023-05-23 2023-06-23 盈力半导体(上海)有限公司 Error amplifier and power supply conversion device
CN116760294A (en) * 2023-08-21 2023-09-15 上海英联电子科技有限公司 Direct-current voltage conversion circuit

Also Published As

Publication number Publication date
CN117294142A (en) 2023-12-26

Similar Documents

Publication Publication Date Title
CN107623495B (en) Low noise circuit
US8508297B2 (en) Envelope amplifier
CN109068240B (en) Digital audio power amplifier system
WO2020147637A1 (en) Reference voltage generation circuit and switched-mode power supply
CN110708028B (en) Digital audio power amplifier
CN112583250A (en) LLC resonant transformation ware control circuit and LLC resonant transformation circuit
CN116317996B (en) Error amplifier and power supply conversion device
EP2602932A1 (en) Power modulator, and method for controlling same
CN116015061A (en) Slope compensation circuit, method for generating ramp compensation signal and electronic chip
CN108566165B (en) Control circuit, power amplification circuit and control method
CN117294142B (en) Voltage conversion circuit
JP7204440B2 (en) power amplifier
CN114337266B (en) Switching power supply and control circuit for switching power supply
US11205999B2 (en) Amplifier with signal dependent mode operation
US7701283B2 (en) Power amplifier with noise shaping
CN111404497B (en) Digital audio power amplifier
CN110380698B (en) Linear amplifier
JP2007209038A (en) Power amplifier circuit
CN210835776U (en) DC level adjusting circuit
CN110299843B (en) Composite DCDC circuit
CN109639135B (en) Charge pump circuit
CN111464141A (en) Digital audio power amplifier and electronic equipment
CN212726859U (en) Isolation booster circuit
CN110266281B (en) Band gap transconductance amplifier applied to BOOST current operation
CN113067466B (en) Voltage source circuit and power management chip

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant