CN116317551A - Slope compensation circuit and related control circuit and method - Google Patents
Slope compensation circuit and related control circuit and method Download PDFInfo
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- CN116317551A CN116317551A CN202310026665.9A CN202310026665A CN116317551A CN 116317551 A CN116317551 A CN 116317551A CN 202310026665 A CN202310026665 A CN 202310026665A CN 116317551 A CN116317551 A CN 116317551A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
- H02M1/15—Arrangements for reducing ripples from dc input or output using active elements
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present disclosure provides a slope compensation circuit, and a control circuit and method. The slope compensation circuit has a first filter circuit, a second filter circuit, a third filter circuit, and a difference amplification circuit. The first filter circuit filters voltages on a common node of the upper and lower tubes of the switching converter to generate a first filtered signal. The second filter circuit filters the first filtered signal to generate a second filtered signal. The third filter circuit filters the second filtered signal to generate a third filtered signal. The difference amplifying circuit makes a difference between the first filtered signal and the second filtered signal and amplifies the difference by k times to generate a ramp signal, wherein the value of k is determined by the value of the third filtered signal. The ramp signal generated by the harmonic compensation circuit can change along with the change of the output voltage, so that the ratio of the ramp signal to the ripple signal of the feedback voltage is constant, and the optimal dynamic response of the system can be realized under different output voltages.
Description
Technical Field
The present invention relates to electronic circuits, and more particularly to a slope compensation circuit in a switching converter and related control circuits and methods.
Background
With the rapid development of consumer electronics markets, switching converters have also been widely used, and requirements for output voltage ranges and load transient characteristics have been increasing, so that rapid dynamic load change responses at different output voltages are required, and stability of the output voltage is maintained.
For example, in the COT control circuit, the on and off of the power switch is controlled by comparing an external voltage feedback signal with a reference voltage directly input to a comparator, so that the duty ratio of the power switch can be rapidly changed when the load jumps, thereby realizing rapid load transient response. However, since the external voltage feedback signal has a certain delay, the loop stability is greatly affected in the negative feedback system. In order to ensure the stability of the loop, a virtual current ripple is added in the COT control circuit to compensate the external voltage feedback signal so as to avoid oscillation of the system. However, the ripple of the voltage feedback signal varies with the output voltage, and the compensation current ripple is determined by the internal compensation circuit, which is difficult to change. Therefore, under different output voltages, the transient response of the circuit can be greatly changed, and the optimal dynamic response function can not be realized at the same time.
Disclosure of Invention
The present invention is directed to solving the above-mentioned problems of the prior art and providing a slope compensation circuit for a switching converter and related control circuit and method. The compensation circuit proposed by this publication solves the above-mentioned problems. The ramp signal generated by the ramp compensation circuit can change according to the change of the output voltage, and even under different output voltages, the constant ratio of the ramp signal to the ripple signal of the feedback voltage can be ensured, so that the optimal dynamic response function is realized.
According to an aspect of the present invention, there is provided a slope compensation circuit for a switching converter having an upper pipe and a lower pipe, the slope compensation circuit comprising: a first filter circuit having an input and an output, the input of the first filter circuit being coupled to a common node of the upper and lower pipes, the first filter circuit filtering a voltage of the common node to generate a first filtered signal at the output of the first filter circuit; the second filter circuit is provided with an input end and an output end, the input end of the second filter circuit receives the first filter signal, and the second filter circuit filters the first filter signal to generate a second filter signal at the output end of the second filter circuit; the third filter circuit is provided with an input end and an output end, the input end of the third filter circuit receives the second filter signal, and the third filter circuit filters the second filter signal to generate a third filter signal at the output end of the third filter circuit; and a difference amplifying circuit receiving the first, second and third filtered signals, differencing the first and second filtered signals, and amplifying the difference between the first and second filtered signals by k times to generate a ramp signal, wherein the value of k is determined by the value of the third filtered signal.
According to another aspect of the present invention, there is provided a control circuit for a switching converter, wherein the switching converter includes an upper pipe and a lower pipe, and an input voltage is converted into an output voltage by controlling on and off of the upper pipe and the lower pipe, the control circuit comprising: a ramp compensation circuit as described above for generating a ramp signal; the first input end of the comparison circuit receives the sum of the voltage feedback signal and the ramp signal, the second input end of the comparison circuit receives the reference voltage signal, and the comparison circuit compares the sum of the voltage feedback signal and the ramp signal with the reference voltage signal to generate a comparison signal, wherein the voltage feedback signal represents the output voltage; and a logic circuit for receiving the comparison signal and generating a control signal according to the comparison signal to control the upper tube and the lower tube of the switching converter
According to still another aspect of the present invention, there is provided a ramp signal generating method for a switching converter having an upper pipe and a lower pipe, the ramp signal generating method including: filtering the voltage on the common node of the upper pipe and the lower pipe to generate a first filtering signal; filtering the first filtering signal to generate a second filtering signal; filtering the second filtering signal to generate a third filtering signal; and amplifying the difference between the first filtered signal and the second filtered signal by k times to generate a ramp signal, wherein the k value is determined by the value of the third filtered signal.
Drawings
FIG. 1 is a schematic diagram of a switching converter with a slope compensation circuit according to one embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of a slope compensation circuit according to one embodiment of the invention;
FIG. 3 is a schematic circuit diagram of a slope compensation circuit according to yet another embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of an error amplifier 1041 according to one embodiment of the invention;
fig. 5 is a flowchart of a ramp signal generating method for a switching converter according to an embodiment of the invention.
As shown in the drawings, like reference numerals refer to like parts throughout the different views. The drawings are provided for the purpose of illustrating embodiments, concepts, etc. and are not drawn to scale.
Detailed Description
Specific embodiments of the invention will now be described, without limitation, with reference to the accompanying drawings. Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. The verbs "comprise" and "have" are used herein as open limits, which neither exclude nor require that there be unrecited features. Features recited in the dependent claims may be freely combined with each other unless explicitly stated otherwise. Use of "a" or "an" throughout a document "
(i.e., singular reference of an element does not exclude the plural reference of such elements). Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Unless otherwise indicated, the term "connected" is used to designate a direct electrical connection between circuit elements, while the term "coupled" is used to designate an electrical connection between circuit elements that may be direct or may be via one or more other elements. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. When referring to the voltage of a node or terminal, unless indicated otherwise, the voltage is considered to be the voltage between that node and a reference potential (typically ground). Further, when referring to the potential of a node or terminal, unless otherwise indicated, the potential is considered to refer to a reference potential. The voltages and potentials of a given node or a given terminal will be further designated with the same reference numerals. A signal that alternates between a first logic state (e.g., a logic low state) and a second logic state (e.g., a logic high state) is referred to as a "logic signal. The high and low states of different logic signals of the same electronic circuit may be different. In particular, the high and low states of the logic signal may correspond to voltages or currents that may not be entirely constant in the high or low states.
Fig. 1 is a circuit schematic of a switching converter with a slope compensation circuit according to one embodiment of the present invention. In the embodiment shown in fig. 1, the switching converter comprises a switching circuit 10, a capacitor Cout, a supply voltage feedback circuit 20 and a control circuit. The slope compensation circuit is included in the control circuit for ensuring the stability of the whole switching converter and realizing the optimal dynamic response function of the switching converter.
An input terminal of the switching circuit 10 receives an input voltage signal Vin; the output of the switching circuit 10 is coupled to the output of the switching converter. The capacitor Cout is coupled between the output of the switching converter and the reference ground, providing the output voltage signal Vout. In one embodiment, the switching circuit 10 includes at least one controllable switching tube. The switch circuit 10 receives a control signal, and the control signal switches on and off by controlling a controllable switch in the switch circuit 10, so as to convert the input voltage signal Vin into the output voltage signal Vout.
In the embodiment shown in fig. 1, the switching circuit 10 is illustrated as a switching circuit of a BUCK topology, and the circuit principle will be described below by taking the BUCK topology as an example. Those of ordinary skill in the art will appreciate that in other embodiments, the switching circuit 10 may be illustrated as other types of suitable isolated or non-isolated topologies, such as a BOOST topology, a BUCK-BOOST topology, a Z-topology, a CUK topology, a fliback topology, and the like.
As shown in fig. 1, an upper pipe HS and a lower pipe LS in the BUCK topology are coupled in series between an input terminal of the switching circuit 10 and a reference ground, and a common node of the upper pipe HS and the lower pipe LS is denoted as a switching node SW. An inductance L is coupled between the switching node SW and the output of the switching circuit 10. The control signal includes a control signal CTL and an inverted signal of the control signal CTL
Wherein the control signal CTL is used for controlling the on-off switching of the upper tube HS, and the inversion signal +.>
For controlling the on and off switching of the down tube LS. Those of ordinary skill in the art will appreciate that: inverted signal of control signal CTL>
Refers to a signal logically complementary to the control signal CTL.
In the embodiment shown in fig. 1, the upper tube HS and the lower tube LS are illustrated as N-type metal oxide semiconductor field effect transistors (Metal Oxide Semiconductor Field Effect Transistor, MOSFETs). Those skilled in the art will appreciate that in other embodiments, the upper and lower tubes HS and LS may also include other suitable semiconductor switching device types, such as junction field effect transistors, insulated gate bipolar transistors, and double diffused metal oxide semiconductors, among others. Furthermore, in one embodiment, the down tube LS may be replaced with a diode type that is unidirectional in conduction.
In the embodiment shown in fig. 1, the output voltage feedback circuit 20 is coupled to the output terminal of the switching converter for sampling the output voltage signal Vout and generating a voltage feedback signal Vfb, wherein the voltage feedback signal Vfb represents the output voltage signal Vout. In one embodiment, the output voltage feedback circuit 20 includes a voltage divider made up of resistors R1 and R2. In other embodiments the output voltage feedback circuit 20 may also directly sample the output voltage signal Vout.
In the embodiment shown in fig. 1, the control circuit includes a slope compensation circuit, a comparison circuit, and a logic circuit.
The slope compensation circuit is coupled to the switch node SW and generates a slope signal ramp according to the square wave voltage signal Vsw at the switch node SW. Specifically, the slope compensation circuit includes a first filter circuit 101, a second filter circuit 102, a third filter circuit 103, and a difference amplification circuit 104.
The first filter circuit 101 has an input terminal and an output terminal, the input terminal of the first filter circuit 101 is coupled to the switch node SW, and the first filter circuit 101 filters the square wave voltage signal Vsw at the joint point SW to generate the first filter signal sig1 at the output terminal of the first filter circuit 101.
The second filter circuit 102 has an input and an output, the input of the second filter circuit 102 receives the first filtered signal, the second filter circuit 102 filters the first filtered signal sig1 to generate a second filtered signal sig2 at the output of the second filter circuit 102.
The third filter circuit 103 has an input and an output, the input of the third filter circuit 103 receives the second filtered signal sig2, and the third filter circuit 103 filters the second filtered signal to generate a third filtered signal vout_sense at the output of the third filter circuit 103.
The difference amplifying circuit 104 receives the first filtered signal sig1, the second filtered signal sig2 and the third filtered signal vout_sense, and amplifies the difference between the first filtered signal sig1 and the second filtered signal sig2 by k times to generate the ramp signal ramp, wherein the value of k is determined by the value of the third filtered signal vout_sense. In one embodiment, the value of k is inversely proportional to the value of the third filtered signal vout_sense.
In one embodiment, the slope compensation circuit further includes a voltage dividing circuit, and the square wave voltage Vsw of the node SW is divided and then sent to the first filtering circuit 101 for filtering. At this time, the first filter circuit 101 filters the square wave voltage signal Vsw at the joint point SW, including filtering the divided signal of the square wave voltage signal Vsw.
The ramp signal ramp is sent to the comparison circuit. In the embodiment shown in fig. 1, the comparison circuit receives the voltage feedback signal Vfb and the ramp signal ramp, and compares the sum of the voltage feedback signal Vfb and the ramp signal ramp with the voltage reference signal Vref, and generates the comparison signal CA. In one embodiment, the comparison signal CA includes a high-low logic level signal for controlling the turn-on timing of the controllable switches in the switching circuit 10. For example, in one embodiment, when the comparison signal CA changes from logic low to logic high, the upper tube HS is turned on and the lower tube LS is turned off in the switching circuit 10. In other embodiments, the comparing circuit may also superimpose the ramp signal ramp on the voltage reference signal Vref and compare the superimposed ramp signal ramp with the voltage feedback signal Vfb to generate the comparison signal CA.
The comparison signal CA is sent to a logic circuit which generates a control signal CTL and an inverted signal of the control signal CTL based on the comparison signal CA according to the control mode selected by the control circuit
For example, in the COT control mode, the logic circuit will also receive a constant on-time control signal and generate the control signal CTL and the inverted signal +_ of the control signal CTL based on the comparison signal CA and the constant on-time control signal>
In another example, in peak current control, the logic circuit will also receive a logic signal generated from the current sampling signal and generate the control signal CTL and the inverted signal +_ of the control signal CTL based on the logic signal and the comparison signal CA>
In still other embodiments, the logic may alsoReceiving the clock signal and generating a control signal CTL and an inverted signal of the control signal CTL based on the clock signal and the comparison signal CA>
The embodiment of the application does not limit the control mode.
Fig. 2 is a circuit schematic of a slope compensation circuit according to one embodiment of the invention. In the embodiment shown in fig. 2, the first filter circuit 101, the second filter circuit 102 and the third filter circuit 103 are each illustrated as being composed of an RC filter circuit. Specifically, the first filter circuit 101 includes a resistor R VIC1 And capacitor C VIC1 . Resistor R VIC1 And capacitor C VIC1 A resistor R coupled in series between the switch node SW and a reference ground VIC1 And capacitor C VIC1 Is used as the output terminal of the first filter circuit 101, wherein the resistor R VIC1 And capacitor C VIC1 The voltage of the common terminal of (1) is the first filtered signal sig1. The second filter circuit 102 includes a resistor R VIC2 And capacitor C VIC2 . Resistor R VIC2 And capacitor C VIC2 A resistor R coupled in series between the switch node SW and a reference ground VIC2 And capacitor C VIC2 Is used as the output terminal of the second filter circuit 102, wherein the resistor R VIC2 And capacitor C VIC2 The voltage of the common terminal of (1) is the second filtered signal sig2. The third filter circuit 103 includes a resistor R VIC3 And capacitor C VIC3 . Resistor R VIC3 And capacitor C VIC3 A resistor R coupled in series between the switch node SW and a reference ground VIC3 And capacitor C VIC3 Is used as the output terminal of the third filter circuit 103, wherein the resistor R VIC3 And capacitor C VIC3 The voltage at the common terminal of (a) is the third filtered signal vout_sense.
In the embodiment shown in fig. 2, the difference amplification circuit 104 is illustrated as including a subtraction unit and an amplitude amplification unit. The subtracting unit receives the first filtered signal sig1 and the second filtered signal sig2, and generates a first ramp signal ramp1 by subtracting the first filtered signal sig1 and the second filtered signal sig2. The amplitude amplifying unit amplifies the first ramp signal ramp1 by k times according to the value of the third filtered signal vout_sense. In one embodiment, the value of k is inversely proportional to the value of the third filtered signal vout_sense.
In the embodiment shown in fig. 2, at a certain operating frequency f, the ramp signal ramp may be illustrated as the following formula (1):
where k is the amplification factor of the amplitude amplifying unit. The ripple signal Δvfb of the feedback voltage Vfb can be expressed by the following formula (2):
wherein Vref is equal to
Vout_step is the desired steady-state output voltage value of the output voltage Vout. Therefore, the ratio coefficient FA of the ramp signal ramp to the ripple signal Δvfb of the feedback voltage Vfb may be illustrated as:
as can be seen from the formula (3), in the process of changing the output voltage Vout along with the load, the design amplification factor k is inversely proportional to the output voltage Vout, and meanwhile, the ratio coefficient FA can be kept unchanged by selecting a proper amplification factor k value. That is, the amplitude of the compensation ramp signal ramp1 will change along with the change of the output voltage Vout, and a constant ratio coefficient FA can be obtained at different output voltages Vout, so that the system can realize optimal dynamic response at different output voltages Vout.
Fig. 3 is a circuit schematic of a slope compensation circuit according to yet another embodiment of the present invention. In the embodiment shown in fig. 3, the first filter circuit 101, the second filter circuit 102, and the third filter circuit 103 are the same as in the embodiment shown in fig. 2, and the difference amplification circuit 104 is illustrated as one error amplifier 1041. Error amplifier 1041 has a first input, a second input, a control, and an output. A first input terminal of the error amplifier 1041 receives a first filtered signal sig1; a second input terminal of the error amplifier 1041 receives a second filtered signal sig2; the control end of the error amplifier 1041 receives the third filtered signal vout_sense; the error amplifier 1041 amplifies the difference between the first filtered signal sig1 and the second filtered signal sig2 by k times according to the value of the third filtered signal vout_sense and generates a ramp signal ramp at an output terminal.
Fig. 4 is a schematic circuit diagram of an error amplifier 1041 according to an embodiment of the invention. As shown, the error amplifier 1041 includes a first differential amplifying circuit, a second differential amplifying circuit, and a current mirror.
The first differential amplifying circuit receives the third filtered signal vout_sense, compares the third filtered signal vout_sense with the internal reference voltage Vbase, and outputs a first current regulation signal ireg1 representing a difference between the third filtered signal vout_sense and the internal reference voltage Vbase. The current mirror receives the first current regulation signal ireg1 and mirrors the first current regulation signal ireg1 to output the second current regulation signal ireg2. In one embodiment, the first current regulation signal ireg1 and the second current regulation signal ireg2 have a proportional relationship. The second differential amplifying circuit receives the second current adjustment signal ireg2, the first filter signal sig1 and the second filter signal sig2, compares the first filter signal sig1 and the second filter signal sig2 under the control of the second current adjustment signal ireg2, and outputs a ramp signal ramp representing a difference between the first filter signal sig1 and the second filter signal sig2. The ratio of the difference value of the first and second filtered signals sig1 and sig2 to the value of the ramp signal ramp is controlled by the second current regulation signal ireg2.
Fig. 5 is a flowchart of a ramp signal generating method for a switching converter according to an embodiment of the invention. The ramp signal generating method can be used in the switch converter and other switch converters within the protection scope of the application. The ramp signal generating method includes steps S01 to S04.
In step S01, the voltage Vsw of the switch node SW is filtered to generate the first filtered signal sig1.
Step S02, the first filtered signal sig1 is filtered to generate a second filtered signal sig2.
In step S03, the second filtered signal sig2 is filtered to generate a third filtered signal vout_sense.
In step S04, the difference between the first filtered signal sig1 and the second filtered signal sig2 is amplified by k times to generate the ramp signal ramp. Wherein the k value is determined by the value of the third filtered signal vout_sense.
While the invention has been described with reference to several exemplary embodiments, it will be understood by those of ordinary skill in the relevant art that the terminology used in the embodiments of the invention disclosed is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Furthermore, various modifications in the form and details of the disclosed embodiments may be made by those skilled in the art without departing from the principles and concepts of the invention, which modifications are within the scope of the invention as defined in the claims and their equivalents.
Claims (10)
1. A slope compensation circuit for a switching converter having an upper tube and a lower tube, the slope compensation circuit comprising:
a first filter circuit having an input and an output, the input of the first filter circuit being coupled to a common node of the upper and lower pipes, the first filter circuit filtering a voltage on the common node to generate a first filtered signal at the output of the first filter circuit;
the second filter circuit is provided with an input end and an output end, the input end of the second filter circuit receives the first filter signal, and the second filter circuit filters the first filter signal to generate a second filter signal at the output end of the second filter circuit;
the third filter circuit is provided with an input end and an output end, the input end of the third filter circuit receives the second filter signal, and the third filter circuit filters the second filter signal to generate a third filter signal at the output end of the third filter circuit; and
and the difference amplifying circuit is used for receiving the first filtering signal, the second filtering signal and the third filtering signal, and amplifying the difference between the first filtering signal and the second filtering signal by k times to generate a slope signal, wherein the value of k is determined by the value of the third filtering signal.
2. The slope compensation circuit of claim 1 wherein the value of k is inversely proportional to the value of the third filtered signal.
3. The slope compensation circuit of claim 1, wherein the first filter circuit comprises:
a first resistor having a first end and a second end, the first end of the first resistor being coupled to the common node to receive a voltage on the common node; and
the first capacitor has a first end and a second end, the first end of the first capacitor is coupled to the second end of the first resistor, and the second end of the first capacitor is coupled to the reference ground, wherein the voltage on the first end of the first capacitor is the first filtering signal.
4. The slope compensation circuit of claim 3, wherein the second filter circuit comprises:
a second resistor having a first end and a second end, the first end of the second resistor being coupled to the second end of the first resistor; and
the second capacitor has a first end and a second end, the first end of the second capacitor is coupled to the second end of the second resistor, and the second end of the second capacitor is coupled to the reference ground, wherein the voltage on the first end of the second capacitor is the second filtered signal.
5. The slope compensation circuit of claim 4, wherein the third filter circuit comprises:
a third resistor having a first end and a second end, the first end of the third resistor being coupled to the second end of the second resistor; and
and a third capacitor having a first end and a second end, the first end of the third capacitor being coupled to the second end of the third resistor, the second end of the third capacitor being coupled to the reference ground, wherein the voltage on the first end of the third capacitor is the third filtered signal.
6. The slope compensation circuit of claim 1, wherein the difference amplification circuit comprises:
the subtracting operation unit is used for receiving the first filtering signal and the second filtering signal and carrying out difference operation on the first filtering signal and the second filtering signal to generate a first slope signal; and
and the amplitude amplifying unit receives the first ramp signal and a third filter signal, and the third filter signal controls the amplitude amplifying unit to amplify the first ramp signal by k times to generate a ramp signal.
7. The slope compensation circuit of claim 1, wherein the difference amplification circuit comprises:
the error amplifier is provided with a first input end, a second input end, a control end and an output end, wherein the first input end of the error amplifier receives the first filtering signal, the second input end of the error amplifier receives the second filtering signal, the control end of the error amplifier receives the third filtering signal, the error amplifier compares the first filtering signal with the second filtering signal, amplifies the difference value of the first filtering signal and the second filtering signal, and generates a slope signal at the output end.
8. The slope compensation circuit of claim 7, wherein the error amplifier comprises:
a first differential amplifying circuit for receiving the third filtered signal and the reference voltage signal and comparing the third filtered signal with the reference voltage signal to generate a first current adjustment signal, wherein the current adjustment signal represents a difference between the third filtered signal and the reference voltage signal;
a current mirror mirroring the first current regulation signal to a second current regulation signal; and
the second differential amplifying circuit receives the first filtering signal, the second filtering signal and the second current regulating signal and generates a slope signal according to the first filtering signal, the second filtering signal and the second current regulating signal.
9. A control circuit for a switching converter, the switching converter including an upper pipe and a lower pipe, the control circuit converting an input voltage into an output voltage by controlling on and off of the upper pipe and the lower pipe, the control circuit comprising:
a slope compensation circuit according to one of claims 1 to 8, for generating a ramp signal;
the comparison circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the comparison circuit receives the sum of the voltage feedback signal and the ramp signal, the second input end of the comparison circuit receives the reference voltage signal, and the comparison circuit compares the sum of the voltage feedback signal and the ramp signal with the reference voltage signal to generate a comparison signal, wherein the voltage feedback signal represents the output voltage; and
and the logic circuit receives the comparison signal and generates a control signal according to the comparison signal so as to control the on and off of the upper pipe and the lower pipe.
10. A ramp signal generating method for a switching converter having an upper pipe and a lower pipe, the ramp signal generating method comprising:
filtering the voltage on the common node of the upper pipe and the lower pipe to generate a first filtering signal;
filtering the first filtering signal to generate a second filtering signal;
filtering the second filtering signal to generate a third filtering signal; and
the difference between the first filtered signal and the second filtered signal is amplified by a factor k to produce a ramp signal, wherein the value of k is determined by the value of the third filtered signal.
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| CN202310026665.9A CN116317551A (en) | 2023-01-09 | 2023-01-09 | Slope compensation circuit and related control circuit and method |
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| CN202310026665.9A CN116317551A (en) | 2023-01-09 | 2023-01-09 | Slope compensation circuit and related control circuit and method |
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| CN (1) | CN116317551A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117294142A (en) * | 2023-11-24 | 2023-12-26 | 上海英联电子科技有限公司 | voltage conversion circuit |
| CN117498658A (en) * | 2023-12-29 | 2024-02-02 | 晶艺半导体有限公司 | Ramp signal generating circuit and generating method |
-
2023
- 2023-01-09 CN CN202310026665.9A patent/CN116317551A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117294142A (en) * | 2023-11-24 | 2023-12-26 | 上海英联电子科技有限公司 | voltage conversion circuit |
| CN117294142B (en) * | 2023-11-24 | 2024-02-06 | 上海英联电子科技有限公司 | Voltage conversion circuit |
| CN117498658A (en) * | 2023-12-29 | 2024-02-02 | 晶艺半导体有限公司 | Ramp signal generating circuit and generating method |
| CN117498658B (en) * | 2023-12-29 | 2024-03-22 | 晶艺半导体有限公司 | Ramp signal generating circuit and generating method |
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