WO2020134914A1 - 一种显示屏、移动终端及其控制方法 - Google Patents

一种显示屏、移动终端及其控制方法 Download PDF

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Publication number
WO2020134914A1
WO2020134914A1 PCT/CN2019/122844 CN2019122844W WO2020134914A1 WO 2020134914 A1 WO2020134914 A1 WO 2020134914A1 CN 2019122844 W CN2019122844 W CN 2019122844W WO 2020134914 A1 WO2020134914 A1 WO 2020134914A1
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Prior art keywords
pixel
sub
terminal
display
voltage
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PCT/CN2019/122844
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English (en)
French (fr)
Inventor
刘俊彦
韦育伦
Original Assignee
华为技术有限公司
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Priority to EP19902260.9A priority Critical patent/EP3889951A4/en
Publication of WO2020134914A1 publication Critical patent/WO2020134914A1/zh

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
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Definitions

  • the present application relates to the field of display technology, in particular to a display screen, a mobile terminal and a control method thereof.
  • mobile terminals with display functions such as mobile phones, tablet computers, smart watches, etc.
  • display functions such as mobile phones, tablet computers, smart watches, etc.
  • mobile terminals are unable to implement regional brightness control according to user needs or product design requirements, which is not conducive to improving the competitiveness of products in the market.
  • the present application provides a display screen, a mobile terminal, and a control method thereof, to solve the problem that the mobile terminal cannot realize the brightness control in different regions according to user needs or product design requirements.
  • the display screen includes a display driver, a first pixel array, and a second pixel array.
  • the display driver includes a first signal terminal, a second signal terminal, and a third signal terminal.
  • the first pixel array includes a plurality of first sub-pixels, and the pixel circuit in the first sub-pixel includes a first voltage input terminal and a second voltage input terminal.
  • the second pixel array includes a plurality of second sub-pixels, and the pixel circuit in the second sub-pixel includes a third voltage input terminal and a fourth voltage input terminal.
  • the first voltage input terminal of the pixel circuit of the first sub-pixel is electrically connected to the first signal terminal of the display driver, and receives the first power supply voltage output by the first signal terminal.
  • the second voltage input terminal is electrically connected to the second signal terminal of the display driver, and receives the second power supply voltage output by the second signal terminal.
  • the third voltage input terminal of the pixel circuit of the second sub-pixel is electrically connected to the third signal terminal of the display driver, and receives the third power supply voltage output by the third signal terminal.
  • the fourth voltage input terminal is electrically connected to the second signal terminal of the display driver, and receives the second power supply voltage output by the second signal terminal.
  • the voltage value of the third power supply voltage and the first power supply voltage are different.
  • the first power supply voltage output by the first signal terminal of the display driver is greater than the second power supply voltage output by the second signal terminal of the display driver.
  • the third power supply voltage output from the third signal terminal of the display driver is greater than the second power supply voltage output from the second signal terminal of the display driver.
  • the first sub-pixel and the second sub-pixel may share the above second power supply voltage, that is, the second power supply voltage is the voltage ELVSS.
  • the pixel circuit of the first sub-pixel in the first pixel array includes a first driving transistor and a first light-emitting device.
  • the first electrode of the first driving transistor is electrically connected to the first signal terminal of the display driver
  • the second electrode of the first driving transistor is electrically connected to the anode of the first light emitting device
  • the cathode of the first light emitting device is connected to the second signal of the display driver ⁇ End electrical connection.
  • the second pixel array includes a plurality of second sub-pixels
  • the pixel circuit in the second sub-pixel includes a second driving transistor and a second light emitting device.
  • the first electrode of the second driving transistor is electrically connected to the third signal terminal of the display driver, the second electrode of the second driving transistor is electrically connected to the anode of the second light emitting device; the cathode of the second light emitting device is connected to the second signal of the display driver ⁇ End electrical connection.
  • the first electrode of the first driving transistor is the first voltage input terminal of the pixel circuit of the first sub-pixel.
  • the cathode of the first light emitting device is the second voltage input terminal of the pixel circuit of the first sub-pixel.
  • the first electrode of the second driving transistor is the third voltage input terminal of the pixel circuit of the second sub-pixel.
  • the cathode of the second light emitting device is the fourth voltage input terminal of the pixel circuit of the second sub-pixel.
  • the first power supply voltage output by the first signal terminal of the display driver is less than the second power supply voltage output by the second signal terminal of the display driver.
  • the third power supply voltage output from the third signal terminal of the display driver is less than the second power supply voltage output from the second signal terminal of the display driver.
  • the first sub-pixel and the second sub-pixel may share the above-mentioned second power supply voltage, and the second power supply voltage is the voltage ELVSS.
  • the pixel circuit of the first sub-pixel in the first pixel array includes a first driving transistor and a first light-emitting device.
  • the first electrode of the first driving transistor is electrically connected to the second signal terminal of the display driver, the second electrode of the first driving transistor is electrically connected to the anode of the first light emitting device; the cathode of the first light emitting device is connected to the first signal of the display driver ⁇ End electrical connection.
  • the second pixel array includes a plurality of second sub-pixels, and the pixel circuit in the second sub-pixel includes a second driving transistor and a second light emitting device.
  • the first electrode of the second driving transistor is electrically connected to the second signal terminal of the display driver, the second electrode of the second driving transistor is electrically connected to the anode of the second light emitting device; the cathode of the second light emitting device is connected to the third signal of the display driver ⁇ End electrical connection.
  • the first electrode of the first driving transistor is the second voltage input terminal of the pixel circuit of the first sub-pixel.
  • the cathode of the first light emitting device is the first voltage input terminal of the pixel circuit of the first sub-pixel.
  • the first electrode of the second driving transistor is the fourth voltage input terminal of the pixel circuit of the second sub-pixel.
  • the cathode of the second light emitting device is the third voltage input terminal of the pixel circuit of the second sub-pixel.
  • the display driver includes a power management integrated circuit.
  • the power management integrated circuit includes a first voltage terminal, a second voltage terminal, and a third voltage terminal.
  • the first voltage terminal of the power management integrated circuit is electrically connected to the first voltage input terminal of the pixel circuit of the first sub-pixel.
  • the second output terminal of the power management integrated circuit is electrically connected to the second voltage input terminal of the pixel circuit of the first sub-pixel and the fourth voltage input terminal of the pixel circuit of the second sub-pixel.
  • the third output terminal of the power management integrated circuit is electrically connected to the third voltage input terminal of the pixel circuit of the second sub-pixel. Therefore, the brightness of the area where the first pixel array is located and the area where the second pixel array is located can be separately controlled by a power management integrated circuit.
  • the display driver includes a first power management integrated circuit and a second power management integrated circuit.
  • the first power management integrated circuit includes a first voltage terminal and a second voltage terminal.
  • the second power management integrated circuit includes a third voltage terminal and a fourth voltage terminal.
  • the first voltage terminal of the first power management integrated circuit is electrically connected to the first voltage input terminal of the pixel circuit of the first sub-pixel.
  • the third voltage terminal of the second power management integrated circuit is electrically connected to the third voltage input terminal of the pixel circuit of the second sub-pixel.
  • the second voltage terminal of the first power management integrated circuit is electrically connected to the second voltage input terminal of the pixel circuit of the first sub-pixel and the fourth voltage input terminal of the pixel circuit of the second sub-pixel.
  • the fourth voltage terminal of the second power management integrated circuit is electrically connected to the second voltage input terminal of the pixel circuit of the first sub-pixel and the fourth voltage input terminal of the pixel circuit of the second sub-pixel. Therefore, the brightness of the area where the first pixel array is located and the area where the second pixel array is located can be controlled by the first power management integrated circuit and the second power management integrated circuit, respectively.
  • the effective display area includes an auxiliary display area and a main display area.
  • the non-display side of the auxiliary display area is used to integrate a camera or a sensor.
  • the first pixel array is located in the auxiliary display area.
  • the second pixel array is located in the main display area.
  • the pixel density of the auxiliary display area is smaller than the pixel density of the main display area. In this way, the sub-pixels in the auxiliary display area have more light-transmitting areas, so that the camera or sensor on the non-display side of the auxiliary display area receives or emits more light passing through the display screen.
  • the light-shielding area occupied by the pixel circuit of the first sub-pixel is the same as the light-shielding area occupied by the pixel circuit of the second sub-pixel.
  • the light transmission area of the first sub-pixel excluding the pixel circuit is larger than the light transmission area of the second sub-pixel excluding the pixel circuit.
  • the display screen further includes a base substrate; the first pixel array and the second pixel array are disposed on the base substrate.
  • the material constituting the base substrate includes a flexible resin material.
  • the display driving circuit further includes a processor, the processor is electrically connected to at least one power management integrated circuit, the processor is used to detect when the first pixel array or the second pixel array is bent to the non-display side of the display screen, and integrates with at least one power management The circuit outputs a brightness control signal.
  • the above display screen can be bent. When the first pixel array or the second pixel array is bent to the non-display side of the display screen, the brightness of the area where the pixel array folded to the non-display side of the display screen is located can be reduced by the processor.
  • a mobile terminal including any display screen as above.
  • Mobile terminals also include cameras and sensors. The camera, and/or the sensor is located on the non-display side of the display.
  • the above mobile terminal has the same technical effect as the display screen provided in the foregoing embodiment, and will not be repeated here.
  • the display screen includes an auxiliary display area and a main display area; the pixel density of the auxiliary display area is less than the pixel density of the main display area.
  • the camera and sensor are arranged on the non-display side of the auxiliary display area. When the camera and sensor are located on the non-display side of the display, a full screen can be achieved.
  • an opening is provided on the display screen.
  • the display screen includes auxiliary display areas located on both sides of the opening, and a main display area located below the opening.
  • the pixel density of the auxiliary display area is smaller than the pixel density of the main display area.
  • the camera is located in the opening.
  • the sensor is arranged on the non-display side of the auxiliary display area.
  • the above display screen is a special-shaped screen.
  • the mobile terminal includes a display screen.
  • the display screen includes a display driver, a first pixel array, and a second pixel array.
  • the display driver includes a first signal terminal, a second signal terminal, and a third signal terminal.
  • the first pixel array includes a plurality of first sub-pixels, and the pixel circuit in the first sub-pixel includes a first voltage input terminal and a second voltage input terminal.
  • the second pixel array includes a plurality of second sub-pixels, and the pixel circuit in the second sub-pixel includes a third voltage input terminal and a fourth voltage input terminal.
  • the first voltage input terminal of the pixel circuit of the first sub-pixel is electrically connected to the first signal terminal of the display driver, and the second voltage input terminal is electrically connected to the second signal terminal of the display driver.
  • the third voltage input terminal of the pixel circuit of the second sub-pixel is electrically connected to the third signal terminal of the display driver, and the fourth voltage input terminal is electrically connected to the second signal terminal of the display driver.
  • the display screen further includes a base substrate; the first pixel array and the second pixel array are disposed on the base substrate; the material constituting the base substrate includes a flexible resin material, so that the above display screen is a flexible display screen that can be bent .
  • the above control method of the mobile terminal includes: first, the display driver detects that the first sub-pixel array is bent to the non-display side of the display screen. Next, the first signal terminal of the display driver reduces the first power supply voltage input to the first voltage input terminal of the pixel circuit of the first sub-pixel in the first sub-pixel array. Alternatively, the second signal terminal of the display driver increases the second power supply voltage output to the second voltage input terminal of the pixel circuit of the first sub-pixel. At this time, the light emission luminance of the first sub-pixel decreases. The first power supply voltage is greater than the second power supply voltage.
  • the above mobile terminal control method has the same technical effects as the mobile terminal provided in the foregoing embodiment. I won't repeat them here.
  • FIG. 1 is a schematic structural diagram of a display screen provided by some embodiments of this application.
  • FIG. 2 is a schematic diagram of a pixel circuit structure of each sub-pixel in FIG. 1;
  • FIG. 3 is a timing diagram of some control signals of the pixel circuit shown in FIG. 2;
  • FIG. 4 is an equivalent circuit diagram of the pixel circuit shown in FIG. 2 corresponding to the third stage in FIG. 3;
  • 5a is a graph showing the relationship between the current flowing through the OLED in FIG. 2 and the voltage applied to the cathode and anode of the OLED;
  • FIG. 5b is an output characteristic curve diagram of the driving transistor in FIG. 2;
  • 5c is a schematic structural diagram of another display screen provided by some embodiments of the present application.
  • 6a is a schematic structural diagram of a mobile terminal according to some embodiments of the present application.
  • FIG. 6b is another schematic structural diagram of a mobile terminal provided by some embodiments of this application.
  • FIG. 6c is another schematic structural diagram of a mobile terminal according to some embodiments of the present application.
  • FIG. 7 is a schematic diagram of the display area around the opening in FIG. 6a or 6b;
  • FIG. 8 is a schematic diagram of an arrangement of sub-pixels around the opening in FIG. 6a or 6b;
  • FIG. 9 is a schematic diagram of another arrangement of sub-pixels around the opening in FIG. 6a or 6b;
  • FIG. 10 is a schematic diagram of the arrangement of the sensor in FIG. 6b;
  • 11a is a schematic diagram of an arrangement of sub-pixels around the opening in FIG. 6b;
  • FIG. 11b is a schematic structural diagram of a partial sub-pixel pixel circuit shown in FIG. 11a;
  • 11c is another schematic diagram of the arrangement of the sub-pixels around the opening in FIG. 6b;
  • FIG. 12a is a schematic diagram of another arrangement of sub-pixels around the opening in FIG. 6b;
  • 12b is another schematic view of the arrangement of the sub-pixels around the opening in FIG. 6b;
  • FIG. 12c is a schematic structural diagram of a pixel circuit of some sub-pixels shown in FIG. 12b
  • 13a is a schematic structural diagram of a display screen provided by some embodiments of the present application.
  • 13b is another schematic structural diagram of a display screen provided by some embodiments of the present application.
  • 13c is some embodiments of the present application, a schematic diagram of an output characteristic curve of a driving transistor in a pixel circuit of a display screen provided;
  • 14a is a schematic diagram of another structure of a display screen provided by some embodiments of this application.
  • FIG. 14b is another schematic structural diagram of a display screen provided by some embodiments of the present application.
  • FIG. 15 is a schematic view of the structure of a cathode layer in a display screen provided by some embodiments of this application;
  • 16 is a schematic cross-sectional view of a display screen provided by some embodiments of this application.
  • 17 is a schematic diagram of a display screen provided by some embodiments of the present application.
  • 18a is a schematic diagram of a folding manner of a display screen provided by some embodiments of the present application.
  • 18b is a schematic diagram of the folded display screen using the folding method shown in FIG. 18a;
  • FIG. 19 is a schematic diagram of another folding manner of a display screen provided by some embodiments of this application.
  • 20 is a schematic diagram of another folding manner of a display screen provided by some embodiments of this application.
  • 21a is a schematic diagram of a manner of dividing a display area into sub-areas provided by some embodiments of the present application.
  • 21b is a schematic diagram of the connection structure of the PMIC in FIG. 21a and the pixel circuit of each sub-pixel;
  • FIG. 22a is a schematic diagram of another division manner of a display area provided by a display screen provided by some embodiments of this application.
  • 22b is a schematic diagram of the connection structure of the PMIC in FIG. 22a and the pixel circuit of each sub-pixel;
  • FIG. 23 is a schematic diagram of another display screen provided by some embodiments of the present application.
  • FIG. 24 is a schematic diagram of another manner of dividing a display area into sub-areas according to some embodiments of the present application.
  • first and second are used for description purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
  • the features defined as “first” and “second” may explicitly or implicitly include one or more of the features.
  • “multiple” means two or more.
  • the present disclosure provides a mobile terminal, which may be a mobile phone, a tablet computer, a notebook, a personal digital assistant (PDA), an on-board computer, and the like.
  • a mobile terminal which may be a mobile phone, a tablet computer, a notebook, a personal digital assistant (PDA), an on-board computer, and the like.
  • PDA personal digital assistant
  • the embodiment of the present application does not specifically limit the specific form of the above mobile terminal.
  • the above mobile terminal includes a display screen 10 as shown in FIG.
  • the display screen 10 is an organic light emitting diode (Organic Light Emitting Diode, OLED) display screen.
  • OLED Organic Light Emitting Diode
  • the above-mentioned OLED display has the characteristics of self-luminescence, response speed block, wide viewing angle, and can be made on a flexible substrate.
  • the display screen 10 includes an active display area (AA) 100 and a non-display area 101 located around the AA area 100.
  • AA active display area
  • the above-mentioned effective display area 100 includes a plurality of sub-pixels 20.
  • the multiple sub-pixels 20 are arranged in a matrix form as an example.
  • the sub-pixels 20 arranged in a row in the horizontal direction X are called the same row of sub-pixels, and the sub-pixels 20 arranged in a row in the vertical direction Y are called the same column of sub-pixels.
  • a pixel circuit 201 for controlling the sub-pixel 20 to display is provided in the sub-pixel 20.
  • the pixel circuit 201 includes a capacitor C and a plurality of switching transistors (M1, M2, M3, M5, M6, M7) and a driving transistor M4.
  • the working process of the pixel circuit 201 shown in FIG. 2 includes the three stages shown in FIG. 3, the first stage 1, the second stage 2, and the third stage 3.
  • the transistor M1 and the transistor M7 are turned on.
  • the initial voltage Vint is transmitted to the gate (abbreviated as g) of the driving transistor M4 and the anode (abbreviated as a) of the OLED through the transistor M1 and the transistor M7, respectively.
  • the purpose of resetting the anode a of the OLED and the gate g of the driving transistor M4 is achieved.
  • the transistor M2 and the transistor M3 are turned on.
  • the gate g and the drain (abbreviated as d) of the driving transistor M4 are electrically connected, and the driving transistor M4 is in a diode-on state.
  • the data signal Vdata is written to the source (source, s for short) of the driving transistor M4 through the turned-on transistor M2, and compensates the threshold voltage Vth of the driving transistor M4.
  • the transistor M5 and the transistor M6 are turned on, and the current path between the voltages ELVDD and ELVSS is turned on.
  • the equivalent circuit diagram of the third stage is shown in FIG.
  • the driving transistor M4 is turned on, the first electrode (source s) of the driving transistor M4 receives the voltage ELVDD, and the second electrode of the driving transistor M4 is electrically connected to the anode (a) of the OLED.
  • the cathode (c) of the OLED receives the voltage ELVSS.
  • the driving current I sd generated by the driving transistor M4 is transmitted to the OLED through the above current path to drive the OLED to emit light.
  • V sd is the source voltage of the driving transistor M4;
  • V OLED is the voltage difference between the anode (anode, abbreviated as a) and the cathode (cathode, abbreviated as c) of the OLED.
  • the luminous brightness of the OLED is proportional to the current I OLED (same as the above-mentioned driving current I ds ) flowing through the OLED.
  • the embodiment of the present application provides a display screen 01.
  • the display screen 01 includes a display driver 03, a first pixel array 41, and a second pixel array 42.
  • the display driver 03 includes a first signal terminal 113, a second signal terminal 123, and a third signal terminal 133.
  • first pixel array 41 includes a plurality of first sub-pixels 12a.
  • the pixel circuit 201 of the first sub-pixel 12a includes a first voltage input terminal 112 and a second voltage input terminal 122.
  • the above-mentioned second pixel array 42 includes a plurality of second sub-pixels 12b.
  • the pixel circuit 201 of the second sub-pixel 12b includes a third voltage input terminal 132 and a fourth voltage input terminal 142.
  • the first voltage input terminal 112 of the pixel circuit 201 of the first sub-pixel 12a is electrically connected to the first signal terminal 113 of the display driver 03, and receives the first power supply voltage V1 output from the first signal terminal 113.
  • the second voltage input terminal 122 of the pixel circuit 21 of the first sub-pixel 12a is electrically connected to the second signal terminal 123 of the display driver 03, and receives the second power supply voltage V2 output from the second signal terminal 123.
  • the third voltage input terminal 132 of the pixel circuit 201 of the second sub-pixel 12b is electrically connected to the third signal terminal 133 of the display driver 03, and receives the third power supply voltage V3 output from the third signal terminal 133.
  • the fourth voltage input terminal 142 of the pixel circuit 201 of the second sub-pixel 12b is electrically connected to the second signal terminal 123 of the display driver 03, and receives the second power supply voltage V2 output by the second signal terminal 123.
  • the voltage value of the third power supply voltage V3 and the first power supply voltage V1 are different.
  • the first power supply voltage V1 is greater than the second power supply voltage V2, and the third power supply voltage V3 is also greater than the second power supply voltage V2.
  • the second power supply voltage V2 may be the voltage ELVSS.
  • the pixel circuits 102 of the first pixel array 41 and the second pixel array 42 share the voltage ELVSS.
  • the first power supply voltage V1 is less than the second power supply voltage V2, and the third power supply voltage V3 is also smaller than the second power supply voltage V2.
  • the second power supply voltage V2 may be the voltage ELVDD.
  • the pixel circuits 102 of the first pixel array 41 and the second pixel array 42 share the voltage ELVDD.
  • the following is an example of the process of brightness division control of display screen 01 in different scenes.
  • a mobile terminal 01 with a display screen 10 integrates a variety of electronic devices for implementing different functions, such as a camera 11, an infrared sensor (IR sensor) 12, three-dimensional, as shown in FIG. 6a. Sensor (3D sensor) 13 etc.
  • IR sensor infrared sensor
  • 3D sensor Sensor
  • an opening 200 is opened on the display 10 of the mobile terminal 01.
  • the electronic device can be installed in the opening 200.
  • the portions of the display screen 10 located on both sides of the opening 200 can still be displayed, so as to achieve the purpose of increasing the screen ratio of the display screen.
  • some electronic devices such as IR sensor 12, 3D sensor 13 may be disposed under the display screen 10 (under display), that is, the display screen
  • the non-display side that is, the receiver and transmitter of IR sensor12, and the receiver and transmitter of 3D sensor13 are arranged below the display screen 10.
  • the camera 11 is installed in the opening 200.
  • the IR sensor 12, 3D sensor 13, and camera 11 may be all disposed below the display screen 10, that is, on the non-display side of the display screen. Therefore, the screen ratio of the display screen 10 is further improved, and the effect of a full screen is achieved.
  • FIG. 6b the structure shown in FIG. 6b or the structure shown in FIG. 6c may be used, which is not limited in this application.
  • the following description is based on the special-shaped screen shown in FIG. 6b as an example.
  • the light emitted by the sensor's transmitter can pass through the above-mentioned display screen, and the light-transmitting part of the sub-pixel 20 is emitted by the display screen 10.
  • the light emitted by the sensor encounters an obstacle, it will reflect the light.
  • the reflected light can pass through the light-transmitting part of the sub-pixel 20 in the display screen and enter the sensor's receiver, so that the sensor can perform sensing operation according to the received reflected light. In this way, the area of the opening 200 can be reduced, and the purpose of increasing the screen ratio can be achieved.
  • the AA area 100 of the display screen 10 needs to bypass the opening 200. Therefore, the AA area 100 of the display screen 10 is no longer a complete rectangle.
  • the AA area 100 of the display screen 10 may be divided into auxiliary display areas 110 located on both sides of the opening 200, and a main display area 120 located below the opening 200 and the auxiliary display area 110.
  • the auxiliary display area 110 is provided with the first pixel array 41.
  • the first pixel array 41 includes a plurality of the first sub-pixels 20a.
  • the second pixel array 42 is disposed in the main display area 120. As shown in FIG. 8, the second pixel array 42 includes a plurality of second sub-pixels 20b.
  • the entire row of second sub-pixels 20 b are arranged along the horizontal direction X.
  • the number of second sub-pixels 20b in a row is N along the horizontal direction X.
  • N ⁇ 2 is a positive integer.
  • the number of the first sub-pixels 20a in a row is M along the horizontal direction X. 2 ⁇ M ⁇ N, M is a positive integer.
  • the pixel circuit 201 of the display screen 10 includes a plurality of transistors.
  • the above transistor is mainly made of an opaque metal material, so that the metal density of the first sub-pixel 20a or the second sub-pixel 20b is higher, and the transparent of the first sub-pixel 20a or the second sub-pixel 20b The light area is reduced accordingly.
  • the light transmitted by the transmitters of IR sensor12 and 3D sensor13 cannot effectively pass through the light-transmitting part of the first sub-pixel 20a and the reflected light cannot pass through effectively
  • the light-transmitting part of the first sub-pixel 20a is incident on the receivers of the IR sensor 12, 3D sensor 13, thereby reducing the detection accuracy of the sensor.
  • the pixel density (PPI) of the auxiliary display area 110 can be made smaller than the PPI of the main display area 120.
  • the area of the first sub-pixel 20a of the auxiliary display area 110 is larger than the area of the second sub-pixel 20b of the main display area 120, so that the light transmission area of the first sub-pixel 20a of the auxiliary display area 110 is larger than the main The light transmission area of the second sub-pixel 20b in the display area 120.
  • the first sub-pixel 20a in the auxiliary display area 110 has a sufficient light-transmitting portion, so that the light transmitted by the transmitters of the IR sensor 12, 3D sensor 13 is emitted from the display screen 10, and the above-mentioned reflected light It can also pass through the light-transmitting portion of the first sub-pixel 20a in the auxiliary display area 110 and enter the sensor located under the auxiliary display area 110, such as the receivers of IR sensor 12, 3D sensor 13, for example. Therefore, the above sensor can send and receive more light, so as to improve the sensing accuracy of the sensor.
  • the present application provides the following solutions.
  • the number of first sub-pixels 20a in one pixel 02 of the auxiliary display area 110 is different from the number of second sub-pixels 20b in one pixel 02 of the main display area 120.
  • the length L1 of any two pixels 02 in the X direction and the length L2 in the Y direction are the same.
  • the number of first sub-pixels 20a is smaller than the number of second sub-pixels 20b in one pixel 02 of the main display area 120. Therefore, the area of the first sub-pixel 20 a of the auxiliary display area 110 can be made larger than the area of the second sub-pixel 20 b of the main display area 120.
  • one pixel 02 of the auxiliary display area 110 includes three first sub-pixels 20a, which are red (red, R) first sub-pixels, green (green, G) first sub-pixels, and blue (blue, B) The first sub-pixel.
  • One pixel 02 of the main display area 120 includes four second sub-pixels 20b, respectively R second sub-pixel, G second sub-pixel, B second sub-pixel and W (white, W) second sub-pixel.
  • the pixel circuit of any one of the first sub-pixel 20a and the second sub-pixel 20b in the display screen 10 is configured as shown in FIG. 2 as an example.
  • the source (s) of the transistor M2 is electrically connected to the same data line (DL) connection.
  • This DL is used to provide the data voltage Vdata.
  • the source (s) of the transistor M2 is electrically connected to the same DL.
  • the pixel circuit of the first sub-pixel 20a in the third column of the auxiliary display area 110 and the pixel circuit of the second sub-pixel 20b in the fourth column of the main display area 120 are the same as the DL Electrical connection.
  • the pixel circuits of the second sub-pixels 20b in the first column of the main display area 120, the pixel circuits of the second sub-pixels 20b in the second column, and the pixel circuits of the second sub-pixels 20b in the third column are electrically connected
  • the DL does not need to be shared with the pixel circuit of the auxiliary display area 110.
  • one pixel 02 of the auxiliary display area 110 includes three first sub-pixels 20a, namely an R first sub-pixel, a G first sub-pixel, and a B first sub-pixel.
  • the pixel arrangement of the main display area 120 adopts the pentile method. That is, one pixel 02 of the main display area 120 includes two second sub-pixels 20b, namely R second sub-pixel and G second sub-pixel; or B second sub-pixel and G second sub-pixel.
  • the area of the R second sub-pixel and the B second sub-pixel in the main display area 120 is twice that of the G second sub-pixel. Two adjacent pixels 02 share the R second sub-pixel or B second sub-pixel.
  • the length L1b of one pixel 02 of the auxiliary display area 110 in the X direction is larger than the length L1a of one pixel 02 of the main display area 120 in the X direction. Therefore, the area of the first sub-pixel 20 a of the auxiliary display area 110 can be made larger than the area of the first sub-pixel 20 b of the main display area 120.
  • connection method of the pixel circuit of each sub-pixel and the DL can be set with reference to FIG. 11b, and will not be repeated here.
  • the number of first sub-pixels 20a in one pixel 02 of the auxiliary display area 110 is the same as the number of second sub-pixels 20b in one pixel 02 of the main display area 120.
  • one pixel 02 of the auxiliary display area 110 includes three first sub-pixels 20a, which are red (red, R) first sub-pixels, green (green, G) first sub-pixels, and blue (blue, B) The first sub-pixel.
  • One pixel 02 of the main display area 120 includes three second sub-pixels 20b, which are the above-mentioned R second sub-pixel, G second sub-pixel, and B second sub-pixel, respectively.
  • the length L1b of the pixel 02 of the auxiliary display area 110 in the X direction is larger than the length L1a of the pixel 02 of the main display area 120 in the X direction.
  • L1b is approximately twice that of L1a.
  • the length L2b of the pixel 02 in the auxiliary display area 110 in the Y direction may be the same as the length L2a of the pixel 02 in the main display area 120 in the Y direction. Therefore, the area of the first sub-pixel 20 a of the auxiliary display area 110 is larger than the area of the second sub-pixel 20 b of the main display area 120.
  • the source (s) of the transistor M2 is electrically connected to the same DL.
  • This DL is used to provide the data voltage Vdata.
  • the source (s) of the transistor M2 is electrically connected to the same DL.
  • the pixel circuit of the first sub-pixel 20a in the first column of the auxiliary display area 110 and the pixel circuit of the second sub-pixel 20b in the second column of the main display area 120 are electrically connected to the same DL .
  • the pixel circuit of the second sub-pixel 20a in the second column of the auxiliary display area 110 and the pixel circuit of the second sub-pixel 20b in the fourth column of the main display area 120 are electrically connected to the same DL.
  • the pixel circuit of the first sub-pixel 20a in the third column of the auxiliary display area 110 and the pixel circuit of the second sub-pixel 20b in the sixth column of the main display area 120 are electrically connected to the same DL.
  • the pixel circuits of the second sub-pixels 20b in the first column of the main display area 120, the pixel circuits of the second sub-pixels 20b in the third column, and the pixel circuits of the second sub-pixels 20b in the fifth column are electrically connected
  • the DL need not be shared with the pixel circuit of the auxiliary display area 110. Therefore, the DL that can be electrically connected to the pixel circuit of the second sub-pixel 20b in the first column of the main display area 120, the pixel circuit of the second sub-pixel 20b in the third column, and the second sub-pixel 20b in the fifth column may be provided only on the main In the display area 120.
  • the PPI of the auxiliary display area 110 can be made smaller than the PPI of the main display area 120 through the various setting methods described above.
  • the following is an example of taking the structure shown in FIG. 12b as an example.
  • the brightness S1_a of a single pixel 02 in the auxiliary display area 110 is proportional to the ratio of the brightness S1 of the auxiliary display area 110 and the aperture ratio A_a of the auxiliary display area 110, that is, S1_a ⁇ (S1/A_a ).
  • the brightness S2_b of the single pixel 02 in the main display area 120 is proportional to the ratio of the brightness S2 of the main display area 120 and the aperture ratio A_b of the main display area 120, that is, S2_b ⁇ (S2/A_b).
  • the aperture ratio is the ratio of the area of the light-emitting region of the sub-pixel to the area of the sub-pixel.
  • the areas of the light emitting regions of the first sub-pixel 20 a of the auxiliary display area 110 and the second sub-pixel 20 b of the main display area 120 are the same.
  • the area of the first sub-pixel 20 a of the auxiliary display area 110 is larger than the area of the second sub-pixel 20 b of the main display area 120. Therefore, the aperture ratio A_a of the auxiliary display area 110 is smaller than A_b of the main display area 120.
  • the brightness S1 of the auxiliary display area 110 needs to be the same as the brightness S2 of the main display area 120. Therefore, as can be seen from the above-mentioned relational expressions S1_a ⁇ (S1/A_a) and S2_b ⁇ (S2/A_b), the brightness S1_a of the single pixel 02 in the auxiliary display area 110 is greater than the brightness S2_b of the single pixel 02 in the main display area 120. That is, the luminous brightness of the OLED in any one of the first sub-pixels 20a of the auxiliary display area 110 is greater than the luminous brightness of the OLED in any of the second sub-pixels 20b of the main display area 120.
  • the light emission luminance of the OLED is proportional to the current I OLED (ie, the above-mentioned driving current I ds ) flowing through the OLED.
  • V is proportional to the voltage difference between the current I OLED OLED and the OLED anode (a) and a cathode (c).
  • the voltage difference V OLED (V 1 shown in FIG. 5a) between the anode (a) and cathode (c) of the OLED in the pixel circuit of the auxiliary display area 110 is greater than the main
  • the source voltage V sd1 of the driving transistor M4 in the pixel circuit 201 of the auxiliary display area 110 is greater than the source voltage V sd0 of the driving transistor M4 in the pixel circuit 201 of the main display area 120.
  • the pixel circuit 201 of the auxiliary display area 110 and the pixel circuit 201 of the main display area 120 share the voltage ELVDD and the voltage ELVSS, in order to meet the requirement that the auxiliary display area 110 needs to emit higher brightness, it is applied to the main display area In the 120-pixel circuit, the actual source voltage Vsd of the driving transistor M4 is located near the point A2 of the characteristic curve S_120 as shown in FIG. 5b.
  • the above driving transistor M4 can be fully opened, so that the main display area 120 displays the grayscale screen of G255. Since the voltage at point A2 is greater than the voltage at saturation point A1, it will result in wasted power.
  • the first power supply voltage V1 is greater than the second power supply voltage V2, and the third power supply voltage V3 is also greater than the second power supply voltage V2.
  • the second power supply voltage V2 may be the voltage ELVSS.
  • the pixel circuit 102 of the auxiliary display area 110 and the main display area 120 share the voltage ELVSS.
  • the first power supply voltage V1 may be about 5.6V.
  • the source voltage V sd of the first driving transistor M4a is located at the saturation point C1 (as shown in FIG. 13c) of the characteristic curve of the driving transistor M4a.
  • the third power supply voltage V3 may be about 4.6V.
  • the source voltage V sd of the second driving transistor M4b is located at the saturation point C2 (as shown in FIG. 13c) of the characteristic curve of the driving transistor M4b.
  • the display driving circuit 03 includes a power management integrated circuit (Power Management IC, PMIC) 30 as shown in FIG. 13a.
  • the PMIC 30 includes a first voltage terminal B1, a second voltage terminal B2, and a third voltage terminal B3.
  • the first voltage terminal B1 of the PMIC 30 serves as the first signal terminal 113 of the above-mentioned display driver 03.
  • the second voltage terminal B2 of the PMIC 30 serves as the second signal terminal 123 of the display driver 03 described above.
  • the third voltage terminal B3 of the PMIC 30 serves as the third signal terminal 133 of the display driver 03 described above.
  • the first electrode (source electrode s) of the first driving transistor M4a serves as The first sub-pixel 20a and the first voltage input terminal 112 of the middle pixel circuit 201 are electrically connected to the first voltage terminal B1 of the PMIC 30.
  • the first voltage terminal B1 of the PMIC 30 supplies the first power supply voltage V1 to the first electrode (source s) of the first driving transistor M4a.
  • the second electrode (drain d) of the first driving transistor M4a is electrically connected to the anode (a) of the first light emitting device D1 in the first sub-pixel 20a.
  • the cathode (c) of the first light emitting device D1 as the second voltage input terminal 122 of the pixel circuit 201 in the first sub-pixel 20a, is electrically connected to the second voltage terminal B2 of the PMIC 30.
  • the second voltage terminal B2 of the PMIC 30 supplies the above-mentioned second power supply voltage V2, that is, the voltage ELVSS, to the cathode (c) of the first light emitting device D1.
  • the first electrode (source electrode s) of the second driving transistor M4b in the main display area 120 serves as the second sub-pixel
  • the third voltage input terminal 132 of the pixel circuit 201 in 20b is electrically connected to the third voltage terminal B3 of the PMIC 30.
  • the third voltage terminal B3 of the PMIC 30 supplies the third power supply voltage V3 to the first electrode (source electrode s) of the second driving transistor M4b.
  • the second electrode (drain d) of the second driving transistor M4b is electrically connected to the anode (a) of the second light-emitting device D2 in the second sub-pixel 20b.
  • the cathode (c) of the above second light emitting device D2 serves as the fourth voltage input terminal 142 of the pixel circuit 201 in the second sub-pixel 20b, and is electrically connected to the second voltage terminal B2 of the PMIC 30.
  • the second voltage terminal B2 of the PMIC 30 supplies the above-mentioned second power supply voltage V2, that is, the voltage ELVSS, to the cathode (c) of the second light emitting device D2. Therefore, the purpose of sharing the ELVSS between the first sub-pixel 20a and the second sub-pixel 20b is achieved.
  • the pixel circuit 201 of the auxiliary display area 110 and the pixel circuit 201 of the main display area 120 share the second power supply voltage V2 output from the second voltage terminal B2 of the PMIC 30, that is, the voltage ELVSS.
  • the second voltage terminal B2 PMIC30 current sink current sink
  • the first power supply voltage V1 is greater than the second power supply voltage V2, and the third power supply voltage V3 is also greater than the second power supply voltage V2.
  • the second power supply voltage V2 may be the voltage ELVSS.
  • the pixel circuit 102 of the auxiliary display area 110 and the main display area 120 share the voltage ELVSS.
  • the above display driving circuit 03 includes two PMICs 30 as shown in FIG. 13b, including a first PMIC 30_a and a second PMIC 30_b.
  • the first PMIC30_a includes a first voltage terminal B1 and a second voltage terminal B2.
  • the second PMIC30_a includes a third voltage terminal B3 and a fourth voltage terminal B4.
  • the first voltage terminal B1 of the first PMIC30_a serves as the first signal terminal 113 of the display driver 03 described above.
  • the third voltage terminal B3 of the second PMIC30_b serves as the third signal terminal 133 of the display driver 03 described above.
  • the second voltage terminal B2 of the first PMIC30_a serves as the second signal terminal 123 of the display driver 03 described above.
  • the fourth voltage terminal B4 of the second PMIC 30_b serves as the second signal terminal 123 of the display driver 03 described above.
  • the first electrode (source) of the first driving transistor M4a Pole s) as the first voltage input terminal 112 of the pixel circuit 201 in the first sub-pixel 20a is electrically connected to the first voltage terminal B1 of the first PMIC 30_a.
  • the first voltage terminal B1 of the first PMIC30_a supplies the first power supply voltage V1 to the first electrode (source electrode s) of the first driving transistor M4a.
  • the second electrode (drain d) of the first driving transistor M4a is electrically connected to the anode (a) of the first light-emitting device D1 in the first sub-pixel 20a.
  • the cathode (c) of the first light emitting device D1 serves as the second voltage input terminal 122 of the pixel circuit 201 in the first sub-pixel 20a, and is electrically connected to the second voltage terminal B2 of the first PMIC 30_a.
  • the second voltage terminal B2 of the first PMIC30_a supplies the above-mentioned second power supply voltage V2, that is, the voltage ELVSS, to the cathode (c) of the first light emitting device D1.
  • the first electrode (source electrode s) of the second driving transistor M4b serves as the second sub-pixel 20b
  • the third voltage input terminal 132 of the middle pixel circuit 201 is electrically connected to the third voltage terminal B3 of the second PMIC 30_b.
  • the third voltage terminal B3 of the second PMIC 30_b supplies the third power supply voltage V3 to the first electrode (source electrode s) of the second driving transistor M4b.
  • the second electrode (drain d) of the second driving transistor M4b is electrically connected to the anode (a) of the second light emitting device D2 in the second sub-pixel 20b.
  • the cathode (c) of the second light-emitting device D2 serves as the fourth voltage input terminal 142 of the pixel circuit 201 in the second sub-pixel 20b, and is electrically connected to the second voltage terminal B2 of the first PMIC 30_a.
  • the second voltage terminal B2 of the first PMIC 30_a supplies the above-mentioned second power supply voltage V2, that is, the voltage ELVSS, to the cathode (c) of the second light emitting device D2, thereby achieving the purpose of sharing the ELVSS between the first sub-pixel 20a and the second sub-pixel 20b.
  • the fourth voltage terminal B4 of the second PMIC30_b is vacant.
  • the cathode (c) of the first light emitting device D1 and the cathode (c) of the second light emitting device D2 are respectively electrically connected to the fourth voltage terminal B4 of the second PMIC 30_b.
  • the fourth voltage terminal B4 of the second PMIC 30_b supplies the above-mentioned second power supply voltage V2, that is, the voltage ELVSS, to the cathode (c) of the first light emitting device D1 and the cathode (c) of the second light emitting device D2.
  • the second voltage terminal B2 of the first PMIC30_a is empty.
  • the auxiliary display area 110 and the pixel circuit 201 of the main display area 120 share the second voltage terminal B2 of the first PMIC30_a or the fourth voltage terminal B4 of the second PMIC30_a.
  • the current absorption capability of the second voltage terminal B2 of the first PMIC30_a or the fourth voltage terminal B4 of the second PMIC30_a provides the current I B1 and the second PMIC30_a for the first voltage terminal B1 of the first PMIC30_a
  • the third voltage terminal B3 provides the sum of the current I B3 .
  • Example 3 and Example 4 the pixel circuit 201 of the auxiliary display area 110 is supplied with the first power supply voltage V1.
  • the third power supply voltage V3 is supplied to the pixel circuit 201 of the main display area 120.
  • the pixel circuit 201 of the auxiliary display area 110 can make the first driving transistor M4a under the action of the first power supply voltage V1
  • the actual source voltage V sd is located near the saturation point C1 of the characteristic curve S_110 as shown in FIG. 13c.
  • the actual source voltage V sd of the second driving transistor M4b is located near the saturation point C2 of the characteristic curve S_120 as shown in FIG. 13c.
  • the source voltage V sd of the first driving transistor M4a in the pixel circuit 201 of the auxiliary display area 110 and the second driving transistor M4b in the pixel circuit 201 of the main display area 120 Both are near the saturation point.
  • the above-mentioned first driving transistor M4a and second driving transistor M4b are just in the fully-open state, so there is no need to provide a higher voltage to allow the first driving transistor M4a and the second driving transistor M4b to be completely turned on, so as to save power The purpose of consumption.
  • the first power supply voltage V1 is smaller than the second power supply voltage V2, and the third power supply voltage V3 is also smaller than the second power supply voltage V2.
  • the second power supply voltage V2 may be the voltage ELVDD.
  • the pixel circuit 102 of the auxiliary display area 110 and the main display area 120 share the voltage ELVDD.
  • the first power supply voltage V1 the third power supply voltage V3.
  • the above-mentioned display driving circuit 03 includes a PMIC 30 as shown in FIG. 14a.
  • the PMIC 30 includes a first voltage terminal B1, a second voltage terminal B2, and a third voltage terminal B3.
  • the first voltage terminal B1 of the PMIC 30 serves as the first signal terminal 113 of the display driver 03 described above.
  • the second voltage terminal B2 of the PMIC 30 serves as the second signal terminal 123 of the display driver 03 described above.
  • the third voltage terminal B3 of the PMIC 30 serves as the third signal terminal 133 of the display driver 03 described above.
  • the first electrode (source electrode s) of the first driving transistor M4a serves as the first sub-pixel
  • the second voltage input terminal 122 of the pixel circuit 201 in 20a is electrically connected to the second voltage terminal B2 of the PMIC 30.
  • the second voltage terminal B2 of the PMIC 30 is used to provide the first electrode (source s) of the first driving transistor M4a Two power supply voltage V2, namely ELVDD.
  • the second electrode (drain s) of the first driving transistor M4a is electrically connected to the anode (a) of the first light emitting device D1.
  • the cathode (c) of the first light emitting device D1 serves as the first voltage input terminal 112 of the pixel circuit 201 in the first sub-pixel 20a, and is electrically connected to the first voltage terminal B1 of the PMIC 30.
  • the first voltage terminal B1 of the PMIC 30 is used to provide the first power supply voltage V1 to the cathode (c) of the first light emitting device D1.
  • the first electrode (source electrode s) of the second driving transistor M4b serves as the second sub-pixel 20b
  • the fourth voltage input terminal 142 of the middle pixel circuit 201 is electrically connected to the second voltage terminal B2 of the PMIC 30.
  • the second terminal B of the PMIC 30 is used to provide the second power supply voltage V2, that is, ELVDD, to the first electrode (source electrode s) of the second driving transistor M4b.
  • the second electrode of the second driving transistor M4b is electrically connected to the anode (a) of the second light emitting device D2.
  • the cathode (c) of the second light emitting device D2 serves as the third voltage input terminal 132 of the pixel circuit 201 in the second sub-pixel 20b, and is electrically connected to the third voltage terminal B3 of the PMIC 30.
  • the cathode (c) of the second light emitting device D2 at the third terminal B of the PMIC 30 provides a third power supply voltage V3.
  • the current absorbing capability of the first voltage terminal B1 of the PMIC30 and the third voltage terminal B3 of the PMIC30 is greater than the current provided by the second voltage terminal B2 of the PMIC30.
  • the first power supply voltage V1 is smaller than the second power supply voltage V2, and the third power supply voltage V3 is also smaller than the second power supply voltage V2.
  • the second power supply voltage V2 may be the voltage ELVDD.
  • the pixel circuit 102 of the auxiliary display area 110 and the main display area 120 share the voltage ELVDD.
  • the first power supply voltage V1 the third power supply voltage V3.
  • the above display drive circuit 03 includes two PMICs 30 as shown in FIG. 14b, including a first PMIC 30_a and a second PMIC 30_b.
  • the first PMIC30_a includes a first voltage terminal B1 and a second voltage terminal B2.
  • the second PMIC30_a includes a third voltage terminal B3 and a fourth voltage terminal B4.
  • the first voltage terminal B1 of the first PMIC30_a serves as the first signal terminal 113 of the display driver 03 described above.
  • the third voltage terminal B3 of the second PMIC30_b serves as the third signal terminal 133 of the display driver 03 described above.
  • the second voltage terminal B2 of the first PMIC30_a serves as the second signal terminal 123 of the display driver 03 described above.
  • the fourth voltage terminal B4 of the second PMIC 30_b serves as the second signal terminal 123 of the display driver 03 described above.
  • the first electrode (source) of the first driving transistor M4a Pole s) as the second voltage input terminal 122 of the pixel circuit 201 in the first sub-pixel 20a is electrically connected to the second voltage terminal B2 of the first PMIC 30_a.
  • the second voltage terminal B2 of the first PMIC30_a provides the second power supply voltage V2 to the first electrode (source s) of the first driving transistor M4a, that is, the aforementioned ELVDD.
  • the second electrode (drain d) of the first driving transistor M4a is electrically connected to the anode (a) of the first light-emitting device D1 in the first sub-pixel 20a.
  • the cathode (c) of the first light emitting device D1 serves as the first voltage input terminal 112 of the pixel circuit 201 in the first sub-pixel 20a, and is electrically connected to the first voltage terminal B1 of the first PMIC 30_a.
  • the first voltage terminal B1 of the first PMIC 30_a supplies the above-mentioned first power supply voltage V1 to the cathode (c) of the first light emitting device D1.
  • the first electrode (source electrode s) of the second driving transistor M4b serves as the second sub-pixel 20b
  • the fourth voltage input terminal 142 of the middle pixel circuit 201 is electrically connected to the second voltage terminal B2 of the first PMIC 30_a.
  • the second voltage terminal B2 of the first PMIC30_a supplies the second power supply voltage V2, that is, the above-mentioned ELVDD, to the first electrode (source electrode) of the second driving transistor M4b. Therefore, the purpose of sharing the ELVDD with the first sub-pixel 20a and the second sub-pixel 20b is achieved. At this time, the fourth voltage terminal B4 of the second PMIC30_b is vacant.
  • the second electrode (drain d) of the second driving transistor M4b is electrically connected to the anode (a) of the second light emitting device D2 in the second sub-pixel 20b.
  • the cathode (c) of the second light-emitting device D2 serves as the third voltage input terminal 132 of the pixel circuit 201 in the second sub-pixel 20b, and is electrically connected to the third voltage terminal B3 of the second PMIC 30_b.
  • the third voltage terminal B3 of the second PMIC30_b supplies the above-mentioned third power supply voltage V3, that is, the voltage ELVSS, to the cathode (c) of the second light emitting device D2.
  • the first electrode (source s) of the first driving transistor M4a and the first electrode (source s) of the second driving transistor M4b may be electrically connected to the fourth voltage terminal B4 of the second PMIC 30_b.
  • the fourth voltage terminal B4 of the second PMIC 30_b provides the third power supply voltage V3, that is, the voltage to the first electrode (source s) of the first driving transistor M4a and the first electrode (source s) of the second driving transistor M4b ELVSS.
  • the second voltage terminal B2 of the first PMIC30_a is empty.
  • the current absorbing capability of the first voltage terminal B1 of the first PMIC30_a and the third voltage terminal B3 of the second PMIC30_a is greater than the second voltage terminal B2 of the first PMIC30_a or the second voltage terminal of the second PMIC30_a Current provided by B2.
  • Example 5 and Example 6 it can be known from Example 5 and Example 6 that in the auxiliary display area 110, the voltages applied to the cathodes of the respective light-emitting devices, such as OLEDs, are the same. In the main display area 120, the cathode of each OLED needs to be applied with the same voltage. In addition, the cathode of any OLED in the auxiliary display area 110 is different from the voltage applied to the cathode of any OLED in the main display area 120.
  • the display screen 10 includes a cathode layer 300.
  • the cathode layer 300 is disposed in the AA region 100 described above.
  • the cathode layer 300 includes a first electrode block 301 located in the auxiliary display area 110 and a second electrode block 302 located in the main display area 120.
  • the first electrode block 301 serves as the cathode 24 of each OLED in the auxiliary display area 110.
  • the second electrode block 302 serves as the cathode 24 of each OLED in the main display area 120.
  • the first electrode block 301 is electrically connected to the first voltage terminal B1 of the PMIC 30, so that the first voltage terminal B1 receiving the PMIC 30 provides the first A supply voltage V1.
  • the second electrode block 302 is electrically connected to the third voltage terminal B3 of the PMIC 30 so that the third voltage terminal B3 of the receiving PMIC 30 provides the third power supply voltage V3.
  • the size of the gap H can be reduced as much as possible to avoid that the OLED at the position of the gap H cannot be provided with the cathode 24, so that the sub-pixel 20 with the OLED cannot be performed display.
  • the display screen 10 includes a thin film transistor (TFT) backplane 400.
  • TFT thin film transistor
  • the display screen 10 further includes a pixel definition layer (PDL) 21 located above the TFT backplane 400, and a plurality of OLEDs.
  • PDL pixel definition layer
  • the pixel definition layer 21 is provided with a plurality of through holes, and each sub-pixel 20 has one through hole.
  • the through holes are filled with anode 22 and organic functional layer 23 of OLED.
  • the organic functional layer 23 may in turn include a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, and an electron injection layer.
  • the cathodes 24 of the respective OLEDs are connected to each other to form an integrated structure, forming the above-mentioned first electrode block 301.
  • the cathodes 24 of the respective OLEDs are connected to each other to form an integrated structure, forming the above-mentioned second electrode block 302.
  • a mobile terminal 01 having a display screen 10 for example, a mobile phone, can be divided into at least two display sub-areas.
  • the AA area 100 of the display screen 10 can be divided into a display sub-area A, a display sub-area B, and a display sub-area C.
  • the display sub-region C may be bent to the back of the display screen 10 (ie, the non-display side).
  • the user only needs to view the images displayed in the display sub-area A and the display sub-area B.
  • the display brightness of the display sub-region C can be reduced, that is, the light-emitting brightness of the OLED in each pixel circuit 20 in the display sub-region C can be reduced.
  • each pixel circuit 20 in the display sub-region A and the display sub-region C can be lowered In the light-emitting brightness of OLED.
  • the display screen 10 includes at least one PMIC 30 and a processor 31 electrically connected to the PMIC 30.
  • FIG. 21a is described by taking the display screen 10 having one PMIC 30 as an example.
  • the effective display area 100 has 1080 rows of sub-pixels 20 in the horizontal direction X and 1920 columns of sub-pixels in the vertical direction Y.
  • the display sub-region A includes the sub-pixels 20 in the first to 640th columns in the vertical direction Y.
  • the display sub-region B includes the sub-pixels 20 in the 641st to 1280th columns in the vertical direction Y.
  • the display sub-region C includes sub-pixels 20 in the 1281th to 1920th columns in the vertical direction Y.
  • the display sub-region A, the display sub-region B, and the display sub-region C all have 1080 lines of sub-pixels along the horizontal direction X.
  • the sub-pixels in the display sub-region A are called first sub-pixels 20a, and a plurality of first sub-pixels 20a constitute a first pixel array
  • the sub-pixels in the display sub-region B This is called a second sub-pixel 20b, and a plurality of second sub-pixels 20b constitute a second sub-pixel array
  • the sub-pixels in the display sub-region C are called third sub-pixels 20c, and a plurality of third sub-pixels 20c constitute a third sub-pixel array.
  • the PMIC 30 has a first voltage terminal B1, a second voltage terminal B2, a third voltage terminal B3, and a fourth voltage terminal B4.
  • the first driving transistor M4a is electrically connected to the first voltage terminal B1 of the PMIC 30.
  • the first voltage terminal B1 of the PMIC 30 is used to individually supply the first power supply voltage V1 to each pixel circuit 201 in the display sub-region A.
  • the second driving transistor M4b is electrically connected to the third voltage terminal B3 of the PMIC 30.
  • the third voltage terminal B2 of the PMIC 30 is used to individually provide the third power supply voltage V3 to each pixel circuit 201 in the display sub-region B.
  • the third driving transistor M4c is electrically connected to the fourth voltage terminal B4 of the PMIC 30.
  • the fourth voltage terminal B4 of the PMIC 30 is used to individually provide the fourth power supply voltage V4 to each pixel circuit 201 in the display sub-region C.
  • the cathode (c) of the first light-emitting device D1 of the display sub-region A, the second light-emitting device D2 of the display sub-region B, and the third light-emitting device D3 in the display sub-region C are electrically connected to the fourth voltage terminal B4 of the PMIC 30 connection.
  • the second voltage terminal B2 of the PMIC 30 is used to simultaneously feed the first light emitting device D1 of the display sub-region A1, the second light emitting device D2 of the display sub-region B, and the cathode of the first light-emitting device D1 in the display sub-region C ( c) Provide the second power supply voltage V2, that is, ELVSS.
  • V2 the second power supply voltage
  • the pixel circuits of the display sub-region A, the display sub-region B, and the display sub-region C share the voltage ELVSS.
  • the voltage values of the first power supply voltage V1, the third power supply voltage V3, and the fourth power supply voltage V4 are different. Also, V1>V2; V3>V2; V4>V2.
  • the current sinking capability of the second voltage terminal B2 of the PMIC30 is greater than or equal to the sum of the output currents of the first voltage terminal B1 of the PMIC30, the third voltage terminal B3 of the PMIC30, and the fourth voltage terminal B4 of the PMIC30.
  • the display screen 01 further includes a base substrate.
  • the first pixel array in the display sub-region A, the second pixel array in the display sub-region B, and the third pixel array in the display sub-region C are disposed on the base substrate.
  • the material constituting the above base substrate includes a flexible resin material.
  • the present application provides a control method of a mobile terminal having the display screen shown in FIG. 21b includes:
  • the display driver 03 detects that the display sub-region A having the above-mentioned first sub-pixel array is bent to the non-display side of the display screen 01.
  • the display driver 03 includes a processor 31 connected to the PMIC 30 as shown in FIG. 21a.
  • the processor 31 is used to detect whether each display sub-region is bent to the back of the display screen 10, and send a brightness control signal to the PMIC 30 according to the detection result.
  • the above method further includes: reducing the first signal terminal 113 of the display driver 03, that is, the first voltage terminal B1 of the PMIC 30, to the first sub-pixel 20a in the display sub-region A having the first sub-pixel array
  • the first power supply voltage V1 input from the first voltage input terminal 112 of the pixel circuit (ie the first electrode of the first driving transistor M4a).
  • the second signal terminal 123 of the display driver 03 that is, the second voltage terminal B2 of the PMIC 30 described above, is added to the second voltage input terminal 122 of the pixel circuit of the first sub-pixel 20a (ie, the cathode of the first light emitting device D1) At the second power supply voltage V2, the light emission luminance of the first sub-pixel 20a decreases.
  • the processor 31 detects that the display sub-region A having the first sub-pixel array is bent to the back of the display screen 10, it sends a brightness control signal to the PMIC 30.
  • the PMIC 30 may decrease the first power supply voltage V1 input from the first voltage terminal B1 of the PMIC 30 or increase the first power supply voltage V1 input from the second voltage terminal B2 of the PMIC 30 according to the brightness control signal. As a result, the light emission brightness of the display sub-region A is reduced.
  • the above description is based on the case where the display sub-region A is bent to the back of the display screen 10 as an example.
  • the processor 31 detects that other display sub-regions are bent to the back of the display screen 10, the manner of reducing the brightness of the other display sub-areas is the same Available, no more details here.
  • a varistor may be provided on the flexible substrate of the display screen 10 and located at the boundary between two adjacent display sub-areas, for example, display sub-area B and display sub-area C (FIG. Not shown).
  • the processor 31 can adjust the resistance according to the detected resistance , The brightness control signal is sent to PMIC30.
  • the display screen 10 in order to perform zone brightness control on each display sub-area of the display screen 10, as shown in FIG. 22a, the display screen 10 includes three PMICs, such as the first PMIC 30_a and the second PMIC30_b and the third PMIC30_c.
  • the display screen 10 further includes a processor 31 electrically connected to the above three PMICs.
  • the first PMIC30_a has a first voltage terminal B1 and a second voltage terminal B2.
  • the second PMIC30_b has a third voltage terminal B3 and a fourth voltage terminal B4.
  • the third PMIC30_c has a fifth voltage terminal B5 and a sixth voltage terminal B6.
  • the first electrode (source s) of the first driving transistor M4a is electrically connected to the first voltage terminal B1 of the first PMIC 30_a.
  • the first voltage terminal B1 of the first PMIC30_a is used to individually supply the first power supply voltage V1 to each pixel circuit 201 in the display sub-region A.
  • the first electrode (source s) of the second driving transistor M4b is electrically connected to the third voltage terminal B3 of the second PMIC 30_b.
  • the third voltage terminal B3 of the second PMIC 30_b is used to separately provide the third power supply voltage V3 to each pixel circuit 201 in the display sub-region B.
  • the first electrode (source electrode s) of the third driving transistor M4c is electrically connected to the fifth voltage terminal B5 of the third PMIC 30_c.
  • the fifth voltage terminal B5 of the third PMIC30_c is used to separately supply the fifth power supply voltage V5 to each pixel circuit 201 in the display sub-region C.
  • the cathode (c) of the first light-emitting device D1 in the display sub-region A, the cathode (c) of the second light-emitting device D2 in the display sub-region B, and the cathode (c) of the third light-emitting device D3 in the display sub-region C Each is electrically connected to the second voltage terminal B2 of the first PMIC30_a. At this time, the fourth voltage terminal B4 of the second PMIC30_b and the sixth voltage terminal B6 of the third PMIC30_c are vacant.
  • the second voltage terminal B2 of the first PMIC30_a is used to simultaneously provide the second power supply voltage V2 to the cathodes of the light emitting devices in each pixel circuit 201 in the display sub-region A, the display sub-region B, and the display sub-region C, namely Voltage ELVSS. Therefore, the pixel circuits 201 in the display sub-region A, the display sub-region B, and the display sub-region C share the voltage ELVSS.
  • the voltage values of the first power supply voltage V1, the third power supply voltage V3, and the fifth power supply voltage V5 are different. Also, V1>V2; V3>V2; V5>V2.
  • the current sinking capability of the second voltage terminal B2 of the first PMIC30_a is greater than or equal to the first voltage terminal B1 of the first PMIC30_a, the third voltage terminal B3 of the second PMIC30_b, and the fifth voltage terminal B5 of the third PMIC30_c output The sum of currents.
  • the cathode (c) of the first light emitting device D1 in the pixel circuit of the display sub-region A, and the cathode (c) of the second light emitting device D2 in the pixel circuit of the display sub-region B, And the cathode (c) of the third light emitting device D3 in the pixel circuit of the display sub-region C is respectively electrically connected to the fourth voltage terminal B4 of the second PMIC30_b or the sixth voltage terminal B6 of the third PMIC30_c.
  • the fourth voltage terminal B4, or the sixth voltage terminal B6 of the third PMIC30_c is used to simultaneously emit light to the light emitting device in each pixel circuit 201 in the display sub-region A, the display sub-region B, and the display sub-region C
  • the cathode supplies the above voltage ELVSS.
  • the processor 31 detects whether each display sub-region is bent to the back of the display screen 10.
  • the processor 31 sends a brightness control signal to the third PMIC 30_c.
  • the third PMIC30_c reduces the fifth power supply voltage V5 output from the fifth voltage terminal B5 of the third PMIC30_c according to the brightness control signal. As a result, the light emission brightness of the display sub-region C is reduced.
  • each pixel circuit 201 in the display sub-region A, the display sub-region B, and the display sub-region C receives the same voltage ELVSS to independently control the brightness of each display sub-region.
  • the pixel circuit 201 of each display sub-region may also have the same voltage ELVDD.
  • the settings of the PMIC and the cathode layer 300 in the display screen 10 are the same as those in the first embodiment, and are not repeated here.
  • a mobile terminal 01 having a display screen 10 for example, a mobile phone, can be divided into at least two display sub-areas.
  • the AA area 100 of the display screen 10 can be divided into a display sub-area A and a display sub-area B.
  • the display sub-area A and the display sub-area B display different contents.
  • the sub-zone B is displayed to play movies.
  • the mobile terminal 01 When the mobile terminal 01 receives dialogue information, such as WeChat content, the dialogue information displayed in the sub-area A is displayed. When the mobile terminal 01 does not receive the dialogue information, the display sub-area A and the display sub-area B display the same screen together.
  • dialogue information such as WeChat content
  • the display sub-area B of the movie is usually played, and its light emission brightness is relatively dark.
  • the display sub-area A displaying the dialogue information has a brighter brightness. Then the dialogue information displayed in the display sub-area A is too dazzling, which will reduce the user's viewing effect. At this time, it is necessary to separately control the brightness of the display sub-area A and the display sub-area B to reduce the brightness of the display sub-area A.
  • the display screen 10 includes at least one PMIC 30 and a processor 31 electrically connected to the PMIC 30.
  • FIG. 24 is an example in which the display screen 10 has one PMIC 30 as an example.
  • the effective display area 100 has 1920 rows of sub-pixels 20 in the horizontal direction X and 1080 columns of sub-pixels in the vertical direction Y.
  • the display sub-region A includes the sub-pixels 20 in the first to 640th rows in the horizontal direction X.
  • the display sub-region B includes sub-pixels 20 in the 641st to 1920th rows in the horizontal direction.
  • the display sub-region A and the display sub-region B each have 1080 columns of sub-pixels in the vertical direction and the flat direction Y.
  • the PMIC 30 has a first voltage terminal B1, a second voltage terminal B2, and a third voltage terminal B3.
  • the first electrode (source s) of the first driving transistor M4a is electrically connected to the first voltage terminal B1 of the PMIC 30.
  • the first voltage terminal B1 of the PMIC 30 is used to individually supply the first power supply voltage V1 to each pixel circuit 201 in the display sub-region A.
  • the first electrode (source s) of the second driving transistor M4a is electrically connected to the second voltage terminal B2 of the PMIC 30.
  • the third voltage terminal B3 of the PMIC 30 is used to individually provide the third power supply voltage V3 to each pixel circuit 201 in the display sub-region B.
  • the cathode (c) of the first light-emitting device D1 in the pixel circuit 201 of the display sub-region A and the cathode (c) of the second light-emitting device D2 in the pixel circuit 201 of the display sub-region B are respectively different from the second of the PMIC 30
  • the voltage terminal B2 is electrically connected.
  • the second voltage terminal B2 of the PMIC 30 is used to provide each pixel circuit 201 in the display sub-region A and the display sub-region B with the second power supply voltage V2, that is, the voltage ELVSS.
  • the voltage values of the first power supply voltage V1 and the third power supply voltage V3 are different, and V1>V2; V3>V2.
  • the two PMICs are used to provide different first power supply voltage V1 and third power supply voltage V3 to the display sub-area A and the display sub-area B, respectively.
  • the setting methods of the above two PMICs are the same as the principle of the second embodiment, and will not be repeated here.
  • the processor 31 is electrically connected to the PMIC.
  • the processor 31 detects that the display sub-region A displays dialogue information, and the display sub-region B plays a movie, it sends a brightness control signal to the PMIC 30.
  • the PMIC 30 may reduce the first power supply voltage V1 output from the first voltage terminal B1 of the PMIC 30 according to the brightness control signal. As a result, the light emission brightness of the display sub-region A is reduced. To prevent the dialogue information displayed in the display sub-area A from being too dazzling and affecting the display effect.
  • the display sub-region B displays a background image.
  • the mobile terminal 01 When the mobile terminal 01 receives the dialogue information, the dialogue information displayed in the sub-region A is displayed. When the mobile terminal 01 does not receive the dialogue information, the display sub-area A and the display sub-area B display the same screen together.
  • the display sub-region B displaying the background image is equivalent to the light-emitting luminance of the display sub-region A displaying the dialog information. Then it will cause users to easily ignore important information. At this time, it is necessary to separately control the brightness of the display sub-area A and the display sub-area B to increase the brightness of the display sub-area A.
  • the processor 31 detects that the display sub-region A displays dialogue information and the display sub-region B displays a background image, it sends a brightness control signal to the PMIC 30.
  • the PMIC 30 may increase the first power supply voltage V1 output from the first voltage terminal B1 of the PMIC 30 according to the brightness control signal. As a result, the light emission brightness of the display sub-region A is improved. Prevent the dialogue information displayed in the display subarea A from being ignored.

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Abstract

一种显示屏、移动终端及其控制方法，显示屏包括显示驱动器（03）、第一像素阵列（41）和第二像素阵列（42），第一亚像素（20a）的像素电路的第一电压输入端（112）与显示驱动器（03）的第一信号端（113）电连接，接收第一信号端（113）输出的第一供电电压，第二电压输入端（122）与显示驱动器（03）的第二信号端（123）电连接，接收第二信号端（123）输出的第二供电电压；第二亚像素（20b）的像素电路的第三电压输入端（132）与显示驱动器（03）的第三信号端（133）电连接，接收第三信号端（133）输出的第三供电电压，第四电压输入端（142）与显示驱动器（03）的第二信号端（123）电连接，接收第二信号端（123）输出的第二供电电压；第三供电电压与第一供电电压的电压值不同。

Description

一种显示屏、移动终端及其控制方法
本申请要求在2018年12月25日提交中国国家知识产权局、申请号为201811593997.0、发明名称为“一种显示屏、移动终端及其控制方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示屏、移动终端及其控制方法。
背景技术
随着显示技术的不断发展，具有显示功能的移动终端，例如手机、平板电脑、智能手表等在市场上的占有率越来越大。然而，目前移动终端无法根据用户的需求或者产品设计要求，实现分区域亮度控制，从而不利于提高产品在市场中的竞争能力。
发明内容
本申请提供一种显示屏、移动终端及其控制方法，解决移动终端无法根据用户的需求或者产品设计要求，实现分区域亮度控制的问题。
为达到上述目的，本申请采用如下技术方案：
本申请的一方面，提供一种显示屏，显示屏包括显示驱动器、第一像素阵列以及第二像素阵列。显示驱动器包括第一信号端、第二信号端以及第三信号端。此外，第一像素阵列中包括多个第一亚像素，第一亚像素中的像素电路包括第一电压输入端和第二电压输入端。第二像素阵列中包括多个第二亚像素，第二亚像素中的像素电路包括第三电压输入端和第四电压输入端。在此基础上，第一亚像素的像素电路的第一电压输入端与显示驱动器的第一信号端电连接，接收第一信号端输出的第一供电电压。第二电压输入端与显示驱动器的第二信号端电连接，接收第二信号端输出的第二供电电压。第二亚像素的像素电路的第三电压输入端与显示驱动器的第三信号端电连接，接收第三信号端输出的第三供电电压。第四电压输入端与显示驱动器的第二信号端电连接，接收第二信号端输出的第二供电电压。其中第三供电电压与第一供电电压的电压值不同。这样一来，通过对第一像素阵列和第二像素阵列的像素电路分别进行供电，从而对第一像素阵列所在区域中各个像素电路的△V＝ELVDD-ELVSS的大小，以及第二像素阵列所在区域中各个像素电路的△V＝ELVDD-ELVSS的大小分别进行调整，从而实现显示屏的亮度分区控制。
可选的，显示驱动器的第一信号端输出的第一供电电压，大于显示驱动器的第二信号端输出的第二供电电压。显示驱动器的第三信号端输出的第三供电电压，大于显示驱动器的第二信号端输出的第二供电电压。在此情况下，第一亚像素和第二亚像素可以共用上述第二供电电压，即该第二供电电压为电压ELVSS。
可选的，第一像素阵列中的第一亚像素的像素电路包括第一驱动晶体管和第一发光器件。第一驱动晶体管的第一极与显示驱动器的第一信号端电连接，第一驱动晶体管的第二极与第一发光器件的阳极电连接；第一发光器件的阴极与显示驱动器的第二信号端电连接。第二像素阵列中包括多个第二亚像素，第二亚像素中的像素电路包括第二驱动晶体管和第二发光器件。第二驱动晶体管的第一极与显示驱动器的第三信号端电连接，第二驱动晶体管的第二极与第二发光器件的阳极电连接；第二发光器件的阴极与显示驱动器的第二信号端电连接。在此情况下，第一驱动晶体管的第一极为上述第一亚像素的像素电路的第一电压输入端。第一 发光器件的阴极为上述第一亚像素的像素电路的第二电压输入端。第二驱动晶体管的第一极为上述第二亚像素的像素电路的第三电压输入端。第二发光器件的阴极为上述第二亚像素的像素电路的第四电压输入端。
可选的，显示驱动器的第一信号端输出的第一供电电压，小于显示驱动器的第二信号端输出的第二供电电压。显示驱动器的第三信号端输出的第三供电电压，小于显示驱动器的第二信号端输出的第二供电电压。在此情况下，第一亚像素和第二亚像素可以共用上述第二供电电压，该第二供电电压为电压ELVSS。
可选的，第一像素阵列中的第一亚像素的像素电路包括第一驱动晶体管和第一发光器件。第一驱动晶体管的第一极与显示驱动器的第二信号端电连接，第一驱动晶体管的第二极与第一发光器件的阳极电连接；第一发光器件的阴极与显示驱动器的第一信号端电连接。第二像素阵列中包括多个第二亚像素，第二亚像素中的像素电路包括第二驱动晶体管和第二发光器件。第二驱动晶体管的第一极与显示驱动器的第二信号端电连接，第二驱动晶体管的第二极与第二发光器件的阳极电连接；第二发光器件的阴极与显示驱动器的第三信号端电连接。在此情况下，第一驱动晶体管的第一极为上述第一亚像素的像素电路的第二电压输入端。第一发光器件的阴极为上述第一亚像素的像素电路的第一电压输入端。第二驱动晶体管的第一极为上述第二亚像素的像素电路的第四电压输入端。第二发光器件的阴极为上述第二亚像素的像素电路的第三电压输入端。
可选的，显示驱动器包括一个电源管理集成电路。该电源管理集成电路包括第一电压端、第二电压端，以及第三电压端。电源管理集成电路的第一电压端与第一亚像素的像素电路的第一电压输入端电连接。电源管理集成电路的第二输出端与第一亚像素的像素电路的第二电压输入端，以及第二亚像素的像素电路的第四电压输入端电连接。电源管理集成电路的第三输出端与第二亚像素的像素电路的第三电压输入端电连接。从而可以通过一个电源管理集成电路分别控制第一像素阵列所在的区域和第二像素阵列所在的区域的亮度。
可选的，显示驱动器包括第一电源管理集成电路和第二电源管理集成电路。第一电源管理集成电路包括第一电压端和第二电压端。第二电源管理集成电路包括第三电压端和第四电压端。第一电源管理集成电路的第一电压端与第一亚像素的像素电路的第一电压输入端电连接。第二电源管理集成电路的第三电压端与第二亚像素的像素电路的第三电压输入端电连接。第一电源管理集成电路的第二电压端与第一亚像素的像素电路的第二电压输入端，以及第二亚像素的像素电路的第四电压输入端电连接。或者，第二电源管理集成电路的第四电压端与第一亚像素的像素电路的第二电压输入端，以及第二亚像素的像素电路的第四电压输入端电连接。从而可以通过第一电源管理集成电路和第二电源管理集成电路分别控制第一像素阵列所在的区域和第二像素阵列所在的区域的亮度。
可选的，有效显示区包括辅助显示区和主显示区。其中，辅助显示区的非显示侧用于集成摄像头或传感器。第一像素阵列位于辅助显示区。第二像素阵列位于主显示区。辅助显示区的像素密度小于主显示区的像素密度。这样一来，辅助显示区中亚像素具有更多的透光面积，从而使得位于辅助显示区的非显示侧的摄像头或传感器接收或发出的穿过显示屏的光线更多。
可选的，第一亚像素的像素电路占据的遮光面积，与第二亚像素的像素电路占据的遮光面积相同。第一亚像素中除了像素电路以外的透光面积，大于第二亚像素中除了像素电路以外的透光面积。
可选的，显示屏还包括衬底基板；第一像素阵列、第二像素阵列设置于衬底基板上。其中，构成衬底基板的材料包括柔性树脂材料。显示驱动电路还包括处理器，处理器与至少一个电源管理集成电路电连接，处理器用于检测第一像素阵列或第二像素阵列弯折至显示屏的非显示侧时，向至少一个电源管理集成电路输出亮度控制信号。上述显示屏可以实现弯折。当第一像素阵列或第二像素阵列弯折至显示屏的非显示侧时，通过处理器可以减小折至显示屏的非显示侧的像素阵列所在区域的亮度。
另一方面，提供一种移动终端，包括如上的任意一种显示屏。移动终端还包括摄像头和传感器。摄像头，和/或，传感器位于显示屏的非显示侧。上述移动终端具有与前述实施例提供的显示屏相同的技术效果，此处不再赘述。
可选的，显示屏包括辅助显示区和主显示区；辅助显示区的像素密度小于主显示区的像素密度。摄像头和传感器设置于辅助显示区的非显示侧。当摄像头和传感器位于显示屏的非显示侧时，可以实现全面屏。
可选的，显示屏上设置有开口。显示屏包括位于开口的两侧的辅助显示区，以及位于开口下方的主显示区。其中，辅助显示区的像素密度小于主显示区的像素密度。摄像头位于开口内。传感器设置于辅助显示区的非显示侧。上述显示屏为异形屏。
另一方面，提供一种移动终端的控制方法，移动终端包括显示屏。该显示屏包括显示驱动器、第一像素阵列以及第二像素阵列。显示驱动器包括第一信号端、第二信号端以及第三信号端。第一像素阵列中包括多个第一亚像素，第一亚像素中的像素电路包括第一电压输入端和第二电压输入端。第二像素阵列中包括多个第二亚像素，第二亚像素中的像素电路包括第三电压输入端和第四电压输入端。第一亚像素的像素电路的第一电压输入端与显示驱动器的第一信号端电连接，第二电压输入端与显示驱动器的第二信号端电连接。第二亚像素的像素电路的第三电压输入端与显示驱动器的第三信号端电连接，第四电压输入端与显示驱动器的第二信号端电连接。此外，显示屏还包括衬底基板；第一像素阵列、第二像素阵列设置于衬底基板上；构成衬底基板的材料包括柔性树脂材料，从而使得上述显示屏为能够弯折的柔性显示屏。基于此，上述移动终端的控制方法包括，首先显示驱动器检测第一子像素阵列弯折至显示屏的非显示侧。接下来，显示驱动器的第一信号端减小向第一子像素阵列中，第一亚像素的像素电路的第一电压输入端输入的第一供电电压。或者，显示驱动器的第二信号端增大向第一亚像素的像素电路的第二电压输入端输出的第二供电电压。此时，第一亚像素的发光亮度降低。其中，第一供电电压大于第二供电电压。上述移动终端的控制方法具有与前述实施例提供的移动终端相同的技术效果。此处不再赘述。
附图说明
图1为本申请的一些实施例，提供的一种显示屏的结构示意图；
图2为图1中每个亚像素的像素电路结构示意图；
图3为图2所示的像素电路的部分控制信号时序图；
图4为图3中第三阶段对应的，图2所示的像素电路的等效电路图；
图5a为图2中流过OLED的电流，以及施加至OLED阴极和阳极之间的电压的关系曲线图；
图5b为图2中驱动晶体管的输出特性曲线图；
图5c为本申请的一些实施例，提供的另一种显示屏的结构示意图；
图6a为本申请的一些实施例，提供的移动终端的一种结构示意图；
图6b为本申请的一些实施例，提供的移动终端的另一种结构示意图；
图6c为本申请的一些实施例，提供的移动终端的另一种结构示意图；
图7为图6a或图6b中开孔周边的显示区的划分示意图；
图8为图6a或图6b中开孔周边的亚像素的一种排布示意图；
图9为图6a或图6b中开孔周边的亚像素的另一种排布示意图；
图10为图6b中传感器的设置方式示意图；
图11a为图6b中开孔周边的亚像素的一种排布示意图；
图11b为图11a所示的部分亚像素的像素电路的结构示意图；
图11c为图6b中开孔周边的亚像素的另一种排布示意图；
图12a为图6b中开孔周边的亚像素的另一种排布示意图；
图12b为图6b中开孔周边的亚像素的另一种排布示意图；
图12c为图12b所示的部分亚像素的像素电路的结构示意图
图13a为本申请的一些实施例，提供的显示屏的一种结构示意图；
图13b为本申请的一些实施例，提供的显示屏的另一种结构示意图；
图13c为本申请的一些实施例，提供的显示屏的像素电路中，驱动晶体管的输出特性曲线示意图；
图14a为本申请的一些实施例，提供的显示屏的另一种结构示意图；
图14b为本申请的一些实施例，提供的显示屏的另一种结构示意图；
图15为本申请的一些实施例，提供的显示屏中阴极层的结构示意图；
图16为本申请的一些实施例，提供的一种显示屏的截面示意图；
图17为本申请的一些实施例，提供的一种显示屏显示示意图；
图18a为本申请的一些实施例，提供的显示屏的一种折叠方式示意图；
图18b为采用图18a所示的折叠方式，折叠后的显示屏的示意图；
图19为本申请的一些实施例，提供的显示屏的另一种折叠方式示意图；
图20为本申请的一些实施例，提供的显示屏的另一种折叠方式示意图；
图21a为本申请的一些实施例，提供的显示屏显示子区的一种划分方式示意图；
图21b为图21a中PMIC与各个亚像素的像素电路的连接结构示意图；
图22a为本申请的一些实施例，提供的显示屏显示子区的另一种划分方式示意图；
图22b为图22a中PMIC与各个亚像素的像素电路的连接结构示意图；
图23为本申请的一些实施例，提供的另一种显示屏显示示意图；
图24为本申请的一些实施例，提供的显示屏显示子区的另一种划分方式示意图。
附图标记：
01-移动终端；02-像素；03-显示驱动器；113-显示驱动器的第一信号端；123-显示驱动器的第二信号端；133-显示驱动器的第三信号端；10-显示屏；11-摄像头；12-红外传感器；13-三维传感器；20-亚像素；20a-第一亚像素；112-第一亚像素的第一电压输入端；122-第一亚像素的第二电压输入端；20b-第二亚像素；20c-第三亚像素；132-第二亚像素的第三电压输入端；142-第二亚像素的第四电压输入端；100-AA区；101-非显示区；110-辅助显示区；120-主显示区；201-像素电路；200-开口；30-PMIC；31-处理器；300-阴极层；301-第一电极块；302-第二电极块；21-像素定义层；22-OLED的阳极；23-有机功能层；24-OLED的阴极；400-TFT背板；41-第一像素阵列；42-第二像素阵列。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。
本文中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中，除非另有说明，“多个”的含义是两个或两个以上。
此外，本文中，“上”、“下”、“左”以及“右”等方位术语是相对于附图中的显示面板示意置放的方位来定义的，应当理解到，这些方向性术语是相对的概念，它们用于相对于的描述和澄清，其可以根据显示面板所放置的方位的变化而相应地发生变化。
本公开提供一种移动终端，该移动终端可以为手机、平板电脑、笔记本、个人数字助理(personal digital assistant，PDA)、车载电脑等。本申请实施例对上述移动终端的具体形式不做特殊限制。
上述移动终端包括如图1所示的显示屏10。该显示屏10为有机发光二极管(Organic Light Emitting Diode，OLED)显示屏。上述OLED显示屏具有的自发光、响应速度块、宽视角和可制作在柔性衬底上等特点。
此外，该显示屏10包括有效显示区(active area，AA)100和位于该AA区100周边的非显示区101。
上述有效显示区100包括多个亚像素(sub pixel)20。为了方便说明，本申请中上述多个亚像素20是以矩阵形式排列为例进行的说明。
此时，沿水平方向X排列成一排的亚像素20称为同一行亚像素，沿竖直方向Y排列成一排的亚像素20称为同一列亚像素。
此外，亚像素20内设置有用于控制亚像素20进行显示的像素电路201。如图2所示，该像素电路201包括电容C和多个开关晶体管(M1、M2、M3、M5、M6、M7)以及一个驱动晶体管M4。
需要说明的是，图2所示的像素电路201的工作过程，包括图3所示的三个阶段，第一阶段①、第二阶段②以及第三阶段③。
第一阶段①，在第一选通信号N-1的控制下，图2中，晶体管M1和晶体管M7导通。初始电压Vint通过晶体管M1和晶体管M7，分别传输至驱动晶体管M4的栅极(gate，简称g)以及OLED的阳极(anode，简称a)。达到对OLED的阳极a以及驱动晶体管M4的栅极g进行复位的目的。
第二阶段②，在第二选通信号N的控制下，晶体管M2和晶体管M3导通。在晶体管M3导通的情况下，驱动晶体管M4的栅极g与漏极(drain，简称d)电连接，该驱动晶体管M4成二极管导通状态。此时，数据信号Vdata通过导通的晶体管M2写入至驱动晶体管M4的源极(source，简称s)，并对驱动晶体管M4的阈值电压Vth进行补偿。
第三阶段③，在发光控制信号EM的控制下，晶体管M5和晶体管M6导通，电压ELVDD与ELVSS之间的电流通路导通，此时该第三阶段的等效电路图如图4所示。驱动晶体管M4导通，驱动晶体管M4的第一极(源极s)接收电压ELVDD，驱动晶体管M4的第二极与OLED的阳极(a)电连接。该OLED的阴极(c)接收电压ELVSS。在此情况下，该驱动晶体管M4产生的驱动电流I sd通过上述电流通路传输至OLED，以驱动OLED进行发光。
由图4可知，电压ELVDD与电压ELVSS之间的压差△V，满足以下公式(1)：
△V＝ELVDD-ELVSS＝V sd+V OLED             (1)
其中，V sd为驱动晶体管M4的源极电压；V OLED为OLED的阳极(anode，简称a)和阴极(cathode，简称c)之间的电压差。
在上述第三阶段③，OLED的发光亮度与流过该OLED的电流I OLED(与上述驱动电流I ds相同)成正比。
此外，如图5a所示，I OLED与V OLED成正比。在此情况下，当一亚像素20的发光亮度越大时，该亚像素20中OLED的V OLED越大。因此公式(1)中，△V＝ELVDD-ELVSS也越大，反之越小。
在此情况下，本申请实施例提供的OLED显示屏10，可以根据需要，对不同区域的△V＝ELVDD-ELVSS的大小进行调整，以实现分区域亮度控制。
为了实现分区域亮度控制，本申请实施例提供了一种显示屏01。如图5c所示，该显示屏01包括显示驱动器03、第一像素阵列41以及第二像素阵列42。
其中，上述显示驱动器03包括第一信号端113、第二信号端123以及第三信号端133。
此外，上述第一像素阵列41包括多个第一亚像素12a。该第一亚像素12a的像素电路201包括第一电压输入端112和第二电压输入端122。
上述第二像素阵列42包括多个第二亚像素12b。该第二亚像素中12b的像素电路201包括第三电压输入端132和第四电压输入端142。
第一亚像素12a的像素电路201的第一电压输入端112与显示驱动器03的第一信号端113电连接，接收第一信号端113输出的第一供电电压V1。
第一亚像素12a的像素电路21的第二电压输入端122与显示驱动器03的第二信号端123电连接，接收第二信号端123输出的第二供电电压V2。
第二亚像素12b的像素电路201的第三电压输入端132与显示驱动器03的第三信号端133电连接，接收第三信号端133输出的第三供电电压V3。
第二亚像素12b的像素电路201的第四电压输入端142与显示驱动器03的第二信号端123电连接，接收第二信号端123输出的上述第二供电电压V2。
其中第三供电电压V3与第一供电电压V1的电压值不同。
在本申请的一些实施例中，上述第一供电电压V1大于第二供电电压V2，第三供电电压V3也大于第二供电电压V2。此时，上述第二供电电压V2可以为上述电压ELVSS。在此情况下，第一像素阵列41和第二像素阵列42的像素电路102共用电压ELVSS。
或者，在本申请的另一些实施例中，上述第一供电电压V1小于第二供电电压V2，第三供电电压V3也小于第二供电电压V2。此时，上述第二供电电压V2可以为上述电压ELVDD。在此情况下，第一像素阵列41和第二像素阵列42的像素电路102共用电压ELVDD。
这样一来，通过对第一像素阵列41和第二像素阵列42的像素电路102分别进行供电，从而对第一像素阵列41所在区域中各个像素电路的△V＝ELVDD-ELVSS的大小，以及第二像素阵列42所在区域中各个像素电路的△V＝ELVDD-ELVSS的大小分别进行调整，从而实现显示屏01的亮度分区控制。
以下对显示屏01在不同场景下进行亮度分区控制的过程，进行举例说明。
实施例一
本实施例中，具有显示屏10的移动终端01中集成有多种用于实现不同功能的电子器件， 例如如图6a所示的摄像头11、红外传感器(infrared radiation sensor，IR sensor)12、三维传感器(3D sensor)13等。
为了提高手机显示屏10的屏占比(显示屏的有效显示区域与整个显示屏的比值)，在本申请的一些实施例中，会在移动终端01的显示屏10上开设有一开口200。
这样一来，可以将上述电子器件设置于上述开口200内。在此基础上，上述显示屏10中位于该开口200两侧的部分仍然能够进行显示，从而达到提高显示屏屏占比的目的。
在此基础上，为了进一步提高显示屏10的屏占比，如图6b所示，可以将部分电子器件，例如IR sensor12、3D sensor13设置于显示屏10的下方(under display)，即显示屏的非显示侧，即将IR sensor12的接收器和发送器，以及3D sensor13的接收器和发送器均设置于显示屏10的下方。上述摄像头11设置于开口200内。
或者，如图6c所示，可以将上述IR sensor12、3D sensor13以及摄像头11全部设置于显示屏10的下方，即显示屏的非显示侧。从而使得显示屏10的屏占比进一步提升，达到全面屏的效果。
需要说明的是，本申请实施例中，可以采用图6b所示的结构，也可以采用图6c所示的结构，本申请对此不做限定。以下为了方便说明均是以图6b所示的异形屏为例进行的描述。
在此情况下，sensor的发送器发出的光线可以穿过上述显示屏中，亚像素20的透光部分并由显示屏10出射，当sensor发出的光线遇到障碍物后会对光线进行反射，反射的光线可以穿过显示屏中亚像素20的透光部分入射至sensor的接收器中，以使得sensor能够根据接收到的反射光线进行感测操作。这样可以减小上述开口200的面积，达到提高屏占比的目的。
然而，受到上述开口200的影响，该显示屏10的AA区100需要绕开上述开口200。因此，该显示屏10的AA区100不再是一个完整的矩形。此时，如图7所示，可以将上述显示屏10的AA区100划分为，位于开口200两侧的辅助显示区110，以及位于开口200和上述辅助显示区110下方的主显示区120。
在此情况下，上述辅助显示区110内设置有上述第一像素阵列41，该第一像素阵列41如图8所示，包括多个上述第一亚像素20a。
主显示区120内设置有上述第二像素阵列42，第二像素阵列42如图8所示，包括多个上述第二亚像素20b。
其中，如图8所示，主显示区120内沿水平方向X，排布有整行的第二亚像素20b。例如，主显示区120中，沿水平方方向X，一行第二亚像素20b的数量为N。N≥2，N为正整数。
此外，由于开口200的存在，辅助显示区110中，沿水平方向X，一行第一亚像素20a的数量为M。2≤M≤N，M为正整数。
然而，由上述可知，上述显示屏10的像素电路201包括多个晶体管。上述晶体管主要采用不透光的金属材料制备，从而使得上述第一亚像素20a或第二亚像素20b的金属密度(metal density)较高，上述第一亚像素20a或第二亚像素20b的透光面积相应有所减小。
在此情况下，当采用上述under display技术时，IR sensor12、3D sensor13的发送器发送的光线，无法有效穿过上述第一亚像素20a的透光部分而出射，且上述反射光线无法有效穿过第一亚像素20a的透光部分，并入射至上述IR sensor12、3D sensor13的接收器，从而降低sensor的检测精度。
本申请的一些实施例中，为了提高sensor的检测精度。如图9所示，可以使得辅助显示 区110的像素密度(pixels per inch，PPI)小于主显示区120的PPI。
这样一来，辅助显示区110的第一亚像素20a的面积，大于主显示区120的第二亚像素20b的面积，从而使得辅助显示区110的第一亚像素20a的透光面积，大于主显示区120中的第二亚像素20b的透光面积。
基于此，如图10所示，辅助显示区110中的第一亚像素20a具有足够的透光部分，可以使得IR sensor12、3D sensor13的发送器发送的光线由显示屏10出射，且上述反射光线也能够透过辅助显示区110中的第一亚像素20a的透光部分，入射至位于辅助显示区110下方的sensor，例如IR sensor12、3D sensor13的接收器中。从而使得上述sensor能够发送和接收到更多的光线，以提高sensor的感测精度。
为了使得辅助显示区110的PPI小于主显示区120的PPI，本申请提供以下方案。
示例一
本示例中，辅助显示区110的一个像素02中第一亚像素20a的数量，与主显示区120的一个像素02中第二亚像素20b的数量不同。
例如，如图11a所示，在显示屏10中，任意两个像素(pixel)02沿X方向的长度L1，以及沿Y方向的长度L2均相同。
此外，辅助显示区110的一个像素02中，第一亚像素20a的数量小于主显示区120的一个像素02中第二亚像素20b的数量。从而可以使得辅助显示区110的第一亚像素20a的面积大于主显示区120的第二亚像素20b的面积。
例如，辅助显示区110的一个像素02中包括三个第一亚像素20a，分别为红色(red，R)第一亚像素，绿色(green，G)第一亚像素，以及蓝色(blue，B)第一亚像素。
主显示区120的一个像素02中包括四个第二亚像素20b，分别为R第二亚像素、G第二亚像素，B第二亚像素以及W(white，W)第二亚像素。
在此情况下，以该显示屏10中任意一个第一亚像素20a和第二亚像素20b的像素电路分别为如图2所示的结构为例。
如图11b所示，沿Y方向，辅助显示区110中，位于同一列的第一亚像素20a的像素电路中，晶体管M2的源极(s)与同一条数据线(data line，DL)电连接。该DL用于提供数据电压Vdata。
此外，沿Y方向，主显示区120中，位于同一列的第二亚像素20b的像素电路中，晶体管M2的源极(s)与同一条DL电连接。
基于此，由图11b可知，沿Y方向，辅助显示区110的第三列第一亚像素20a的像素电路，和主显示区120的第四列第二亚像素20b的像素电路与同一条DL电连接。
此外，沿Y方向，主显示区120的第一列第二亚像素20b的像素电路、第二列第二亚像素20b的像素电路、以及第三列第二亚像素20b的像素电路所电连接的DL，无需与辅助显示区110的像素电路共用。
或者，又例如，如图11c所示，辅助显示区110的一个像素02中，包括三个第一亚像素20a，分别为R第一亚像素、G第一亚像素，B第一亚像素。
主显示区120的像素排布采用pentile方式。即主显示区120的一个像素02中，包括两个第二亚像素20b，分别为R第二亚像素、G第二亚像素；或者B第二亚像素、G第二亚像素。
其中，主显示区120中R第二亚像素和B第二亚像素的面积是G第二亚像素的二倍。相 邻两个像素02共用R第二亚像素或B第二亚像素。
此外，在显示屏10中，辅助显示区110的一个像素02沿X方向的长度L1b，大于主显示区120的一个像素02沿X方向的长度L1a。从而可以使得辅助显示区110的第一亚像素20a的面积大于主显示区120的第一亚像素20b的面积。
图11c所示的显示屏10中，各个亚像素的像素电路与DL的连接方式，可参照图11b进行设置，此处不再赘述。
示例二
本示例中，如图12a或图12b所示，辅助显示区110的一个像素02中第一亚像素20a的数量，与主显示区120的一个像素02中第二亚像素20b的数量相同。
例如，辅助显示区110的一个像素02中包括三个第一亚像素20a，分别为红色(red，R)第一亚像素，绿色(green，G)第一亚像素，以及蓝色(blue，B)第一亚像素。
主显示区120的一个像素02中包括三个第二亚像素20b，分别为上述R第二亚像素、G第二亚像素以及B第二亚像素。
此外，如图12a或图12b所示，在显示屏10中，辅助显示区110的像素02沿X方向的长度L1b，大于主显示区120的像素02沿X方向的长度L1a。其中，图12b中，L1b大约为L1a的两倍。辅助显示区110的像素02沿Y方向的长度L2b，与主显示区120的像素02沿Y方向的长度L2a可以相同。从而使得辅助显示区110的第一亚像素20a的面积大于主显示区120的第二亚像素20b的面积。
在此情况下，以图12b所示的结构为例，且该显示屏10中任意一个亚像素的像素电路为如图2所示的结构为例。
如图12c所示，沿Y方向，辅助显示区110中，位于同一列的第一亚像素20a的像素电路中，晶体管M2的源极(s)与同一条DL电连接。该DL用于提供数据电压Vdata。
此外，沿Y方向，主显示区120中，位于同一列的第二亚像素20b的像素电路中，晶体管M2的源极(s)与同一条DL电连接。
基于此，由图12c可知，沿Y方向，辅助显示区110的第一列第一亚像素20a的像素电路和主显示区120的第二列第二亚像素20b的像素电路同一条DL电连接。
辅助显示区110的第二列第一亚像素20a的像素电路和主显示区120的第四列第二亚像素20b的像素电路同一条DL电连接。
辅助显示区110的第三列第一亚像素20a的像素电路和主显示区120的第六列第二亚像素20b的像素电路同一条DL电连接。
此外，沿Y方向，主显示区120的第一列第二亚像素20b的像素电路、第三列第二亚像素20b的像素电路以及第五列第二亚像素20b的像素电路所电连接的DL，无需与辅助显示区110的像素电路共用。所以，可以与主显示区120的第一列第二亚像素20b的像素电路、第三列第二亚像素20b的像素电路以及第五列第二亚像素20b电连接的DL可以仅设置于主显示区120内。
在此情况下，通过上述多种设置方式，可以使得辅助显示区110的PPI小于主显示区120的PPI。以下为了方便说明，均是以图12b所示的结构为例进行的举例说明。
上述显示屏10在显示画面时，辅助显示区110中单个像素02的亮度S1_a，正比于该辅助显示区110的亮度S1和辅助显示区110的开口率A_a的比值，即S1_a∝(S1/A_a)。
主显示区120中单个像素02的亮度S2_b，正比于该主显示区120的亮度S2和主显示区 120的开口率A_b的比值，即S2_b∝(S2/A_b)。
其中，上述开口率为亚像素的发光区域的面积与该亚像素面积的比值。
基于此，在制作过程中，设定辅助显示区110的第一亚像素20a和主显示区120的第二亚像素20b的发光区域的面积相同。由上述可知，辅助显示区110的第一亚像素20a的面积，大于主显示区120的第二亚像素20b的面积。因此，辅助显示区110的开口率A_a，小于主显示区120的A_b。
在此情况下，在辅助显示区110和主显示区120在显示相同灰阶，例如G255的灰阶画面的情况下，辅助显示区110的亮度S1需要与主显示区120的亮度S2相同。因此，由上述关系式S1_a∝(S1/A_a)，以及S2_b∝(S2/A_b)可知，辅助显示区110中单个像素02的亮度S1_a，大于主显示区120中单个像素02的亮度S2_b。即辅助显示区110的任意一个第一亚像素20a中OLED的发光亮度，大于主显示区120的任意一个第二亚像素20b中OLED发光亮度。
由上述可知，OLED的发光亮度与流过该OLED的电流I OLED(即，上述驱动电流I ds)成正比。电流I OLED与该OLED的阳极(a)和阴极(c)之间的电压差V OLED成正比。
此外，由上述公式(1)可以得出，辅助显示区110中任意一个第一亚像素20a的像素电路中，电压ELVDD与电压ELVSS之间的压差△V 1＝ELVDD-ELVSS＝V sd1+V OLED＝V sd1+V 1。
主显示区120中任意一个第二亚像素20b的像素电路中，电压ELVDD与电压ELVSS之间的压差△V 0＝ELVDD-ELVSS＝V sd0+V OLED＝V sd0+V 0。
在此情况下，如图5a所示，辅助显示区110的像素电路中OLED的阳极(a)和阴极(c)之间的电压差V OLED(如图5a所示的V 1)，大于主显示区120的像素电路中OLED的阳极(a)和阴极(c)之间的电压差V OLED(如图5a所示的V 0)。
此外，辅助显示区110的像素电路201中驱动晶体管M4的源极电压V sd1，大于主显示区120的像素电路201中驱动晶体管M4的源极电压V sd0。
因此△V 1＞△V 0。
在此情况下，当辅助显示区110的像素电路201和主显示区120的像素电路201共用电压ELVDD和电压ELVSS时，为了满足辅助显示区110需要发出更高亮度的要求，施加至主显示区120像素电路中，驱动晶体管M4实际的源极电压Vsd位于如图5b所示的，特性曲线S_120的A2点附近。
然而，主显示区120的像素电路201中，驱动晶体管M4的源极电压V sd，位于特性曲线S_120的饱和点A1(晶体管的特性曲线由弯曲变成直线的交界点)附近时，上述驱动晶体管M4即可以完全打开，从而使得主显示区120显示G255的灰阶画面。由于A2点的电压大于饱和点A1的电压，因此会导致功率浪费。
为了解决上述问题，本申请实施例提供以下解决方案。
示例三
本示例中，上述第一供电电压V1大于第二供电电压V2，第三供电电压V3也大于第二供电电压V2。此时，上述第二供电电压V2可以为上述电压ELVSS。在此情况下，辅助显示区110和主显示区120的像素电路102共用电压ELVSS。
其中，第一供电电压V1＞第三供电电压V3。
例如，以辅助显示区110和主显示区120均显示G255的灰阶图像为例，第一供电电压V1可以为5.6V左右。此时，辅助显示区110的像素电路201中，第一驱动晶体管M4a的源 极电压V sd位于该驱动晶体管M4a特性曲线的饱和点C1(如图13c所示)位置。
第三供电电压V3可以为4.6V左右。此时主显示区120的像素电路201中，第二驱动晶体管M4b的源极电压V sd位于该驱动晶体管M4b特性曲线的饱和点C2(如图13c所示)位置。
在此情况下，上述显示驱动电路03包括如图13a所示的一个电源管理集成电路(Power Management IC，PMIC)30。该PMIC30包括第一电压端B1、第二电压端B2，以及第三电压端B3。
其中，PMIC30的第一电压端B1作为上述显示驱动器03的第一信号端113。
PMIC30的第二电压端B2作为上述显示驱动器03的第二信号端123。
PMIC30的第三电压端B3作为上述显示驱动器03的第三信号端133。
基于此，根据图4所示的像素电路201的等效电路图可知，如图13a所示，上述辅助显示区110的像素电路201中，第一驱动晶体管M4a的第一极(源极s)作为第一亚像素20a,中像素电路201的第一电压输入端112，与PMIC30的第一电压端B1电连接。PMIC30的第一电压端B1向第一驱动晶体管M4a的第一极(源极s)提供第一供电电压V1。
此外，上述第一驱动晶体管M4a的第二极(漏极d)与该第一亚像素20a中第一发光器件D1的阳极(a)电连接。
该第一发光器件D1的阴极(c)，作为第一亚像素20a中像素电路201的第二电压输入端122，与PMIC30的第二电压端B2电连接。PMIC30的第二电压端B2向第一发光器件D1的阴极(c)提供上述第二供电电压V2，即电压ELVSS。
同理，根据图4所示的像素电路201的等效电路图可知，如图13a所示，主显示区120中的第二驱动晶体管M4b的第一极(源极s)，作为第二亚像素20b中像素电路201的第三电压输入端132，与PMIC30的第三电压端B3电连接。PMIC30的第三电压端B3向第二驱动晶体管M4b的第一极(源极s)提供第三供电电压V3。
此外，上述第二驱动晶体管M4b的第二极(漏极d)与该第二亚像素20b中的，第二发光器件D2的阳极(a)电连接。
上述第二发光器件D2的阴极(c)作为第二亚像素20b中像素电路201的第四电压输入端142，与PMIC30的第二电压端B2电连接。PMIC30的第二电压端B2向第二发光器件D2的阴极(c)提供上述第二供电电压V2，即电压ELVSS。从而达到第一亚像素20a和第二亚像素20b共用ELVSS的目的。
需要说明的是，由上述可知，辅助显示区110的像素电路201和主显示区120的像素电路201共用上述PMIC30的第二电压端B2输出的第二供电电压V2，即电压ELVSS。在此情况下，该PMIC30的第二电压端B2的电流吸收(current sink)能力为PMIC30的第一电压端B1提供的电流I B1和第三电压端B3提供该的电流I B2之和。
例如，PMIC30的第一电压端B1，向辅助显示区110的像素电路201提供的第一供电电压V1为5.6V，提供的电流为I B1＝400mA。
PMIC30的第三电压端B3，向主显示区120的像素电路201提供的第三供电电压V3为4.6V，提供的电流为I B2＝50mA。
在此情况下，上述PMIC30的第二电压端B2的电流吸收能力大于或等于I B1+I B2＝400mA+50mA＝450mA。
示例四
本示例中，上述第一供电电压V1大于第二供电电压V2，第三供电电压V3也大于第二供电电压V2。此时，上述第二供电电压V2可以为上述电压ELVSS。在此情况下，辅助显示区110和主显示区120的像素电路102共用电压ELVSS。
其中，第一供电电压V1＞第三供电电压V3。
与上述示例三的不同之处在于，上述显示驱动电路03包括如图13b所示的两个PMIC30，包括第一PMIC30_a和第二PMIC30_b。
其中，第一PMIC30_a包括第一电压端B1、第二电压端B2。
第二PMIC30_a包括第三电压端B3、第四电压端B4。
第一PMIC30_a的第一电压端B1作为上述显示驱动器03的第一信号端113。
第二PMIC30_b的第三电压端B3作为上述显示驱动器03的第三信号端133。
第一PMIC30_a的第二电压端B2作为上述显示驱动器03的第二信号端123。
或者，第二PMIC30_b的第四电压端B4作为上述显示驱动器03的第二信号端123。
基于此，同理，根据图4所示的像素电路201的等效电路图可知，如图13b所示，辅助显示区110的每个像素电路201中，第一驱动晶体管M4a的第一极(源极s)作为第一亚像素20a中像素电路201的第一电压输入端112，与第一PMIC30_a的第一电压端B1电连接。第一PMIC30_a的第一电压端B1向第一驱动晶体管M4a的第一极(源极s)提供第一供电电压V1。
此外，上述第一驱动晶体管M4a的第二极(漏极d)与该第一亚像素20a中的第一发光器件D1的阳极(a)电连接。
该第一发光器件D1的阴极(c)作为第一亚像素20a中像素电路201的第二电压输入端122，与第一PMIC30_a的第二电压端B2电连接。第一PMIC30_a的第二电压端B2向第一发光器件D1的阴极(c)提供上述第二供电电压V2，即电压ELVSS。
同理，根据图4所示的像素电路201的等效电路图可知，如图13b所示，主显示区120中，第二驱动晶体管M4b的第一极(源极s)作为第二亚像素20b中像素电路201的第三电压输入端132，与第二PMIC30_b的第三电压端B3电连接。第二PMIC30_b的第三电压端B3向第二驱动晶体管M4b的第一极(源极s)提供第三供电电压V3。
此外，上述第二驱动晶体管M4b的第二极(漏极d)与该第二亚像素20b中的第二发光器件D2的阳极(a)电连接。
上述第二发光器件D2的阴极(c)作为第二亚像素20b中像素电路201的第四电压输入端142，与第一PMIC30_a的第二电压端B2电连接。第一PMIC30_a的第二电压端B2向第二发光器件D2的阴极(c)提供上述第二供电电压V2，即电压ELVSS，从而达到第一亚像素20a和第二亚像素20b共用ELVSS的目的。此时，第二PMIC30_b的第四电压端B4空置。
或者，该第一发光器件D1的阴极(c)，以及第二发光器件D2的阴极(c)分别均与第二PMIC30_b的第四电压端B4电连接。该第二PMIC30_b的第四电压端B4向第一发光器件D1的阴极(c)，以及第二发光器件D2的阴极(c)提供上述第二供电电压V2，即电压ELVSS。此时，第一PMIC30_a的第二电压端B2空置。
需要说明的是，由上述可知，辅助显示区110，以及主显示区120的像素电路201共用上第一PMIC30_a的第二电压端B2，或者第二PMIC30_a的第四电压端B4。在此情况下，该第一PMIC30_a的第二电压端B2，或者第二PMIC30_a的第四电压端B4的电流吸收能力，为第一PMIC30_a的第一电压端B1提供的电流I B1和第二PMIC30_a的第三电压端B3提供该 的电流I B3之和。
例如，第一PMIC30_a的第一电压端B1，向辅助显示区110的像素电路201提供的第一供电电压V1为5.6V，提供的电流为I B1＝400mA。
第二PMIC30_a的第三电压端B3，向主显示区120的像素电路201提供的第三供电电压V3为4.6V，提供的电流为I B3＝50mA。
在此情况下，上述第一PMIC30_a的第二电压端B2，或者第二PMIC30_a的第四电压端B4的电流吸收能力大于或等于I B1+I B3＝400mA+50mA＝450mA。
综上所述，在示例三和示例四中，向辅助显示区110的像素电路201提供第一供电电压V1。向主显示区120的像素电路201提供第三供电电压V3。其中，第一供电电压V1＞第三供电电压V3。
这样一来，在辅助显示区110和主显示区120均显示G255的灰阶画面时，辅助显示区110的像素电路201中，在第一供电电压V1的作用下，可以使得第一驱动晶体管M4a实际的源极电压V sd，如图13c所示，位于特性曲线S_110的饱和点C1附近。
此外，主显示区120的像素电路201中，在第三供电电压V3时，第二驱动晶体管M4b实际的源极电压V sd，如图13c所示，位于特性曲线S_120的饱和点C2附近。
在此情况下，当显示屏10显示画面时，辅助显示区110的像素电路201中的第一驱动晶体管M4a和主显示区120的像素电路201中的第二驱动晶体管M4b的源极电压V sd均处于饱和点附近。而此时的上述第一驱动晶体管M4a和第二驱动晶体管M4b正好处于完全打开的状态，从而无需提供更高的电压让第一驱动晶体管M4a和第二驱动晶体管M4b完全打开，从而能够达到节省功耗的目的。
示例五
本示例中，上述第一供电电压V1小于第二供电电压V2，第三供电电压V3也小于第二供电电压V2。此时，上述第二供电电压V2可以为上述电压ELVDD。在此情况下，辅助显示区110和主显示区120的像素电路102共用电压ELVDD。
其中，第一供电电压V1＜第三供电电压V3。
在此情况下，上述显示驱动电路03包括如图14a所示的一个PMIC30。该PMIC30包括第一电压端B1、第二电压端B2，以及第三电压端B3。
PMIC30的第一电压端B1作为上述显示驱动器03的第一信号端113。
PMIC30的第二电压端B2作为上述显示驱动器03的第二信号端123。
PMIC30的第三电压端B3作为上述显示驱动器03的第三信号端133。
基于此，根据图4所示的像素电路201的等效电路图可知，如图14a所示，在辅助显示区110中，第一驱动晶体管M4a的第一极(源极s)作为第一亚像素20a中像素电路201的第二电压输入端122，与PMIC30的第二电压端B2电连接，PMIC30的第二电压端B2用于向第一驱动晶体管M4a的第一极(源极s)提供第二供电电压V2，即ELVDD。
此外，上述第一驱动晶体管M4a的第二极(漏极s)与第一发光器件D1的阳极(a)电连接。
第一发光器件D1的阴极(c)作为第一亚像素20a中像素电路201的第一电压输入端112，与PMIC30的第一电压端B1电连接。该PMIC30的第一电压端B1用于向第一发光器件D1的阴极(c)提供第一供电电压V1。
此外，根据图4所示的像素电路201的等效电路图可知，如图14a所示，在主显示区120 中，第二驱动晶体管M4b的第一极(源极s)作为第二亚像素20b中像素电路201的第四电压输入端142，与PMIC30的第二电压端B2电连接。该PMIC30的第二端B用于向第二驱动晶体管M4b的第一极(源极s)提供第二供电电压V2，即ELVDD。
此外，第二驱动晶体管M4b的第二极与第二发光器件D2的阳极(a)电连接。
第二发光器件D2的阴极(c)作为第二亚像素20b中像素电路201的第三电压输入端132，与PMIC30的第三电压端B3电连接。该PMIC30的第三端B第二发光器件D2的阴极(c)提供第三供电电压V3。
同理可得，PMIC30的第一电压端B1，以及PMIC30的第三电压端B3的电流吸收能力，大于PMIC30的第二电压端B2提供的电流。
示例六
本示例中，上述第一供电电压V1小于第二供电电压V2，第三供电电压V3也小于第二供电电压V2。此时，上述第二供电电压V2可以为上述电压ELVDD。在此情况下，辅助显示区110和主显示区120的像素电路102共用电压ELVDD。
其中，第一供电电压V1＜第三供电电压V3。
与上述示例五的不同之处在于，上述显示驱动电路03包括如图14b所示的两个PMIC30，包括第一PMIC30_a和第二PMIC30_b。
其中，第一PMIC30_a包括第一电压端B1、第二电压端B2。
第二PMIC30_a包括第三电压端B3、第四电压端B4。
第一PMIC30_a的第一电压端B1作为上述显示驱动器03的第一信号端113。
第二PMIC30_b的第三电压端B3作为上述显示驱动器03的第三信号端133。
第一PMIC30_a的第二电压端B2作为上述显示驱动器03的第二信号端123。
或者，第二PMIC30_b的第四电压端B4作为上述显示驱动器03的第二信号端123。
基于此，同理，根据图4所示的像素电路201的等效电路图可知，如图14b所示，辅助显示区110的每个像素电路201中，第一驱动晶体管M4a的第一极(源极s)作为第一亚像素20a中像素电路201的第二电压输入端122，与第一PMIC30_a的第二电压端B2电连接。
第一PMIC30_a的第二电压端B2向第一驱动晶体管M4a的第一极(源极s)提供第二供电电压V2，即上述ELVDD。
此外，上述第一驱动晶体管M4a的第二极(漏极d)与该第一亚像素20a中的第一发光器件D1的阳极(a)电连接。
该第一发光器件D1的阴极(c)作为第一亚像素20a中像素电路201的第一电压输入端112，与第一PMIC30_a的第一电压端B1电连接。第一PMIC30_a的第一电压端B1向第一发光器件D1的阴极(c)提供上述第一供电电压V1。
同理，根据图4所示的像素电路201的等效电路图可知，如图14b所示，主显示区120中，第二驱动晶体管M4b的第一极(源极s)作为第二亚像素20b中像素电路201的第四电压输入端142，与第一PMIC30_a的第二电压端B2电连接。
第一PMIC30_a的第二电压端B2向第二驱动晶体管M4b的第一极(源极s)提供第二供电电压V2，即上述ELVDD。从而达到第一亚像素20a和第二亚像素20b共用ELVDD的目的。此时，第二PMIC30_b的第四电压端B4空置。
此外，上述第二驱动晶体管M4b的第二极(漏极d)与该第二亚像素20b中的第二发光器件D2的阳极(a)电连接。
上述第二发光器件D2的阴极(c)作为第二亚像素20b中像素电路201的第三电压输入端132，与第二PMIC30_b的第三电压端B3电连接。第二PMIC30_b的第三电压端B3向第二发光器件D2的阴极(c)提供上述第三供电电压V3，即电压ELVSS。
或者，第一驱动晶体管M4a的第一极(源极s)以及第二驱动晶体管M4b的第一极(源极s)还可以与第二PMIC30_b的第四电压端B4电连接。该第二PMIC30_b的第四电压端B4向第一驱动晶体管M4a的第一极(源极s)以及第二驱动晶体管M4b的第一极(源极s)提供上述第三供电电压V3，即电压ELVSS。此时，第一PMIC30_a的第二电压端B2空置。
同理可得，第一PMIC30_a的第一电压端B1，以及第二PMIC30_a的第三电压端B3的电流吸收能力，大于第一PMIC30_a的第二电压端B2，或者第二PMIC30_a的第二电压端B2提供的电流。
由示例五和示例六可知，辅助显示区110中，各个发光器件，例如OLED的阴极施加的电压相同。主显示区120中，各个OLED的阴极需要施加的电压相同。此外，辅助显示区110中任意一个OLED的阴极，与主显示区120中任意一个OLED的阴极施加的电压不同。
在此情况下，显示屏10的结构如图15所示，该显示屏10包括阴极层300。该阴极层300设置于上述AA区100内。上述阴极层300包括位于辅助显示区110中的第一电极块301，以及位于主显示区120中的第二电极块302。
其中，如图16所示，第一电极块301作为辅助显示区110中，各个OLED的阴极24。第二电极块302作为主显示区120中，各个OLED的阴极24。
在此情况下，在采用示例五所示的PMIC供电方式时，如图15所示，第一电极块301与PMIC30的第一电压端B1电连接，从而接收PMIC30的第一电压端B1提供第一供电电压V1。
第二电极块302与PMIC30的第三电压端B3电连接，从而接收PMIC30的第三电压端B3提供第三供电电压V3。
为了实现第一电极块301和第二电极块302的独立供电，如图16所示，第一电极块301和第二电极块302之间具有间隙H。在制作显示屏10时，在制作精度允许的情况下，可以尽量减小上述间隙H的大小，以避免间隙H位置处的OLED由于无法设置阴极24，而使得具有该OLED的亚像素20无法进行显示。
如图1所示，上述显示屏10包括薄膜晶体管(thin film transistor，TFT)背板400。上述像素电路201中的多个晶体管，即TFT形成于TFT背板400上。
此外，显示屏10还包括位于TFT背板400上方的像素定义层(pixel define layer，PDL)21，以及多个OLED。
其中，上述像素定义层21上设置有多个通孔，每个亚像素20内具有一个通孔。上述通孔内填充有OLED的阳极(anode)22和有机功能层23。沿远离阳极22的方向，该有机功能层23依次可以包括空穴注入层、空穴传输层、有机发光层、电子传输层以及电子注入层。
此外，辅助显示区110中，各个OLED的阴极24彼此相连，为一体结构，形成上述第一电极块301。主显示区120中，各个OLED的阴极24彼此相连，为一体结构，形成上述第二电极块302。
实施例二
本实施例中，具有显示屏10的移动终端01，例如手机可以划分为至少两个显示子区。
如图17所示，显示屏10的AA区100，可以划分成显示子区A、显示子区B以及显示子区C。
在本申请的一些实施例中，可以如图18a所示，将显示子区C弯折至显示屏10的背面(即非显示侧)。此时，如图18b所示，用户只需要观看显示子区A和显示子区B所显示的图像。
在此情况下，由于用户无需观看显示子区C，因此可以降低显示子区C的显示亮度，即降低显示子区C中每个像素电路20中，OLED的发光亮度。
或者，如图19所示，当将显示子区A弯折至显示屏10的背面时，可以降低显示子区A中每个像素电路20中，OLED的发光亮度。
又或者，如图20所示，当将显示子区A，以及显示子区C均弯折至显示屏10的背面时，可以降低显示子区A，以及显示子区C中每个像素电路20中，OLED的发光亮度。
这样一来，通过对各个显示子区进行分区亮度控制，降低用户无需观看的显示子区的亮度，达到节省功耗的目的。
基于此，为了对显示屏10中，各个显示子区进行分区亮度控制，该显示屏10如图21a所示，包括至少一个PMIC30和与该PMIC30电连接的处理器31。其中，图21a是以显示屏10具有一个PMIC30为例进行的说明。
如图21a所示，有效显示区100沿水平方向X具有1080行亚像素20，沿竖直方向Y具有1920列亚像素。
在此情况下，显示子区A沿竖直方向Y包括第1～第640列亚像素20。显示子区B沿竖直方向Y包括第641～第1280列亚像素20。显示子区C沿竖直方向Y包括第1281～第1920列亚像素20。
显示子区A、显示子区B以及显示子区C均沿水平方向X具有1080行亚像素。以下为了方便说明，如图21b所示，将显示子区A中的亚像素称为第一亚像素20a，多个第一亚像素20a构成第一像素阵列；将显示子区B中的亚像素称为第二亚像素20b，多个第二亚像素20b构成第二亚像素阵列；将显示子区C中的亚像素称为第三亚像素20c，多个第三亚像素20c构成第三亚像素阵列。
PMIC30具有第一电压端B1、第二电压端B2、第三电压端B3以及第四电压端B4。
如图21b所示，显示子区A中，每个像素电路201中，第一驱动晶体管M4a与PMIC30的第一电压端B1电连接。
该PMIC30的第一电压端B1，用于单独向显示子区A中的各个像素电路201提供第一供电电压V1。
显示子区B中，每个像素电路201中，第二驱动晶体管M4b与PMIC30的第三电压端B3电连接。
该PMIC30的第三电压端B2，用于单独向显示子区B中的各个像素电路201提供第三供电电压V3。
显示子区C中，每个像素电路201中，第三驱动晶体管M4c与PMIC30的第四电压端B4电连接。
该PMIC30的第四电压端B4，用于单独向显示子区C中的各个像素电路201提供第四供电电压V4。
此外，显示子区A的第一发光器件D1、显示子区B的第二发光器件D2，以及显示子区C中的第三发光器件D3的阴极(c)与PMIC30的第四电压端B4电连接。
该PMIC30的第二电压端B2，用于同时向显示子区A的第一发光器件D1、显示子区B的第二发光器件D2，以及显示子区C中的第一发光器件D1的阴极(c)提供第二供电电压 V2，即ELVSS。从而可以实现显示子区A、显示子区B以及显示子区C的像素电路共用电压ELVSS。
上述第一供电电压V1、第三供电电压V3以及第四供电电压V4的电压值不同。并且，V1＞V2；V3＞V2；V4＞V2。
同上所述，PMIC30的第二电压端B2的电流吸收能力，大于等于PMIC30的第一电压端B1、PMIC30的第三电压端B3以及PMIC30的第四电压端B4输出电流之和。
在此基础上，基于图21b的结构，上述显示屏01还包括衬底基板。显示子区A中的第一像素阵列、显示子区B中的第二像素阵列，以及显示子区C中的第三像素阵列设置于上述衬底基板上。此外，构成上述衬底基板的材料包括柔性树脂材料。
基于此，本申请提供一种具有图21b所示的显示屏的移动终端的控制方法包括：
首先，显示驱动器03检测具有上述第一子像素阵列的显示子区A弯折至显示屏01的非显示侧。
具体的，上述显示驱动器03包括如图21a所示的与PMIC30相连接的处理器31。该处理器31用于检测各个显示子区是否弯折至显示屏10的背面，并根据检测结果向PMIC30发出亮度控制信号。
接下来，上述方法还包括：显示驱动器03的第一信号端113，即上述PMIC30的第一电压端B1，减小向具有第一子像素阵列的显示子区A中的，第一亚像素20a的像素电路的第一电压输入端112(即第一驱动晶体管M4a的第一极)输入的第一供电电压V1。
或者，显示驱动器03的第二信号端123，即上述PMIC30的第二电压端B2，增加向第一亚像素20a的像素电路的第二电压输入端122(即第一发光器件D1的阴极)输入的第二供电电压V2，第一亚像素20a的发光亮度降低。
具体的，当处理器31检测具有上述第一子像素阵列的显示子区A弯折至显示屏10的背面时，向该PMIC30发出亮度控制信号。该PMIC30可以根据该亮度控制信号，减小PMIC30的第一电压端B1输入的第一供电电压V1，或者增大PMIC30的第二电压端B2输入的第一供电电压V1。从而使得显示子区A的发光亮度降低。
上述是以显示子区A弯折至显示屏10的背面为例进行的说明，当处理器31检测到其它显示子区弯折至显示屏10的背面，其它显示子区亮度降低的方式同理可得，此处不再赘述。
在此基础上，为了使得处理器31能够检测到各个显示子区是否弯折至显示屏10的背面。在本申请的一些实施例中，可以显示屏10的柔性衬底上，且位于相邻两个显示子区，例如显示子区B和显示子区C的交界位置处，设置压变电阻(图中未示出)。
将上述压变电阻与处理器31相连接，当显示子区A弯折至显示屏10的背面后，压变电阻受压其电阻发生变化，处理器31可以根据检测到的压变电阻阻值的变化，向PMIC30发出亮度控制信号。
或者，在本申请的另一些实施例中，为了对显示屏10中，各个显示子区进行分区亮度控制，该显示屏10如图22a所示，包括三个PMIC，例如第一PMIC30_a、第二PMIC30_b以及第三PMIC30_c。此外，显示屏10还包括与上述三个PMIC电连接的处理器31。
第一PMIC30_a具有第一电压端B1和第二电压端B2。
第二PMIC30_b具有第三电压端B3和第四电压端B4。
第三PMIC30_c具有第五电压端B5和第六电压端B6。
如图22b所示，显示子区A中，每个像素电路201中，第一驱动晶体管M4a的第一极(源 极s)与第一PMIC30_a的第一电压端B1电连接。
该第一PMIC30_a的第一电压端B1，用于单独向显示子区A中的各个像素电路201提供第一供电电压V1。
显示子区B中，每个像素电路201中，第二驱动晶体管M4b的第一极(源极s)与第二PMIC30_b的第三电压端B3电连接。
该第二PMIC30_b的第三电压端B3，用于单独向显示子区B中的各个像素电路201提供第三供电电压V3。
显示子区C中，每个像素电路201中，第三驱动晶体管M4c的第一极(源极s)与第三PMIC30_c的第五电压端B5电连接。
该第三PMIC30_c的第五电压端B5，用于单独向显示子区C中的各个像素电路201提供第五供电电压V5。
此外，显示子区A中第一发光器件D1的阴极(c)、显示子区B中第二发光器件D2的阴极(c)，以及显示子区C中第三发光器件D3的阴极(c)分别均与第一PMIC30_a的第二电压端B2电连接。此时，第二PMIC30_b的第四电压端B4，第三PMIC30_c的第六电压端B6空置。
该第一PMIC30_a的第二电压端B2，用于同时向显示子区A、显示子区B，以及显示子区C中的各个像素电路201中的发光器件的阴极提供第二供电电压V2，即电压ELVSS。从而使得上述显示子区A、显示子区B，以及显示子区C中的各个像素电路201共用电压ELVSS。
上述第一供电电压V1、第三供电电压V3以及第五供电电压V5的电压值不同。并且，V1＞V2；V3＞V2；V5＞V2。
同上所述，第一PMIC30_a的第二电压端B2的电流吸收能力，大于等于第一PMIC30_a的第一电压端B1、第二PMIC30_b的第三电压端B3以及第三PMIC30_c的第五电压端B5输出电流之和。
或者，在本申请的另一些实施例中，显示子区A的像素电路中第一发光器件D1的阴极(c)、显示子区B的像素电路中第二发光器件D2的阴极(c)，以及显示子区C的像素电路中第三发光器件D3的阴极(c)分别均与第二PMIC30_b的第四电压端B4，或者第三PMIC30_c的第六电压端B6电连接。
此时，第四电压端B4，或者第三PMIC30_c的第六电压端B6，用于同时向显示子区A、显示子区B，以及显示子区C中的各个像素电路201中的发光器件的阴极提供上述电压ELVSS。
在此情况下，该处理器31检测各个显示子区是否弯折至显示屏10的背面。当检测出一显示子区，例如显示子区C折至显示屏10的背面时，处理器31向该第三PMIC30_c发出亮度控制信号。
该第三PMIC30_c根据该亮度控制信号，减小第三PMIC30_c的第五电压端B5输出的第五供电电压V5。从而使得显示子区C的发光亮度降低。
上述是以显示子区C弯折至显示屏10的背面为例进行的说明，当处理器31检测到其它显示子区C弯折至显示屏10的背面，其它显示子区亮度降低的方式同理可得，此处不再赘述。
需要说明的是，上述是以显示子区A、显示子区B，以及显示子区C中的各个像素电路201接收相同的电压ELVSS为例，对各个显示子区亮度独立控制进行的说明。当然，为了实 现各个显示子区的亮度独立控制，上述各个显示子区的像素电路201还可以相同的电压ELVDD。在此情况下，PMIC以及显示屏10中阴极层300的设置同实施例一可得，此处不再赘述。
实施例三
本实施例中，具有显示屏10的移动终端01，例如手机可以划分为至少两个显示子区。
如图23所示，显示屏10的AA区100，可以划分成显示子区A、显示子区B。显示子区A和显示子区B显示不同的内容。
例如，在本公开的一些实施例中，显示子区B播放电影。
当移动终端01接收到对话信息，例如微信内容时，显示子区A显示的对话信息。当移动终端01没有接收到对话信息时，显示子区A与显示子区B一同显示同一画面。
在此情况下，通常播放电影的显示子区B，其发光亮度较暗。显示对话信息的显示子区A发光亮度较亮。那么显示子区A显示的对话信息过于刺眼，从而会降低用户的观影效果。这时，需要对显示子区A和显示子区B的亮度分别控制，以降低显示子区A的亮度。
基于此，为了对显示屏10中，各个显示子区进行分区亮度控制，该显示屏10如图24所示，包括至少一个PMIC30和与该PMIC30电连接的处理器31。其中，图24是以显示屏10具有一个PMIC30为例进行的说明。
如图24所示，有效显示区100沿水平方向X具有1920行亚像素20，沿竖直方向Y具有1080列亚像素。
在此情况下，显示子区A沿水平方向X包括第1～第640行亚像素20。显示子区B沿水平方向包括第641～第1920行亚像素20。
显示子区A、显示子区B均竖直方向平方向Y具有1080列亚像素。
PMIC30具有第一电压端B1、第二电压端B2以及第三电压端B3。
由实施例二同理可得，显示子区A中，每个像素电路201中，第一驱动晶体管M4a的第一极(源极s)与PMIC30的第一电压端B1电连接。
该PMIC30的第一电压端B1，用于单独向显示子区A中的各个像素电路201提供第一供电电压V1。
显示子区B中，每个像素电路201中，第二驱动晶体管M4a的第一极(源极s)与PMIC30的第二电压端B2电连接。
该PMIC30的第三电压端B3，用于单独向显示子区B中的各个像素电路201提供第三供电电压V3。
此外，显示子区A的像素电路201中的第一发光器件D1的阴极(c)和显示子区B的像素电路201中的第二发光器件D2的阴极(c)分别均与PMIC30的第二电压端B2电连接。
该PMIC30的第二电压端B2，用于同时向显示子区A和显示子区B中的各个像素电路201提供第二供电电压V2，即电压ELVSS。
上述第一供电电压V1和第三供电电压V3的电压值不同，且V1＞V2；V3＞V2。
此外，当显示屏具有两个PMIC时，两个PMIC分别用于向显示子区A和显示子区B提供不同的第一供电电压V1和第三供电电压V3。上述两个PMIC的设置方式与实施例二的原理相同，此处不再赘述。
在此基础上，如图24所示，处理器31与PMIC电连接。当处理器31检测到显示子区A显示对话信息，且显示子区B播放电影时，向PMIC30发出亮度控制信号。
PMIC30可以根据该亮度控制信号，减小PMIC30的第一电压端B1输出的第一供电电压V1。从而使得显示子区A的发光亮度降低。避免显示子区A显示的对话信息过于刺眼，而影响显示效果。
或者，在本申请的另一些实施例中，显示子区B显示背景图像。
当移动终端01接收到对话信息时，显示子区A显示的对话信息。当移动终端01没有接收到对话信息时，显示子区A与显示子区B一同显示同一画面。
在此情况下，如果显示背景图像的显示子区B，与显示对话信息的显示子区A的发光亮度相当。那么会导致用户容易忽略重要信息。这时需要对显示子区A和显示子区B的亮度分别控制，以提高显示子区A的亮度。
基于此，当处理器31检测到显示子区A显示对话信息，且显示子区B显示背景图像时，向PMIC30发出亮度控制信号。
PMIC30可以根据该亮度控制信号，增加PMIC30的第一电压端B1输出的第一供电电压V1。从而使得显示子区A的发光亮度提高。避免显示子区A显示的对话信息被忽略。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种显示屏，其特征在于，所述显示屏包括显示驱动器、第一像素阵列以及第二像素阵列；其中：
    所述显示驱动器包括第一信号端、第二信号端以及第三信号端；
    所述第一像素阵列中包括多个第一亚像素，所述第一亚像素中的像素电路包括第一电压输入端和第二电压输入端；
    所述第二像素阵列中包括多个第二亚像素，所述第二亚像素中的像素电路包括第三电压输入端和第四电压输入端；
    所述第一亚像素的像素电路的第一电压输入端与所述显示驱动器的第一信号端电连接，接收所述第一信号端输出的第一供电电压，所述第二电压输入端与所述显示驱动器的第二信号端电连接，接收所述第二信号端输出的第二供电电压；
    所述第二亚像素的像素电路的第三电压输入端与所述显示驱动器的第三信号端电连接，接收所述第三信号端输出的第三供电电压，所述第四电压输入端与所述显示驱动器的第二信号端电连接，接收所述第二信号端输出的所述第二供电电压；
    其中所述第三供电电压与所述第一供电电压的电压值不同。
  2. 根据权利要求1所述的显示屏，其特征在于，所述显示驱动器的第一信号端输出的第一供电电压，大于所述显示驱动器的第二信号端输出的第二供电电压；
    所述显示驱动器的第三信号端输出的第三供电电压，大于所述显示驱动器的第二信号端输出的第二供电电压。
  3. 根据权利要求2所述的显示屏，其特征在于，所述第一像素阵列中的所述第一亚像素的像素电路包括第一驱动晶体管和第一发光器件；所述第一驱动晶体管的第一极与所述显示驱动器的第一信号端电连接，所述第一驱动晶体管的第二极与所述第一发光器件的阳极电连接；所述第一发光器件的阴极与所述显示驱动器的第二信号端电连接；
    所述第二像素阵列中包括多个第二亚像素，所述第二亚像素中的像素电路包括第二驱动晶体管和第二发光器件；
    所述第二驱动晶体管的第一极与所述显示驱动器的第三信号端电连接，所述第二驱动晶体管的第二极与所述第二发光器件的阳极电连接；所述第二发光器件的阴极与所述显示驱动器的第二信号端电连接。
  4. 根据权利要求1所述的显示屏，其特征在于，所述显示驱动器的第一信号端输出的第一供电电压，小于所述显示驱动器的第二信号端输出的第二供电电压；
    所述显示驱动器的第三信号端输出的第三供电电压，小于所述显示驱动器的第二信号端输出的第二供电电压。
  5. 根据权利要求4所述的显示屏，其特征在于，所述第一像素阵列中的所述第一亚像素的像素电路包括第一驱动晶体管和第一发光器件；
    所述第一驱动晶体管的第一极与所述显示驱动器的第二信号端电连接，所述第一驱动晶体管的第二极与所述第一发光器件的阳极电连接；所述第一发光器件的阴极与所述显示驱动器的第一信号端电连接；
    所述第二像素阵列中包括多个第二亚像素，所述第二亚像素中的像素电路包括第二驱动晶体管和第二发光器件；
    所述第二驱动晶体管的第一极与所述显示驱动器的第二信号端电连接，所述第二驱动晶 体管的第二极与所述第二发光器件的阳极电连接；所述第二发光器件的阴极与所述显示驱动器的第三信号端电连接。
  6. 根据权利要求1所述的显示屏，其特征在于，所述显示驱动器包括一个电源管理集成电路；所述电源管理集成电路包括第一电压端、第二电压端，以及第三电压端；
    所述电源管理集成电路的第一电压端与所述第一亚像素的像素电路的第一电压输入端电连接；
    所述电源管理集成电路的第二输出端与所述第一亚像素的像素电路的第二电压输入端，以及所述第二亚像素的像素电路的第四电压输入端电连接；
    所述电源管理集成电路的第三输出端与所述第二亚像素的像素电路的第三电压输入端电连接。
  7. 根据权利要求1所述的显示屏，其特征在于，所述显示驱动器包括第一电源管理集成电路和第二电源管理集成电路；
    所述第一电源管理集成电路包括第一电压端和第二电压端；
    所述第二电源管理集成电路包括第三电压端和第四电压端；
    所述第一电源管理集成电路的第一电压端与所述第一亚像素的像素电路的第一电压输入端电连接；
    所述第二电源管理集成电路的第三电压端与所述第二亚像素的像素电路的第三电压输入端电连接；
    所述第一电源管理集成电路的第二电压端与所述第一亚像素的像素电路的第二电压输入端，以及所述第二亚像素的像素电路的第四电压输入端电连接；
    或者，所述第二电源管理集成电路的第四电压端与所述第一亚像素的像素电路的第二电压输入端，以及所述第二亚像素的像素电路的第四电压输入端电连接。
  8. 根据权利要求1-7任一项所述的显示屏，其特征在于，
    所述有效显示区包括辅助显示区和主显示区；所述辅助显示区的非显示侧用于集成摄像头或传感器；
    其中，所述第一像素阵列位于所述辅助显示区；所述第二像素阵列位于所述主显示区；
    所述辅助显示区的像素密度小于所述主显示区的像素密度。
  9. 根据权利要求7所述的显示屏，其特征在于，所述第一亚像素的像素电路占据的遮光面积，与所述第二亚像素的像素电路占据的遮光面积相同；
    所述第一亚像素中除了所述像素电路以外的透光面积，大于所述第二亚像素中除了所述像素电路以外的透光面积。
  10. 根据权利要求6或7所述的显示屏，其特征在于，
    所述显示屏还包括衬底基板；所述第一像素阵列、所述第二像素阵列设置于所述衬底基板上；
    其中，构成所述衬底基板的材料包括柔性树脂材料；
    所述显示驱动电路还包括处理器，所述处理器与至少一个所述电源管理集成电路电连接，所述处理器用于检测所述第一像素阵列或所述第二像素阵列弯折至所述显示屏的非显示侧时，向至少一个所述电源管理集成电路输出亮度控制信号。
  11. 一种移动终端，其特征在于，包括如权利要求1-10任一项所述的显示屏；
    所述移动终端还包括摄像头和传感器；所述摄像头，和/或，所述传感器位于所述显示屏的非显示侧。
  12. 根据权利要求11所述的移动终端，其特征在于，所述显示屏包括辅助显示区和主显示区；所述辅助显示区的像素密度小于所述主显示区的像素密度；
    所述摄像头和所述传感器设置于所述辅助显示区的非显示侧。
  13. 根据权利要求11所述的移动终端，其特征在于，所述显示屏上设置有开口；所述显示屏包括位于所述开口的两侧的辅助显示区，以及位于所述开口下方的主显示区；
    其中，所述辅助显示区的像素密度小于所述主显示区的像素密度；
    所述摄像头位于所述开口内；所述传感器设置于所述辅助显示区的非显示侧。
  14. 一种移动终端的控制方法，其特征在于，所述移动终端包括显示屏；所述显示屏包括显示驱动器、第一像素阵列以及第二像素阵列；其中：所述显示驱动器包括第一信号端、第二信号端以及第三信号端；所述第一像素阵列中包括多个第一亚像素，所述第一亚像素中的像素电路包括第一电压输入端和第二电压输入端；所述第二像素阵列中包括多个第二亚像素，所述第二亚像素中的像素电路包括第三电压输入端和第四电压输入端；所述第一亚像素的像素电路的第一电压输入端与所述显示驱动器的第一信号端电连接，所述第二电压输入端与所述显示驱动器的第二信号端电连接；所述第二亚像素的像素电路的第三电压输入端与所述显示驱动器的第三信号端电连接，所述第四电压输入端与所述显示驱动器的第二信号端电连接；
    所述显示屏还包括衬底基板；所述第一像素阵列、所述第二像素阵列设置于所述衬底基板上；构成所述衬底基板的材料包括柔性树脂材料；
    所述移动终端的控制方法包括：
    所述显示驱动器检测所述第一子像素阵列弯折至所述显示屏的非显示侧；
    所述显示驱动器的第一信号端减小向第一子像素阵列中，所述第一亚像素的像素电路的第一电压输入端输入的第一供电电压；或者所述显示驱动器的第二信号端增大向所述第一亚像素的像素电路的第二电压输入端输出的第二供电电压，所述第一亚像素的发光亮度降低；
    其中，所述第一供电电压大于所述第二供电电压。
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