WO2020134016A1 - 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片 - Google Patents

一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片 Download PDF

Info

Publication number
WO2020134016A1
WO2020134016A1 PCT/CN2019/094984 CN2019094984W WO2020134016A1 WO 2020134016 A1 WO2020134016 A1 WO 2020134016A1 CN 2019094984 W CN2019094984 W CN 2019094984W WO 2020134016 A1 WO2020134016 A1 WO 2020134016A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
reliability
titanium
composite electrode
ceramic substrate
Prior art date
Application number
PCT/CN2019/094984
Other languages
English (en)
French (fr)
Inventor
贺晓东
段兆祥
杨俊�
唐黎民
柏琪星
Original Assignee
广东爱晟电子科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 广东爱晟电子科技有限公司 filed Critical 广东爱晟电子科技有限公司
Publication of WO2020134016A1 publication Critical patent/WO2020134016A1/zh

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/18—Metallic material, boron or silicon on other inorganic substrates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • G01K7/22—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a non-linear resistance, e.g. thermistor

Definitions

  • the invention relates to the technical field of electronic components, in particular to a high-precision and high-reliability Ti/W-Cu-Au composite electrode thermal chip and a preparation method thereof.
  • Thermistor chips are widely used in various temperature detection, temperature compensation, and temperature control circuits. They play a central role in converting temperature variables into required electronic signals in the circuit.
  • the existing thermistor chip includes a thermistor ceramic substrate 1 ′ and two metal electrodes 2 ′ respectively provided on the two surfaces of the thermistor ceramic substrate 1 ′, the metal electrode 2 'Usually silver electrodes.
  • the preparation process of the existing thermistor chip is as follows: thermal ceramic powder batching ⁇ ball milling ⁇ isostatic pressing molding ⁇ sintered ceramic ingot ⁇ slicing ⁇ silver paste printed by screen printing ⁇ drying ⁇ silver burning ⁇ slicing.
  • Silver paste is easily contaminated during screen printing and drying, and the resulting silver electrode itself is also easily oxidized, yellowed and blackened, resulting in poor product stability and reliability;
  • the printed silver electrode layer is thick and unevenly covered on the surface of the heat-sensitive ceramic substrate. It is easy to peel and burr during the dicing process, and the silver paste material is more consumed;
  • the object of the present invention is to provide a high-precision and high-reliability Ti/W-Cu-Au composite electrode thermal chip, which has the advantages of good stability, high reliability, not easy to age, and resistance to cold and thermal shocks.
  • thermosensitive chip including a thermosensitive ceramic substrate and two composite electrodes respectively provided on two surfaces of the thermosensitive ceramic substrate, the composite electrode It is composed of a layer of titanium tungsten, a layer of copper and a layer of gold on the surface of the heat-sensitive ceramic substrate in order from inside to outside.
  • the thermal chip of the present invention uses a TiW-Cu-Au composite electrode, in which the titanium tungsten layer (TiW) as the bottom electrode mainly plays a transition role, which can not only combine well with the thermal ceramic substrate, but also play a certain blocking role ; Copper layer (Cu) is used as a barrier layer to block the external damage to the transition layer, and has a welding effect; gold layer (Au) is both a welding layer and a protective layer, its stability is high, can prevent oxidation, corrosion resistance, Prevent damage and high temperature.
  • TiW titanium tungsten layer
  • Cu Copper layer
  • Au gold layer
  • Au is both a welding layer and a protective layer, its stability is high, can prevent oxidation, corrosion resistance, Prevent damage and high temperature.
  • thermosensitive ceramic substrate a titanium tungsten layer, a copper layer and a gold layer are laminated from the inside out to form a composite electrode on the surface of the thermosensitive ceramic substrate, which can effectively improve the stability, temperature resistance, corrosion resistance and damage resistance of the thermosensitive chip , It can obviously improve the reliability, and can control the electrode material cost of the chip.
  • the high-precision and high-reliability Ti/W-Cu-Au composite electrode thermosensitive chip has good stability, high reliability, not easy to aging, cold and thermal shock resistance. The advantages.
  • the titanium-tungsten layer is a titanium-tungsten alloy with a mass ratio of titanium to tungsten of 1:9.
  • the titanium-tungsten layer of this composition is suitable for the surface state of the heat-sensitive ceramic substrate, and has a coefficient of expansion substantially equal to that of the heat-sensitive ceramic substrate. Consistent, it can be closely combined with the surface of the thermal ceramic substrate, which is conducive to improving the reliability of the product.
  • the thickness of the titanium-tungsten layer is 0.01-1 micron.
  • the thickness of the copper layer is 0.01-2 microns.
  • the thickness of the gold layer is 0.01 to 1 micrometer.
  • each metal layer if the thickness of each metal layer is too thick, the cost will increase. If the titanium-tungsten layer as a transition layer is too thin, it will affect the combination of the composite electrode and the thermosensitive ceramic substrate. The copper layer as a barrier layer will not be too thin. Barrier effect, as the gold layer as the welding layer and the protective layer is too thin, it is easy for the outside to easily damage the barrier layer and affect the reliability of the product.
  • the thickness of the titanium-tungsten layer is 0.2 ⁇ m
  • the thickness of the copper layer is 0.4 ⁇ m
  • the thickness of the gold layer is 0.1 ⁇ m.
  • the thickness of each metal layer is selected accordingly, so that the electrical performance and reliability of the product can be optimized, and the material cost can be effectively controlled.
  • titanium-tungsten layer, the copper layer and the gold layer are all formed by a sputtering method.
  • the sputtering process is carried out in vacuum sputtering coating equipment, which will not pollute the environment and has a high degree of cleanliness, ensuring that the cleaned surface is not contaminated by secondary pollution;
  • the thickness of the metal layer obtained by sputtering can be less than 1% of the thickness of the silver electrode layer of the silk screen, saving materials, and the sputtering process makes the composite electrode closely adhere to the heat-sensitive ceramic substrate, and basically does not during the cutting process Peeling or burrs;
  • the sputtering process is easy to control.
  • the metal layer obtained by vacuum sputtering has a large coating area and uniform coverage. It is firmly combined with the thermal ceramic substrate, and the surface is very dense. It can effectively prevent external erosion and make the product truly achieve high precision and high reliability. , Can prevent the performance change caused by high-temperature sintering of silver layer after screen printing;
  • Another object of the present invention is to provide a method for preparing a high-precision, high-reliability Ti/W-Cu-Au composite electrode thermosensitive chip as described in any one of the above, the preparation method includes the following steps: A titanium tungsten layer, a copper layer and a gold layer are sequentially arranged on both surfaces of the substrate, and then the thermal ceramic substrate is cut into individual thermal chips.
  • preparation method includes the following steps:
  • thermosensitive ceramic substrate obtained in the test step (3) the size of a single thermosensitive chip is calculated according to the test result and the resistance value of the required thermosensitive chip, and then the thermosensitive ceramic substrate Slicing is performed to obtain a single thermal chip.
  • a vacuum sputtering coating machine is used to perform sputtering under the condition of argon gas as a working gas.
  • Figure 1 is a schematic diagram of the structure of the existing thermistor chip
  • FIG. 2 is a schematic structural view of a high-precision, high-reliability Ti/W-Cu-Au composite electrode thermal chip of the present invention
  • FIG. 3 is a preparation flow chart of the high-precision and high-reliability Ti/W-Cu-Au composite electrode thermal chip of the present invention
  • FIG. 4 is a schematic diagram of vacuum sputtering.
  • FIG. 2 is a schematic structural diagram of a high-precision, high-reliability Ti/W-Cu-Au composite electrode thermal chip of the present invention.
  • the high-precision and high-reliability Ti/W-Cu-Au composite electrode thermosensitive chip of the present invention includes a thermosensitive ceramic substrate 1 and two composite electrodes 2 provided on both surfaces of the thermosensitive ceramic substrate 1 respectively.
  • the composite electrode 2 is formed by laminating a titanium-tungsten layer 21, a copper layer 22 and a gold layer 23 on the surface of the heat-sensitive ceramic substrate 1 in order from the inside to the outside.
  • the titanium-tungsten layer 21 is a titanium-tungsten alloy with a mass ratio of titanium to tungsten of 1:9, and its thickness is 0.01-1 micrometer; the thickness of the copper layer 22 is 0.01-2 micrometer; the gold layer The thickness of 23 is 0.01 to 1 micron.
  • the thickness of the titanium-tungsten layer 21 is 0.2 ⁇ m, the thickness of the copper layer 22 is 0.4 ⁇ m, and the thickness of the gold layer 23 is 0.1 ⁇ m.
  • the titanium-tungsten layer 21, the copper layer 22 and the gold layer 23 are all formed by a sputtering method.
  • FIG. 3 is a preparation flow chart of the high-precision and high-reliability Ti/W-Cu-Au composite electrode thermal chip of the present invention.
  • FIG. 4 is a schematic diagram of vacuum sputtering.
  • the preparation method of the high-precision high-reliability Ti/W-Cu-Au composite electrode thermal chip is carried out as follows:
  • heat-sensitive ceramic powder is prepared according to a conventional formula, such as NTC heat-sensitive ceramic powder, and then the heat-sensitive ceramic powder is ball-milled, isostatically shaped, sintered, and sliced to obtain a sheet-like Thermal ceramic substrate.
  • step S1 Use a specific cleaning solution to process the heat-sensitive ceramic substrate obtained in step S1, and then use an ultrasonic machine to clean it.
  • the cleaning time is 5 ⁇ 1 minutes, and then it is dried.
  • the drying temperature is 100 ⁇ 5°C.
  • the drying time is: 30 ⁇ 5 minutes.
  • the cleaning time is: 5 ⁇ 1 minute
  • the drying temperature is: 100 ⁇ 5°C
  • the drying time is: 30 ⁇ 5 Minutes, while activating the surface.
  • the vacuum sputtering coating machine First evacuate the vacuum sputtering coating machine to the process range, then fill it with argon gas as the working gas, and use the titanium-tungsten alloy with a mass ratio of titanium to tungsten of 1:9 as the target. Under the action of the electric field, Ar + accelerates bombardment For the target, the target atoms are sputtered onto the thermosensitive ceramic substrate obtained in step S3, and a layer of titanium-tungsten 21 is sputtered on both surfaces of the thermosensitive ceramic substrate with a sputtering thickness of 0.01 to 2 microns.
  • step S7 Test the resistivity of the thermosensitive ceramic substrate obtained in step S6, calculate the size of a single thermosensitive chip according to the test result and the resistance value of the required thermosensitive chip, and then cut the thermosensitive ceramic substrate To obtain a single thermal chip.
  • thermistor tester 3 Use the thermistor tester 3 to test the resistance values of the thermistor chips mass-produced in step S7 one by one, and sort out the products that do not meet the requirements.
  • the titanium-tungsten layer uses a titanium-tungsten alloy with a mass ratio of titanium to tungsten of 1:9, which can be formed with sintered thermosensitive ceramics
  • the surface of the substrate is well bonded, and the other components of the titanium tungsten layer and the thermal ceramic substrate will have shortcomings such as poor bonding and high stress.
  • the titanium tungsten layer of the first group of products uses Titanium-tungsten alloy with a mass ratio of titanium to tungsten of 1:9, titanium tungsten layer of group 2 products using titanium to tungsten with a mass ratio of 2:8, and titanium tungsten layer of group 3 products using titanium and tungsten Titanium-tungsten alloy with tungsten mass ratio of 3:7, the number of products in each group is 10.
  • the aging reliability experiment is: placing the sample in a 100°C oven for 1000 hours, and according to the resistance value of the sample before and after the experiment, the calculated resistance change rate is the aging change rate.
  • Table 1 The aging reliability experiment results of three kinds of thermal sensitive chips composed of different titanium and tungsten layers
  • Ceramic substrates with a resistivity of about 500 ⁇ m, a B value of 3950, and a thickness of 0.5 mm were used to fabricate surface electrodes using traditional screen printing and vacuum sputtering methods, respectively.
  • the resistance value and B value of the traditional thermistor chip obtained by cutting and the high-precision and high-reliability Ti/W-Cu-Au composite electrode thermistor chip of the present invention are tested respectively, and the aging reliability experiment of 100°C/1000H and 1000 cycles of 100°C-0°C cold and heat shock test.
  • the aging reliability experiment is: placing the sample in a 100°C oven for 1000 hours, and according to the resistance value of the sample before and after the experiment, the calculated resistance change rate is the aging change rate.
  • the cold and hot shock test is: the sample is placed in 100 °C and 0 °C gas alternately, circulated 1000 times, according to the resistance value of the sample before and after the experiment, the calculated resistance change rate is the cold and hot shock change rate.

Abstract

本发明涉及一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，所述热敏芯片包括热敏陶瓷基片以及两个分别设于所述热敏陶瓷基片的两表面上的复合电极，所述复合电极是由钛钨层、铜层和金层从内向外依次在所述热敏陶瓷基片表面上层叠而成。本发明还涉及所述高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备方法。本发明所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片具有稳定性好、可靠性高、不易老化、耐冷热冲击等优点。

Description

一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片 技术领域
本发明涉及电子元件技术领域，特别是涉及一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片及其制备方法。
背景技术
热敏电阻芯片，简称热敏芯片，广泛应用于各种温度探测、温度补偿、温度控制电路中，其在电路中起到将温度的变量转化成所需的电子信号的核心作用。
如图1所示，现有的热敏电阻芯片包括热敏陶瓷基片1’以及两个分别设于所述热敏陶瓷基片1’两表面上的金属电极2’，所述金属电极2’通常为银电极。现有的热敏电阻芯片的制备工艺为：热敏陶瓷粉料配料→球磨→等静压成型→烧结陶瓷锭→切片→丝网印刷法印刷银浆→烘干→烧银→划切。
然而，使用银电极和采用丝网印刷法存在以下几个问题：
1)银浆在丝网印刷和烘干过程中容易受到污染，且得到的银电极本身也容易氧化、发黄发黑，造成产品的稳定性和可靠性较差；
2)前期制备银浆和后期烘干银浆、烧结银电极的工序较为繁琐；
3)印刷制得的银电极层厚度较大且在热敏陶瓷基片的表面上覆盖不均匀，在划切过程中容易起皮和产生毛刺，银浆材料损耗较多；
4)银层在高温烧结时晶型会重新结晶，从而性能发生改变，造成产品电气性能下降；
5)在高温烧银过程中排放的气体对环境造成污染。
发明内容
基于此，本发明的目的在于，提供一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其具有稳定性好、可靠性高、不易老化、耐冷热冲击等优点。
本发明采取的技术方案如下：
一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，包括热敏陶瓷基片以及两个分别设于所述热敏陶瓷基片的两表面上的复合电极，所述复合电极是由钛钨层、铜层和金层从内向 外依次在所述热敏陶瓷基片表面上层叠而成。
本发明的热敏芯片采用TiW-Cu-Au复合电极，其中钛钨层(TiW)作为底层电极主要起过渡作用，既能与热敏陶瓷基片很好地结合，又起到一定的阻挡作用；铜层(Cu)作为阻挡层，用于阻挡外界对过渡层的破坏，并具有焊接作用；金层(Au)既是焊接层，也是保护层，其稳定性高，能防止氧化、抗腐蚀、防破坏、耐高温。
本发明将钛钨层、铜层和金层从内向外层叠制成热敏陶瓷基片表面上的复合电极，能够有效提升热敏芯片的稳定性、耐温性、抗腐蚀性、抗破坏性，明显提高可靠性，还能控制芯片的电极材料成本，制得的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片具有稳定性好、可靠性高、不易老化、耐冷热冲击的优点。
进一步地，所述钛钨层采用钛与钨的质量比为1:9的钛钨合金，该组成的钛钨层适合热敏陶瓷基片的表面状态，与热敏陶瓷基片的膨胀系数基本一致，能够与热敏陶瓷基片表面紧密结合，有利于提高产品的可靠性。
进一步地，所述钛钨层的厚度为0.01～1微米。
进一步地，所述铜层的厚度为0.01～2微米。
进一步地，所述金层的厚度为0.01～1微米。
所述复合电极中，各金属层的厚度太厚则成本增加，作为过渡层的钛钨层太薄则影响复合电极与热敏陶瓷基片的结合，作为阻挡层的铜层太薄就起不了阻挡作用，作为焊接层和保护层的金层太薄则容易外界容易对阻挡层造成破坏，影响产品的可靠性。
进一步地，所述钛钨层的厚度为0.2微米，所述铜层的厚度为0.4微米，所述金层的厚度为0.1微米。各金属层相应选取上述厚度，能够使产品的电性能和可靠性达到最佳，同时有效控制材料成本。
进一步地，所述钛钨层、铜层和金层均采用溅射法形成。
相对于丝网印刷法，采用溅射法制备各金属层具有以下有益效果：
1)溅射过程在真空溅射镀膜设备中进行，不会污染环境，洁净度高，保证清洗表面不被二次污染；
2)省去了银电极丝印法的繁杂准备工作，在真空溅射设备中溅射完成即可投入使用；
3)溅射得到的金属层厚度可达到丝印银电极层厚度的1％以下，节约材料，且溅射工艺 使复合电极与热敏陶瓷基片紧紧贴合，在划切过程中基本不会起皮或产生毛刺；
4)溅射工艺易于控制，真空溅射得到的金属层镀膜面积大且覆盖均匀，与热敏陶瓷基片结合牢固，表面非常致密，能有效防止外界侵蚀，使产品真正达到高精度、高可靠，可以杜绝丝网印刷后银层高温烧结造成的性能改变；
5)没有烘干、烧结电极层的工序，避免排放有害气体而污染空气，环保优势突出。
本发明的另一目的在于，提供上述任一项所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备方法，该制备方法包括如下步骤：在片状的热敏陶瓷基材的两表面上分别依次设置钛钨层、铜层和金层，然后将所述热敏陶瓷基材切割成单个的所述热敏芯片。
进一步地，该制备方法包括如下步骤：
(1)在片状的热敏陶瓷基材的两表面上分别溅射一层钛钨层；
(2)在步骤(1)得到的热敏陶瓷基材两表面的钛钨层上分别溅射一层铜层；
(3)在步骤(2)得到的热敏陶瓷基材两表面的铜层上分别溅射一层金层；
(4)测试步骤(3)得到的热敏陶瓷基材的电阻率，按照测试结果和所需热敏芯片的阻值计算出单个热敏芯片的尺寸大小，然后对所述热敏陶瓷基材进行划切，得到单个的所述热敏芯片。
进一步地，步骤(1)～(3)利用真空溅射镀膜机在氩气作为工作气体的条件下实施溅射。
为了更好地理解和实施，下面结合附图详细说明本发明。
附图说明
图1为现有的热敏电阻芯片的结构示意图；
图2为本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的结构示意图；
图3为本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备流程图；
图4为真空溅射示意图。
具体实施方式
请参阅图2，其为本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的结构示意图。
本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片包括热敏陶瓷基片1以及两个分 别设于所述热敏陶瓷基片1的两表面上的复合电极2，所述复合电极2是由钛钨层21、铜层22和金层23从内向外依次在所述热敏陶瓷基片1表面上层叠而成。
具体地，所述钛钨层21采用钛与钨的质量比为1:9的钛钨合金，其厚度为0.01～1微米；所述铜层22的厚度为0.01～2微米；所述金层23的厚度为0.01～1微米。优选地，所述钛钨层21的厚度为0.2微米，所述铜层22的厚度为0.4微米，所述金层23的厚度为0.1微米。
所述钛钨层21、铜层22和金层23均采用溅射法形成。
请参阅图3-4，图3为本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备流程图，图4为真空溅射示意图。
所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备方法按如下步骤进行：
S1：制备热敏陶瓷基材：按常规配方配得热敏陶瓷粉末，例如NTC热敏陶瓷粉末，再对热敏陶瓷粉末进行球磨、等静压成型、烧结、切片，即可得到片状的热敏陶瓷基材。
S2：一次清洗：
使用特定的清洗液处理步骤S1得到的热敏陶瓷基材，再使用超声波机清洗，清洗时间为：5±1分钟，然后烘干，烘干温度为：100±5℃，烘干时间为：30±5分钟。
S3：二次清洗：
将步骤S2一次清洗得到的热敏陶瓷基材放到等离子清洗机中进行二次清洗，清洗时间为：5±1分钟，烘干温度为：100±5℃，烘干时间为：30±5分钟，同时活化表面。
S4：溅射钛钨层21：
先将真空溅射镀膜机抽真空到工艺范围，再充入氩气作为工作气体，以钛与钨的质量比为1:9的钛钨合金作为靶材，在电场作用下，Ar +加速轰击靶材，将靶材原子溅射到步骤S3得到的热敏陶瓷基材上，在热敏陶瓷基材的两表面上分别溅射一层钛钨层21，溅射厚度为0.01～2微米。
S5：溅射铜层22：
先将真空溅射镀膜机抽真空到工艺范围，再充入氩气作为工作气体，以铜作为靶材，在电场作用下，Ar +加速轰击靶材，将靶材原子溅射到步骤S4得到的热敏陶瓷基材上，在热敏陶瓷基材两表面的钛钨层21表面上分别溅射一层铜层22，溅射厚度为0.01～2微米。
S6：溅射金层23：
先将真空溅射镀膜机抽真空到工艺范围，再充入氩气作为工作气体，以金作为靶材，在电场作用下，Ar +加速轰击靶材，将靶材原子溅射到步骤S5得到的热敏陶瓷基材上，在热敏陶瓷基材两表面的铜层22表面上分别溅射一层金层23，溅射厚度为0.01～1微米。
S7：测试步骤S6得到的热敏陶瓷基材的电阻率，按照测试结果和所需热敏芯片的阻值计算出单个热敏芯片的尺寸大小，然后对所述热敏陶瓷基材进行划切，得到单个的所述热敏芯片。
S8：测试分选：
使用热敏电阻测试仪3对步骤S7批量生产得到的热敏芯片逐个进行电阻值测试，将不符合要求的产品分选淘汰。
不同组成的钛钨层对热敏芯片的可靠性影响试验
本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片中，所述钛钨层采用钛与钨的质量比为1:9的钛钨合金，能够与烧结成型的热敏陶瓷基片表面很好地结合，而其他组成的钛钨层与热敏陶瓷基片会出现结合差、应力大等缺点。
分别对3组高精度高可靠Ti/W-Cu-Au复合电极热敏芯片进行老化可靠性实验，以验证不同组成的钛钨层的对芯片产品的影响，第1组产品的钛钨层采用钛与钨的质量比为1:9的钛钨合金，第2组产品的钛钨层采用钛与钨的质量比为2:8的钛钨合金，第3组产品的钛钨层采用钛与钨的质量比为3:7的钛钨合金，每组产品的数量为10个。
老化可靠性实验为：将样品置于100℃烘箱中老化1000小时，根据实验前、后样品的阻值，计算出的阻值变化率即为老化变化率。
实验结果如下表1所示：
表1 3种不同钛钨层组成的热敏芯片的老化可靠性实验结果
Figure PCTCN2019094984-appb-000001
Figure PCTCN2019094984-appb-000002
由表1所示结果可见，含有Ti:W＝1:9钛钨层的热敏芯片在老化前后的阻值变化率最高仅为0.24％，而含有Ti:W＝2:8钛钨层的热敏芯片在老化前后的阻值变化率最高达到0.44％，含有Ti:W＝3:7钛钨层的热敏芯片在老化前后的阻值变化率最高达到0.98％，说明Ti:W＝2:8钛钨层更加适合热敏陶瓷基片的表面状态，能够与热敏陶瓷基片表面紧密结合，有利于提高产品的可靠性。
传统热敏电阻芯片与本发明热敏芯片的性能对比测试
将电阻率约500Ω·m，B值为3950，厚度为0.5mm的陶瓷基片分别用传统丝网印刷法及真空溅射法制作其表面电极，其中，丝印法在陶瓷基片两表面分别制作厚度为30μm银电极，真空溅射法在陶瓷基片两表面分别制作由钛钨层、铜层和金层从内向外层叠而成的复合电极，且钛钨层厚度为0.2μm，铜层厚度为0.4μm，金层厚度为0.1μm，然后以1mm*1mm的尺寸进行划切，得到丝印法制备的传统热敏电阻芯片和真空溅射法制备的本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片。
分别测试划切得到的传统热敏电阻芯片与本发明的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的阻值和B值，并进行100℃/1000H的老化可靠性实验及1000个循环100℃-0℃的冷热冲击实验。
老化可靠性实验为：将样品置于100℃烘箱中老化1000小时，根据实验前、后样品的阻值，计算出的阻值变化率即为老化变化率。
冷热冲击实验为：将样品交替置于100℃与0℃气体中，循环1000次，根据实验前、后样品的阻值，计算出的阻值变化率即为冷热冲击变化率。
得到如下表2所示的实验数据：
表2传统热敏电阻芯片与本发明复合电极热敏芯片的性能对比测试结果
Figure PCTCN2019094984-appb-000003
Figure PCTCN2019094984-appb-000004
由表2的数据可以看出，传统芯片的阻值与B值比较分散，精度比较低，老化与冷热冲击的变化率也较大，可靠性较低；而本发明的Ti/W-Cu-Au复合电极热敏芯片的阻值与B值非常集中，老化与冷热冲击的变化率也非常小，真正达到高精度高可靠。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。

Claims (10)

  1. 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：包括热敏陶瓷基片以及两个分别设于所述热敏陶瓷基片的两表面上的复合电极，所述复合电极是由钛钨层、铜层和金层从内向外依次在所述热敏陶瓷基片表面上层叠而成。
  2. 根据权利要求1所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：所述钛钨层采用钛与钨的质量比为1:9的钛钨合金。
  3. 根据权利要求1或2所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：所述钛钨层的厚度为0.01～1微米。
  4. 根据权利要求1或2所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：所述铜层的厚度为0.01～2微米。
  5. 根据权利要求1或2所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：所述金层的厚度为0.01～1微米。
  6. 根据权利要求1或2所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：所述钛钨层的厚度为0.2微米，所述铜层的厚度为0.4微米，所述金层的厚度为0.1微米。
  7. 根据权利要求1或2所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片，其特征在于：所述钛钨层、铜层和金层均采用溅射法形成。
  8. 权利要求1-7任一项所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备方法，其特征在于：包括如下步骤：在片状的热敏陶瓷基材的两表面上分别依次设置钛钨层、铜层和金层，然后将所述热敏陶瓷基材切割成单个的所述热敏芯片。
  9. 根据权利要求8所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备方法，其特征在于：包括如下步骤：
    (1)在片状的热敏陶瓷基材的两表面上分别溅射一层钛钨层；
    (2)在步骤(1)得到的热敏陶瓷基材两表面的钛钨层上分别溅射一层铜层；
    (3)在步骤(2)得到的热敏陶瓷基材两表面的铜层上分别溅射一层金层；
    (4)测试步骤(3)得到的热敏陶瓷基材的电阻率，按照测试结果和所需热敏芯片的阻值计算出单个热敏芯片的尺寸大小，然后对所述热敏陶瓷基材进行划切，得到单个的所述热敏芯片。
  10. 根据权利要求9所述的高精度高可靠Ti/W-Cu-Au复合电极热敏芯片的制备方法，其特征在于：步骤(1)～(3)利用真空溅射镀膜机在氩气作为工作气体的条件下实施溅射。
PCT/CN2019/094984 2018-12-29 2019-07-08 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片 WO2020134016A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811629850.2A CN109576655A (zh) 2018-12-29 2018-12-29 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片
CN201811629850.2 2018-12-29

Publications (1)

Publication Number Publication Date
WO2020134016A1 true WO2020134016A1 (zh) 2020-07-02

Family

ID=65932311

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/094984 WO2020134016A1 (zh) 2018-12-29 2019-07-08 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片

Country Status (2)

Country Link
CN (1) CN109576655A (zh)
WO (1) WO2020134016A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109576655A (zh) * 2018-12-29 2019-04-05 广东爱晟电子科技有限公司 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100079234A1 (en) * 2008-09-30 2010-04-01 Tsinghua University Thermistor and electrical device employed with same
CN102503580A (zh) * 2011-10-21 2012-06-20 浙江大学 热敏陶瓷溅射膜电极的制备方法
CN106298120A (zh) * 2016-08-30 2017-01-04 广东爱晟电子科技有限公司 一种高精度高可靠钛钨金电极芯片及其制备方法
CN106384635A (zh) * 2016-08-26 2017-02-08 中国振华集团云科电子有限公司 一种片式ntcr及其制备方法
CN107706495A (zh) * 2017-11-09 2018-02-16 广东风华高新科技股份有限公司 一种温度补偿衰减器的制备方法
CN109576655A (zh) * 2018-12-29 2019-04-05 广东爱晟电子科技有限公司 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片
CN109659104A (zh) * 2018-12-28 2019-04-19 广东爱晟电子科技有限公司 一种高可靠双面异质复合电极热敏芯片

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100524860C (zh) * 2005-04-08 2009-08-05 三菱化学株式会社 半导体元件及其制造方法
CN1832067A (zh) * 2006-02-15 2006-09-13 广州翔宇微电子有限公司 表面贴装型宽带微波单层片式电容器及其制造方法
CN102507669A (zh) * 2011-11-18 2012-06-20 中国科学院上海微系统与信息技术研究所 基于聚酰亚胺和填充物腐蚀的湿度传感器结构改进及方法
CN104779149A (zh) * 2014-01-15 2015-07-15 无锡华润上华半导体有限公司 半导体器件的金属电极制造方法
CN107689298A (zh) * 2017-08-17 2018-02-13 中国振华集团云科电子有限公司 一种单层芯片电容器的制备方法及单层芯片电容器

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100079234A1 (en) * 2008-09-30 2010-04-01 Tsinghua University Thermistor and electrical device employed with same
CN102503580A (zh) * 2011-10-21 2012-06-20 浙江大学 热敏陶瓷溅射膜电极的制备方法
CN106384635A (zh) * 2016-08-26 2017-02-08 中国振华集团云科电子有限公司 一种片式ntcr及其制备方法
CN106298120A (zh) * 2016-08-30 2017-01-04 广东爱晟电子科技有限公司 一种高精度高可靠钛钨金电极芯片及其制备方法
CN107706495A (zh) * 2017-11-09 2018-02-16 广东风华高新科技股份有限公司 一种温度补偿衰减器的制备方法
CN109659104A (zh) * 2018-12-28 2019-04-19 广东爱晟电子科技有限公司 一种高可靠双面异质复合电极热敏芯片
CN109576655A (zh) * 2018-12-29 2019-04-05 广东爱晟电子科技有限公司 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片

Also Published As

Publication number Publication date
CN109576655A (zh) 2019-04-05

Similar Documents

Publication Publication Date Title
CN109338290B (zh) 一种用于航空发动机涡轮叶片的薄膜温度传感器
US20060063024A1 (en) Metallized substrate
US9252041B2 (en) Electrostatic chuck
CN106298120B (zh) 一种高精度高可靠钛钨金电极芯片及其制备方法
CN107574415B (zh) 一种金属基薄膜传感器用渐变过渡层及制备方法
US6475924B2 (en) Substrate and process for producing the same
CN209118860U (zh) 一种高精度高可靠Ti-Cu-Au复合电极热敏芯片
US11631511B2 (en) Thermistor chip and preparation method thereof
WO2020134016A1 (zh) 一种高精度高可靠Ti/W-Cu-Au复合电极热敏芯片
JP2019515852A (ja) 銅−セラミックス複合材料
CN209118859U (zh) 一种高精度高可靠Cr-Ni-Au复合电极热敏芯片
CN109659104B (zh) 一种高可靠双面异质复合电极热敏芯片
CN107622851A (zh) 一种具有纳米颗粒膜的负温度系数热敏电阻及其制备方法
JPH05148053A (ja) セラミツクス−金属接合体
JP2019511993A (ja) 銅−セラミックス複合材料
JPH04212441A (ja) セラミック配線基板
CN111029065A (zh) 一种高精度高可靠Ir-Cu-Au复合电极热敏芯片
CN111009363A (zh) 一种高精度高可靠Mo-Cu-Au复合电极热敏芯片
CN111048271A (zh) 一种高精度高可靠Cr/Ni-Cu-Au复合电极热敏芯片
CN111128494B (zh) 一种应力缓冲金属电极结构热敏芯片
CN106756848A (zh) 一种金属基高温组合绝缘层及其制备方法
JP2000124566A (ja) メタライズ基板
CN111180204B (zh) 一种应力缓冲金属电极结构芯片电容
TWI806692B (zh) 高功率電阻器製造方法
JP4237460B2 (ja) 金属−セラミックス接合体およびその製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19901408

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC

122 Ep: pct application non-entry in european phase

Ref document number: 19901408

Country of ref document: EP

Kind code of ref document: A1