WO2020124896A1 - 液晶显示面板 - Google Patents

液晶显示面板 Download PDF

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Publication number
WO2020124896A1
WO2020124896A1 PCT/CN2019/083142 CN2019083142W WO2020124896A1 WO 2020124896 A1 WO2020124896 A1 WO 2020124896A1 CN 2019083142 W CN2019083142 W CN 2019083142W WO 2020124896 A1 WO2020124896 A1 WO 2020124896A1
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WO
WIPO (PCT)
Prior art keywords
liquid crystal
display panel
crystal display
substrate
panel according
Prior art date
Application number
PCT/CN2019/083142
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English (en)
French (fr)
Inventor
陈书志
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Publication of WO2020124896A1 publication Critical patent/WO2020124896A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells

Definitions

  • the present application relates to the field of display, in particular to a liquid crystal display panel.
  • the circuit on the array substrate is generally composed of a plurality of horizontally arranged scan lines 12 and a plurality of vertically arranged data lines 11 crisscrossed
  • the pixel unit includes: a thin film transistor 13, Liquid crystal capacitor 14 and storage capacitor 15.
  • a black matrix area needs to be provided above the position corresponding to the data line on the color filter substrate to improve the occurrence of metal reflection and light leakage.
  • the problem with this arrangement is that because the black matrix area is provided above the data line, the black matrix area blocks part of the light propagation, making the area of the display area on the liquid crystal display panel relatively small.
  • the present application relates to a liquid crystal display panel, which is used to improve the problems in the prior art that the process of increasing the brightness of the liquid crystal display panel is complicated and the cost is high.
  • a liquid crystal display panel provided by the present application includes: an array substrate, a color filter substrate and a liquid crystal layer; wherein,
  • the color filter substrate is arranged directly opposite to the array substrate and is located at the top of the entire liquid crystal panel;
  • the liquid crystal layer is disposed between the color filter substrate and the array substrate, and liquid crystal is poured in between;
  • the array substrate is located below the entire liquid crystal panel, and includes a plurality of data lines, a plurality of scanning lines, and a plurality of pixel units composed of a plurality of data lines and a plurality of scanning lines, wherein the data lines and the scanning lines Set in the same direction, each pixel unit includes: a thin film transistor, a liquid crystal capacitor, and a storage capacitor.
  • the data line is disposed above the scan line.
  • the data line is disposed below the scan line.
  • a gap is provided between two adjacent pixel units.
  • each pixel unit includes three sub-pixels of different colors.
  • the sub-pixels are: pixels of three colors of red, green and blue.
  • the color filter substrate is provided with a black matrix area.
  • the area of the black matrix area is larger than the area of the gap.
  • the source electrode, the drain electrode and the gate electrode are connected through a contact hole.
  • the contact hole is divided into a first contact hole and a second contact hole.
  • the liquid crystal capacitor and the storage capacitor are arranged in parallel.
  • the Nth data line and the N+1th data line are connected to the same pixel unit, and the Nth scan line and the N+1th scan line are connected to the same pixel unit.
  • This application also provides another liquid crystal display panel, including: an array substrate, a color filter substrate and a liquid crystal layer; wherein,
  • the color filter substrate is arranged directly opposite to the array substrate and is located at the top of the entire liquid crystal panel;
  • the liquid crystal layer is disposed between the color filter substrate and the array substrate, and liquid crystal is poured in between;
  • the array substrate is located below the entire liquid crystal panel, and includes a plurality of data lines, a plurality of scanning lines, and a plurality of pixel units composed of a plurality of data lines and a plurality of scanning lines, wherein the data lines and the scanning lines Same direction setting.
  • the data line is disposed above the scan line.
  • the data line is disposed below the scan line.
  • a gap is provided between two adjacent pixel units.
  • each of the pixel units includes three different color sub-pixels.
  • the color filter substrate is provided with a black matrix area.
  • the area of the black matrix area is larger than the area of the gap.
  • a method for manufacturing a liquid crystal display panel includes the following steps:
  • an active layer, a source electrode, a drain electrode, a data line and a pixel electrode pattern are sequentially formed on the substrate, and then an insulating layer, a gate electrode, a gate line and a common electrode line pattern are sequentially formed, the data line and the scan Set on the same side of the line;
  • the substrate is a quartz substrate, a glass substrate or a resin substrate.
  • the data line is disposed above or below the scan line.
  • this application changes the data line and the scanning line on the array substrate from the vertical setting to the same direction setting, removing the indium tin oxide (ITO) film layer above the original data line and the corresponding on the color filter substrate
  • ITO indium tin oxide
  • FIG. 1 is a schematic diagram of a pixel circuit structure of a liquid crystal display panel in the prior art.
  • FIG. 2 is a schematic diagram of a pixel circuit structure of a liquid crystal display panel provided by an embodiment of the present application.
  • FIG. 3 is a cross-sectional view of the internal structure of the thin film transistor with the scan line under the data line in the prior art.
  • FIG. 4 is a cross-sectional view of an internal structure of a thin film transistor of a liquid crystal display panel with scan lines under data lines provided by an embodiment of the present application.
  • FIG. 5 is an internal structure diagram of a thin film transistor whose scan line is above the data line in the prior art.
  • FIG. 6 is an internal structure diagram of a thin film transistor provided with a scan line above a data line provided by an embodiment of the present application.
  • FIG. 7 is a first flowchart of a method for manufacturing a liquid crystal display panel provided by an embodiment of the present application.
  • FIG. 8 is a second flowchart of a method for manufacturing a liquid crystal display panel provided by an embodiment of the present application.
  • first and second are used for description purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
  • the features defined as “first” and “second” may explicitly or implicitly include one or more of the features.
  • the meaning of “plurality” is two or more, unless otherwise specifically limited.
  • FIGS. 1-6 Detailed description will be given below with reference to FIGS. 1-6.
  • the pixel equivalent circuit on the array substrate in the prior art includes: a data line 11, a scanning line 12, a thin film transistor 13, a liquid crystal capacitor 14, and a storage capacitor 15.
  • a pixel equivalent circuit of a liquid crystal display panel includes: a data line 21, a scanning line 22, a thin film transistor 23, a liquid crystal capacitor 24, and a storage capacitor 25.
  • the data line 21 and the scanning line 22 are arranged in the same direction.
  • FIG. 3 it is a cross-sectional view of a thin film transistor when the data line and the scan line are vertically arranged on the array substrate and the scan line is below the data line in the prior art.
  • 31 is the source
  • 32 is the drain
  • 33 is the gate
  • 34 is the insulating layer (SiNx)
  • 35 is the semiconductor thin film (a-Si:H) layer
  • 36 is the semiconductor thin film (n+a-Si:H) layer .
  • FIG. 4 it is a cross-sectional view of a thin film transistor when a data line and a scan line are arranged in the same direction on an array substrate of a liquid crystal display panel provided by the present application and the scan line is below the data line.
  • 41 is the source
  • 42 is the drain
  • 43 is the gate
  • 44 is the gate insulating layer (SiNx)
  • 45 is the active layer (a-Si:H), which is a semiconductor film)
  • 46 is the ohmic contact layer (n+ a-Si:H, which is a semiconductor film).
  • FIG. 5 it is a cross-sectional view of a thin film transistor when the data line and the scanning line on the array substrate are vertically arranged and the data line is above the scanning line in the prior art.
  • 51 is the gate
  • 52 is the source
  • 53 is the drain
  • 54 is the ohmic contact layer (n+ a-Si:H)
  • 55 is the active layer (a-Si:H)
  • 56 is the gate insulating layer (gate- SiNx).
  • a cross-sectional view of the thin film transistor when the data lines and the scanning lines on the array substrate are arranged in the same direction and the data lines are above the scanning lines, a cross-sectional view of the thin film transistor.
  • 61 is the gate
  • 62 is the source
  • 63 is the drain. From this sectional view, only one of the source and the drain can be seen, and the other is blocked.
  • 64 is an ohmic contact layer (n+a-Si:H)
  • 65 is an active layer (a-Si:H)
  • 66 is a gate insulating layer (gate-SiNx).
  • a liquid crystal display panel provided by the present application includes: an array substrate, a color filter substrate, and a liquid crystal layer; wherein the color filter substrate is disposed facing the array substrate and is located at the top of the entire liquid crystal panel; the liquid crystal layer is disposed Liquid crystal is poured between the color filter substrate and the array substrate; the array substrate is located below the entire liquid crystal panel, and includes a plurality of data lines 21, a plurality of scanning lines 22, and a plurality of data lines 21 and a plurality of A plurality of pixel units composed of scanning lines 22, wherein the data lines 21 and the scanning lines 22 are arranged in the same direction.
  • the data line is disposed above the scan line.
  • each of the pixel units includes three sub-pixels of different colors, and the sub-pixels are pixels of three colors of red, green, and blue.
  • each pixel unit includes: a thin film transistor, a liquid crystal capacitor, and a storage capacitor.
  • the liquid crystal capacitor and the storage capacitor are arranged in parallel.
  • the color filter substrate is provided with a black matrix area.
  • the black matrix area at the edge of the panel display area also plays a role in blocking the light of the backlight, and improves the visual effect for the transition area between the display area and the surrounding mechanical metal frame.
  • the area of the black matrix area is larger than the area of the gap.
  • the area of the black matrix on the color filter substrate is always made larger than the gap area. In case of manufacturing, the color filter substrate and the array substrate are shifted when they are aligned, so that the aperture ratio decreases.
  • the Nth data line and the N+1th data line are connected to the same pixel unit, and the Nth scan line and the N+1th scan line are connected to the same pixel unit.
  • a liquid crystal display panel provided by the present application includes: an array substrate, a color filter substrate, and a liquid crystal layer; wherein the color filter substrate is disposed facing the array substrate and is located at the top of the entire liquid crystal panel; the liquid crystal layer is disposed Liquid crystal is poured between the color filter substrate and the array substrate; the array substrate is located below the entire liquid crystal panel, and includes a plurality of data lines 21, a plurality of scanning lines 22, and a plurality of data lines 21 and a plurality of A plurality of pixel units composed of scanning lines 22, wherein the data lines 21 and the scanning lines 22 are arranged in the same direction.
  • the data line is disposed below the scan line.
  • each of the pixel units includes three sub-pixels of different colors, and the sub-pixels are pixels of three colors of red, green, and blue.
  • each pixel unit includes: a thin film transistor, a liquid crystal capacitor, and a storage capacitor.
  • the liquid crystal capacitor and the storage capacitor are arranged in parallel.
  • the color filter substrate is provided with a black matrix area.
  • the black matrix area at the edge of the panel display area also plays a role in blocking the light of the backlight, and improves the visual effect for the transition area between the display area and the surrounding mechanical metal frame.
  • the area of the black matrix area is larger than the area of the gap.
  • the area of the black matrix on the color filter substrate is always made larger than the gap area. In case of manufacturing, the color filter substrate and the array substrate are shifted when they are aligned, so that the aperture ratio decreases.
  • the Nth data line and the N+1th data line are connected to the same pixel unit, and the Nth scan line and the N+1th scan line are connected to the same pixel unit.
  • a substrate which may be a quartz substrate, a glass substrate, or a resin substrate.
  • a pattern of an active layer, a source, a drain, a data line, and a pixel electrode is sequentially formed on the substrate, and a pattern of an insulating layer, a gate, a gate line, and a common electrode line is sequentially formed, wherein the data line and the gate line Set in the same direction and the data line is above the scan line; install the array substrate and the color filter substrate that have formed the circuit, then inject liquid crystal between the two glass substrates, and finally connect the external control circuit and external The frame, backlight, etc. are assembled together with the above assembled substrate.
  • a substrate which may be a quartz substrate, a glass substrate or a resin substrate.
  • a pattern of an active layer, a source, a drain, a data line, and a pixel electrode is sequentially formed on the substrate, and a pattern of an insulating layer, a gate, a gate line, and a common electrode line is sequentially formed, wherein the data line and the gate line Set in the same direction and the data line is located below the scanning line; install the array substrate and the color filter substrate that have formed the circuit, then inject liquid crystal between the two glass substrates, and finally connect the external control circuit, external The frame, backlight, etc. are assembled together with the above assembled substrate.

Abstract

一种液晶显示面板，包括：阵列基板、彩膜基板和液晶层；其中，彩膜基板正对于阵列基板设置，位于整个液晶面板的最上方；液晶层设置在彩膜基板和阵列基板之间，中间灌注液晶；阵列基板位于整个液晶面板的下方，包含多条数据线、多条扫描线以及由多条数据线和多条扫描线组成的多个像素单元，其中，数据线与扫描线同向设置。

Description

液晶显示面板 技术领域
本申请涉及显示领域，特别是涉及一种液晶显示面板。
 背景技术
随着现代化技术的进步，液晶面板行业的发展也越来越快，人们对显示屏的亮度要求越来越高。关于提升液晶显示屏亮度的方法有很多，但是制作工艺麻烦，成本相对也比较高，使得液晶显示面板亮度提升比较困难。
在现有技术中，参阅图1，阵列基板上的电路一般是由多条横向排列的扫描线12与多条纵向排列的数据线11纵横交错所组成的，像素单元中包含：薄膜晶体管13，液晶电容14和存储电容15。在与彩膜基板进行对装时，彩膜基板上对应于数据线的位置上方需要设置黑色矩阵区，用于改善金属的反光和漏光等现象的发生。但是这种设置方式的问题在于，由于数据线上方设置有黑色矩阵区，黑色矩阵区会阻挡部分光线的传播，使得液晶显示面板上显示区域的面积相对较小。
因此，现有的液晶显示面板技术中，还存在提升液晶显示屏的亮度工艺复杂，成本高的问题，急需改进。
 技术问题
本申请涉及一种液晶显示面板，用于改善现有技术中提升液晶显示面板亮度工艺复杂，成本高的问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请提供的一种液晶显示面板，包括：阵列基板、彩膜基板和液晶层；其中，
所述彩膜基板正对于所述阵列基板设置，位于整个液晶面板的最上方；
所述液晶层设置在所述彩膜基板和所述阵列基板之间，中间灌注液晶；
所述阵列基板位于整个液晶面板的下方，包含多条数据线、多条扫描线以及由多条数据线和多条扫描线组成的多个像素单元，其中，所述数据线与所述扫描线同向设置，每个像素单元包括：薄膜晶体管、液晶电容和存储电容。
根据本申请提供的一种优选实施例，所述数据线设置于所述扫描线的上方。
根据本申请提供的一种优选实施例，所述数据线设置于所述扫描线的下方。
根据本申请提供的一种优选实施例，相邻两像素单元之间设置有间隙。
根据本申请提供的一种优选实施例，每一所述像素单元包括三种不同颜色的子像素。
根据本申请提供的一种优选实施例，所述子像素为：红、绿、蓝三种颜色的像素。
根据本申请提供的一种优选实施例，所述彩膜基板设置有黑色矩阵区。
根据本申请提供的一种优选实施例，所述黑色矩阵区的面积大于所述间隙的面积。
根据本申请提供的一种优选实施例，所述像素单元内，源极、漏极与栅极之间通过接触孔连接。
根据本申请提供的一种优选实施例，所述接触孔分为第一接触孔和第二接触孔。
根据本申请提供的一种优选实施例，所述液晶电容和所述存储电容并联设置。
根据本申请提供的一种优选实施例，第N条数据线和第N+1条数据线连接同一像素单元，第N条扫描线和第N+1条扫描线连接同一像素单元。
本申请还提供另一种液晶显示面板，包括：阵列基板、彩膜基板和液晶层；其中，
所述彩膜基板正对于所述阵列基板设置，位于整个液晶面板的最上方；
所述液晶层设置在所述彩膜基板和所述阵列基板之间，中间灌注液晶；
所述阵列基板位于整个液晶面板的下方，包含多条数据线、多条扫描线以及由多条数据线和多条扫描线组成的多个像素单元，其中，所述数据线与所述扫描线同向设置。
根据本申请提供的一优选实施例，所述数据线设置于所述扫描线的上方。
根据本申请提供的一优选实施例，所述数据线设置于所述扫描线的下方。
根据本申请提供的一优选实施例，相邻两像素单元之间设置有间隙。
根据本申请提供的一优选实施例，每一所述像素单元包括三种不同颜色的子像素。
根据本申请提供的一优选实施例，所述彩膜基板设置有黑色矩阵区。
根据本申请提供的一优选实施例，所述黑色矩阵区的面积大于所述间隙的面积。
根据本申请提供的一优选实施例，一种液晶显示面板制作方法，包括如下步骤：
S10，提供一基板；
S20，在基板上依次形成有源层、源极、漏极、数据线以及像素电极图形，再依次形成绝缘层、栅极、栅线及公共电极线的图形，所述数据线和所述扫描线同侧设置；
S30，将上述步骤“S20”中完成的阵列基板与彩膜基板进行对装，灌注液晶；
S40，将外部控制电路、外框、背光板与上述步骤“S30”中安装完成的整体一起进行拼装。
根据本申请提供的一优选实施例，所述基板为石英基板、玻璃基板或是树脂基板。
根据本申请提供的一优选实施例，所述数据线设置于所述扫描线的上方或是下方。
 有益效果
与现有技术相比，本申请将阵列基板上的数据线和扫描线由垂直设置改为同向设置，去掉原数据线上方的氧化铟锡（ITO）薄膜层以及对应位于彩膜基板上的黑色矩阵区，空出原数据线的位置，从而增加液晶显示面板的透光度。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中液晶显示面板的像素电路结构示意图。
图2为本申请实施例提供的液晶显示面板的像素电路结构示意图。
图3为现有技术中扫描线在数据线下方薄膜晶体管的内部结构剖视图。
图4为本申请实施例提供的扫描线在数据线下方的液晶显示面板薄膜晶体管内部结构剖视图。
图5为现有技术中扫描线在数据线上方的薄膜晶体管的内部结构图。
图6为本申请实施例提供的扫描线在数据线上方的薄膜晶体管的内部结构图。
图7为本申请实施例提供的液晶显示面板制作方法的第一流程图。
图8为本申请实施例提供的液晶显示面板制作方法的第二流程图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
下面将结合图1-6进行详细说明。
参阅图1，现有技术中阵列基板上的像素等效电路，包括：数据线11，扫描线12，薄膜晶体管13，液晶电容14，存储电容15。
参阅图2，本申请提供的一种液晶显示面板的像素等效电路，包括：数据线21，扫描线22，薄膜晶体管23，液晶电容24，存储电容25。其中，数据线21和扫描线22同向设置。
参阅图3，为现有技术中，阵列基板上数据线和扫描线垂直设置且扫描线在数据线的下方时，薄膜晶体管的剖面图。31为源极，32为漏极，33为栅极，34为绝缘层（SiNx），35为半导体薄膜（a-Si:H）层，36为半导体薄膜（n+a-Si:H）层。
参阅图4，为本申请提供的一种液晶显示面板的阵列基板上数据线和扫描线同向设置且扫描线在数据线的下方时，薄膜晶体管的剖面图。41为源极，42为漏极，43为栅极，44为栅绝缘层（SiNx），45为有源层（a-Si:H），为半导体薄膜），46为欧姆接触层（n+a-Si:H，为半导体薄膜）。
参阅图5，为现有技术中，阵列基板上的数据线和扫描线垂直设置且数据线在扫描线的上方时，薄膜晶体管的剖面图。51为栅极，52为源极，53为漏极，54为欧姆接触层（n+ a-Si:H），55为有源层（a-Si:H），56为栅绝缘层（gate-SiNx）。
参阅图6，为本申请提供的一种液晶显示面板中，阵列基板上的数据线和扫描线同向设置且数据线在扫描线的上方时，薄膜晶体管的剖面图。61为栅极，62为源极，63为漏极，从此剖面图只能看到源极和漏极中的一个，另一个被遮挡住。64为欧姆接触层（n+a-Si:H），65为有源层（a-Si:H），66为栅绝缘层（gate-SiNx）。
实施例一
本申请提供的一种液晶显示面板，包括：阵列基板、彩膜基板和液晶层；其中，所述彩膜基板正对于所述阵列基板设置，位于整个液晶面板的最上方；所述液晶层设置在所述彩膜基板和所述阵列基板之间，中间灌注液晶；所述阵列基板位于整个液晶面板的下方，包含多条数据线21、多条扫描线22以及由多条数据线21和多条扫描线22组成的多个像素单元，其中，所述数据线21与所述扫描线22同向设置。
根据本申请提供的一优选实施例，所述数据线设置于所述扫描线的上方。
根据本申请提供的一优选实施例，相邻两像素单元之间设置有间隙。根据本申请提供的一优选实施例，每一所述像素单元包括三种不同颜色的子像素，该子像素为红、绿、蓝三种颜色的像素。
根据本申请提供的一优选实施例，每个所述像素单元包括：薄膜晶体管、液晶电容和存储电容。
根据本申请提供的一优选实施例，所述液晶电容与所述存储电容并联设置。
根据本申请提供的一优选实施例，所述彩膜基板设置有黑色矩阵区。在彩膜基板上设置黑矩阵区主要有四个方面的作用：一是遮蔽由于扫描线/数据线附近电场紊乱进而引起出射光不可控的漏光；二是防止亚像素之间混色，提高显示图像的纯度；三是防止外界光线照射到薄膜晶体管的沟道上具有光敏特性的半导体材料上，引起光生电流，即薄膜晶体管漏电流增加，导致薄膜晶体管无法关闭而影响显示器性能；其四是，在液晶面板显示区边缘的黑色矩阵区还起到遮挡背光源的光的作用，并为显示区与四周机械金属框的过渡区改善视觉效果。
根据本申请提供的一优选实施例，所述黑色矩阵区的面积大于所述间隙的面积。为防止数据线和像素ITO之间的空隙漏光以及液晶显示屏表面反射光，彩膜基板上的黑矩阵的面积总是做得大于间隙面积的。也以防制造时，彩膜基板和阵列基板对准定位时发生偏移，使得开口率下降。
根据本申请提供的一优选实施例，第N条数据线和第N+1条数据线连接同一像素单元，第N条扫描线和第N+1条扫描线连接同一像素单元。
实施例二
本申请提供的一种液晶显示面板，包括：阵列基板、彩膜基板和液晶层；其中，所述彩膜基板正对于所述阵列基板设置，位于整个液晶面板的最上方；所述液晶层设置在所述彩膜基板和所述阵列基板之间，中间灌注液晶；所述阵列基板位于整个液晶面板的下方，包含多条数据线21、多条扫描线22以及由多条数据线21和多条扫描线22组成的多个像素单元，其中，所述数据线21与所述扫描线22同向设置。
根据本申请提供的一优选实施例，所述数据线设置于所述扫描线的下方。
根据本申请提供的一优选实施例，相邻两像素单元之间设置有间隙。根据本申请提供的一优选实施例，每一所述像素单元包括三种不同颜色的子像素，该子像素为红、绿、蓝三种颜色的像素。
根据本申请提供的一优选实施例，每个所述像素单元包括：薄膜晶体管、液晶电容和存储电容。
根据本申请提供的一优选实施例，所述液晶电容与所述存储电容并联设置。
根据本申请提供的一优选实施例，所述彩膜基板设置有黑色矩阵区。在彩膜基板上设置黑矩阵区主要有四个方面的作用：一是遮蔽由于扫描线/数据线附近电场紊乱进而引起出射光不可控的漏光；二是防止亚像素之间混色，提高显示图像的纯度；三是防止外界光线照射到薄膜晶体管的沟道上具有光敏特性的半导体材料上，引起光生电流，即薄膜晶体管漏电流增加，导致薄膜晶体管无法关闭而影响显示器性能；其四是，在液晶面板显示区边缘的黑色矩阵区还起到遮挡背光源的光的作用，并为显示区与四周机械金属框的过渡区改善视觉效果。
根据本申请提供的一优选实施例，所述黑色矩阵区的面积大于所述间隙的面积。为防止数据线和像素ITO之间的空隙漏光以及液晶显示屏表面反射光，彩膜基板上的黑矩阵的面积总是做得大于间隙面积的。也以防制造时，彩膜基板和阵列基板对准定位时发生偏移，使得开口率下降。
根据本申请提供的一优选实施例，第N条数据线和第N+1条数据线连接同一像素单元，第N条扫描线和第N+1条扫描线连接同一像素单元。
实施例三
参阅图7，提供一基板，该基板可以是石英基板、玻璃基板或是树脂基板。在基板依次形成有源层、源极、漏极、数据线以及像素电极图形，再依次形成绝缘层、栅极、栅线及公共电极线的图形，其中，所述数据线与所述栅线同向设置且所述数据线位于所述扫描线的上方；将已经形成有电路的阵列基板与彩膜基板进行对装，再在两片玻璃基板之间注入液晶，最后将外部控制电路、外框、背光板等与上述拼装完成的基板一起进行组装。
实施例四
参阅图8，提供一基板，该基板可以是石英基板、玻璃基板或是树脂基板。在基板依次形成有源层、源极、漏极、数据线以及像素电极图形，再依次形成绝缘层、栅极、栅线及公共电极线的图形，其中，所述数据线与所述栅线同向设置且所述数据线位于所述扫描线的下方；将已经形成有电路的阵列基板与彩膜基板进行对装，再在两片玻璃基板之间注入液晶，最后将外部控制电路、外框、背光板等与上述拼装完成的基板一起进行组装。
以上对本申请实施例所提供的一种液晶显示面板及其制作方法进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种液晶显示面板，其中，包括：阵列基板、彩膜基板和液晶层；其中，
    所述彩膜基板正对于所述阵列基板设置，位于整个液晶面板的最上方；
    所述液晶层设置在所述彩膜基板和所述阵列基板之间，中间灌注液晶；
    所述阵列基板位于整个液晶面板的下方，包含多条数据线、多条扫描线以及由多条数据线和多条扫描线组成的多个像素单元，其中，所述数据线与所述扫描线同向设置，每个像素单元包括：薄膜晶体管、液晶电容和存储电容。
  2. 根据权利要求1所述的液晶显示面板，其中，所述数据线设置于所述扫描线的上方。
  3. 根据权利要求1所述的液晶显示面板，其中，所述数据线设置于所述扫描线的下方。
  4. 根据权利要求2或3所述的液晶显示面板，其中，相邻两像素单元之间设置有间隙。
  5. 根据权利要求4所述的液晶显示面板，其中，每一所述像素单元包括三种不同颜色的子像素。
  6. 根据权利要求5所述的液晶显示面板，其中，所述子像素为：红、绿、蓝三种颜色的像素。
  7. 根据权利要求1所述的液晶显示面板，其中，所述彩膜基板设置有黑色矩阵区。
  8. 根据权利要求6所述的液晶显示面板，其中，所述黑色矩阵区的面积大于所述间隙的面积。
  9. 根据权利要求1所述的液晶显示面板，其中，所述像素单元内，源极、漏极与栅极之间通过接触孔连接。
  10. 根据权利要求9所述的液晶显示面板，其中，所述接触孔分为第一接触孔和第二接触孔。
  11. 根据权利要求1所述的液晶显示面板，其中，所述液晶电容和所述存储电容并联设置。
  12. 根据权利要求1所述的液晶显示面板，其中，第N条数据线和第N+1条数据线连接同一像素单元，第N条扫描线和第N+1条扫描线连接同一像素单元。
  13. 一种液晶显示面板，其中，包括：阵列基板、彩膜基板和液晶层；其中，
    所述彩膜基板正对于所述阵列基板设置，位于整个液晶面板的最上方；
    所述液晶层设置在所述彩膜基板和所述阵列基板之间，中间灌注液晶；
    所述阵列基板位于整个液晶面板的下方，包含多条数据线、多条扫描线以及由多条数据线和多条扫描线组成的多个像素单元，其中，所述数据线与所述扫描线同向设置。
  14. 根据权利要求13所述的液晶显示面板，其中，所述数据线设置于所述扫描线的上方。
  15. 根据权利要求13所述的液晶显示面板，其中，所述数据线设置于所述扫描线的下方。
  16. 根据权利要求14或15所述的液晶显示面板，其中，相邻两像素单元之间设置有间隙。
  17. 根据权利要求13所述的液晶显示面板，其中，所述彩膜基板设置有黑色矩阵区。
  18. 一种液晶显示面板制作方法，其中，包括如下步骤：
    S10，提供一基板；
    S20，在基板上依次形成有源层、源极、漏极、数据线以及像素电极图形，再依次形成绝缘层、栅极、栅线及公共电极线的图形，所述数据线和所述扫描线同侧设置；
    S30，将上述步骤“S20”中完成的阵列基板与彩膜基板进行对装，灌注液晶；
    S40，将外部控制电路、外框、背光板与上述步骤“S30”中安装完成的整体一起进行拼装。
  19. 根据权利要求18所述的液晶显示面板的制作方法，其中，步骤“S10”中所述基板为石英基板、玻璃基板或是树脂基板。
  20. 根据权利要求18所述的液晶显示面板的制作方法，其中，步骤“S20”中所述数据线设置于所述扫描线的上方或是下方。
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109471308A (zh) * 2018-12-19 2019-03-15 深圳市华星光电半导体显示技术有限公司 液晶显示面板
CN110764329A (zh) * 2019-10-31 2020-02-07 京东方科技集团股份有限公司 阵列基板及其制备方法、液晶显示面板、显示装置
CN110850615B (zh) * 2019-11-27 2022-04-26 深圳市华星光电半导体显示技术有限公司 像素驱动电路、液晶显示面板及投影显示装置
CN113376910A (zh) * 2021-05-28 2021-09-10 惠科股份有限公司 阵列基板、液晶面板以及显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050007526A1 (en) * 2002-12-18 2005-01-13 Lg. Philips Lcd. Co., Ltd. TFT-LCD comprising test pixels, black matrix elements, common voltage line formed within particular dummy region
CN101799605A (zh) * 2010-03-18 2010-08-11 友达光电股份有限公司 像素阵列
CN101887892A (zh) * 2010-06-07 2010-11-17 友达光电股份有限公司 像素结构及具有此种像素结构的显示面板
CN102103293A (zh) * 2009-12-18 2011-06-22 胜华科技股份有限公司 窄边框显示面板与应用其的电子装置
CN103744239A (zh) * 2013-12-26 2014-04-23 深圳市华星光电技术有限公司 一种内嵌式触控阵列基板结构
CN104865757A (zh) * 2015-05-22 2015-08-26 昆山龙腾光电有限公司 一种显示面板、显示装置以及显示面板的视角控制方法
CN109471308A (zh) * 2018-12-19 2019-03-15 深圳市华星光电半导体显示技术有限公司 液晶显示面板

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102471130B1 (ko) * 2016-02-17 2022-11-29 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
CN205507290U (zh) * 2016-04-11 2016-08-24 京东方科技集团股份有限公司 触控显示模组、触控显示面板和装置
CN106932968B (zh) * 2017-05-11 2019-07-05 京东方科技集团股份有限公司 一种显示面板及显示装置
CN108873552B (zh) * 2018-06-29 2021-10-29 上海天马微电子有限公司 一种电子纸显示基板、显示面板及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050007526A1 (en) * 2002-12-18 2005-01-13 Lg. Philips Lcd. Co., Ltd. TFT-LCD comprising test pixels, black matrix elements, common voltage line formed within particular dummy region
CN102103293A (zh) * 2009-12-18 2011-06-22 胜华科技股份有限公司 窄边框显示面板与应用其的电子装置
CN101799605A (zh) * 2010-03-18 2010-08-11 友达光电股份有限公司 像素阵列
CN101887892A (zh) * 2010-06-07 2010-11-17 友达光电股份有限公司 像素结构及具有此种像素结构的显示面板
CN103744239A (zh) * 2013-12-26 2014-04-23 深圳市华星光电技术有限公司 一种内嵌式触控阵列基板结构
CN104865757A (zh) * 2015-05-22 2015-08-26 昆山龙腾光电有限公司 一种显示面板、显示装置以及显示面板的视角控制方法
CN109471308A (zh) * 2018-12-19 2019-03-15 深圳市华星光电半导体显示技术有限公司 液晶显示面板

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