WO2020103211A1 - 摄像组件及其封装方法、镜头模组、电子设备 - Google Patents

摄像组件及其封装方法、镜头模组、电子设备 Download PDF

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Publication number
WO2020103211A1
WO2020103211A1 PCT/CN2018/119984 CN2018119984W WO2020103211A1 WO 2020103211 A1 WO2020103211 A1 WO 2020103211A1 CN 2018119984 W CN2018119984 W CN 2018119984W WO 2020103211 A1 WO2020103211 A1 WO 2020103211A1
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Prior art keywords
photosensitive chip
functional element
chip
photosensitive
packaging
Prior art date
Application number
PCT/CN2018/119984
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English (en)
French (fr)
Inventor
陈达
刘孟彬
Original Assignee
中芯集成电路(宁波)有限公司上海分公司
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Application filed by 中芯集成电路(宁波)有限公司上海分公司 filed Critical 中芯集成电路(宁波)有限公司上海分公司
Priority to KR1020197036889A priority Critical patent/KR102250618B1/ko
Priority to JP2019568346A priority patent/JP7004336B2/ja
Priority to US16/236,840 priority patent/US11296141B2/en
Publication of WO2020103211A1 publication Critical patent/WO2020103211A1/zh

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    • GPHYSICS
    • G02OPTICS
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    • G02B5/00Optical elements other than lenses
    • G02B5/20Filters
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    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50Constructional details
    • H04N23/55Optical parts specially adapted for electronic image sensors; Mounting thereof
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/83005Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
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    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16235Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip

Definitions

  • Embodiments of the present invention relate to the field of lens modules, and in particular, to a camera assembly and its packaging method, lens module, and electronic equipment.
  • the design level of the lens module is one of the important factors that determine the shooting quality.
  • the lens module usually includes a camera assembly with a photosensitive chip and a lens assembly fixed above the camera assembly and used to form an image of a subject.
  • a photosensitive chip with a larger imaging area is correspondingly needed, and passive elements such as resistors and capacitors and peripheral chips are usually also arranged in the lens module.
  • the problem solved by the embodiments of the present invention is to provide a camera assembly and its packaging method, a lens module, and electronic equipment to improve the performance of the lens module and reduce the total thickness of the lens module.
  • an embodiment of the present invention provides a packaging method of a camera assembly, including: providing a photosensitive chip; mounting a filter on the photosensitive chip; providing a carrier substrate, and temporarily bonding a photosensitive on the carrier substrate A chip and a functional element; an encapsulation layer is formed on the carrier substrate, and the encapsulation layer is filled at least between the photosensitive chip and the functional element.
  • an embodiment of the present invention also provides a camera assembly, including: an encapsulation layer, and a photosensitive unit and a functional element embedded in the encapsulation layer; the photosensitive unit includes a photosensitive chip and is mounted on the photosensitive chip Of the optical filter, at least the bottom surface of the encapsulation layer exposes the photosensitive chip and the functional element.
  • an embodiment of the present invention also provides a lens module, including: the camera assembly described in the embodiment of the present invention; the lens assembly includes a bracket, the bracket is attached to the top surface of the packaging layer and surrounds the lens The photosensitive unit and the functional element, and the lens assembly is electrically connected to the photosensitive chip and the functional element.
  • an embodiment of the present invention also provides an electronic device, including: the lens module described in the embodiment of the present invention.
  • the embodiment of the present invention integrates the photosensitive chip and the functional element in the encapsulation layer. Compared with the solution of mounting the functional element on the peripheral motherboard, the embodiment of the present invention can reduce the distance between the photosensitive chip and the functional element. It is beneficial to shorten the distance of the electrical connection between the photosensitive chip and the functional element, thereby increasing the signal transmission rate, and thereby improving the performance of the lens module (for example: increasing the shooting speed and storage speed); and, through the encapsulation layer, The circuit board (for example: PCB) is also omitted, and the total thickness of the lens module is correspondingly reduced, thereby meeting the needs of the lens module to be smaller and thinner.
  • PCB PCB
  • a wire bond process is used to electrically connect the pads of the photosensitive chip and the functional element, thereby improving the compatibility of the electrical connection process with the current packaging process and reducing packaging costs.
  • FIGS. 1 to 9 are structural schematic diagrams corresponding to each step in an embodiment of a method for packaging a camera module of the present invention.
  • 10 and 11 are structural schematic diagrams corresponding to the steps in another embodiment of the packaging method of the camera assembly of the present invention.
  • FIGS. 12 and 13 are schematic structural diagrams corresponding to the steps in yet another embodiment of the packaging method of the camera assembly of the present invention.
  • 14 to 16 are structural schematic diagrams corresponding to the steps in still another embodiment of the packaging method of the camera assembly of the present invention.
  • FIG. 17 is a schematic structural view of an embodiment of a lens module of the present invention.
  • FIG. 18 is a schematic structural diagram of an embodiment of an electronic device of the present invention.
  • the performance of the lens module needs to be improved, and it is difficult for the lens module to meet the requirements for the miniaturization and thinness of the lens module.
  • the reason for the analysis is:
  • the traditional lens module is mainly composed of a circuit board, a photosensitive chip, a functional element (such as a peripheral chip) and a lens assembly, and the peripheral chip is usually mounted on a peripheral motherboard, the photosensitive chip and the functional element are separated from each other;
  • the circuit board is used to support the photosensitive chip, the functional element and the lens assembly, and the electrical connection between the photosensitive chip, the functional element and the lens module is realized through the circuit board.
  • the photosensitive chip is usually arranged inside the bracket of the lens module, and the peripheral chip is usually arranged outside the bracket. Therefore, there is a certain distance between the peripheral chip and the photosensitive chip, thereby reducing the signal transmission rate.
  • the peripheral chip usually includes a digital signal processor (digital Signal processor (DSP) chip and memory chip, so it is easy to adversely affect the shooting speed and storage speed, which in turn reduces the performance of the lens module.
  • DSP digital Signal processor
  • the embodiment of the present invention integrates the photosensitive chip and the functional element in the packaging layer.
  • the embodiment of the present invention can reduce the photosensitive chip and the functional element The distance between them is conducive to shortening the distance of the electrical connection between the photosensitive chip and the functional element, thereby increasing the signal transmission rate, thereby improving the performance of the lens module (for example: increasing the shooting speed and storage speed); and
  • the circuit board is also omitted, and the total thickness of the lens module is correspondingly reduced, thereby meeting the needs of the lens module to be smaller and thinner.
  • FIG. 1 to FIG. 9 are schematic structural diagrams corresponding to the steps in an embodiment of the method for packaging a photographing component of the present invention.
  • a photosensitive chip 200 is provided.
  • the photosensitive chip 200 is an image sensor chip.
  • the photosensitive chip 200 is a CMOS image sensor (CMOS image sensor, CIS) chip.
  • the photosensitive chip may also be a CCD (charge coupled device, charge coupled device) image sensor chip.
  • the photosensitive chip 200 includes a photosensitive area 200C and a peripheral area 200E surrounding the photosensitive area 200C.
  • the optical signal receiving surface 201 of the photosensitive chip 200 is located in the photosensitive area 200C, and the photosensitive chip 200 receives the sensing light radiation signal through the optical signal receiving surface 201.
  • the photosensitive chip 200 includes a plurality of pixel units, so the photosensitive chip 200 includes a plurality of semiconductor photosensors (not shown), and a plurality of filter films (not shown) on the semiconductor photosensors to filter light
  • the film is used to selectively absorb and pass the optical signal received by the optical signal receiving surface 201.
  • the photosensitive chip 200 further includes a microlens 210 on the filter film, and the microlens 210 corresponds to the semiconductor photosensitive device in a one-to-one manner, so as to focus the received light radiation signal light to the semiconductor photosensitive device.
  • the optical signal receiving surface 201 corresponds to the top surface of the micro lens 210.
  • the photosensitive chip 200 is usually a silicon-based chip, which is made by an integrated circuit manufacturing technology, and the photosensitive chip 200 has bonding pads for electrically connecting the photosensitive chip 200 with other chips or components .
  • the photosensitive chip 200 has a first chip pad 220 formed in the peripheral area 200E.
  • the surface of the photosensitive chip 200 on the same side of the light signal receiving surface 201 exposes the first chip pad 220. In other embodiments, the surface of the photosensitive chip facing away from the light signal receiving surface exposes the first chip pad.
  • FIG. 3 is an enlarged view of a filter in FIG. 2, and a filter 400 (as shown in FIG. 4) is mounted on the photosensitive chip 200 (as shown in FIG. 4), A photosensitive unit 250 is formed (as shown in FIG. 4).
  • the photosensitive chip 200 has an optical signal receiving surface 201 (as shown in FIG. 4) facing the filter 400, by first mounting the filter 400 and the photosensitive chip 200, so as to avoid subsequent packaging process on the optical signal receiving surface 201 Contamination is caused, and accordingly, the subsequent packaging process will not adversely affect the performance of the photosensitive chip 200. Moreover, through the mounting method, the overall thickness of the subsequent lens module is significantly reduced to meet the requirements of miniaturization and thinning of the lens module.
  • the filter 400 may be an infrared filter glass or a fully transparent glass.
  • the filter 400 is an infrared filter glass, which is also used to eliminate the influence of infrared light in incident light on the performance of the photosensitive chip 200, which is beneficial to improve the imaging effect.
  • the filter 400 is an infrared cut filter (infrared cut filter, IRCF), the infrared cut filter may be a blue glass infrared cut filter, or the infrared cut filter includes glass and an infrared cut film (IR) on the surface of the glass cut coating).
  • IRCF infrared cut filter
  • the filter 400 includes a surface 401 to be bonded.
  • the surface 401 to be bonded is a surface for mounting with the photosensitive chip 200, that is, a surface facing the photosensitive chip 200.
  • the filter 400 is a blue glass infrared cut filter
  • one surface of the blue glass infrared cut filter is coated with an antireflection film or an antireflection film, and the antireflection film or the antireflection film
  • the surface opposite to the surface of the reflective film is the surface to be bonded 401; in the case where the filter 400 includes glass and an infrared cut-off film located on the glass surface, the glass surface opposite to the infrared cut-off film ⁇ ⁇ bond surface 401 ⁇
  • any surface of the fully transparent glass sheet is the surface to be bonded.
  • the filter 400 includes a light-transmitting area 400C and an edge area 400E surrounding the light-transmitting area 400C.
  • the light transmitting area 400C of the filter 400 is used to transmit external incident light, so that the light signal receiving surface 201 of the photosensitive chip 200 receives the light signal; the edge area 400E is used to realize Space for mounting the filter 400 and the photosensitive chip 200 is reserved.
  • the filter 400 is attached to the photosensitive chip 200 through an adhesive structure 410, and the adhesive structure 410 surrounds the light signal receiving surface 201 of the photosensitive chip 200.
  • the adhesive structure 410 is used to realize the physical connection between the filter 400 and the photosensitive chip 200. Moreover, the filter 400, the adhesive structure 410 and the photosensitive chip 200 form a cavity (not shown) to avoid direct contact between the filter 400 and the photosensitive chip 200, thereby avoiding adverse effects on the performance of the photosensitive chip 200.
  • the adhesive structure 410 surrounds the optical signal receiving surface 201, so that the filter 400 above the optical signal receiving surface 201 is located on the photosensitive path of the photosensitive chip 200, so that the The optical performance of the photosensitive chip 200 is guaranteed.
  • the material of the bonding structure 410 is a photolithographic material, so the bonding structure 410 can be formed by a photolithography process, which not only helps to improve the morphological quality and size of the bonding structure 410 The precision, the packaging efficiency and the production capacity are improved, and the effect on the bonding strength of the bonding structure 410 can also be reduced by photolithography.
  • the material of the adhesive structure 410 is a photolithographic dry film.
  • the material of the bonding structure may also be lithographic polyimide, lithographic polybenzoxazole (PBO), or lithographic benzocyclobutene (BCB).
  • the adhesive structure 410 may be formed on the photosensitive chip 200 or on the filter 400.
  • the adhesive structure 410 is formed.
  • the steps of forming the photosensitive unit 250 include:
  • a first carrier substrate 340 is provided; the filter 400 is bonded to the first carrier substrate 340 when facing away from the face of the surface to be bonded 401.
  • the first carrier substrate 340 is used to provide a process platform for the bonding step of the filter 400 and the photosensitive chip 200, thereby improving process operability.
  • the first carrier substrate 340 is a carrier wafer.
  • the first carrier substrate may also be other types of substrates.
  • the filter 400 is temporarily bonded to the first carrier substrate 340 through the first temporary bonding layer 345.
  • the first temporary bonding layer 345 is used as a peeling layer to facilitate subsequent debonding.
  • the first temporary bonding layer 345 is a foamed film.
  • the foamed film includes a relatively slightly sticky surface and a foamed surface.
  • the foamed film is tacky at room temperature, and the foamed surface is attached to the first carrier substrate 340, and the foamed film is subsequently heated to make the hair The instant noodles lose their stickiness, thus achieving debonding.
  • the first temporary bonding layer may also be a die attach film (DAF).
  • DAF die attach film
  • a ring-shaped adhesive structure 410 is formed in the edge region 400E (as shown in FIG. 3) of the filter 400.
  • the step of forming the adhesive structure 410 includes: forming an adhesive material layer (not shown) covering the optical filter 400 and the first temporary bonding layer 345; and patterning the adhesive using a photolithography process The bonding material layer retains the remaining bonding material layer of the edge region 400E as the bonding structure 410.
  • the optical signal receiving surface 201 of the photosensitive chip 200 faces the ring-shaped adhesive structure 410, and the peripheral area 200E (as shown in FIG. 1) of the photosensitive chip 200 is mounted on the ring-shaped adhesive structure 410 To form the photosensitive unit 250.
  • the first chip pad 220 faces the filter 400.
  • the photosensitive unit 250 after forming the photosensitive unit 250 (as shown in FIG. 4), it further includes: attaching the surface of the photosensitive chip 200 facing away from the light signal receiving surface 201 to the UV film 310; After the attaching step, a first unbonding process is performed to remove the first carrier substrate 340 (as shown in FIG. 4).
  • the UV film 310 can also provide support and fixation to the photosensitive unit 250 after the first carrier substrate 340 is removed. Wherein, the adhesion of the UV film 310 under ultraviolet light is weakened, and the photosensitive unit 250 can be easily removed from the UV film 310 later.
  • a film laminator is used to make the UV film 310 closely adhere to the surface of the photosensitive chip 200 that faces away from the light signal receiving surface 201, and is also attached to the bottom of the frame 315 with a larger diameter.
  • the photosensitive unit 250 is separately fixed on the UV film 310. The specific description of the UV film 310 and the frame 315 will not be repeated in this embodiment.
  • the first temporary bonding layer 345 (as shown in FIG. 4) is a foamed film, so the first debonding process is performed using a pyrolysis bonding process. Specifically, the first temporary bonding layer 345 is heat-treated to make the foamed surface of the foam film lose its viscosity, thereby removing the first carrier substrate 340; after removing the first carrier substrate 340, The first temporary bonding layer 345 is removed by tearing.
  • a second carrier substrate 320 is provided, on which the photosensitive chip 200 and the functional element (not labeled) are temporarily bonded.
  • process preparation is prepared for the subsequent package integration and electrical integration of each chip and component.
  • temporary bonding temporary The bonding (TB) method also facilitates subsequent separation of the photosensitive chip 200, the functional element, and the second carrier substrate 320.
  • the second carrier substrate 320 is also used to provide a process platform for the subsequent formation of the packaging layer.
  • the second carrier substrate 320 is a carrier wafer. In other embodiments, the second carrier substrate may also be other types of substrates.
  • the photosensitive chip 200 and the functional element are temporarily bonded to the second carrier substrate 320 through the second temporary bonding layer 325.
  • the second temporary bonding layer 325 is a foamed film.
  • the photosensitive chip 200 is bonded to the second carrier substrate 320 when facing away from the filter 400.
  • the UV film 310 (as shown in FIG. 5) at the position of the single photosensitive unit 250 is irradiated with ultraviolet light, so that the UV film 310 irradiated with ultraviolet light loses its viscosity, and the single photosensitive unit 250 is lifted up by a thimble, and then The photosensitive unit 250 is lifted by an adsorption device, and the photosensitive unit 250 is sequentially peeled off from the UV film 310 and placed on the second carrier substrate 320.
  • the photosensitive units 250 by placing the photosensitive units 250 one by one on the second carrier substrate 320, it is beneficial to improve the position accuracy of the photosensitive unit 250 on the second carrier substrate 320, so as to facilitate the subsequent process to proceed normally.
  • the first chip pad 220 of the photosensitive chip 200 faces away from the second carrier substrate 320.
  • the photosensitive chip 200 is temporarily bonded to the second carrier substrate 320.
  • the optical filter may be attached to the photosensitive chip.
  • the number of the photosensitive units may also be multiple.
  • the functional element is a specific functional element other than the photosensitive chip 200 in the camera assembly, and the functional element includes at least one of a peripheral chip 230 and a passive element 240.
  • the functional element includes a peripheral chip 230 and a passive element 240.
  • the peripheral chip 230 is an active element. When the electrical connection with the photosensitive chip 200 is subsequently achieved, it is used to provide peripheral circuits to the photosensitive chip 200, such as an analog power supply circuit and a digital power supply circuit, a voltage buffer circuit, a shutter circuit, Shutter drive circuit, etc.
  • the peripheral chip 230 includes one or both of a digital signal processor chip and a memory chip. In other embodiments, the peripheral chip may also include chips of other functional types. For ease of illustration, only one peripheral chip 230 is illustrated in FIG. 6, but the number of the peripheral chips 230 is not limited to one.
  • the peripheral chip 230 is usually a silicon-based chip, which is manufactured using integrated circuit manufacturing technology, and also has bonding pads, which are used to electrically connect the peripheral chip 230 with other chips or components.
  • the peripheral chip 230 includes a second chip pad 235.
  • the first chip pad 220 faces away from the second carrier substrate 320. Therefore, in order to reduce the difficulty of the subsequent electrical connection process, after the peripheral chip 230 is temporarily bonded to the second carrier substrate 320, the The second chip pad 235 also faces away from the second carrier substrate 320 so that the first chip pad 220 and the second chip pad 235 are on the same side.
  • the peripheral chip 230 and the photosensitive chip 200 are both integrated in the packaging layer formed later.
  • the peripheral chip 230 and the photosensitive chip The thickness of the chip 200 is equal, or the thickness difference between the peripheral chip 230 and the photosensitive chip 200 is small.
  • the peripheral chip 230 with a matching thickness can be formed according to the thickness of the photosensitive chip 200.
  • the thickness difference between the peripheral chip 230 and the photosensitive chip 200 is -2 microns to 2 microns.
  • the passive element 240 is used to play a specific role for the photosensitive work of the photosensitive chip 200.
  • the passive component 240 may include resistors, capacitors, inductors, diodes, transistors, potentiometers, relays, or drivers and other small-sized electronic components. For ease of illustration, only one passive element 240 is illustrated in FIG. 6, but the number of the passive elements 240 is not limited to one.
  • the passive element 240 also has bonding pads for electrical connection between the passive element 240 and other chips or components.
  • the bonding pad of the passive element 240 is an electrode 245.
  • a passive element 240 with a matching thickness is formed according to the thickness of the photosensitive chip 200.
  • the thickness difference between the passive element 240 and the photosensitive chip 200 is -2 microns to 2 microns.
  • the solder pad of the photosensitive chip faces away from the second carrier substrate, and the solder pad of the functional element faces the second carrier substrate Or, the pads of the photosensitive chip and the functional element both face the second carrier substrate.
  • an encapsulation layer 350 is formed on the second carrier substrate 320, and the encapsulation layer 350 is filled at least between the photosensitive chip 200 and a functional element (not labeled).
  • the packaging layer 350 plays a role in fixing the photosensitive chip 200 and the functional elements (for example, the peripheral chip 230 and the passive element 240), and is used to realize packaging integration of the photosensitive chip 200 and the functional elements.
  • the functional elements for example, the peripheral chip 230 and the passive element 240
  • the encapsulation layer 350 can reduce the space occupied by the bracket in the lens assembly, and can also save the circuit board (for example: PCB), thereby significantly reducing the total thickness of the lens module formed later to meet the lens The demand for smaller and thinner modules.
  • the distance between the photosensitive chip 200 and each functional element can be reduced, correspondingly It is beneficial to shorten the distance of the electrical connection between the photosensitive chip and each functional element, thereby increasing the signal transmission rate, and thus improving the performance of the lens module (for example: increasing the shooting speed and storage speed).
  • the encapsulation layer 350 can also play the role of insulation, sealing and moisture resistance, and is also beneficial to improve the reliability of the lens module.
  • the material of the encapsulation layer 350 is epoxy resin.
  • Epoxy resin has the advantages of low shrinkage, good adhesion, good corrosion resistance, excellent electrical performance and low cost, so it is widely used as a packaging material for electronic devices and integrated circuits.
  • the packaging layer 350 exposes the pads of the photosensitive chip 200 and the functional element. Specifically, the packaging layer 350 exposes the first chip pad 220, the second chip pad 235 and the electrode 245.
  • the electrical connection is subsequently achieved through a wire bonding process, and the first die pad 220, the second die pad 235, and the electrode 245 are all facing away from the second carrier substrate 320. Therefore, in order to reduce subsequent wire bonds According to the complexity of the process, in the step of forming the package 350, the packaging layer 350 is filled between the photosensitive chip 200 and the functional element.
  • the encapsulation layer may cover the second carrier substrate, the functional element, and the photosensitive chip, and expose the filter.
  • an injection molding process is used to form the encapsulation layer 350.
  • the injection molding process has the characteristics of fast production speed, high efficiency, and operation can be automated.
  • it is beneficial to increase the output and reduce the process cost; moreover, by selecting the injection molding process to prepare a matching mold, the package
  • the thickness and the formation area of the layer 350 meet the process requirements, and the process is simple.
  • a matching mold can be prepared so that the surface of the encapsulation layer 350 has steps to ensure that the encapsulation layer 350 is exposed to the photosensitive chip 200 and solder pads for functional components.
  • the thickness difference between the photosensitive chip 200 and the functional element is relatively small, which correspondingly reduces the process difficulty of forming the packaging layer 350.
  • the step of forming the encapsulation layer 350 includes: temporarily bonding the photosensitive chip 200 and the functional element on the second carrier substrate 320, and after the mounting of the photosensitive chip 200 and the filter 400 is completed, the The second carrier substrate 320 is placed in a mold, and the mold includes an upper mold and a lower mold, and any one of the upper mold and the lower mold is formed with a groove; the second carrier substrate 320 is placed on the upper mold Between the lower mold and the lower mold; after the mold is closed, the mold is pressed onto the photosensitive chip 200, the peripheral chip 230, the passive element 240, and the second carrier substrate 320, and the filter 400 is placed on the In the groove, a cavity is formed between the upper mold and the lower mold; a molding material is injected into the cavity to form an encapsulation layer 350; after the encapsulation layer 350 is formed, a mold release process is performed to the The encapsulation layer 350 and the mold are separated.
  • the filter 400 is placed in the groove, therefore, the encapsulation layer 350 does not cover the filter 400, and after the mold is closed, the mold is pressed to the photosensitive chip 200, the peripheral chip 230 and the passive element 240, so that the packaging layer 350 is only filled between the photosensitive chip 200, the peripheral chip 230 and the passive element 240, and the process is simple.
  • the encapsulation layer can be etched or grinded to remove part of the encapsulation layer, so that the remaining encapsulation layers are exposed to the photosensitive chip and functional elements Pads.
  • the effect of reducing the thickness of the lens module can already be achieved. Therefore, in this embodiment, there is no need to thin the photosensitive chip 200 and the peripheral chip 230, thereby improving the mechanical strength and reliability of the photosensitive chip 200 and the peripheral chip 230, thereby improving the reliability of the lens module.
  • the thickness of the photosensitive chip and the peripheral chip may be appropriately reduced, but the thinning amount is small to ensure that the mechanical strength and reliability are not affected.
  • the packaging layer 350 is formed after the photosensitive chip 200 is bonded to the second carrier substrate 320. Compared with the solution of forming an opening in the package and placing the photosensitive chip in the corresponding opening, this embodiment The problem of alignment errors is avoided, and the process complexity of system integration is reduced.
  • the packaging method further includes: after forming the packaging layer 350, performing a second debonding process to remove the second carrier substrate 320 (as shown in FIG. 7).
  • the second carrier substrate 320 is used to provide a process platform for the formation of the encapsulation layer 350. Therefore, after the encapsulation layer 350 is formed, the second carrier substrate 320 can be removed.
  • the second debonding process is performed by a pyrolysis bonding process, and the second carrier substrate 320 and the second temporary bonding layer 325 are sequentially removed (as shown in FIG. 7).
  • the second debonding process reference may be made to the foregoing related description of the first debonding process, and details are not described herein again.
  • the second debonding process further includes: performing a dicing process on the encapsulation layer 350.
  • a single camera component 260 with a size that meets the process requirements is formed, thereby preparing the process for the assembly of the subsequent lens component.
  • a laser cutting process is used for dicing.
  • this embodiment first performs the second debonding process, and then performs the dicing process.
  • the second debonding process may also be performed after the dicing process; correspondingly, the second carrier substrate may also provide a process platform for the dicing process.
  • the dicing process further includes: using a wire bonding process to form a wire 500 electrically connecting the photosensitive chip 200 and a bonding pad of a functional element (not labeled).
  • the lead 500 is used to realize the electrical integration of the camera assembly 260.
  • a wire bonding process is used to achieve electrical connection between the photosensitive chip 200 and the functional element.
  • the wire bonding process is the most commonly used circuit connection method in the integrated circuit packaging process. The method allows thin metal wires or metal strips to be sequentially hit on the bonding points of the chip and the lead frame or the packaging substrate to form a circuit connection.
  • the wire bonding process has higher compatibility with the current packaging process, and the cost is lower, and by selecting the wire bonding process, the packaging process is changed less.
  • the lead 500 is a metal wire, for example, a gold wire or an aluminum wire. Specifically, the lead 500 electrically connects the first chip pad 220, the second chip pad 235 and the electrode 245.
  • the wire bonding process may be performed before the second debonding process is performed, so that the second carrier substrate provides a process platform for the wire bonding process.
  • first chip pad 220, the second chip pad 235, and the electrode 245 are located on the same side of the packaging layer 350, and all face the filter 400. Therefore, in the package The wire bonding process is performed on the side of the layer 350 close to the filter 400.
  • the lead 500 can be located in a holder of the lens assembly, so that the lead 500 is protected, which is beneficial to improve the lens mold Group reliability, and facilitate the assembly of the lens module in electronic equipment.
  • the FPC board 510 is used to realize the electrical connection between the camera assembly 260 and the subsequent lens assembly and the electrical connection between the lens module and other components formed later without the circuit board. After the lens module is subsequently formed, the lens module can also be electrically connected to other components in the electronic device through the FPC board 510, so as to realize the normal shooting function of the electronic device.
  • the FPC board 510 is mounted on the packaging layer 350 on the side of the filter 400, and in the step of the wire bonding process, the lead 500 is electrically connected to the photosensitive chip 200 And the FPC board 510, so as to realize the electrical connection between the photosensitive chip 200, the functional element (not marked) and the FPC board 510 through the lead 500.
  • the lead 500 electrically connects the first chip pad 220 of the photosensitive chip 200 and the FPC board 510.
  • a connector 520 is formed on the FPC board 510 for electrically connecting the FPC board 510 with other circuit elements.
  • the connector 520 is electrically connected to the main board of the electronic device, so as to realize information transmission between the lens module and other components in the electronic device, and connect the lens module The image information is transferred to the electronic device.
  • the connector 520 may be a gold finger connector.
  • the wire bonding process is performed after the FPC board 510 is mounted on the encapsulation layer 350, so that the photosensitive chip 200, the functional element, and the Electrical connection between FPC boards 510.
  • another wire bonding process is required to electrically connect the FPC board and the photosensitive chip .
  • FIGS. 10 and 11 are structural schematic diagrams corresponding to the steps in another embodiment of the packaging method of the camera module of the present invention.
  • This embodiment is the same as the first embodiment, and will not be repeated here.
  • the difference between this embodiment and the first embodiment is that after the encapsulation layer 350a is formed, the encapsulation layer 350a covers the carrier substrate 320a, the photosensitive chip 200a, and functional elements (not labeled), and exposes the filter 400a.
  • the packaging layer 350a covers the photosensitive chip 200a and the functional element, thereby reducing the influence of the thickness difference between the photosensitive chip 200a and the functional element on the formation process of the packaging layer 350a.
  • the photosensitive chip 200 a and the functional element are temporarily bonded on the carrier substrate 320 a, and the bonding pads of the photosensitive chip 200 a and the functional element are all facing away from the carrier substrate 320 a.
  • an encapsulation layer 350a is formed.
  • the encapsulation layer 350a covers the carrier substrate 320a, the photosensitive chip 200a, and functional elements (not labeled), and also covers the side walls of the filter 400a.
  • a photosensitive unit is formed, and the encapsulation layer 350a covers the sidewall of the filter 400a, thereby improving the sealing of the cavity in the photosensitive unit and reducing water vapor , The probability of oxidizing gas, etc. entering the cavity, so that the performance of the photosensitive chip 200a is guaranteed.
  • the method further includes: forming a stress buffer layer 420a on the sidewall of the filter 400a.
  • the material of the stress buffer layer 420a is epoxy glue.
  • Epoxy glue is epoxy resin glue (epoxy resin adhesive), epoxy adhesives have a variety of forms, and materials with different elastic moduli can be obtained by changing their components, so that the stress on the filter 400a can be adjusted according to the actual situation.
  • a redistribution is formed on the side of the encapsulation layer 350a close to the filter 400a layer (RDL) structure 360a, electrically connecting the pads of the photosensitive chip 200a and the pads of the functional elements (not shown).
  • RDL layer
  • the packaging layer 350a covers the photosensitive chip 200a and the functional element. Therefore, the re-wiring structure 360a includes: a conductive post 362a located in the packaging layer 350a and electrically connected to the photosensitive chip 200a Bonding pads and bonding pads of the functional element (not labeled); interconnection line 361a, located on the packaging layer 350a and connected to the conductive pillar 362a.
  • a debonding process is performed to remove the carrier substrate 320 a (as shown in FIG. 10).
  • FIGS. 12 and 13 are structural schematic diagrams corresponding to the steps in yet another embodiment of the packaging method of the camera assembly of the present invention.
  • This embodiment is the same as the first embodiment, and will not be repeated here. This embodiment differs from the first embodiment in that the rewiring structure 360b is used to electrically connect the photosensitive chip 200b and the functional element (not labeled).
  • the solder pads of the photosensitive chip 200b and the functional element are facing away from the carrier substrate 320b; on the carrier substrate 320b
  • the encapsulation layer 350b is filled between the photosensitive chip 200b and the functional element.
  • the re-wiring structure 360b is formed on the side of the encapsulation layer 350b close to the filter 400b.
  • the steps of forming the re-wiring structure 360b include: forming conductive bumps 365b on the pads of the photosensitive chip 200b and the pads of the functional elements, respectively; bonding the interconnection line 361b to the conductive bumps 365b Above, the interconnection line 361b and the conductive bump 365b constitute the re-wiring structure 360b.
  • the conductive bump 365b protrudes from the surface of the photosensitive chip 200b and the functional element, which is beneficial to improve the reliability of the electrical connection between each pad and the interconnect 361b.
  • the conductive bump 365b may be formed by a ball bumping process.
  • a debonding process is performed to remove the carrier substrate 320b (as shown in FIG. 12).
  • 14 to 16 are structural schematic diagrams corresponding to the steps in still another embodiment of the packaging method of the camera assembly of the present invention.
  • This embodiment is the same as the second embodiment, and will not be repeated here.
  • This embodiment differs from the second embodiment in that a rewiring structure 360c is formed on the side of the encapsulation layer 350c facing away from the filter 400c.
  • the photosensitive chip 200c and the functional element are temporarily bonded on the first carrier substrate 320c, the pads of the photosensitive chip 200c face away from the first carrier substrate 320c, and the The bonding pad faces the first carrier substrate 320c.
  • an encapsulation layer 350 c is formed on the carrier substrate 320 c.
  • the encapsulation layer 350 c covers the photosensitive chip 200 c and functional elements (not labeled), and also covers the side walls of the filter 400 c.
  • a debonding process is performed to remove the first carrier substrate 320c; after the first carrier substrate 320c is removed, the encapsulation layer 350c is turned away from the face of the photosensitive chip 200c Is bonded to the second carrier substrate 330c.
  • conductive pillars 280c are formed in the photosensitive core 200c, and the conductive pillars 280c Solder pads electrically connected to the photosensitive chip 200c; an interconnection line 361c is formed on the surface of the encapsulation layer 350c facing away from the second carrier substrate 330c to electrically connect the solder pads of the functional element (not marked) and all
  • the conductive pillar 280c, the interconnection line 361c and the conductive pillar 280c constitute a re-wiring structure 360c.
  • the conductive post can be omitted accordingly.
  • a debonding process is performed to remove the second carrier substrate 330c (as shown in FIG. 15).
  • an embodiment of the present invention also provides a camera assembly.
  • FIG. 9 a schematic structural diagram of an embodiment of a camera assembly of the present invention is shown.
  • the camera assembly 260 includes: an encapsulation layer 350, and a photosensitive unit 250 (shown in FIG. 4) and functional elements (not shown) embedded in the encapsulation layer 350; the photosensitive unit 250 includes a photosensitive chip 200 and a sticker At least the bottom surface of the encapsulation layer 350 exposes the photosensitive chip 200 and the functional element on the filter 400 mounted on the photosensitive chip 200.
  • the packaging layer 350 plays a fixed role on the photosensitive chip 200 and the functional element, and is used to realize packaging integration of the photosensitive chip 200 and the functional element. Among them, the encapsulation layer 350 reduces the space occupied by the bracket in the lens assembly, and can also save the circuit board, thereby reducing the thickness of the lens module to meet the needs of the lens module to be smaller and thinner.
  • the material of the encapsulation layer 350 is a plastic encapsulation material.
  • the encapsulation layer 350 can also play the role of insulation, sealing and moisture resistance, so it is also beneficial to improve the reliability of the lens module.
  • the material of the encapsulation layer 350 is epoxy resin.
  • the encapsulation layer 350 includes opposite top and bottom surfaces.
  • the top surface of the encapsulation layer 350 is the surface for mounting the lens assembly
  • the bottom surface of the encapsulation layer 350 is the surface away from the filter 300.
  • the photosensitive layer 200 and the functional element are generally temporarily bonded to a carrier substrate, and then the packaging layer 350 is formed on the carrier substrate. Therefore, at least The bottom surface of the encapsulation layer 350 exposes the photosensitive chip 200 and functional elements.
  • both the top and bottom surfaces of the encapsulation layer 350 expose the photosensitive chip 200 and functional elements.
  • the bottom surface of the encapsulation layer exposes the photosensitive chip and the functional element
  • the top surface of the encapsulation layer is higher than the photosensitive chip and the functional element and exposes the filter sheet.
  • both the photosensitive chip 200 and the functional element have bonding pads, which are used to realize the electrical connection between the photosensitive chip 200 and the functional element, and also to realize the electrical connection between the photosensitive chip 200, the functional element and other elements connection.
  • the packaging layer 350 exposes the pads of the photosensitive chip 200 and the functional element.
  • the photosensitive chip 200 is a CMOS image sensor chip. In other embodiments, the photosensitive chip may also be a CCD image sensor chip.
  • the photosensitive chip 200 includes a photosensitive area 200C and a peripheral area 200E surrounding the photosensitive area 200C.
  • the photosensitive chip 200 further has an optical signal receiving surface located in the photosensitive area 200C 201.
  • the photosensitive chip 200 is usually a silicon-based chip, which is made by an integrated circuit manufacturing technology, and the solder pads of the photosensitive chip 200 are used to electrically connect the photosensitive chip 200 with other chips or components.
  • the photosensitive chip 200 has a first chip pad 220 located in the peripheral area 200E.
  • the first chip pad 220 faces the filter 400, that is, the first chip pad 220 faces away from the bottom surface of the packaging layer 350. In other embodiments, the first bonding pad may also face away from the filter.
  • photosensitive unit 250 only one photosensitive unit 250 is illustrated. In other embodiments, when the lens module is used in a dual-camera or array module product, the number of photosensitive units may be multiple.
  • the filter 400 is mounted on the photosensitive chip 200, and the filter 400 faces the optical signal receiving surface 201.
  • the filter 400 can prevent the packaging process from causing pollution to the optical signal receiving surface 201 To prevent the performance of the photosensitive chip 200 from being adversely affected, thereby improving the imaging quality of the lens module.
  • the overall thickness of the lens module is significantly reduced to meet the needs of miniaturization and thinning of the lens module.
  • the filter 400 may be an infrared filter glass or a fully transparent glass.
  • the filter 400 is an infrared filter glass, which is also used to eliminate the influence of infrared light in incident light on the performance of the photosensitive chip 200, which is beneficial to improve the imaging effect.
  • the filter 400 is mounted on the photosensitive chip 200 through an adhesive structure 410, and the adhesive structure 410 surrounds the light signal receiving surface 201 of the photosensitive chip 200.
  • the adhesive structure 410 is used to realize the physical connection between the filter 400 and the photosensitive chip 200, and to avoid direct contact between the filter 400 and the photosensitive chip 200, so as to avoid adversely affecting the optical performance of the photosensitive chip 200.
  • the adhesive structure 410 surrounds the optical signal receiving surface 201, so that the filter 400 above the optical signal receiving surface 201 is located on the photosensitive path of the photosensitive chip 200, so that the The optical performance of the photosensitive chip 200 is guaranteed.
  • the functional element is a specific functional element other than the photosensitive chip 200 in the camera assembly, and the functional element includes at least one of a peripheral chip 230 and a passive element 240.
  • the functional element includes a peripheral chip 230 and a passive element 240.
  • the peripheral chip 230 is an active component, and is used to provide peripheral circuits to the photosensitive chip 200, for example: an analog power supply circuit and a digital power supply circuit, a voltage buffer circuit, a shutter circuit, a shutter drive circuit, and the like.
  • the peripheral chip 230 includes one or both of a digital signal processor chip and a memory chip. In other embodiments, the peripheral chip may also include chips of other functional types.
  • peripheral chip 230 For ease of illustration, only one peripheral chip 230 is illustrated in FIG. 9, but the number of the peripheral chips 230 is not limited to one.
  • the peripheral chip 230 is usually a silicon-based chip, which is made by an integrated circuit manufacturing technology, and the bonding pads of the peripheral chip 230 are used to electrically connect the peripheral chip 230 with other chips or components.
  • the peripheral chip 230 includes a second chip pad 235.
  • the second chip pad 235 faces the filter 400, so that the second chip pad 235 and the first chip pad 220 are located on the same side, so that it is easy to realize the peripheral chip 230 and the photosensitive chip 200 Electrical connection.
  • the second chip bonding pad 235 faces away from the bottom surface of the packaging layer 350.
  • the passive element 240 is used to play a specific role for the photosensitive work of the photosensitive chip 200.
  • the passive component 240 may include resistors, capacitors, inductors, diodes, transistors, potentiometers, relays, or drivers and other small-sized electronic components. For ease of illustration, only one passive element 240 is shown in FIG. 9, but the number of the passive elements 240 is not limited to one.
  • the bonding pads of the passive element 240 are used to electrically connect the passive element 240 with other chips or components.
  • the bonding pad of the passive element 240 is an electrode 245.
  • the electrode 245 faces the filter 400, so that it is easy to realize the passive element 240 and the photosensitive chip 200 Electrical connection.
  • the electrode 245 also faces away from the bottom surface of the encapsulation layer 350.
  • the top surface of the packaging layer 350 exposes the first chip pad 220, the second chip pad 235, and the electrode 245.
  • both the photosensitive chip 200 and the bonding pads of the functional elements face away from the packaging layer 350.
  • the pads of the photosensitive chip face away from the bottom surface of the packaging layer, and the pads of the functional element face the bottom surface of the packaging layer; or, the photosensitive chip and The bonding pads of the functional elements all face the packaging layer.
  • the functional element and the photosensitive chip 200 have the same thickness or a small thickness difference.
  • the thickness of the functional element can be adjusted according to the thickness of the photosensitive chip 200.
  • the thickness difference between the functional element and the photosensitive chip 200 is -2 microns to 2 microns.
  • the thickness difference between the peripheral chip 230 and the photosensitive chip 200 is ⁇ 2 ⁇ m to 2 ⁇ m
  • the thickness difference between the passive element 240 and the photosensitive chip 200 is ⁇ 2 ⁇ m to 2 ⁇ m.
  • the thickness of the camera assembly 260 is correspondingly reduced. Therefore, in the packaging process of the camera assembly 260, there is no need to thin the photosensitive chip 200 and the peripheral chip 230, which is different from the current lens Compared with the peripheral chip and the photosensitive chip in the module, the thickness of the photosensitive chip 200 and the peripheral chip 230 in this embodiment is larger, thereby improving the mechanical strength and reliability of the photosensitive chip 200 and the peripheral chip 230, thereby improving the lens mold Group reliability.
  • the photosensitive chip and the peripheral chip may also undergo a thinning process, but the thinning amount is small to ensure that their mechanical strength and reliability are not affected.
  • the camera assembly 260 further includes: a lead 500, a pad electrically connecting the photosensitive chip 200 and the functional element.
  • the lead 500 is used to realize the electrical integration of the lens module 600.
  • the lead 500 is formed by a wire bonding process, and the lead 500 is a metal wire, for example, a gold wire or an aluminum wire.
  • the lead 500 electrically connects the first chip pad 220, the second chip pad 235 and the electrode 245.
  • first chip pad 220, the second chip pad 235 and the electrode 245 are located on the same side of the packaging layer 350 and are all facing away from the bottom surface of the packaging layer 350. Therefore, the lead 500 is located at One side of the top surface of the encapsulation layer 350.
  • the lead 500 is located in the bracket of the lens assembly, so that the lead 500 is protected, which is beneficial to improve the reliability of the lens module and facilitate The assembly of the lens module in the electronic equipment.
  • the camera assembly 260 further includes: an FPC board 510, which is mounted on the packaging layer 350.
  • the FPC board 510 is used to realize the electrical connection between the camera assembly 260 and the lens assembly and the electrical connection between the lens module and other components without a circuit board.
  • the lens module is also electrically connected to other components in the electronic device through the FPC board 510, so as to realize the normal shooting function of the electronic device.
  • the lead 500 also electrically connects the photosensitive chip 200 and the FPC board 510, so that the electrical connection between the photosensitive chip 200, the functional element, and the FPC board 510 is achieved through the lead 500.
  • the lead 500 electrically connects the first chip pad 220 and the FPC board 510.
  • a connector 520 is formed on the FPC board 510.
  • the connector 520 is electrically connected to the main board of the electronic device, so as to realize information transmission between the lens module and other components in the electronic device, and transfer the image of the lens module The information is transferred to the electronic device.
  • the connector 520 may be a gold finger connector.
  • FIG. 11 is a schematic structural view of another embodiment of the camera assembly of the present invention.
  • This embodiment is the same as the first embodiment, and will not be repeated here.
  • the difference between this embodiment and the first embodiment is that: the bottom surface of the packaging layer 350a exposes the photosensitive chip 200a and functional elements (not labeled), and the top surface of the packaging layer 350a is higher than the photosensitive chip 200a And the functional element and expose the filter 400a.
  • a photosensitive unit is formed.
  • the encapsulation layer 350a covers the sidewall of the filter 400a, thereby improving the sealing of the cavity in the photosensitive unit. The probability of water vapor, oxidizing gas, etc. entering the cavity is reduced, so that the performance of the photosensitive chip 200a is guaranteed.
  • the camera assembly further includes a stress buffer layer 420a located on the side wall of the filter 400a and the encapsulation layer 350a.
  • the material of the stress buffer layer 420a is epoxy glue.
  • the re-wiring structure 360a is used to electrically connect the pads of the photosensitive chip 200a and the pads of the functional element (not shown). 360 is located on the side of the encapsulation layer 350a close to the filter 400a.
  • the re-wiring structure 360a includes: a conductive post 362a, a solder pad located in the packaging layer 350a and electrically connected to the photosensitive chip 200a and a solder pad of the functional element (not labeled); an interconnect 361a , Located on the encapsulation layer 350a and connected to the conductive pillar 362a.
  • FIG. 13 is a schematic structural diagram of another embodiment of the camera assembly of the present invention.
  • the camera assembly includes a re-wiring structure 360b for electrically connecting the photosensitive chip 200b and a functional element (not labeled).
  • both the top and bottom surfaces of the packaging layer 350b expose the photosensitive chip 200b and the functional element, and the bonding pads of the photosensitive chip 200b and the bonding pads of the functional element face away from the bottom surface of the packaging layer 350b.
  • the re-wiring structure 360b is located on one side of the top surface of the encapsulation layer 350b.
  • the rewiring structure 360b includes: conductive bumps 365b, which are respectively located on the pads of the photosensitive chip 200b and the bonding pads of the functional elements; interconnection lines 361b, which are located on the conductive bumps 365b, the The interconnection line 361b and the conductive bump 365b constitute the re-wiring structure 360b.
  • the conductive bump 365b protrudes from the surface of the photosensitive chip 200b and the functional element, which is beneficial to improve the reliability of the electrical connection between each pad and the interconnect 361b.
  • the conductive bump 365b is a ball bump.
  • 16 is a schematic structural diagram of still another embodiment of the camera assembly of the present invention.
  • This embodiment is the same as the second embodiment, and will not be repeated here.
  • the difference between this embodiment and the second embodiment is that the rewiring structure 360c is located on one side of the bottom surface of the encapsulation layer 350c.
  • the bottom surface of the encapsulation layer 350c exposes the photosensitive chip 200c and functional elements (not labeled), and the top surface of the encapsulation layer 350c is higher than the photosensitive chip 200c and functional elements and covers the filter The side wall of 400c; the pads of the photosensitive chip 200c face away from the bottom surface of the packaging layer 350c, and the pads of the functional element face the bottom surface of the packaging layer 350c.
  • the re-wiring structure 360c includes: a conductive post 280c located in the photosensitive core 200c, the conductive post 280c electrically connecting the pads of the photosensitive chip 200c; On the bottom surface of 350c, the bonding pad of the functional element and the conductive pillar 280c are electrically connected, and the interconnection line 361c and the conductive pillar 280c constitute a re-wiring structure 360c.
  • the re-wiring structure may not include the conductive pillar.
  • an embodiment of the invention also provides a lens module.
  • FIG. 17 a schematic structural diagram of an embodiment of the lens module of the present invention is shown.
  • the lens module 600 includes: the camera assembly described in the embodiment of the present invention (as shown by the dotted frame in FIG. 17); the lens assembly 530 includes a bracket 535, and the bracket 535 is attached to the packaging layer (not labeled) ) On the front side and surrounding the photosensitive unit (not marked) and the functional element (not marked), the lens assembly 530 is electrically connected to the photosensitive chip (not marked) and the functional element.
  • the lens assembly 530 generally includes a bracket 535, a motor (not shown) mounted on the bracket 535, and a lens group (not labeled) mounted on the motor, through the bracket 535, in order to achieve The assembly of the lens assembly 530 and the camera assembly is such that the lens group is located on the photosensitive path of the photosensitive unit.
  • the thickness of the camera assembly is small, and through the encapsulation layer, the thickness of the lens assembly 530 is reduced, thereby reducing the total thickness of the lens module 600.
  • the photosensitive unit and the functional element are both arranged inside the bracket 535, which reduces the distance between the photosensitive chip and each functional element, correspondingly reducing
  • the size of the lens module 600 is also shortened, and the distance between the photosensitive chip and each functional element is shortened, thereby increasing the signal transmission rate, and thereby improving the performance of the lens module 600 (for example: increasing the shooting speed and storage speed).
  • the camera assembly further includes an FPC board, so the motor in the lens assembly 530 is electrically connected to the FPC board, thereby achieving electrical connection between the camera assembly and the lens assembly 530.
  • an embodiment of the present invention also provides an electronic device.
  • FIG. 18 a schematic structural diagram of an embodiment of an electronic device of the present invention is shown.
  • the electronic device 700 includes the lens module 600 according to the embodiment of the present invention.
  • the reliability and performance of the lens module 600 are relatively high, and the shooting quality, shooting speed, and storage speed of the electronic device 700 are correspondingly improved.
  • the overall thickness of the lens module 600 is small, which is beneficial to improve the user's experience.
  • the electronic device 700 may be a mobile phone, a tablet computer, a camera, a video camera, or other devices with shooting functions.

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Abstract

一种摄像组件及其封装方法、镜头模组(600)、电子设备(700),摄像组件的封装方法包括:提供感光芯片(200);在感光芯片(200)上贴装滤光片(400);提供第二承载基板(320),在第二承载基板(320)上临时键合感光芯片(200)和功能元件;在第二承载基板(320)上形成封装层(350),封装层(350)至少填充于感光芯片(200)和功能元件之间。将感光芯片(200)和功能元件集成于封装层(350)中,以省去电路板,从而减小了镜头模组(600)总厚度,而且,缩短了感光芯片(200)和功能元件之间的距离,相应能够缩短了电连接的距离,有利于提高信号传输的速率,从而提高了镜头模组(600)的使用性能。

Description

摄像组件及其封装方法、镜头模组、电子设备 技术领域
本发明实施例涉及镜头模组领域,尤其涉及一种摄像组件及其封装方法、镜头模组、电子设备。
背景技术
随着人们生活水平的不断提高,业余生活也更加丰富,摄影逐渐成为人们记录出游以及各种日常生活的常用手段,因此具有拍摄功能的电子设备(例如:手机、平板电脑和照相机等)越来越多地应用到人们的日常生活以及工作中,具有拍摄功能的电子设备逐渐成为当今人们不可或缺的重要工具。
具有拍摄功能的电子设备通常都设有镜头模组,镜头模组的设计水平是决定拍摄质量的重要因素之一。镜头模组通常包括具有感光芯片的摄像组件以及固定于所述摄像组件上方且用于形成被摄物体影像的镜头组件。
而且,为了提高镜头模组的成像能力,相应需具有更大成像面积的感光芯片,且通常还会在所述镜头模组中配置电阻、电容器等被动元件以及外围芯片。
技术问题
本发明实施例解决的问题是提供一种摄像组件及其封装方法、镜头模组、电子设备,提高镜头模组的使用性能,并减小镜头模组的总厚度。
技术解决方案
为解决上述问题,本发明实施例提供一种摄像组件的封装方法,包括:提供感光芯片;在所述感光芯片上贴装滤光片;提供承载基板,在所述承载基板上临时键合感光芯片和功能元件;在所述承载基板上形成封装层,所述封装层至少填充于所述感光芯片和功能元件之间。
相应的,本发明实施例还提供一种摄像组件,包括:封装层、以及嵌于所述封装层中的感光单元和功能元件;所述感光单元包括感光芯片和贴装在所述感光芯片上的滤光片,至少所述封装层的底面露出所述感光芯片和功能元件。
相应的,本发明实施例还提供一种镜头模组,包括:本发明实施例所述的摄像组件;镜头组件,包括支架,所述支架贴装在所述封装层的顶面上且环绕所述感光单元和功能元件,所述镜头组件与所述感光芯片和功能元件实现电连接。
相应的,本发明实施例还提供一种电子设备,包括:本发明实施例所述的镜头模组。
有益效果
与现有技术相比,本发明实施例的技术方案具有以下优点:
本发明实施例将感光芯片和功能元件集成于封装层中,与将功能元件贴装在外围主板上的方案相比,本发明实施例能够减小感光芯片和功能元件之间的距离,相应有利于缩短感光芯片和功能元件之间电连接的距离,从而提高了信号传输的速率,进而提高镜头模组的使用性能(例如:提高了拍摄速度和存储速度);而且,通过所述封装层,还省去了电路板(例如:PCB),相应减小了镜头模组的总厚度,从而满足了镜头模组小型化、薄型化的需求。
可选方案中,采用引线键合(wire bond)工艺电连接感光芯片和功能元件的焊垫,从而提高电连接工艺与目前封装工艺的兼容性,降低封装成本。
附图说明
图1至图9是本发明摄像组件的封装方法一实施例中各步骤对应的结构示意图;
图10和图11是本发明摄像组件的封装方法另一实施例中各步骤对应的结构示意图;
图12和图13是本发明摄像组件的封装方法又一实施例中各步骤对应的结构示意图;
图14至图16是本发明摄像组件的封装方法再一实施例中各步骤对应的结构示意图;
图17是本发明镜头模组一实施例的结构示意图。
图18是本发明电子设备一实施例的结构示意图。
本发明的实施方式
目前,镜头模组的使用性能有待提高,且镜头模组难以满足镜头模组小型化、薄型化的需求。分析其原因在于:
传统的镜头模组主要由电路板、感光芯片、功能元件(例如:外围芯片)和镜头组件组装而成,且外围芯片通常贴装在外围主板上,感光芯片和功能元件之间相互分离;其中,所述电路板用于对所述感光芯片、功能元件和镜头组件起到支撑作用,且通过所述电路板实现所述感光芯片、功能元件和镜头模组之间的电连接。
但是,随着高像素、超薄镜头模组的要求,镜头模组的成像要求也越来越高,感光芯片的面积相应增加,功能元件也相应增多,从而导致镜头模组的尺寸越来越大,难以满足镜头模组小型化、薄型化的需求。
而且,感光芯片通常设置于镜头模组中的支架内部,外围芯片通常设置于支架外部,因此所述外围芯片与感光芯片之间具有一定的距离,从而降低了信号传输的速率。而所述外围芯片通常包括数字信号处理器(digital signal processor,DSP)芯片和存储器芯片,因此容易对拍摄速度和存储速度产生不良影响,进而降低镜头模组的使用性能。
为了解决所述技术问题,本发明实施例将感光芯片和功能元件集成于封装层中,与将功能元件贴装在外围主板上的方案相比,本发明实施例能够减小感光芯片和功能元件之间的距离,相应有利于缩短感光芯片和功能元件之间电连接的距离,从而提高了信号传输的速率,进而提高镜头模组的使用性能(例如:提高了拍摄速度和存储速度);而且,通过所述封装层,还省去了电路板,相应减小了镜头模组的总厚度,从而满足了镜头模组小型化、薄型化的需求。
为使本发明的上述目的、特征和优点能够更为明显易懂,下面结合附图对本发明的具体实施例做详细的说明。
图1至图9是本发明拍摄组件的封装方法一实施例中各步骤对应的结构示意图。
参考图1,提供感光芯片200。
所述感光芯片200为图像传感器芯片。本实施例中,所述感光芯片200为CMOS图像传感器(CMOS image sensor,CIS)芯片。在其他实施例中,所述感光芯片还可以为CCD(charge coupled device,电荷耦合器)图像传感器芯片。
具体地,所述感光芯片200包括感光区200C以及环绕所述感光区200C的外围区200E。所述感光芯片200的光信号接收面201位于所述感光区200C,所述感光芯片200通过所述光信号接收面201接收感测光辐射信号。
所述感光芯片200包括多个像素单元,因此感光芯片200包含有多个半导体光敏器件(图未示)、以及位于所述半导体光敏器件上的多个滤光膜(图未示),滤光膜用于对光信号接收面201接收的光信号进行选择性吸收和通过。
所述感光芯片200还包括位于所述滤光膜上的微透镜210,所述微透镜210与所述半导体光敏器件一一对应,从而将接收的光辐射信号光线聚焦至半导体光敏器件。所述光信号接收面201相应为所述微透镜210的顶面。
需要说明的是,所述感光芯片200通常为硅基芯片,采用集成电路制作技术所制成,所述感光芯片200具有焊垫,用于实现所述感光芯片200与其他芯片或部件的电连接。本实施例中,所述感光芯片200具有形成于外围区200E的第一芯片焊垫220。
本实施例中,位于所述光信号接收面201同侧的感光芯片200表面露出所述第一芯片焊垫220。在其他实施例中,所述感光芯片背向所述光信号接收面的面露出所述第一芯片焊垫。
结合参考图2至图4,图3是图2中一个滤光片的放大图,在所述感光芯片200(如图4所示)上贴装滤光片400(如图4所示),形成感光单元250(如图4所示)。
所述感光芯片200具有面向滤光片400的光信号接收面201(如图4所示),通过先实现滤光片400和感光芯片200的贴装,以免后续封装工艺对光信号接收面201造成污染,相应避免后续封装工艺对感光芯片200的性能造成不良影响。而且,通过贴装的方式,显著减小了后续镜头模组的整体厚度,以满足镜头模组小型化、薄型化的需求。
为了实现镜头模组的正常功能,所述滤光片400可以为红外滤光玻璃片或全透光玻璃片。本实施例中,所述滤光片400为红外滤光玻璃片,还用于消除入射光中的红外光对所述感光芯片200性能的影响,有利于提高成像效果。
具体地,所述滤光片400为红外截止滤光片(infrared cut filter,IRCF),所述红外截止滤光片可以为蓝玻璃红外截止滤光片,或者,所述红外截止滤光片包括玻璃以及位于所述玻璃表面的红外截止膜(IR cut coating)。
本实施例中,所述滤光片400包括待键合面401。所述待键合面401为用于与感光芯片200实现贴装的面,即用于面向所述感光芯片200的面。
具体地,在所述滤光片400为蓝玻璃红外截止滤光片的情况下,蓝玻璃红外截止滤光片的一个表面镀有增透膜或抗反射膜,与所述增透膜或抗反射膜表面相背的面为所述待键合面401;在所述滤光片400包括玻璃以及位于所述玻璃表面的红外截止膜的情况下,与所述红外截止膜相背的玻璃表面为所述待键合面401。在其他实施例中,当所述滤光片为全透光玻璃片时,所述全透光玻璃片的任一表面为所述待键合面。
如图3所示,所述滤光片400包括透光区400C以及环绕所述透光区400C的边缘区400E。形成镜头模组后,所述滤光片400的透光区400C用于使外部入射光透过,从而使感光芯片200的光信号接收面201接收光信号;所述边缘区400E用于为实现滤光片400和感光芯片200的贴装预留空间位置。
如图4所示,本实施例中,所述滤光片400通过粘合结构410贴装至感光芯片200上,所述粘合结构410环绕所述感光芯片200的光信号接收面201。
所述粘合结构410用于实现滤光片400和感光芯片200的物理连接。且滤光片400、粘合结构410和感光芯片200围成空腔(未标示),避免滤光片400与感光芯片200直接接触,从而避免对感光芯片200的性能产生不良影响。
本实施例中,所述粘合结构410环绕所述光信号接收面201,从而使所述光信号接收面201上方的滤光片400位于所述感光芯片200的感光路径上,进而使所述感光芯片200的光学性能得到保障。
本实施例中,所述粘合结构410的材料为可光刻材料,因此可以利用光刻工艺形成所述粘合结构410,这不仅有利于提高所述粘合结构410的形貌质量和尺寸精度、提高封装效率和生产产能,而且通过光刻的方式,还能够减小对所述粘合结构410的粘结强度所产生的影响。
本实施例中,所述粘合结构410的材料为可光刻的干膜(dry film)。在其他实施例中,所述粘合结构的材料还可以为可光刻的聚酰亚胺(polyimide)、可光刻的聚苯并恶唑(PBO)或可光刻的苯并环丁烯(BCB)。
需要说明的是,所述粘合结构410可以形成于感光芯片200上,也可以形成于滤光片400上。本实施例中,为了降低形成所述粘合结构410的工艺难度、简化工艺步骤、减小所述粘合结构410的形成工艺对光信号接收面201的影响,在所述滤光片400上形成所述粘合结构410。
因此,形成所述感光单元250的步骤包括:
继续参考图2,提供第一承载基板340;将所述滤光片400背向所述待键合面401的面临时键合于所述第一承载基板340上。
所述第一承载基板340用于为所述滤光片400和感光芯片200的贴合步骤提供工艺平台,从而提高工艺可操作性。本实施例中,所述第一承载基板340为载体晶圆(carrier wafer)。在其他实施例中,所述第一承载基板还可以为其他类型的基板。
具体地,通过第一临时键合层345将滤光片400临时键合于第一承载基板340上。所述第一临时键合层345用于作为剥离层,便于后续实现解键合。
本实施例中,所述第一临时键合层345为发泡膜。发泡膜包括相对的微粘面和发泡面,发泡膜在常温下具有粘性,且发泡面贴附于第一承载基板340上,后续通过对发泡膜进行加热,即可使发泡面失去粘性,从而实现解键合。
在另一些实施例中,所述第一临时键合层还可以为粘片膜(die attach film,DAF)。
继续参考图2,将所述滤光片400临时键合于第一承载基板340上之后,在所述滤光片400的边缘区400E(如图3所示)形成环形粘合结构410。
具体地,形成所述粘合结构410的步骤包括:形成覆盖所述滤光片400和第一临时键合层345的粘合材料层(图未示);采用光刻工艺图形化所述粘合材料层,保留所述边缘区400E的剩余粘合材料层作为所述粘合结构410。
继续参考图4,使所述感光芯片200的光信号接收面201面向环形粘合结构410,将所述感光芯片200的外围区200E(如图1所示)贴装于环形粘合结构410上,以形成所述感光单元250。
本实施例中,形成所述感光单元250后,所述第一芯片焊垫220面向所述滤光片400。
结合参考图5,需要说明的是,形成感光单元250(如图4所示)后,还包括:将所述感光芯片200背向光信号接收面201的面贴附至UV膜310上;在贴附步骤后,进行第一解键合处理,去除所述第一承载基板340(如图4所示)。
通过所述贴附步骤,为后续临时键合步骤做好工艺准备,而且,所述UV膜310还能够在去除第一承载基板340后,对所述感光单元250提供支撑和固定的作用。其中,UV膜310在紫外光的照射下粘附力会减弱,后续易于将所述感光单元250从所述UV膜310上取下。
具体地,采用贴膜机使所述UV膜310紧贴所述感光芯片200背向光信号接收面201的面,且还贴附于直径较大的框架315底部,通过所述框架315,以起到绷膜的作用,从而使所述感光单元250分立固定于所述UV膜310上。对所述UV膜310和框架315的具体描述,本实施例在此不再赘述。
本实施例中,第一临时键合层345(如图4所示)为发泡膜,因此采用热解键合工艺进行第一解键合处理。具体地,对所述第一临时键合层345进行加热处理,使所述发泡膜的发泡面失去粘性,从而去除所述第一承载基板340;去除所述第一承载基板340后,采用撕除的方式去除所述第一临时键合层345。
参考图6,提供第二承载基板320,在所述第二承载基板320上临时键合感光芯片200和功能元件(未标示)。
通过所述临时键合的步骤,从而为后续实现各芯片和元件的封装集成和电学集成做好工艺准备。而且通过临时键合(temporary bonding,TB)的方式,还便于后续将感光芯片200、功能元件和第二承载基板320进行分离。
其中,所述第二承载基板320还用于为后续封装层的形成提供工艺平台。
本实施例中,所述第二承载基板320为载体晶圆。在其他实施例中,所述第二承载基板还可以为其他类型的基板。
具体地,所述感光芯片200和功能元件通过第二临时键合层325临时键合于所述第二承载基板320上。本实施例中,所述第二临时键合层325为发泡膜。对所述第二临时键合层325的具体描述,可参考前述对第一临时键合层345(如图4所示)的相关描述,在此不再赘述。
以下结合附图,对所述临时键合的步骤做详细说明。
参考图6,将所述感光芯片200背向滤光片400的面临时键合于所述第二承载基板320上。
具体地,对单个感光单元250位置处的UV膜310(如图5所示)进行紫外光照射,使受到紫外光照射的UV膜310失去粘性,并通过顶针将单个感光单元250顶起,随后通过吸附设备提起所述感光单元250,依次将所述感光单元250从UV膜310上剥离下来并放置于所述第二承载基板320上。其中,通过将所述感光单元250逐个放置于第二承载基板320上的方式,有利于提高感光单元250在第二承载基板320上的位置精准度,以便于后续工艺的正常进行。
本实施例中,将感光芯片200临时键合于第二承载基板320上之后,所述感光芯片200的第一芯片焊垫220背向所述第二承载基板320。
需要说明的是,本实施例在形成所述感光单元250(如图4所示)之后,将感光芯片200临时键合至第二承载基板320上。在其他实施例中,也可以将感光芯片临时键合至第二承载基板上之后,将滤光片贴装到感光芯片上。
本实施例仅示意出一个感光单元250。在其他实施例中,当所形成的镜头模组运用于双摄或阵列模组产品时,所述感光单元的数量还可以为多个。
继续参考图6,在所述第二承载基板320上临时键合功能元件。
所述功能元件为摄像组件中除所述感光芯片200之外的具有特定功能元件,所述功能元件包括外围芯片230和被动元件240中的至少一种。
本实施例中,所述功能元件包括外围芯片230和被动元件240。
所述外围芯片230为主动元件,当后续实现与感光芯片200的电连接后,用于向所述感光芯片200提供外围电路,例如:模拟供电电路和数字供电电路、电压缓冲电路、快门电路、快门驱动电路等。
本实施例中,所述外围芯片230包括数字信号处理器芯片和存储器芯片中的一种或两种。在其他实施例中,所述外围芯片还可以包括其他功能类型的芯片。为了便于图示,图6中仅示意出了一个外围芯片230,但所述外围芯片230的数量不仅限于一个。
所述外围芯片230通常为硅基芯片,采用集成电路制作技术所制成,也具有焊垫,用于实现所述外围芯片230与其他芯片或部件的电连接。本实施例中,所述外围芯片230包括第二芯片焊垫235。
本实施例中,所述第一芯片焊垫220背向第二承载基板320,因此为了降低后续电连接工艺的难度,所述外围芯片230临时键合至第二承载基板320上之后,所述第二芯片焊垫235也背向第二承载基板320,从而使所述第一芯片焊垫220和第二芯片焊垫235位于同侧。
需要说明的是,所述外围芯片230和感光芯片200均集成于后续形成的封装层中,为了提高所述封装层的表面平坦度,降低形成封装层的工艺难度,所述外围芯片230和感光芯片200的厚度相等,或者,所述外围芯片230和感光芯片200之间的厚度差较小。其中,可根据所述感光芯片200的厚度,形成厚度相匹配的外围芯片230。本实施例中,所述外围芯片230和感光芯片200之间的厚度差值为-2微米至2微米。
所述被动元件240用于为感光芯片200的感光工作起到特定作用。所述被动元件240可以包括电阻、电容、电感、二极管、三极管、电位器、继电器或驱动器等体积较小的电子元器件。为了便于图示,图6中仅示意出了一个被动元件240,但所述被动元件240的数量不仅限于一个。
所述被动元件240也具有焊垫,用于实现所述被动元件240与其他芯片或部件的电连接。本实施例中,所述被动元件240的焊垫为电极245。
由前述分析可知,在第一芯片焊垫220背向第二承载基板320的情况下,为了降低后续电连接工艺的难度,所述被动元件240临时键合至第二承载基板320上之后,所述电极245也背向第二承载基板320。
由前述分析可知,为了提高后续封装层的表面平坦度,降低形成封装层的工艺难度,根据感光芯片200的厚度,形成厚度相匹配的被动元件240。本实施例中,所述被动元件240和感光芯片200之间的厚度差值为-2微米至2微米。
需要说明的是,在其他实施例中,在将感光芯片和功能元件临时键合到第二承载基板上后,感光芯片的焊垫背向第二承载基板,功能元件的焊垫朝向第二承载基板,或者,感光芯片和功能元件的焊垫均朝向第二承载基板。
参考图7,在所述第二承载基板320上形成封装层350,所述封装层350至少填充于所述感光芯片200和功能元件(未标示)之间。
所述封装层350对感光芯片200和功能元件(例如:外围芯片230、被动元件240)起到固定作用,用于使感光芯片200和功能元件实现封装集成。
其中,通过所述封装层350,能够减少镜头组件中支架所占用的空间,且还能省去电路板(例如:PCB),从而显著减小后续所形成镜头模组的总厚度,以满足镜头模组小型化、薄型化的需求。而且,与将功能元件贴装在外围主板上的方案相比,通过将感光芯片和功能元件均集成于封装层350中的方式,能够减小感光芯片200和各功能元件之间的距离,相应有利于缩短感光芯片和各功能元件之间电连接的距离,从而提高了信号传输的速率,进而提高镜头模组的使用性能(例如:提高了拍摄速度和存储速度)。
本实施例中,所述封装层350还能起到绝缘、密封以及防潮的作用,还有利于提高镜头模组的可靠性。
本实施例中,所述封装层350的材料为环氧树脂。环氧树脂具有收缩率低、粘结性好、耐腐蚀性好、电性能优异及成本较低等优点,因此广泛用作电子器件和集成电路的封装材料。
本实施例中,为了便于后续电连接工艺的进行,所述封装层350露出感光芯片200和功能元件的焊垫。具体地,所述封装层350露出第一芯片焊垫220、第二芯片焊垫235和电极245。
本实施例中,后续通过引线键合工艺实现电连接,而所述第一芯片焊垫220、第二芯片焊垫235和电极245均背向第二承载基板320,因此,为了降低后续引线键合工艺的复杂度,在形成所述封装350的步骤中,所述封装层350填充于所述感光芯片200和功能元件之间。
在其他实施例中,根据实际电连接工艺的方式,所述封装层可以覆盖所述第二承载基板、功能元件和感光芯片,并露出所述滤光片。
本实施例中,采用注塑(injection molding)工艺形成所述封装层350。注塑工艺具有生产速度快、效率高、操作可实现自动化等特点,通过采用注塑工艺,有利于提高产量、降低工艺成本;而且,通过选用注塑工艺,制备相匹配的模具,即可使所述封装层350的厚度和形成区域满足工艺需求,工艺简单。
需要说明的是,即使在感光芯片200和功能元件之间具有厚度差的情况下,也可以通过制备相匹配的模具,使得所述封装层350表面具有台阶,以确保封装层350均露出感光芯片200和功能元件的焊垫。
本实施例中,感光芯片200和功能元件之间的厚度差值较小,相应降低了形成所述封装层350的工艺难度。
具体地,形成所述封装层350的步骤包括:在所述第二承载基板320上临时键合感光芯片200和功能元件、且完成感光芯片200和滤光片400的贴装之后,将所述第二承载基板320置于模具内,所述模具包括上模和下模,所述上模和下模中的任一个形成有凹槽;将所述第二承载基板320置于所述上模和下模之间;在合模后,使所述模具压合至所述感光芯片200、外围芯片230、被动元件240和第二承载基板320上,并将所述滤光片400置于所述凹槽内,在所述上模和下模之间形成型腔;向所述型腔内注入塑封材料,形成封装层350;形成所述封装层350后,进行脱模处理,对所述封装层350和模具进行分离。
在注塑过程中,所述滤光片400置于所述凹槽内,因此,所述封装层350不会覆盖所述滤光片400,而且在合模后,模具压合至所述感光芯片200、外围芯片230和被动元件240上,从而使所述封装层350仅填充于所述感光芯片200、外围芯片230和被动元件240之间,工艺简单。
在其他实施例中,根据实际情况,还可以采用其他模塑工艺形成所述封装层。例如:在形成一定厚度的封装层后,可通过对所述封装层进行刻蚀处理或研磨(grinding)处理的方式,去除部分厚度的封装层,从而使剩余封装层均露出感光芯片和功能元件的焊垫。
还需要说明的是,通过省去电路板,已能够起到减小镜头模组厚度的效果。因此本实施例中,无需对感光芯片200和外围芯片230进行减薄处理,从而提高了所述感光芯片200和外围芯片230的机械强度和可靠性,进而提高镜头模组的可靠性。在其他实施例中,根据工艺需求,也可以适当减小所述感光芯片和外围芯片的厚度,但减薄量较小,以保证其机械强度和可靠性不受影响。
此外,本实施例将感光芯片200键合于第二承载基板320上之后形成所述封装层350,与在封装内形成开口、并将感光芯片置于对应开口内的方案相比,本实施例避免出现对准误差的问题,且降低了系统集成的工艺复杂度。
结合参考图8,所述封装方法还包括:形成所述封装层350后,进行第二解键合处理,去除所述第二承载基板320(如图7所示)。
所述第二承载基板320用于为所述封装层350的形成提供工艺平台,因此形成所述封装层350后,即可去除所述第二承载基板320。
本实施例中,采用热解键合工艺进行所述第二解键合处理,依次去除所述第二承载基板320和第二临时键合层325(如图7所示)。对所述第二解键合处理的具体描述,可参考前述对所述第一解键合处理的相关描述,在此不再赘述。
继续参考图8,在所述第二解键合处理后,还包括:对所述封装层350进行划片(dicing)处理。
通过划片处理,形成尺寸符合工艺需求的单个摄像组件260,从而为后续镜头组件的装配做好工艺准备。本实施例中,采用激光切割工艺进行划片处理。
需要说明的是,本实施例先进行第二解键合处理,再进行划片处理。在其他实施例中,也可以在划片处理之后,进行第二解键合处理;相应的,所述第二承载基板还能为所述划片处理提供工艺平台。
参考图9,在所述划片处理后,还包括:采用引线键合工艺,形成电连接感光芯片200和功能元件(未标示)的焊垫的引线500。
所述引线500用于实现摄像组件260的电学集成。
本实施例中,采用引线键合工艺实现感光芯片200和功能元件之间的电连接。引线键合工艺是集成电路封装工艺中最常采用的电路连接方式,其方式使将细金属线或金属带按顺序打在芯片与引脚架或封装基板的键合点上而形成电路连接。引线键合工艺与目前封装工艺的兼容性较高,成本较低,且通过选用引线键合工艺,封装工艺改动较少。
本实施例中,所述引线500为金属导线,例如为:金线或铝线。具体地,所述引线500电连接所述第一芯片焊垫220、第二芯片焊垫235和电极245。
在其他实施例中,还可以在进行所述第二解键合处理之前,进行所述引线键合工艺,使所述第二承载基板为所述引线键合工艺提供工艺平台。
还需要说明的是,所述第一芯片焊垫220、第二芯片焊垫235和电极245位于所述封装层350的同侧,且均面向所述滤光片400,因此,在所述封装层350靠近所述滤光片400的一侧进行所述引线键合工艺。
相应的,后续将镜头组件装配至所述封装层350上以获得镜头模组时,所述引线500能够位于镜头组件的支架(holder)中,使得所述引线500得到保护,有利于提高镜头模组的可靠性,且便于所述镜头模组在电子设备中的装配。
继续参考图9,需要说明的是,对所述封装层350进行划片处理之后,在所述引线键合工艺之前,还包括:在所述封装层350上贴装FPC板(flexible printed circuit board,柔性电路板)510。
所述FPC板510用于在省去电路板的情况下,实现所述摄像组件260与后续镜头组件之间的电连接、以及后续所形成镜头模组与其他元件之间的电连接。后续形成镜头模组后,所述镜头模组也能够通过所述FPC板510与电子设备中的其他元件电连接,从而实现电子设备的正常拍摄功能。
本实施例中,所述FPC板510贴装在所述滤光片400一侧的封装层350上,在所述引线键合工艺的步骤中,使所述引线500电连接所述感光芯片200和FPC板510,从而通过所述引线500实现所述感光芯片200、功能元件(未标示)和FPC板510之间的电连接。具体地,所述引线500电连接所述感光芯片200的第一芯片焊垫220和FPC板510。
需要说明的是,所述FPC板510上形成有连接器(connector)520,用于电连接所述FPC板510与其他电路元件的电连接。在镜头模组运用于电子设备时,所述连接器520电连接于该电子设备的主板上,从而实现镜头模组与所述电子设备中其他元件之间的信息传输,将所述镜头模组的图像信息传递至所述电子设备。具体地,所述连接器520可以为金手指连接器。
还需要说明的是,本实施例在所述封装层350上贴装所述FPC板510之后进行所述引线键合工艺,从而能够在同一电连接步骤中实现所述感光芯片200、功能元件和FPC板510之间的电连接。在其他实施例中,当实现所述感光芯片和功能元件之间的电连接之后贴装所述FPC板时,则相应需进行另一引线键合工艺,以电连接所述FPC板和感光芯片。
图10和图11是本发明摄像组件的封装方法另一实施例中各步骤对应的结构示意图。
本实施例与第一实施例的相同之处,在此不再赘述。本实施例与第一实施例的不同之处在于:形成封装层350a后,所述封装层350a覆盖承载基板320a、感光芯片200a和功能元件(未标示),并露出滤光片400a。
本实施例中,所述封装层350a覆盖所述感光芯片200a和功能元件,从而减小了感光芯片200a和功能元件之间的厚度差对封装层350a形成工艺的影响。
具体地,参考图10,在承载基板320a上临时键合感光芯片200a和功能元件(未标示),所述感光芯片200a和功能元件的焊垫均背向所述承载基板320a。
继续参考图10,形成封装层350a,所述封装层350a覆盖承载基板320a、感光芯片200a和功能元件(未标示),且还覆盖所述滤光片400a的侧壁。
所述感光芯片200a和滤光片400a实现贴装后,形成感光单元,通过使所述封装层350a覆盖所述滤光片400a的侧壁,从而提高感光单元中空腔的密封性,降低水蒸气、氧化气体等进入所述空腔内的概率,使所述感光芯片200a的性能得到保障。
相应的,为了减小封装层350a对滤光片400a产生的应力,在形成所述封装层350a之前,还包括:在所述滤光片400a的侧壁上形成应力缓冲层420a。
本实施例中,所述应力缓冲层420a的材料为环氧类胶。环氧类胶即为环氧树脂胶(epoxy resin adhesive),环氧类胶具有形式多样性,通过改变其成分可获得不同弹性模量的材料,从而能够根据实际情况,对所述滤光片400a受到的应力进行调控。
继续参考图10,在所述封装层350a靠近所述滤光片400a的一侧形成再布线(redistribution layer,RDL)结构360a,电连接所述感光芯片200a的焊垫以及所述功能元件(未标示)的焊垫。
本实施例中,所述封装层350a覆盖所述感光芯片200a和功能元件,因此,所述再布线结构360a包括:导电柱362a,位于所述封装层350a内且电连接所述感光芯片200a的焊垫以及所述功能元件(未标示)的焊垫;互连线361a,位于所述封装层350a上且与所述导电柱362a相连。
参考图11,形成所述再布线结构360a后,进行解键合处理,去除所述承载基板320a(如图10所示)。
对本实施例所述封装方法的具体描述,可参考前述实施例中的相应描述,在此不再赘述。
图12和图13是本发明摄像组件的封装方法又一实施例中各步骤对应的结构示意图。
本实施例与第一实施例的相同之处,在此不再赘述。本实施例与第一实施例的不同之处在于:采用再布线结构360b电连接感光芯片200b和功能元件(未标示)。
参考图12,在所述承载基板320b上临时键合感光芯片200b和功能元件后,所述感光芯片200b的焊垫和功能元件的焊垫均背向所述承载基板320b;在承载基板320b上形成封装层350b后,所述封装层350b填充于所述感光芯片200b和功能元件之间。
为此,继续参考图12,在所述封装层350b靠近所述滤光片400b的一侧形成所述再布线结构360b。
本实施例中,形成所述再布线结构360b的步骤包括:分别在感光芯片200b的焊垫和功能元件的焊垫上形成导电凸块365b;将互连线361b键合至所述导电凸块365b上,所述互连线361b和导电凸块365b构成所述再布线结构360b。
所述导电凸块365b凸出于所述感光芯片200b和功能元件的表面,有利于提高各焊垫和互连线361b的电连接可靠性。
本实施例中,可采用植球工艺形成所述导电凸块365b。
参考图13,形成所述再布线结构360b后,进行解键合处理,去除所述承载基板320b(如图12所示)。
对本实施例所述封装方法的具体描述,可参考前述实施例中的相应描述,在此不再赘述。
图14至图16是本发明摄像组件的封装方法再一实施例中各步骤对应的结构示意图。
本实施例与第二实施例的相同之处,在此不再赘述。本实施例与第二实施例的不同之处在于:在封装层350c背向滤光片400c的一侧形成再布线结构360c。
具体地,参考图14,在第一承载基板320c上临时键合感光芯片200c和功能元件(未标示),所述感光芯片200c的焊垫背向所述第一承载基板320c,所述功能元件的焊垫朝向所述第一承载基板320c。
继续参考图14,在所述承载基板320c上形成封装层350c,所述封装层350c覆盖感光芯片200c和功能元件(未标示),且还覆盖滤光片400c的侧壁。
参考图15,形成所述封装层350c后,进行解键合处理,去除所述第一承载基板320c;去除所述第一承载基板320c后,将所述封装层350c背向所述感光芯片200c的面临时键合至第二承载基板330c上。
继续参考图15,将所述封装层350c背向所述感光芯片200c的面临时键合至第二承载基板330c上之后,在所述感光芯200c片内形成导电柱280c,所述导电柱280c电连接所述感光芯片200c的焊垫;在所述封装层350c背向所述第二承载基板330c的面上形成互连线361c,电连接所述功能元件(未标示)的焊垫和所述导电柱280c,所述互连线361c和导电柱280c构成再布线结构360c。
在其他实施例中,在第一承载基板上临时键合感光芯片200后,所述感光芯片的焊垫也朝向第一承载基板时,相应还能省去该导电柱。
参考图16,形成所述再布线结构360c后,进行解键合处理,去除所述第二承载基板330c(如图15所示)。
对本实施例所述封装方法的具体描述,可参考前述实施例中的相应描述,在此不再赘述。
相应的,本发明实施例还提供一种摄像组件。继续参考图9,示出了本发明摄像组件一实施例的结构示意图。
所述摄像组件260包括:封装层350、以及嵌于所述封装层350中的感光单元250(如图4所示)和功能元件(未标示);所述感光单元250包括感光芯片200和贴装在所述感光芯片200上的滤光片400,至少所述封装层350的底面露出所述感光芯片200和功能元件。
所述封装层350对感光芯片200和功能元件起到固定作用,用于使感光芯片200和功能元件实现封装集成。其中,通过封装层350,减少了镜头组件中支架所占用的空间,且还能省去电路板,从而减小镜头模组的厚度,满足镜头模组小型化、薄型化的需求。
所述封装层350的材料为塑封材料,所述封装层350还能起到绝缘、密封以及防潮的作用,因此还有利于提高镜头模组的可靠性。本实施例中,所述封装层350的材料为环氧树脂。
本实施例中,所述封装层350包括相对的顶面和底面。其中,所述封装层350的顶面是用于贴装镜头组件的面,所述封装层350的底面相应为远离所述滤光片300的面。
本实施例中,在摄像组件260的封装过程中,通常是将感光芯片200和功能元件临时键合至一承载基板上之后,在所述承载基板上形成所述封装层350,因此,至少所述封装层350的底面露出所述感光芯片200和功能元件。
本实施例中,所述封装层350的顶部和底面均露出所述感光芯片200和功能元件。在其他实施例中,根据实际电连接的方式,所述封装层的底面露出所述感光芯片和功能元件,所述封装层的顶面高于所述感光芯片和功能元件并露出所述滤光片。
本实施例中,所述感光芯片200和功能元件均具有焊垫,用于实现感光芯片200和功能元件之间的电连接,还用于实现感光芯片200、功能元件与其他元件之间的电连接。其中,为了便于电连接工艺的进行,所述封装层350露出感光芯片200和功能元件的焊垫。
本实施例中,所述感光芯片200为CMOS图像传感器芯片。在其他实施例中,所述感光芯片还可以为CCD图像传感器芯片。
如图1所示,本实施例中,所述感光芯片200包括感光区200C以及环绕所述感光区200C的外围区200E,所述感光芯片200还具有位于所述感光区200C的光信号接收面201。
所述感光芯片200通常为硅基芯片,采用集成电路制作技术所制成,所述感光芯片200的焊垫用于实现感光芯片200与其他芯片或部件的电连接。本实施例中,所述感光芯片200具有位于外围区200E的第一芯片焊垫220。
本实施例中,所述第一芯片焊垫220面向所述滤光片400,即所述第一芯片焊垫220背向所述封装层350的底面。在其他实施例中,所述第一焊垫也可以背向所述滤光片。
还需要说明的是,本实施例仅示意出一个感光单元250。在其他实施例中,当所述镜头模组运用于双摄或阵列模组产品时,感光单元的数量还可以为多个。
所述滤光片400贴装在感光芯片200上,且所述滤光片400面向所述光信号接收面201,所述滤光片400能够避免封装工艺对所述光信号接收面201造成污染,相应避免所述感光芯片200的性能受到不良影响,进而提高镜头模组的成像质量。而且,通过贴装的方式,显著减小了镜头模组的整体厚度,以满足镜头模组小型化、薄型化的需求。
所述滤光片400可以为红外滤光玻璃片或全透光玻璃片。本实施例中,所述滤光片400为红外滤光玻璃片,还用于消除入射光中的红外光对所述感光芯片200性能的影响,有利于提高成像效果。
本实施例中,所述滤光片400通过粘合结构410贴装在感光芯片200上,所述粘合结构410环绕所述感光芯片200的光信号接收面201。所述粘合结构410用于实现滤光片400和感光芯片200的物理连接,且避免滤光片400与感光芯片200直接接触,从而避免对所述感光芯片200的光学性能产生不良影响。
本实施例中,所述粘合结构410环绕所述光信号接收面201,从而使所述光信号接收面201上方的滤光片400位于所述感光芯片200的感光路径上,进而使所述感光芯片200的光学性能得到保障。
所述功能元件为摄像组件中除所述感光芯片200之外的具有特定功能元件,所述功能元件包括外围芯片230和被动元件240中的至少一种。
本实施例中,所述功能元件包括外围芯片230和被动元件240。
所述外围芯片230为主动元件,用于向感光芯片200提供外围电路,例如:模拟供电电路和数字供电电路、电压缓冲电路、快门电路、快门驱动电路等。
本实施例中,所述外围芯片230包括数字信号处理器芯片和存储器芯片中的一种或两种。在其他实施例中,外围芯片还可以包括其他功能类型的芯片。
为了便于图示,图9中仅示意出了一个外围芯片230,但所述外围芯片230的数量不仅限于一个。
所述外围芯片230通常为硅基芯片,采用集成电路制作技术所制成,所述外围芯片230的焊垫用于实现所述外围芯片230与其他芯片或部件的电连接。本实施例中,所述外围芯片230包括第二芯片焊垫235。
本实施例中,所述第二芯片焊垫235面向滤光片400,使第二芯片焊垫235和第一芯片焊垫220位于同侧,从而易于实现所述外围芯片230和感光芯片200之间的电连接。相应的,所述第二芯片焊垫235背向所述封装层350的底面。
所述被动元件240用于为感光芯片200的感光工作起到特定作用。所述被动元件240可以包括电阻、电容、电感、二极管、三极管、电位器、继电器或驱动器等体积较小的电子元器件。为了便于图示,图9中仅示意出了一个被动元件240,但所述被动元件240的数量不仅限于一个。
所述被动元件240的焊垫用于实现所述被动元件240与其他芯片或部件的电连接。本实施例中,所述被动元件240的焊垫为电极245。
由前述分析可知,在所述第一芯片焊垫220面向所述滤光片400的情况下,所述电极245面向所述滤光片400,从而易于实现所述被动元件240和感光芯片200之间的电连接。相应的,所述电极245也背向所述封装层350的底面。
为此,本实施例中,所述封装层350的顶面均露出所述第一芯片焊垫220、第二芯片焊垫235和电极245。
需要说明的是,本实施例中,所述感光芯片200和功能元件的焊垫均背向封装层350。在其他实施例中,根据实际电连接的方式,所述感光芯片的焊垫背向所述封装层的底面,所述功能元件的焊垫朝向所述封装层的底面;或者,所述感光芯片和功能元件的焊垫均朝向封装层。
还需要说明的是,由于所述封装层350的顶部和底面均露出所述感光芯片200和功能元件,因此,为了提高所述封装层350的表面平坦度,降低封装层350的形成工艺难度,所述功能元件和感光芯片200的厚度相等或者厚度差较小。其中,可根据所述感光芯片200的厚度,调整所述功能元件的厚度。本实施例中,所述功能元件和感光芯片200之间的厚度差值为-2微米至2微米。
具体地,所述外围芯片230和感光芯片200之间的厚度差值为-2微米至2微米,所述被动元件240和感光芯片200之间的厚度差值为-2微米至2微米。
此外,由于去除了电路板,相应减小了摄像组件260的厚度,因此,在所述摄像组件260的封装过程中,无需对所述感光芯片200和外围芯片230进行减薄处理,与目前镜头模组中的感光芯片和外围芯片相比,本实施例所述感光芯片200和外围芯片230的厚度较大,从而提高了感光芯片200和外围芯片230的机械强度和可靠性,进而提高镜头模组的可靠性。在其他实施例中,根据工艺需求,所述感光芯片和外围芯片也可经历过减薄处理,但减薄量较小,以保证其机械强度和可靠性不受影响。
本实施例中,所述摄像组件260还包括:引线500,电连接所述感光芯片200和功能元件的焊垫。
所述引线500用于实现镜头模组600的电学集成。本实施例中,所述引线500通过引线键合工艺所形成,所述引线500为金属导线,例如为:金线或铝线。具体地,所述引线500电连接所述第一芯片焊垫220、第二芯片焊垫235和电极245。
需要说明的是,所述第一芯片焊垫220、第二芯片焊垫235和电极245位于所述封装层350的同侧且均背向封装层350的底面,因此,所述引线500位于所述封装层350顶面的一侧。
所述摄像组件260与镜头组件完成装配以获得镜头模组后,所述引线500相应位于镜头组件的支架中,使所述引线500得到保护,有利于提高镜头模组的可靠性,且便于所述镜头模组在电子设备中的装配。
还需要说明的是,所述摄像组件260还包括:FPC板510,贴装在所述封装层350上。所述FPC板510用于在省去电路板的情况下,实现所述摄像组件260与镜头组件之间的电连接、以及镜头模组与其他元件之间的电连接。其中,镜头模组也通过所述FPC板510与电子设备中的其他元件电连接,从而实现电子设备的正常拍摄功能。
为此,所述引线500还电连接所述感光芯片200和FPC板510,从而通过所述引线500实现所述感光芯片200、功能元件和FPC板510之间的电连接。具体地,所述引线500电连接所述第一芯片焊垫220和FPC板510。
本实施例中,所述FPC板510上形成有连接器520。当镜头模组运用于电子设备时,所述连接器520电连接于该电子设备的主板上,从而实现镜头模组与电子设备中其他元件之间的信息传输,将所述镜头模组的图像信息传递至所述电子设备。具体地,所述连接器520可以为金手指连接器。
图11是本发明摄像组件另一实施例的结构示意图。
本实施例与第一实施例的相同之处,在此不再赘述。本实施例与第一实施例的不同之处在于:所述封装层350a的底面露出所述感光芯片200a和功能元件(未标示),所述封装层350a的顶面高于所述感光芯片200a和功能元件并露出所述滤光片400a。
所述感光芯片200a和滤光片400a实现贴装后,形成感光单元,本实施例中,所述封装层350a覆盖所述滤光片400a的侧壁,从而提高感光单元中空腔的密封性,降低水蒸气、氧化气体等进入所述空腔内的概率,使感光芯片200a的性能得到保障。
相应的,为了减小封装层350a对滤光片400a产生的应力,所述摄像组件还包括:应力缓冲层420a,位于在所述滤光片400a侧壁和封装层350a。
本实施例中,所述应力缓冲层420a的材料为环氧类胶。
本实施例中,由于所述封装层350a覆盖感光芯片200a和功能元件,因此,利用再布线结构360a电连接感光芯片200a的焊垫以及功能元件(未标示)的焊垫,所述再布线结构360位于所述封装层350a靠近所述滤光片400a的一侧。
具体地,所述再布线结构360a包括:导电柱362a,位于所述封装层350a内且电连接所述感光芯片200a的焊垫以及所述功能元件(未标示)的焊垫;互连线361a,位于所述封装层350a上且与所述导电柱362a相连。
对本实施例所述摄像组件的具体描述,可参考前述实施例中的相应描述,在此不再赘述。
图13是本发明摄像组件又一实施例的结构示意图。
本实施例与第一实施例的相同之处,在此不再赘述。本实施例与第一实施例的不同之处在于:所述摄像组件包括再布线结构360b,用于电连接感光芯片200b和功能元件(未标示)。
本实施例中,所述封装层350b的顶部和底面均露出感光芯片200b和功能元件,所述感光芯片200b的焊垫和功能元件的焊垫均背向所述封装层350b的底面。为此,所述再布线结构360b位于所述封装层350b顶面的一侧。
具体地,所述再布线结构360b的包括:导电凸块365b,分别位于所述感光芯片200b的焊垫和功能元件的焊垫上;互连线361b,位于所述导电凸块365b上,所述互连线361b和导电凸块365b构成所述再布线结构360b。
导电凸块365b凸出于感光芯片200b和功能元件的表面,有利于提高各焊垫和互连线361b的电连接可靠性。本实施例中,所述导电凸块365b为植球。
对本实施例所述摄像组件的具体描述,可参考前述实施例中的相应描述,在此不再赘述。
图16是本发明摄像组件再一实施例的结构示意图。
本实施例与第二实施例的相同之处,在此不再赘述。本实施例与第二实施例的不同之处在于:再布线结构360c位于封装层350c底面的一侧。
本实施例中,所述封装层350c的底面露出所述感光芯片200c和功能元件(未标示),所述封装层350c的顶面高于所述感光芯片200c和功能元件,且覆盖滤光片400c的侧壁;所述感光芯片200c的焊垫背向所述封装层350c的底面,所述功能元件的焊垫朝向所述封装层350c的底面。
相应的,所述再布线结构360c包括:导电柱280c,位于所述感光芯200c片内,所述导电柱280c电连接所述感光芯片200c的焊垫;互连线361c,位于所述封装层350c的底面上,电连接所述功能元件的焊垫和所述导电柱280c,所述互连线361c和导电柱280c构成再布线结构360c。
在其他实施例中,当所述感光芯片的焊垫也朝向所述封装层的底面时,所示再布线结构也可以不包括该导电柱。
对本实施例所述摄像组件的具体描述,可参考前述实施例中的相应描述,在此不再赘述。
相应的,本发明实施例还提供一种镜头模组。参考图17,示出了本发明镜头模组一实施例的结构示意图。
所述镜头模组600包括:本发明实施例所述的摄像组件(如图17中虚线框所示);镜头组件530,包括支架535,所述支架535贴装在所述封装层(未标示)的正面上且环绕所述感光单元(未标示)和功能元件(未标示),所述镜头组件530与所述感光芯片(未标示)和功能元件实现电连接。
所述镜头组件530通常包括支架535、安装于所述支架535上的马达(图未示)、以及安装于所述马达上的透镜组(未标示),通过所述支架535,以便于实现所述镜头组件530和所述摄像组件的装配,并使得透镜组位于感光单元的感光路径上。
本实施例中,所述摄像组件的厚度较小,且通过所述封装层,减小了所述镜头组件530的厚度,从而减小了所述镜头模组600的总厚度。
而且,与将外围芯片贴装在外围主板上的方案相比,所述感光单元和功能元件均设置于所述支架535内部,减小了感光芯片和各功能元件之间的距离,相应减小了镜头模组600的尺寸,还缩短了感光芯片和各功能元件之间电连接的距离,从而提高了信号传输的速率,进而提高镜头模组600的使用性能(例如:提高了拍摄速度和存储速度)。
本实施例中,所述摄像组件还包括FPC板,因此所述镜头组件530中的马达与所述FPC板实现电连接,从而实现所述摄像组件与所述镜头组件530之间的电连接。
需要说明的是,对本实施例所述摄像组件的具体描述,可参考前述实施例中的相应描述,本实施例在此不再赘述。
相应的,本发明实施例还提供一种电子设备。参考图18,示出了本发明电子设备一实施例的结构示意图。
本实施例中,所述电子设备700包括本发明实施例所述的镜头模组600。
所述镜头模组600的可靠性和性能较高,相应提高了所述电子设备700的拍摄质量、拍摄速度和存储速度。
而且,所述镜头模组600的整体厚度较小,有利于提高用户的使用感受度。
具体地,所述电子设备700可以为手机、平板电脑、照相机或摄像机等各种具备拍摄功能的设备。
虽然本发明披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (23)

  1.     一种摄像组件的封装方法,其特征在于,包括:
    提供感光芯片;
    在所述感光芯片上贴装滤光片;
    提供承载基板,在所述承载基板上临时键合感光芯片和功能元件;
    在所述承载基板上形成封装层,所述封装层至少填充于所述感光芯片和功能元件之间。
  2.     如权利要求1所述的封装方法,其特征在于,所述感光芯片和功能元件均具有焊垫;
    在所述临时键合的步骤中,所述焊垫均背向所述承载基板;
    或者,所述感光芯片的焊垫背向所述承载基板,所述功能元件的焊垫朝向所述承载基板;
    或者,所述焊垫均朝向所述承载基板。
  3.     如权利要求1所述的封装方法,其特征在于,在形成所述封装层的步骤中,所述封装层填充于所述感光芯片和功能元件之间;
    或者,所述封装层覆盖所述承载基板、功能元件和感光芯片,并露出所述滤光片。
  4.     如权利要求1所述的封装方法,其特征在于,所述感光芯片和功能元件均具有焊垫;
    在形成所述封装层的步骤中,所述封装层露出所述焊垫;
    形成所述封装层后,还包括:采用引线键合工艺,形成电连接所述焊垫的引线。
  5.     如权利要求4所述的封装方法,其特征在于,在所述临时键合的步骤中,所述焊垫均背向所述承载基板;
    在形成所述封装层的步骤中,所述封装层填充于所述感光芯片和功能元件之间;
    在所述封装层靠近所述滤光片的一侧进行所述引线键合工艺。
  6.     如权利要求1所述的封装方法,其特征在于,采用注塑工艺形成所述封装层。
  7.     如权利要求6所述的封装方法,其特征在于,形成所述封装层的步骤包括:在所述临时键合步骤之后,将所述承载基板置于模具内,所述模具包括上模和下模,所述上模和下模中的任一个形成有凹槽;
    将所述承载基板置于所述上模和下模之间;
    在合模后,使所述模具压合至所述感光芯片、功能元件和承载基板上,并将所述滤光片置于所述凹槽内,在所述上模和下模之间形成型腔;
    向所述型腔内注入塑封材料,形成所述封装层;
    去除所述模具。
  8.     如权利要求1所述的封装方法,其特征在于,所述封装方法还包括:形成所述封装层后,进行解键合处理,去除所述承载基板。
  9.     如权利要求4所述的封装方法,其特征在于,在所述引线键合工艺之后,还包括:进行解键合处理,去除所述承载基板;
    或者,
    形成所述封装层之后,在所述引线键合工艺之前,还包括:进行解键合处理,去除所述承载基板。
  10.    如权利要求4所述的封装方法,其特征在于,所述封装方法还包括:在所述引线键合工艺之前,在所述封装层上贴装FPC板;
    在所述引线键合工艺的步骤中,所述引线还电连接所述感光芯片和FPC板。
  11.    如权利要求1所述的封装方法,其特征在于,所述功能元件和感光芯片之间的厚度差值为-2微米至2微米。
  12.    如权利要求1所述的封装方法,其特征在于,所述感光芯片和功能元件通过临时键合层临时键合于所述承载基板上。
  13.    权利要求8所述的封装方法,其特征在于,采用热解键合工艺进行所述解键合处理。
  14.    一种摄像组件,其特征在于,包括:
    封装层、以及嵌于所述封装层中的感光单元和功能元件;
    所述感光单元包括感光芯片和贴装在所述感光芯片上的滤光片,至少所述封装层的底面露出所述感光芯片和功能元件。
  15.    如权利要求14所述的摄像组件,其特征在于,所述感光芯片和功能元件均具有焊垫;
    所述焊垫均背向所述封装层的底面;
    或者,所述感光芯片的焊垫背向所述封装层的底面,所述功能元件的焊垫朝向所述封装层的底面;
    或者,所述焊垫均朝向所述封装层的底面。
  16.    如权利要求14所述的摄像组件,其特征在于,所述封装层的顶部和底面均露出所述感光芯片和功能元件;
    或者,所述封装层的底面露出所述感光芯片和功能元件,所述封装层的顶面高于所述感光芯片和功能元件并露出所述滤光片。
  17.    如权利要求14所述的摄像组件,其特征在于,所述感光芯片和功能元件均具有焊垫;
    所述封装层露出所述焊垫;
    所述摄像组件还包括:引线,电连接所述焊垫。
  18.    如权利要求17所述的摄像组件,其特征在于,所述焊垫均背向所述封装层的底面;
    所述封装层的顶部和底面均露出所述感光芯片和功能元件;
    所述引线位于所述封装层顶面的一侧。
  19.    如权利要求14所述的摄像组件,其特征在于,所述功能元件和感光芯片之间的厚度差值为-2微米至2微米。
  20.    如权利要求14所述的摄像组件,其特征在于,所述功能元件包括外围芯片和被动元件中的至少一种,所述外围芯片包括数字信号处理器芯片和存储器芯片中的一种或两种。
  21.    如权利要求17所述的摄像组件,其特征在于,所述摄像组件还包括:FPC板,贴装在所述封装层上;
    所述引线还电连接所述感光芯片和FPC板。
  22.    一种镜头模组,其特征在于,包括:
    如权利要求14至21中任一项权利要求所述的摄像组件;
    镜头组件,包括支架,所述支架贴装在所述封装层的顶面上且环绕所述感光单元和功能元件,所述镜头组件与所述感光芯片和功能元件实现电连接。
  23.    一种电子设备,其特征在于,包括如权利要求22所述的镜头模组。
PCT/CN2018/119984 2018-11-20 2018-12-10 摄像组件及其封装方法、镜头模组、电子设备 WO2020103211A1 (zh)

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