WO2020087735A1 - 显示面板的数据处理方法和显示装置 - Google Patents

显示面板的数据处理方法和显示装置 Download PDF

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Publication number
WO2020087735A1
WO2020087735A1 PCT/CN2018/124174 CN2018124174W WO2020087735A1 WO 2020087735 A1 WO2020087735 A1 WO 2020087735A1 CN 2018124174 W CN2018124174 W CN 2018124174W WO 2020087735 A1 WO2020087735 A1 WO 2020087735A1
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WIPO (PCT)
Prior art keywords
low
voltage differential
signal
status bit
selection
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PCT/CN2018/124174
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English (en)
French (fr)
Inventor
曾德康
胡水秀
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惠科股份有限公司
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Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US17/042,062 priority Critical patent/US11398201B2/en
Publication of WO2020087735A1 publication Critical patent/WO2020087735A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication

Definitions

  • the present application relates to the field of display technology, and in particular to a data processing method and a display device of a display panel.
  • liquid crystal displays which include a liquid crystal panel and a backlight module.
  • the working principle of the liquid crystal panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage on the two glass substrates to control the rotation direction of the liquid crystal molecules, so as to refract the light of the backlight module to generate a picture.
  • a thin film transistor liquid crystal display has gradually occupied the leading position in the display field due to its low power consumption, excellent picture quality and high production yield.
  • a thin film transistor liquid crystal display includes a liquid crystal panel and a backlight module.
  • the liquid crystal panel includes a color film substrate thin film transistor array substrate, and a transparent electrode exists on the opposite inner side of the substrate. A layer of liquid crystal molecules is sandwiched between the two substrates.
  • the transmission format of the low-voltage differential signal of the display device is determined by the low-voltage differential mode selection signal.
  • the level of the low-voltage differential mode selection signal during transmission may be interfered by an external signal, which may easily lead to an abnormal picture on the display panel.
  • the purpose of the present application is to provide a data processing method and a display device for a display panel to integrate a low-voltage differential mode selection signal function to improve the stability of low-voltage differential signal transmission information.
  • a data processing method of a display panel including steps:
  • the timing controller receives low voltage differential signals
  • the timing controller reads the selection status bit of the low voltage differential signal, and performs signal processing on the low voltage differential signal according to the selection status bit and converts it into a data format corresponding to the selection status bit.
  • the step of setting the low-voltage differential signal includes a data bit and a selection status bit, and assigns the selected status bit according to the corresponding low-voltage differential mode selection signal:
  • the selection status bit is assigned a value of 1.
  • the step of setting the low-voltage differential signal includes a data bit and a selection status bit, and assigns the selected status bit according to the corresponding low-voltage differential mode selection signal:
  • the selection status bit is assigned a value of zero.
  • the step of the timing controller reading the selection status bit of the low-voltage differential signal, and performing signal processing on the low-voltage differential signal according to the selection status bit and converting it into a data format corresponding to the selection status bit includes:
  • the timing controller processes the low-voltage differential signal and converts it into the first data format.
  • the step of the timing controller reading the selection status bit of the low-voltage differential signal, and performing signal processing on the low-voltage differential signal according to the selection status bit and converting it into a data format corresponding to the selection status bit includes:
  • the timing controller When detecting that the value of the selection status bit is 0, the timing controller processes the low-voltage differential signal and converts it into the second data format.
  • the display panel further includes outputting a low-voltage differential mode selection signal corresponding to the low-voltage differential signal to the low-voltage differential mode selection circuit of the timing controller; the step of the timing controller receiving the low-voltage differential signal includes:
  • the low-voltage differential signal includes a selection status bit, and if so, the low-voltage differential mode selection circuit is turned off.
  • the timing controller after receiving the low-voltage differential signal, includes the following steps:
  • the low-voltage differential mode selection circuit outputs a low-voltage differential mode selection signal to the timing controller according to the low-voltage differential signal without the selection status bit.
  • the timing controller performs signal processing on the low-voltage differential signal according to the low-voltage differential mode selection signal and converts it into a data format corresponding to the low-voltage differential mode selection signal.
  • the data length of the low-voltage differential signal is greater than or equal to 8 bits.
  • the present application also discloses a data processing method of a display panel, including the steps of:
  • the timing controller receives low voltage differential signals
  • the timing controller reads the selection status bit of the low voltage differential signal, and performs signal processing on the low voltage differential signal according to the selection status bit and converts it into the data format corresponding to the selection status bit;
  • the selection status bit is assigned a value of 1;
  • the selection status bit is assigned a value of 0;
  • the timing controller When it is detected that the value of the low-voltage differential mode selection signal selection status bit is 1, the timing controller performs signal processing on the low-voltage differential signal and converts it into the first data format;
  • the timing controller When it is detected that the value of the selection status bit is 0, the timing controller performs signal conversion on the low-voltage differential signal and converts it into a second data format.
  • the present application also discloses a display device, including: a driving board; a display panel electrically connected to the driving board; a transmitter provided on the driving board and transmitting a low-voltage differential signal to the display panel; On the display panel, a receiver that receives the low-voltage differential signal; set on the display panel, electrically connected to the receiver, read the selection status bit of the low-voltage differential signal, and signal the low-voltage differential signal according to the selection status bit
  • a timing controller that processes and converts the data format corresponding to the selection status bit; the low-voltage differential signal includes data bits and selection status bits.
  • the transmitter further assigns the selection status bit according to the corresponding low-voltage differential mode selection signal.
  • the selection status bit is assigned a value of 1 or 0; the data format includes a first data format and a second data format respectively corresponding to the assignment; when the timing controller detects that the value of the selection status bit is When 1, the low-voltage differential signal is processed and converted into the first data format; when the timing controller detects that the value of the selection status bit is 0, the low-voltage differential signal is processed and converted into the first Two data formats.
  • the display panel further includes a low-voltage differential mode selection circuit coupled between the transmitter and the receiver, and a switch coupled to the driving board to control the low-voltage differential mode selection circuit to be turned off or started Circuit
  • the driver board also detects whether the low-voltage differential signal includes a selection status bit, and if so, controls the switching circuit to turn off the low-voltage differential mode selection circuit; if not, controls the switching circuit to turn on the low-voltage differential mode A selection circuit, the low-voltage differential mode selection circuit outputs a low-voltage differential mode selection signal to the timing controller according to the low-voltage differential signal.
  • the timing controller performs signal processing on the low-voltage differential signal according to the low-voltage differential mode selection signal or the selection status bit and converts it into a corresponding data format.
  • the low-voltage differential mode selection signal transmitted by the low-voltage differential mode selection circuit instructs the timing controller to decompress and output the matched data format.
  • the display panel is one of a twisted nematic display panel, a plane conversion display panel, and a multi-quadrant vertical alignment display panel.
  • the transmission format of the low voltage differential signal of the display device is determined by the low voltage differential mode selection signal, and the level of the low voltage differential mode selection signal may be interfered by external factors, such as the influence of external static electricity, so that the low voltage differential mode selection signal is electrically
  • the signal format of Ping and the current transmission low-voltage differential signal does not match, it will cause an abnormal picture.
  • the timing controller of the display panel receives the low-voltage output from the driver board Differential signal; Finally, the timing controller reads the selection status bit of the low voltage differential signal, and performs signal processing on the low voltage differential signal according to the selection status bit and converts it into the data format corresponding to the selection status bit, thus integrating the low voltage differential mode selection signal Function, even if the low-voltage differential signal is disturbed by external signals, as long as the selection status bit is still read, it will be guaranteed to be converted into the corresponding data format, which can improve the stability of the transmitted information.
  • the number of signal input end connectors further reduces the number of traces of the timing controller and low-voltage differential signal connector on the printed circuit board, reduces the area of the printed circuit board, and reduces the production cost of the display device.
  • FIG. 1 is a flowchart of a data processing method of a display panel according to an embodiment of the present application
  • FIG. 2 is a flowchart of a data processing method of a display panel according to an embodiment of the present application
  • FIG. 3 is an exemplary assignment diagram of a low-voltage differential signal according to an embodiment of the present application.
  • FIG. 5 is an exemplary assignment diagram of yet another low-voltage differential signal according to an embodiment of the present application.
  • FIG. 6 is an exemplary assignment diagram of a low-voltage differential signal including a selection status bit according to an embodiment of the present application
  • FIG. 7 is a schematic diagram of a display device according to an embodiment of the present application.
  • FIG. 8 is a schematic diagram of another display device according to an embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • installation should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • LVDS Low-Voltage Differential Signaling
  • SELLVDS select low-voltage differential signaling
  • the present application discloses a data processing method and display device of a display panel.
  • a data processing method including steps:
  • S11 Set the low-voltage differential signal including the data bit and the selection status bit, and assign values according to the corresponding low-voltage differential mode selection signal;
  • the timing controller receives low-voltage differential signals
  • the timing controller reads the selection status bit of the low-voltage differential signal, and performs signal processing on the low-voltage differential signal according to the selection status bit and converts it into the data format corresponding to the selection status bit.
  • the transmission format of the low-voltage differential signal of the display device is determined by the low-voltage differential mode selection signal of the timing controller, and the level of the low-voltage differential mode selection signal may be interfered by external factors, such as the influence of static electricity, so that the low-voltage differential mode When the selection signal level does not match the current transmission low-voltage differential signal signal format, it will cause abnormal display on the screen.
  • the timing controller of the display panel receives the low-voltage differential output from the driver board Signal; finally, the timing controller reads the selection status bit of the low voltage differential signal, and processes the low voltage differential signal according to the selection status bit and converts it into the data format corresponding to the selection status bit, thus integrating the function of the low voltage differential mode selection signal Even if the low-voltage differential signal is disturbed by external signals, as long as the selection status bit is still read, it is guaranteed to be converted into the corresponding data format, which can improve the stability of the transmitted information. In addition, it can reduce the timing controller and low-voltage differential signal The number of input connectors reduces the number of wiring traces, the area of the printed circuit board, and the production cost.
  • FIGS. 3 to 6 are exemplary assignment diagrams of the low-voltage differential signal of the present application.
  • the data length of the exemplary low-voltage differential signal is 8 bits or more, in which the low-voltage differential signal has seven bit bits It is a data bit, and the transmission of the data bit is differently assigned according to the situation of the display panel.
  • there is one redundant bit of undocumented data for example, a reserved bit (RSVD, Reserved) among useless bits, of course, other bits may also be used.
  • RSVD Reserved
  • the reserved bit can be assigned a value of 1 or 0, that is, set to the selection status bit (SEL, Select).
  • the timing controller can be based on Different status bits are selected, corresponding to one of two main data formats, such as VESA format (VESA, Video Electronics Standards Association, Video Electronics Standards Association) and JEIDA format (Japan Electronic Industry Development Development Association, Japan Electronics Industry Development Association ).
  • VESA Video Electronics Standards Association
  • JEIDA Japan Electronic Industry Development Development Association
  • FIG. 2 is a flowchart of the data processing method of the display panel of this embodiment.
  • the setting of the low-voltage differential signal includes data bits, and a selection status bit, and is selected according to the corresponding low-voltage differential mode
  • the steps that the signal assigns to the selected status bits include:
  • the selection status bit is assigned according to the level of the low-voltage differential mode selection signal, so that it is convenient and clear to replace the low-voltage differential mode selection signal to indicate the selection of the signal format of the low-voltage differential signal, which is convenient for subsequent timing controllers to select the status bit
  • the low-voltage differential signal is processed and output in the correct data format for subsequent processing, so as to avoid receiving data that does not match the format during subsequent processing and causing display abnormalities on the screen.
  • the timing controller reads the selection status bit of the low-voltage differential signal, and performs signal processing on the low-voltage differential signal according to the selection status bit and converts it into the data format corresponding to the selection status bit.
  • the steps include:
  • the timing controller reads the selection status bit of the low voltage differential signal, and performs signal processing on the low voltage differential signal according to the selection status bit and converts it into a data format corresponding to the selection status bit to output the first data format or the second data format.
  • the timing controller can quickly output the data format of the accurate signal format, reducing or even eliminating the abnormal display of the screen; in addition, due to the existence of the low-voltage differential mode selection signal status bit, the aggregated low-voltage differential mode selection signal can be omitted, so not only Reduce the number of connectors of the timing controller and low-voltage differential signal input terminals, and reduce the number of traces of the timing controller and low-voltage differential signal connectors on the printed circuit board, reduce the area of the printed circuit board, and reduce the production cost.
  • this solution corresponds to the case of two data formats. If there are more than two, the data length of the selection status bit can be set to exceed the length of 1 bit, and the assignment of the selection status bit can be matched with the data format.
  • the display panel further includes a low-voltage differential mode selection signal corresponding to the low-voltage differential signal output to the low-voltage differential mode selection circuit of the timing controller; the step of the timing controller receiving the low-voltage differential signal includes :
  • the low-voltage differential mode selection circuit outputs a low-voltage differential mode selection signal to the timing controller according to the low-voltage differential signal without the selection status bit;
  • the timing controller processes the low-voltage differential signal according to the low-voltage differential mode selection signal and converts it into the data format corresponding to the low-voltage differential mode selection signal.
  • the low-voltage differential mode selection circuit Retain the low-voltage differential mode selection circuit and use it as a supplement and backup for the scheme of this application.
  • the low-voltage differential mode selection circuit When the display panel and the driver board do not support reading low-voltage differential signals containing the selection status bit, we can control the low-voltage differential mode selection circuit to open Therefore, the low-voltage differential mode selection signal transmitted by the low-voltage differential mode selection circuit is used to instruct the timing controller to decompress and output the matched data format.
  • the two methods are complementary, suitable for more kinds of display panels, ensuring the correctness of data format conversion and output, thus ensuring the display quality of the display screen.
  • the present application also provides a data processing method of a display panel, including steps:
  • S21 Set the low-voltage differential signal including the data bit and the selection status bit, and assign the selected status bit according to the corresponding low-voltage differential mode selection signal;
  • the timing controller receives low-voltage differential signals
  • the timing controller reads the selection status bit of the low voltage differential signal, and performs signal processing on the low voltage differential signal according to the selection status bit and converts it into the data format corresponding to the selection status bit;
  • S211 When the low-voltage differential mode selection signal is high, the selection status bit is assigned a value of 1;
  • Integrate the low-voltage differential mode selection signal information into the low-voltage differential signal information, that is, useless reserved bits (RSVD, Reserved) in the fourth pair of low-voltage differential signals are defined as selection status bits (SEL, Select), and the selection status bit is assigned a value of 1.
  • the transmission format corresponding to the low-voltage differential signal is the first data format, and when the value of the selection status bit (SEL, Select) is 0, the transmission format corresponding to the low-voltage differential signal is the second data format;
  • the differential signal not only the anti-interference ability becomes stronger, but also the current design, the number of input port connectors corresponding to the low-voltage differential mode selection circuit, the corresponding circuit traces, and the number of timing controllers are improved. At the same time of quality, it plays a role in cost optimization and panel space optimization.
  • the first data format and the second data format can be VESA picture format (VESA, Video Electronics Standards Association, Video Electronics Standards Association) and JEIDA picture format (Japan Electronics Industry Development Association, Japan Electronics Industry Development Association), or other Applicable data format.
  • VESA picture format VESA, Video Electronics Standards Association, Video Electronics Standards Association
  • JEIDA picture format Japan Electronics Industry Development Association, Japan Electronics Industry Development Association
  • FIG. 7 and FIG. 8 are schematic diagrams of a display device according to an embodiment of the present application. It can be seen in conjunction with FIGS. 1 and 2 that the present application also discloses a display device 100 , Including: a driver board 20; a display panel 10 electrically connected to the driver board 20; a transmitter 30 disposed on the driver board 20 and transmitting a low-voltage differential signal to the display panel 10; and disposed on the display panel 10 , A receiver 50 that receives the low voltage differential signal; a timing controller 40 provided on the display panel 10, the timing controller 40 reads the selection status bit of the low voltage differential signal, and signals the low voltage differential signal according to the selection status bit Processed and converted into the data format corresponding to the selection status bit; the low-voltage differential signal contains data bits and selection status bits.
  • the timing controller of the display panel reads the low voltage differential signal and the selection status bit, According to the selection status bit, the low-voltage differential signal is processed and converted into the data format corresponding to the selection status bit.
  • the selection status bit ensures conversion to the corresponding data format, which can improve the stability of the transmitted information. In addition, it can reduce the number of timing controllers and low-voltage differential signal input connectors, thereby reducing the number of wiring traces and reducing The area of the printed circuit board is reduced, and the production cost is reduced.
  • the transmitter 30 further assigns the selection status bit according to the corresponding low-voltage differential mode selection signal.
  • the transmitter 30 can be modified to assign the selection status bit according to the low voltage differential mode selection signal.
  • it can also be an additional circuit, chip, or setting and assignment of the selection status bit before the driver board receives the low-voltage differential signal.
  • the selection status bit is assigned a value of 1 or 0; the data format includes a first data format and a second data format corresponding to the assignment respectively; when the timing controller 40 detects the selection status bit When the value of is 1, the low-voltage differential signal is processed and converted into the first data format; when the timing controller 40 detects that the value of the selection status bit is 0, the low-voltage differential signal is processed, And converted into the second data format.
  • the selection status bit to 1 or 0 to correspond to two different data formats, where the first data format and the second data format are the VESA data format (VESA, VideoElectronicsStandardsAssociation, Video Electronics Standards Association) and JEIDA data format (JapanElectronicIndustryDevelopmentAssociation, Japan Electronics Industry Development Association).
  • VESA VideoElectronicsStandardsAssociation
  • JEIDA JapanElectronicIndustryDevelopmentAssociation, Japan Electronics Industry Development Association
  • Adjust the data length of the selection status bit according to the actual situation, and perform assignment and data format correspondence.
  • the display panel 10 further includes a low-voltage differential mode selection circuit 60 coupled between the transmitter 30 and the receiver 50, and is coupled to the driving board 20, and the driving board 20 controls the low voltage
  • the differential mode selection circuit 60 is turned off or activated by the switching circuit 70; the driver board 10 detects whether the low voltage differential signal includes a selection status bit, and if so, controls the switching circuit 70 to turn off the low voltage differential mode selection circuit 60 ;
  • the switching circuit 70 is controlled to open the low-voltage differential mode selection circuit 60, and the low-voltage differential mode selection circuit 60 outputs a low-voltage differential mode selection signal to the timing controller 40 according to the low-voltage differential signal.
  • the display device 100 is further provided with a low-voltage differential mode selection circuit 60.
  • two modes are selected, so that the display device 100 can use a low-voltage differential mode selection circuit to transmit low voltage
  • the differential mode selection signal is given to the timing controller 40 to control the corresponding data format of the output, or the corresponding data format can be controlled by presetting the low-voltage differential signal including the selection status bit assigned according to the low-voltage differential mode selection signal, and various functions Different timing controllers.
  • the timing controller 40 performs signal processing on the low-voltage differential signal or converts it into a corresponding data format according to the low-voltage differential mode selection signal or the selection status bit. In this way, even if the timing controller 40 in the display panel 10 is not improved corresponding to the selection status bit, the low-voltage differential mode selection signal transmitted from the low-voltage differential mode selection circuit 60 can be additionally read to process the low-voltage differential signal.
  • TN panel full name Twisted Nematic, namely twisted nematic panel
  • IPS panel In-Plane Switching
  • VA panel Multi-Domain Vertical Alignment, multi-quadrant vertical alignment

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Abstract

一种显示面板的数据处理方法和显示装置，该数据处理方法包括步骤：设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值（S11）；时序控制器接收低压差分信号（S12）；时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式（S13）。

Description

显示面板的数据处理方法和显示装置
本申请要求于2018年10月31日提交中国专利局、申请号为CN201811286454.4、申请名称为“一种显示面板的数据处理方法和显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板的数据处理方法和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着科技的发展和进步，液晶显示器由于具备机身薄、省电和辐射低等热点而成为显示器的主流产品，得到了广泛应用。市场上的液晶显示器大部分为背光型液晶显示器，其包括液晶面板及背光模组。液晶面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
其中，薄膜晶体管液晶显示器由于具有低的功耗、优异的画面品质以及较高的生产良率等性能，已经逐渐占据了显示领域的主导地位。同样，薄膜晶体管液晶显示器包含液晶面板和背光模组，液晶面板包括彩膜基板薄膜晶体管阵列基板，上述基板的相对内侧存在透明电极。两片基板之间夹一层液晶分子。
显示装置的低压差分信号的传输格式由低压差分模式选择信号来决定，低压差分模式选择信号在传输时的电平高低值存在受到外部信号干扰的可能，容易导致显示面板出现画面异常的现象。
发明内容
本申请的目的在于提供一种显示面板的数据处理方法和显示装置，以整合低压差分模式选择信号功能，提升低压差分信号传输信息的稳定性。
一种显示面板的数据处理方法，包括步骤：
设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；
时序控制器接收低压差分信号；
时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式。
可选的，所述设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值的步骤中：
当所述低压差分模式选择信号为高电平时，所述选择状态位赋值为1。
可选的，所述设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值的步骤中：
当所述低压差分模式选择信号为低电平时，所述选择状态位赋值为0。
可选的，所述时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式的步骤包括：
当检测到所述选择状态位的值为1时，所述时序控制器对所述低压差分信号进行处理，并转换为第一数据格式。
可选的，所述时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式的步骤包括：
当检测到所述选择状态位的值为0时，所述时序控制器对所述低压差分信号进行处理，并转换为第二数据格式。
可选的，所述显示面板还包括输出对应于低压差分信号的低压差分模式选择信号，到所述时序控制器的低压差分模式选择电路；所述时序控制器接收低压差分信号的步骤包括：
检测所述低压差分信号是否包括选择状态位，若是，则关断所述低压差分模式选择电路。
可选的，所述时序控制器接收低压差分信号后，包括步骤：
检测所述低压差分信号是否包括选择状态位，若否，则所述低压差分模式选择电路根据不带选择状态位的低压差分信号输出低压差分模式选择信号给所述时序控制器。
可选的，所述时序控制器根据低压差分模式选择信号将低压差分信号进行信号处理，并转换成低压差分模式选择信号对应的数据格式。
可选的，所述低压差分信号的数据长度大于或等于8比特。
本申请还公开了一种显示面板的数据处理方法，包括步骤：
设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；
时序控制器接收低压差分信号；
时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式；
其中，当所述低压差分模式选择信号为高电平时，所述选择状态位赋值为1；
当所述低压差分模式选择信号为低电平时，所述选择状态位赋值为0；
当检测到所述低压差分模式选择信号选择状态位的值为1时，所述时序控制器对所述低压差分信号进行信号处理并转换为第一数据格式；
当检测到所述选择状态位的值为0时，所述时序控制器对所述低压差分信号进行信号转换并转换为第二数据格式。
本申请还公开了一种显示装置，包括：驱动板；与所述驱动板电性连接的显示面板；设置在所述驱动板，发送低压差分信号到所述显示面板的发送器；，设置在显示面板上，接收所述低压差分信号的接收器；设置在显示面板上，与所述接收器电性连接，读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式的时序控制器；所述低压差分信号包含数据位和选择状态位。
可选的，所述发送器还根据对应的低压差分模式选择信号，给所述选择状态位进行赋值。
可选的，所述选择状态位的赋值为1或0；所述数据格式包括与赋值分别对应的第一数据格式和第二数据格式；当所述时序控制器检测到选择状态位的值为1时，对所述低压差分信号进行处理，并转换成第一数据格式；当所述时序控制器检测到选择状态位的值为0时，对所述低压差分信号进行处理，并转换成第二数据格式。
可选的，所述显示面板还包括耦合在所述发送器和接收器之间的低压差分模式选择电路，以及耦合于所述驱动板、控制所述低压差分模式选择电路关断或启动的切换电路；
所述驱动板还检测所述低压差分信号是否包括选择状态位，若是，则控制所述切换电路关断所述低压差分模式选择电路；若否，则控制所述切换电路打开所述低压差分模式选择电路，所述低压差分模式选择电路根据低压差分信号输出低压差分模式选择信号 给所述时序控制器。
可选的，所述时序控制器根据低压差分模式选择信号或选择状态位将低压差分信号进行信号处理并转换成对应的数据格式。
可选的，所述低压差分模式选择电路传输的低压差分模式选择信号指示时序控制器进行匹配的数据格式的解压和输出。
可选的，所述显示面板为扭曲向列型显示面板、平面转换显示面板和多象限垂直配向显示面板中的一种。
显示装置的低压差分信号的传输格式由低压差分模式选择信号来决定，而低压差分模式选择信号的电平高低值存在受到外部因素干扰的可能，例如外部静电的影响，这样低压差分模式选择信号电平与现行传输低压差分信号信号格式不匹配时，则导致画面出现异常。设置低压差分信号，其中，低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；然后，显示面板的时序控制器，接收驱动板输出的低压差分信号；最后，时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式，这样整合了低压差分模式选择信号的功能，即使低压差分信号受到外界信号的干扰，但只要还读取到该选择状态位，便保证转换成对应的数据格式，可以提升传输信息的稳定性，另外，可减少时序控制器和低压差分信号输入端连接器的数量，进而减少了时序控制器和低压差分信号连接器在印制电路板的走线数量，减少了印刷电路板的面积，降低了显示装置的生产成本。
附图说明
所包括的附图用来提供对本申请实施例的理解，其构成了说明书的一部分，示例本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请实施例一种显示面板的数据处理方法流程图；
图2是本申请实施例一种显示面板的数据处理方法流程图；
图3是本申请实施例一种低压差分信号的示例性赋值图；
图4是本申请实施例另一种低压差分信号的示例性赋值图；
图5是本申请实施例又一种低压差分信号的示例性赋值图；
图6是本申请实施例一种包括选择状态位的低压差分信号的示例性赋值图；
图7是本申请实施例一种显示装置的示意图；
图8是本申请实施例另一种显示装置的示意图。
本申请的实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅进行描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
下面结合附图和可选的实施例对本申请作具体说明。
在现行TFT-LCD的TV市场中大部分的输入传输协助为低压差分信号(LVDS，Low-Voltage Differential Signaling)，并且传输色深均在8bit以上。而低压差分信号传输协议按日系客户和非日系客户分为2个格式进行排列传输(VESA和JEIDA)，通过外部的低压差分模式选择信号(SELLVDS，select low-voltage differential signaling))的设定来决定低压差分信号传输的格式，而低压差分模式选择信号的电平高低值存在受到外部信号干扰的可能，当低压差分模式选择信号电平与现行传输低压差分信号信号格式不匹配时，则导致画面出现显示异常。
作为本申请的实施例，如图1至图6所示，本申请公开了一种显示面板的数据处理方法和显示装置。
一种数据处理方法，包括步骤：
S11:设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号进行赋值；
S12:时序控制器接收低压差分信号；
S13:时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式。
显示装置的低压差分信号的传输格式由时序控制器的低压差分模式选择信号来决定，而低压差分模式选择信号的电平高低值存在受到外部因素干扰的可能，例如静电的影响，这样低压差分模式选择信号电平与现行传输低压差分信号信号格式不匹配时，则导致画面出现显示异常。设置低压差分信号，其中低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；然后，显示面板的时序控制器，接收驱动板输出的低压差分信号；最后，时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式，这样整合了低压差分模式选择信号的功能，即使低压差分信号受到外界 信号的干扰，但只要还读取到该选择状态位，便保证转换成对应的数据格式，可以提升传输信息的稳定性，另外，可减少时序控制器和低压差分信号输入端连接器的数量，进而减少了布线走线的数量，减少了印刷电路板的面积，降低了生产成本。
如图3至图6所示，图3至图6为本申请低压差分信号的示例性赋值图，示例性的低压差分信号的数据长度为8bit或者以上，其中，低压差分信号有七个bit位为数据位，数据位的传输根据显示面板的情况不同而进行不同的赋值形式。而该除此之外，还有一个未记载数据的一个冗余bit位，例如无用的比特位中的保留比特位(RSVD，Reserved)，当然也可以是其他比特位。
如图6中，该保留比特位可以将其赋值为1或0，即设置为选择状态位(SEL，Select)，当选择状态位是根据低压差分模式选择信号进行赋值时，时序控制器可以根据选择状态位的不同，对应输出两种主要的数据格式中的一种，例如VESA格式(VESA,Video Electronics Standards Association,视频电子标准协会)和JEIDA格式(Japan Electronic Industry Development Association，日本电子行业开发协会)。当然，如果数据格式的选择不止两种，则可以根据具体情况增加选择状态位占用的bit位长度，但不宜过长。
如图2所示，图2为本实施例显示面板的数据处理方法流程图，在一实施例中，所述设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值的步骤包括：
S211:当所述低压差分模式选择信号为高电平时，所述选择状态位赋值为1；
S212:当所述低压差分模式选择信号为低电平时，所述选择状态位赋值为0。
根据低压差分模式选择信号的电平不同给选择状态位赋值，这样方便清楚替代低压差分模式选择信号的作用为低压差分信号的信号格式的选择进行指示，方便后续的时序控制器根据选择状态位对低压差分信号以正确的数据格式进行处理和输出，以便后续处理，从而避免后续处理过程中接收到格式不匹配的数据而导致画面出现显示异常。
如图2所示，在一实施例中，所述时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式的步骤包括：
S231:当检测到所述选择状态位的值为1时，所述时序控制器对所述低压差分信号，并转换为第一数据格式；
S232：当检测到所述选择状态位的值为0时，所述时序控制器对所述低压差分信号，并转换为第二数据格式。
所述时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式输出第一数据格式或第二数据格式。这样，时序控制器可以快速输出准确信号格式的数据格式，减少甚至消除画面显示异常；另外，由于低压差分模式选择信号状态位的存在，汇总的低压差分模式选择信号可以省去，如此，不仅可以减少时序控制器和低压差分信号输入端连接器的数，且减少了时序控制器和低压差分信号连接器在印制电路板的走线数量，减少了印刷电路板的面积，降低了生产成本。其中，本方案对应的是两种数据格式的情况，若是超过两种，可以设置选择状态位的数据长度超过1bit的长度，并使得选择状态位的赋值与数据格式进行对应即可。
在一实施例中，所述显示面板还包括输出对应于低压差分信号的低压差分模式选择信号，到所述时序控制器的低压差分模式选择电路；所述时序控制器接收低压差分信号的步骤包括：
检测所述低压差分信号是否包括选择状态位，若是，则关断所述低压差分模式选择电路；
若否，则所述低压差分模式选择电路根据不带选择状态位的低压差分信号输出低压差分模式选择信号给所述时序控制器；
时序控制器根据低压差分模式选择信号将低压差分信号进行信号处理，并转换成低压差分模式选择信号对应的数据格式。
保留该低压差分模式选择电路，并将其作为本申请方案的补充和备用，当显示面板和驱动板不支持读取包含选择状态位的低压差分信号的时候，我们可以控制低压差分模式选择电路打开，从而使用该低压差分模式选择电路传输的低压差分模式选择信号来指示时序控制器进行匹配的数据格式的解压和输出。两种方式互补，适用更多种的显示面板，保证数据格式的转换和输出的正确性，从而确保了显示画面的显示品质。
如图2所示，结合图1可知，本申请还提供了一种显示面板的数据处理方法，包括步骤：
S21:设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；
S22:时序控制器接收低压差分信号；
S23:时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式；
其中，S211:当所述低压差分模式选择信号为高电平时，所述选择状态位赋值为1；
S212:当所述低压差分模式选择信号为低电平时，所述选择状态位赋值为0；
S231:当检测到所述低压差分模式选择信号选择状态位的值为1时，所述时序控制器对所述低压差分信号进行信号处理并转换为第一数据格式；
S232:当检测到所述选择状态位的值为0时，所述时序控制器对所述低压差分信号进行信号转换并转换为第二数据格式。
将低压差分模式选择信号信息整合到低压差分信号信息内部，即将低压差分信号第4对中无用的保留比特位(RSVD，Reserved)定义为选择状态位(SEL，Select)，选择状态位赋值为1时，低压差分信号对应传输格式为第一数据格式，选择状态位(SEL，Select)的值为0时，低压差分信号对应传输格式为第二数据格式；这样将低压差分模式选择信号整合到低压差分信号中，不但抗干扰性变强，而已还能省去现行设计中，对应低压差分模式选择电路的输入端口连接器的数量，和对应的电路走线，及时序控制器数量，在提高传输质量的同时，起到一个成本优化，和面板空间优化的作用。
当然，第一数据格式和第二数据格式可以分别是VESA图片格式(VESA,Video Electronics Standards Association,视频电子标准协会)和JEIDA图片格式(Japan Electronic Industry Development Association，日本电子行业开发协会)，或者其他适用的数据格式。
在一实施例中，如图7和图8所示，图7和图8分别为本申请实施例一种显示装置的示意图，结合图1和2可知，本申请还公开了一种显示装置100，包括：驱动板20；与所述驱动板20电性连接的显示面板10；设置在所述驱动板20，发送低压差分信号到所述显示面板10的发送器30；设置在显示面板10上，接收所述低压差分信号的接收器50；，设置在显示面板10上的时序控制器40，时序控制器40读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式；所述低压差分信号包含数据位和选择状态位。
设置低压差分信号包括数据位，以及选择状态位；其中，该选择状态位根据对应的低压差分模式选择信号进行赋值；然后，显示面板的时序控制器读取低压差分信号，以 及的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式，这样整合了低压差分模式选择信号的功能，即使低压差分信号受到外界信号的干扰，但只要还读取到该选择状态位，便保证转换成对应的数据格式，可以提升传输信息的稳定性，另外，可减少时序控制器和低压差分信号输入端连接器的数量，进而减少了布线走线的数量，减少了印刷电路板的面积，降低了生产成本。
在一实施例中，发送器30还根据对应的低压差分模式选择信号，给所述选择状态位进行赋值。该发送器30可以改进以根据低压差分模式选择信号给选择状态位进行赋值。当然，也可以是额外设置的电路，芯片，或者在驱动板接收到低压差分信号之前，便完成选择状态位的设置和赋值。
在一实施例中，所述选择状态位的赋值为1或0；所述数据格式包括与赋值分别对应的第一数据格式和第二数据格式；当所述时序控制器40检测到选择状态位的值为1时，对所述低压差分信号进行处理，并转换成第一数据格式；当所述时序控制器40检测到选择状态位的值为0时，对所述低压差分信号进行处理，并转换成第二数据格式。
将选择状态位赋值为1或0，以对应两种不同的数据格式，其中，该第一数据格式和第二数据格式分别为VESA数据格式(VESA,Video Electronics Standards Association,视频电子标准协会)和JEIDA数据格式(Japan Electronic Industry Development Association，日本电子行业开发协会)。当然，其他的数据格式也是适用的，根据实际情况调整选择状态位的数据长度，并进行赋值和数据格式的对应即可。
在一实施例中，所述显示面板10还包括耦合在所述发送器30和接收器50之间的低压差分模式选择电路60，以及耦合于所述驱动板20、驱动板20控制所述低压差分模式选择电路60关断或启动的切换电路70；所述驱动板10检测所述低压差分信号是否包括选择状态位，若是，则控制所述切换电路70关断所述低压差分模式选择电路60；
若否，则控制所述切换电路70打开所述低压差分模式选择电路60，所述低压差分模式选择电路60根据低压差分信号输出低压差分模式选择信号给所述时序控制器40。该显示装置100还设置有低压差分模式选择电路60，借由本申请的技术方案，结合示例性的技术方案，两种模式选择的方案，使得该显示装置100可以使用低压差分模式选择电路来发送低压差分模式选择信号给时序控制器40以控制输出对应的数据格式，也可以通过预先设置低压差分信号包括根据低压差分模式选择信号进行赋值的选择状态位来控制输出对应的数据格式，和多种功能不同的时序控制器。
在一实施例中，所述时序控制器40根据低压差分模式选择信号或选择状态位将低压差分信号进行信号处理并转换成对应的数据格式。如此，即使显示面板10中的时序控制器40没有对应选择状态位进行改进，也可以通过另外读取低压差分模式选择电路60传送来的低压差分模式选择信号，对低压差分信号进行处理。
需要说明的是，本方案中涉及到的各步骤的限定，在不影响具体方案实施的前提下，并不认定为对步骤先后顺序做出限定，写在前面的步骤可以是在先执行的，也可以是在后执行的，甚至也可以是同时执行的，只要能实施本方案，都应当视为属于本申请的保护范围。
本申请的技术方案可以广泛实施在TN面板(全称为Twisted Nematic，即扭曲向列型面板)、IPS面板(In-Plane Switching，平面转换)、VA面板(Multi-Domain Vertical Alignment，多象限垂直配向技术)，当然，也可以是其他类型的面板，适用即可。
以上内容是结合具体的可选实施方式对本申请所作的详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种显示面板的数据处理方法，包括步骤：
    设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；
    时序控制器接收低压差分信号；
    时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式。
  2. 根据如权利要求1所述的一种显示面板的数据处理方法，其中，所述设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值的步骤中：
    当所述低压差分模式选择信号为高电平时，所述选择状态位赋值为1。
  3. 根据如权利要求2所述的一种显示面板的数据处理方法，其中，所述设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值的步骤中：
    当所述低压差分模式选择信号为低电平时，所述选择状态位赋值为0。
  4. 根据如权利要求3所述的一种显示面板的数据处理方法，其中，所述时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式的步骤包括：
    当检测到所述选择状态位的值为1时，所述时序控制器对所述低压差分信号进行处理，并转换为第一数据格式。
  5. 根据如权利要求4所述的一种显示面板的数据处理方法，其中，所述时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式的步骤包括：
    当检测到所述选择状态位的值为0时，所述时序控制器对所述低压差分信号进行处理，并转换为第二数据格式。
  6. 根据如权利要求1所述的一种显示面板的数据处理方法，其中，所述显示面板还包括输出对应于低压差分信号的低压差分模式选择信号，到所述时序控制器的低压差 分模式选择电路；
    所述显示面板的时序控制器接收低压差分信号的步骤包括：
    检测所述低压差分信号是否包括选择状态位，若是，则关断所述低压差分模式选择电路。
  7. 根据如权利要求6所述的一种显示面板的数据处理方法，其中，所述显示面板的时序控制器接收低压差分信号后，包括步骤：
    检测所述低压差分信号是否包括选择状态位，若否，则所述低压差分模式选择电路根据不带选择状态位的低压差分信号输出低压差分模式选择信号给所述时序控制器。
  8. 根据如权利要求7所述的一种显示面板的数据处理方法，其中，所述时序控制器根据低压差分模式选择信号将低压差分信号进行信号处理，并转换成低压差分模式选择信号对应的数据格式。
  9. 根据如权利要求1所述的一种显示面板的数据处理方法，其中，所述低压差分信号的数据长度大于或等于8比特。
  10. 一种显示面板的数据处理方法，包括步骤：
    设置低压差分信号包括数据位，以及选择状态位，并根据对应的低压差分模式选择信号给选择状态位进行赋值；
    时序控制器接收低压差分信号；
    时序控制器读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式；
    其中，当所述低压差分模式选择信号为高电平时，所述选择状态位赋值为1；
    当所述低压差分模式选择信号为低电平时，所述选择状态位赋值为0；
    当检测到所述低压差分模式选择信号选择状态位的值为1时，所述时序控制器对所述低压差分信号进行信号处理并转换为第一数据格式；
    当检测到所述选择状态位的值为0时，所述时序控制器对所述低压差分信号进行信号转换并转换为第二数据格式。
  11. 一种显示装置，包括：
    驱动板；
    显示面板，与所述驱动板电性连接；
    发送器，设置在所述驱动板，发送低压差分信号到所述显示面板；
    接收器，设置在显示面板上，接收所述低压差分信号；以及
    时序控制器，设置在所述显示面板上，与所述接收器电性连接，读取低压差分信号的选择状态位，并根据选择状态位对低压差分信号进行信号处理并转换成选择状态位对应的数据格式；
    其中，所述低压差分信号包含数据位和选择状态位。
  12. 根据如权利要求11所述的一种显示装置，其中，所述发送器还根据对应的低压差分模式选择信号，给所述选择状态位进行赋值。
  13. 根据如权利要11所述的一种显示装置，其中，所述选择状态位的赋值为1或0；所述数据格式包括与赋值分别对应的第一数据格式和第二数据格式；
    当所述时序控制器检测到选择状态位的值为1时，对所述低压差分信号进行处理，并转换成第一数据格式；
    当所述时序控制器检测到选择状态位的值为0时，对所述低压差分信号进行处理，并转换成第二数据格式。
  14. 根据如权利要求13所述的一种显示装置，其中，所述显示面板还包括耦合在所述发送器和接收器之间的低压差分模式选择电路，以及耦合于所述驱动板、控制所述低压差分模式选择电路关断或启动的切换电路；
    所述驱动板还检测所述低压差分信号是否包括选择状态位，若是，则控制所述切换电路关断所述低压差分模式选择电路；
    若否，则控制所述切换电路打开所述低压差分模式选择电路，所述低压差分模式选择电路根据低压差分信号输出低压差分模式选择信号给所述时序控制器。
  15. 根据如权利要求14所述的一种显示装置，其中，所述时序控制器根据低压差分模式选择信号或选择状态位将低压差分信号进行信号处理并转换成对应的数据格式。
  16. 根据如权利要求14所述的一种显示装置，其中，所述低压差分模式选择电路传输的低压差分模式选择信号指示时序控制器进行匹配的数据格式的解压和输出。
  17. 如权利要求11所述的一种显示装置，其中，所述显示面板为扭曲向列型显示面板、平面转换显示面板和多象限垂直配向显示面板中的一种。
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