WO2020019621A1 - 显示装置及其显示面板 - Google Patents

显示装置及其显示面板 Download PDF

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Publication number
WO2020019621A1
WO2020019621A1 PCT/CN2018/119019 CN2018119019W WO2020019621A1 WO 2020019621 A1 WO2020019621 A1 WO 2020019621A1 CN 2018119019 W CN2018119019 W CN 2018119019W WO 2020019621 A1 WO2020019621 A1 WO 2020019621A1
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WIPO (PCT)
Prior art keywords
pixels
display area
line
control
display
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PCT/CN2018/119019
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English (en)
French (fr)
Inventor
李汶欣
黄笑宇
Original Assignee
惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US17/262,216 priority Critical patent/US11783794B2/en
Publication of WO2020019621A1 publication Critical patent/WO2020019621A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0221—Addressing of scan or signal lines with use of split matrices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present application relates to the field of display technology, and in particular, to a display device and a display panel thereof.
  • TFT-LCD Thin Film Transistor Liquid Display
  • TFT-LCD Thin Film Transistor Liquid Display
  • the driving method of the scan driving circuit used in the TFT-LCD is progressive scanning.
  • an operational amplifier is added to each output port in the scan driving circuit to increase the driving capability.
  • 768 scan lines corresponding to a 1024 * 768 display panel
  • 768 operational amplifiers Therefore, it will have a great impact on manufacturing costs.
  • a display device and a display panel thereof are provided.
  • a display panel includes: a display area including a driving transistor array substrate and a plurality of scanning lines, each of which is connected to at least one driving transistor to control pixels driven by the driving transistors, and the display area is based on A diagonal line of the driving transistor array substrate is divided into a first display area and a second display area; and a gate driving chip includes a plurality of amplifying circuits, and the gate driving chip is connected to a scanning line through an output port.
  • the output ports are configured to control at least one scan line, and the output port whose number of controlled pixels is greater than a first preset value is connected to the scan line through an amplifying circuit, and the number of controlled pixels is less than or equal to the first preset value The output port is not connected to the scanning line through the amplifying circuit.
  • the plurality of scan lines includes a first scan line located on the diagonal line and configured to drive pixels on the diagonal line of the driving transistor array substrate;
  • the two ends intersect with the edge of the driving transistor array substrate, the pixels at the intersections are pixels driven by the start point of the first scan line, and pixels driven by the end point of the first scan line, and the first scan line Connected to the control electrode of one drive transistor in each row of drive transistors.
  • the pixels driven by each of the scanning lines are arranged into line segments, and the line segments are parallel to each other.
  • the pixels at both ends of each of the line segments are respectively located on the edge of one side of the first display area, or are located respectively.
  • the edges of one side of the second display area, the pixels in the same row driven by two adjacent scanning lines in the scanning lines on both sides of the diagonal line are equally spaced; each output port of the control electrode driving chip controls Two scan lines.
  • each output port is configured to control a pair of scan lines, and each pair of scan lines includes: a second scan line, the driven pixels are located in the first display area; a third scan line, the driven The pixels are located in the second display area.
  • the number of pixels driven by two scanning lines in each pair of scanning lines is the same.
  • the amplifier circuit includes an operational amplifier.
  • a plurality of control pole control chips are further included; one control pole control chip is respectively connected to one scan line and one output port of the control pole drive chip; and the control pole control chip receives the The control electrode drives the driving signals of the chip to control the corresponding pixels.
  • the number of scan lines in the first display area and the number of scan lines in the second display area are the same.
  • the gate driving chip is a gate driving chip.
  • a display panel includes: a display area including a driving transistor array substrate and a plurality of scanning lines, each of which is connected to at least one driving transistor to control pixels driven by the driving transistors, and the display area is based on A diagonal line of the driving transistor array substrate is divided into a first display area and a second display area, and pixels driven by each of the scanning lines are arranged into line segments, and all of these line segments are parallel to each other, and pixels at each end of each of the line segments Located respectively on the edge of one side of the first display area or on the edge of one side of the second display area; and a gate drive chip including a plurality of signals for enhancing signals output from the output port to the scanning line Amplifying circuit with driving capability, each output port of the gate driving chip is configured to control two scanning lines, and the output port with the number of pixels controlled greater than a first preset value is connected to the scanning line through one of the amplifying circuits. The output port with the number of pixels less than or equal to the first preset value is not connected to the scanning line
  • a display device includes: a display control circuit; and a display panel connected to the display panel to control the display panel.
  • the display panel includes a display area including a driving transistor array substrate. And a plurality of scanning lines, each of which is connected to at least one driving transistor, and the display area is divided into a first display area and a second display area according to a diagonal line of the driving transistor array substrate;
  • the chip includes a plurality of amplifying circuits.
  • the control electrode driving chip is connected to a scanning line through an output port. Each of the output ports is configured to control at least one scanning line.
  • the output port whose number of pixels is greater than a first preset value passes through An amplifying circuit is connected to the scanning line, and an output port whose number of pixels is less than or equal to a first preset value is not connected to the scanning line through the amplifying circuit.
  • each output port of a control electrode driving chip (such as a gate driving chip) is used to control at least one scanning line, and when the number of pixels controlled by the scanning line is greater than a first preset value, the control electrode
  • the output port of the driving chip is connected to the scanning line through an amplifying circuit.
  • FIG. 1 is a structural block diagram of a display panel in an embodiment
  • FIG. 2 is a structural block diagram of a display panel in another embodiment
  • FIG. 3 is a structural block diagram of a display device in an embodiment.
  • the display panel 10 includes a display area 100 and a margin area 200.
  • the edge region 200 surrounds the outside of the display region 100.
  • the display area 100 includes a driving transistor array substrate and a plurality of scanning lines. Each scan line is connected to a control electrode of at least one driving transistor to control pixels driven by the driving transistors, and each scanning line is connected to a driving transistor different from other scanning lines. In one embodiment, the control electrode drives the gate of the transistor.
  • the display area 100 is divided into a first display area and a second display area according to the first scan line.
  • the pixels driven by the start and end points of the first scanning line are pixels that intersect at the diagonal of the driving transistor array substrate and the edges of the driving transistor array substrate, and the first scanning line is connected to the gate of one driving transistor in each row of driving transistors. Pixels in the same row driven by two adjacent scanning lines in the remaining scanning lines are equally spaced.
  • the first scan line is a scan line that drives pixels on a diagonal line of the driving transistor array substrate.
  • the driving transistor array substrate in the display area 100 is divided into a first display area 101 and a second display area 103 according to a diagonal line 105.
  • the pixels driven by each scanning line are arranged in line segments, and these line segments are all parallel.
  • the pixels at the two ends of each line segment are respectively located on the edge of one side of the first display area 101 or on the edge of one side of the second display area 103.
  • the display panel 10 further includes a gate driving chip.
  • the gate driving chip is a gate driving chip (not shown).
  • the gate driving chip is connected to each scanning line in the display area 100 through an output port, controls the scanning line by outputting a driving control signal, and controls the pixels driven by the driving transistor through the scanning line.
  • the gate driving chip includes an amplifying circuit for enhancing a driving capability of a signal output from an output port to a scanning line.
  • Each output port of the gate drive chip is used to control at least one scan line.
  • the output port whose number of pixels is greater than the first preset value is connected to the scan line through an amplifier circuit, and the number of pixels controlled is less than or equal to the first preset value.
  • the output port is not connected to the scan line through the amplifier circuit.
  • each output port of the gate driving chip is used to control two scan lines.
  • the first preset value is a value set according to the actual situation. For example, when the number of pixels driven by the scanning line is greater than the first preset value, if there is no amplifier circuit in the circuit connected to the scanning line of the gate driving chip, the driving capability of the gate driving chip is insufficient to open or fully open the scanning. line. When the number of pixels driven by the scanning line is less than or equal to the first preset value, the circuit connected to the gate driving chip and the scanning line does not need to be connected to an amplification circuit to enhance the driving ability of the signal of the scanning line. The scan line is fully open.
  • the amplifying circuit includes an operational amplifier. When the number of pixels driven by the scanning line is greater than the first preset value, the output port of the gate driving chip is connected to the scanning line through an operational amplifier to enhance the driving capability of the signal output from the output port to the scanning line.
  • each output port of the gate driving chip is used to control two scanning lines, and when the number of pixels controlled by the scanning line is greater than a first preset value, the output port of the gate driving chip is connected through an amplifying circuit.
  • the scan line When the number of pixels controlled by the scanning line is less than or equal to the first preset value, the output port of the gate driving chip does not need to be connected to the scanning line through an amplifying circuit. Therefore, compared to the scanning line of the exemplary technology, each scanning line is connected laterally. Compared with the display panel of which the output port of the gate driving chip is connected to the scanning line through an amplifying circuit, the number of amplifying circuits in the gate driving chip is reduced, thereby reducing the manufacturing cost of the display panel. At the same time, in the display panel 10, the output port in the gate driving chip does not need to be driven by the scanning line connected to the amplifier circuit to open a small number of pixels, so the pixel charging time is sufficient, and the screen display effect is good.
  • each output port of the gate driving chip is used to control a pair of scan lines.
  • Each pair of scan lines includes a scan line located in the first display area 101 and a scan line located in the second display area 103.
  • the number of pixels driven by the two scan lines of each pair of scan lines is the same. Therefore, compared with the scan lines of the exemplary technology, the output port of the gate drive chip connected to each scan line is connected to the display panel of the scan line through an amplifying circuit, which reduces the number of amplifier circuits in the gate drive chip. As a result, the manufacturing cost of the display panel 10 is reduced.
  • the number of scan lines in the first display area 101 and the second display area 103 is the same.
  • the number of pixels driven by each scanning line in the display area 101 and the display area 103 gradually decreases in a direction away from the diagonal line 105.
  • each scanning line in the first display area 101 and the second display area 103 are arranged in line segments, and all of these line segments are parallel.
  • the pixels at both ends of each line segment are respectively located on the edge of one side of the first display area 101 or on the edge of one side of the second display area 103.
  • Each scan line in the first display area 101 and the second display area 103 is parallel to the diagonal line 105.
  • each scan line in the display area 100 is connected to a gate control chip, respectively.
  • the first display area 101 includes gate control chips G00-G0767.
  • Each gate control chip in the first display area 101 is also connected to a gate driving chip to obtain a driving signal from the gate driving chip, so as to control the opening and closing of the driving transistor connected to the corresponding scanning line.
  • the second display area 103 includes gate control chips G0-G767.
  • Each gate control chip in the second display area 103 is respectively connected to a gate driving chip to obtain a driving signal from the gate driving chip, so as to control the opening and closing of the driving transistor connected to the corresponding scanning line.
  • the scan lines in the display area 100 are parallel to the diagonal line 105. Starting from the scan line connected to the gate control chip G0 and the gate control chip G00, to the scan line connected to the gate control chip G767 and the gate control chip G0767 (the scan line connected to the gate control chip G767 drives 1366 pixels , Ie, 4098 subpixels).
  • the scan line connected to the gate control chip G0 and the gate control chip G00 only needs to turn on one sub-pixel, so there is no need to worry about the voltage distortion of the turn-on.
  • the scan line connected to the 384th gate control chip G384 and the gate control chip G0384 there is no need to worry about the insufficient charging time caused by the distortion of the waveform and the drive transistor is not fully turned on. That is, the scan lines connected to the gate control chips G0-G384 and the gate control chips G00-G0384 do not need to add an operational amplifier to improve the gate driving chip's ability to drive the scan line signals.
  • the scan lines connected to the gate control chip G385-G767 and the gate control chip G0385-G0767 both need to add an operational amplifier to the gate drive chip to improve the gate drive chip's ability to drive the scan line signals.
  • the gate control chips G0 to G767 and the gate control chips G00 to G0767 are connected to the same gate driving chip and controlled by the same gate driving chip.
  • the scanning lines with the same number of pixels are connected to the same output port of the gate driving chip through the corresponding gate control chip. When the number of pixels controlled on the scanning line reaches a certain value, the output port of the gate drive chip is connected to the corresponding gate control chip through an operational amplifier.
  • the output port of the gate driving chip is separately connected to the scanning lines on the diagonal line 105 through an operational amplifier. That is, in this embodiment, there are no operational amplifiers on the ports in the gate driving chip that are respectively connected to the gate control chips G0 (G00) to G384 (G0384).
  • the output ports connected to the gate driving chip and the gate control chips G385 (G0385) to G768 (G0767) are respectively connected with operational amplifiers to drive the pixels on the corresponding scanning lines to turn on.
  • the display panel can save half of the operational amplifier, thereby reducing the manufacturing cost of the display panel.
  • the pixels driven by the scanning lines controlled by the gate control chip G0 up to the scanning lines controlled by the gate control chip G384 are pixels in the area A.
  • the pixels driven by the scanning lines controlled by the gate control chip G385 until the scanning lines controlled by the gate control chip G768 correspond to the pixels in the area B.
  • the pixels driven by the scanning lines controlled by the gate control chip G00 until the scanning lines controlled by the gate control chip G0384 correspond to pixels in the region D.
  • the pixels driven by the scanning lines controlled by the gate control chip G0385 up to the scanning lines controlled by the gate control chip G0767 are the pixels in the area C. In area A and area D, the number of pixels connected to each scanning line is small.
  • the output port of the gate driving chip corresponding to each scanning line needs to increase the driving capability of the signals corresponding to the scanning line by adding an operational amplifier.
  • the scanning lines connected to each output port drive fewer total pixels, so the charging effect is better.
  • the screen display effect of the area C and the area D will be better.
  • the display device includes a display panel 10 and a display control circuit 20.
  • the display panel 10 is a display panel according to any one of the above embodiments.
  • the display panel 10 includes a display area 100 and a driving control chip 300.
  • the driving control chip 300 is connected to the display area 100 to control the display of the display area 100.
  • the display control circuit 20 is connected to a drive control chip 300 in the display panel 10.
  • the display control circuit 20 controls the display of the display area 100 by driving the control chip 300.
  • the display device may be any type of display device, such as an LCD (Liquid Crystal Display), an OLED (Organic Electroluminesence Display) display device, a QLED (Quantum Dot Light Emitting Diodes, Quantum dot light emitting diode) display device, curved display device, and the like.
  • LCD Liquid Crystal Display
  • OLED Organic Electroluminesence Display
  • QLED Quantum Dot Light Emitting Diodes, Quantum dot light emitting diode
  • curved display device and the like.

Abstract

一种显示面板（10），包括显示区（100）和控制极驱动芯片，显示区（100）包括驱动晶体管阵列基板和多条扫描线；每条扫描线至少与一个驱动晶体管连接；控制极驱动芯片通过输出口与扫描线连接；显示区（100）根据驱动晶体管阵列基板的一条对角线（105）划分为第一显示区（101）和第二显示区（103）；控制极驱动芯片包括多个放大电路，控制极驱动芯片的每个输出口用于控制至少一条扫描线，控制的像素数大于第一预设值的输出口通过一放大电路连接扫描线。

Description

显示装置及其显示面板 技术领域
本申请涉及显示技术领域，特别是涉及一种显示装置及其显示面板。
背景技术
TFT-LCD(Thin Film Transistor Liquid Crystal Display，薄膜晶体管液晶显示器)是当前平板显示的主要品种之一。TFT-LCD已经成为了现代IT、视讯产品中重要的显示平台。目前，TFT-LCD中使用的扫描驱动电路的驱动方式为逐行扫描。为了避免扫描线没有打开或没有完全打开导致的充电时间不够，通常在扫描驱动电路中的每一个输出口增加一个运算放大器以此来增加驱动能力。例如768条扫描线(对应1024*768的显示面板)就需要768个运算放大器。因此对制造成本会造成很大的影响。
申请内容
根据本申请的各实施例，提供一种显示装置及其显示面板。
一种显示面板，包括：显示区，包括驱动晶体管阵列基板和多条扫描线，每条所述扫描线至少与一个驱动晶体管连接以对这些驱动晶体管各自驱动的像素进行控制，所述显示区根据所述驱动晶体管阵列基板的一条对角线划分为第一显示区和第二显示区；以及控制极驱动芯片，包括多个放大电路，所述控制极驱动芯片通过输出口与扫描线连接，每个所述输出口设置为控制至少一条扫描线，控制的像素数大于第一预设值的输出口通过一所述放大电路连接所述扫描线，控制的像素数小于或等于第一预设值的输出口不通过所述放大电路连接扫描线。
在其中一个实施例中，所述多条扫描线包括一条位于所述对角线上的第 一扫描线，设置为驱动所述驱动晶体管阵列基板对角线上的像素；所述对角线的两端与所述驱动晶体管阵列基板的边缘相交，相交处的像素为所述第一扫描线的起点驱动的像素，和所述第一扫描线的终点驱动的像素，并且所述第一扫描线与每行驱动晶体管中一个驱动晶体管的控制极连接。
在其中一个实施例中，每条所述扫描线驱动的像素排列成线段，且这些线段相互平行，各所述线段两端的像素分别位于所述第一显示区的一条边的边缘、或分别位于所述第二显示区的一条边的边缘，所述对角线两侧的扫描线中相邻两条扫描线驱动的同一行的像素间隔相等；所述控制极驱动芯片的每个输出口控制两条扫描线。
在其中一个实施例中，每个输出口设置为控制一对扫描线，每对扫描线包括：一第二扫描线，驱动的像素位于所述第一显示区；一第三扫描线，驱动的像素位于所述第二显示区。
在其中一个实施例中，每对扫描线中的两条扫描线驱动的像素数量相同。
在其中一个实施例中，所述放大电路包括运算放大器。
在其中一个实施例中，还包括多个控制极控制芯片；一个所述控制极控制芯片分别与一条扫描线以及一个所述控制极驱动芯片的输出口连接；所述控制极控制芯片接收所述控制极驱动芯片的驱动信号，以控制对应的像素。
在其中一个实施例中，所述第一显示区中的扫描线和所述第二显示区中的扫描线数量相同。
在其中一个实施例中，所述控制极驱动芯片是栅极驱动芯片。
一种显示面板，包括：显示区，包括驱动晶体管阵列基板和多条扫描线，每条所述扫描线至少与一个驱动晶体管连接以对这些驱动晶体管各自驱动的像素进行控制，所述显示区根据所述驱动晶体管阵列基板的一条对角线划分为第一显示区和第二显示区，每条所述扫描线驱动的像素排列成线段，且这些线段全部相互平行，各所述线段两端的像素分别位于所述第一显示区的一条边的边缘，或分别位于所述第二显示区的一条边的边缘；以及栅极驱动芯片，包括多个增强所述输出口输出给扫描线的信号的驱动能力的放大电路， 所述栅极驱动芯片的每个输出口设置为控制两条扫描线，控制的像素数大于第一预设值的输出口通过一所述放大电路连接扫描线，控制的像素数小于或等于第一预设值的输出口不通过所述放大电路连接扫描线。
一种显示装置，包括：显示控制电路；以及显示面板，所述显示控制电路与所述显示面板连接，以对所述显示面板进行控制，所述显示面板包括：显示区，包括驱动晶体管阵列基板和多条扫描线，每条所述扫描线至少与一个驱动晶体管连接，所述显示区根据所述驱动晶体管阵列基板的一条对角线划分为第一显示区和第二显示区；控制极驱动芯片，包括多个放大电路，所述控制极驱动芯片通过输出口与扫描线连接，每个所述输出口设置为控制至少一条扫描线，控制的像素数大于第一预设值的输出口通过一所述放大电路连接所述扫描线，控制的像素数小于或等于第一预设值的输出口不通过所述放大电路连接扫描线。
上述显示装置及其显示面板，控制极驱动芯片(例如栅极驱动芯片)的每个输出口用于控制至少一条扫描线，并且在扫描线控制的像素数大于第一预设值时，控制极驱动芯片的输出口通过一个放大电路连接该扫描线。相对于示例性技术的扫描线横向设置且每条扫描线连接的控制极驱动芯片的输出口均通过一个放大电路连接扫描线的显示面板相比，减少了控制极驱动芯片中的放大电路的数量，降低显示面板的制造成本。
附图说明
图1为一实施例中的显示面板的结构框图；
图2为另一实施例中的显示面板的结构框图；
图3为一实施例中的显示装置的结构框图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施 例仅仅用以解释本申请，并不用于限定本申请。
如图1所示。显示面板10包括显示区100和边缘区200。边缘区200围绕在显示区100的外部。显示区100内包括驱动晶体管阵列基板和多条扫描线。每条扫描线各自与至少一个驱动晶体管的控制极连接以对这些驱动晶体管各自驱动的像素进行控制，且每条扫描线连接的是与其他扫描线不同的驱动晶体管。在一个实施例中，控制极为驱动晶体管的栅极。显示区100根据第一扫描线划分为第一显示区和第二显示区。第一扫描线的起点和终点驱动的像素分别为驱动晶体管阵列基板对角线与驱动晶体管阵列基板边缘处相交的像素，并且第一扫描线与每行驱动晶体管中一个驱动晶体管的栅极连接。其余扫描线中相邻两条扫描线驱动的同一行的像素间隔相等。在本实施例中，第一扫描线为驱动驱动晶体管阵列基板对角线上的像素的扫描线。在本实施例中，显示区100内的驱动晶体管阵列基板根据对角线105划分为第一显示区101和第二显示区103。每条扫描线驱动的像素排列成线段，且这些线段全部平行。各线段两端的像素分别位于第一显示区101的一条边的边缘，或分别位于第二显示区103的一条边的边缘。
显示面板10还包括控制极驱动芯片。在一个实施例中，控制极驱动芯片即为栅极驱动芯片(图未示)。栅极驱动芯片通过输出口与显示区100内的各条扫描线连接，以输出驱动控制信号对扫描线进行控制，并通过扫描线对驱动晶体管驱动的像素进行控制。栅极驱动芯片包括用于增强输出口输出给扫描线的信号的驱动能力的放大电路。栅极驱动芯片的每个输出口至少用于控制一条扫描线，控制的像素数大于第一预设值的输出口通过一放大电路连接扫描线，控制的像素数小于或等于第一预设值的输出口不通过放大电路连接扫描线。在本实施例中，栅极驱动芯片的每个输出口用于控制两条扫描线。第一预设值为根据实际情况设定的数值。例如，当扫描线驱动的像素数大于第一预设值时，如若栅极驱动芯片与该扫描线连接的电路中无放大电路，将导致栅极驱动芯片驱动能力不足以打开或完全打开该扫描线。当扫描线驱动的像素数小于或者等于第一预设值时，栅极驱动芯片与该扫描线连接的电路 中无需接入放大电路来增强对扫描线的信号的驱动能力，就能实现将该扫描线完全打开。放大电路包括运算放大器。当扫描线驱动的像素数大于第一预设值时，栅极驱动芯片的输出口通过运算放大器与扫描线连接，以增强输出口输出给扫描线的信号的驱动能力。
上述显示面板10，栅极驱动芯片的每个输出口用于控制两条扫描线，并且在扫描线控制的像素数大于第一预设值时，栅极驱动芯片的输出口通过一个放大电路连接该扫描线。在扫描线控制的像素数小于或等于第一预设值时，栅极驱动芯片的输出口无需通过放大电路连接扫描线，因此，相对于示例性技术的扫描线横向设置且每条扫描线连接的栅极驱动芯片的输出口均通过一个放大电路连接扫描线的显示面板相比，减少了栅极驱动芯片中的放大电路的数量，从而降低显示面板的制造成本。同时，显示面板10中，栅极驱动芯片中输出口无需通过放大电路连接的扫描线驱动打开的像素数少，因此像素充电的时间很足，画面的显示效果好。
在一实施例中，栅极驱动芯片的每个输出口用于控制一对扫描线。每对扫描线包括一条位于第一显示区101的扫描线和一条位于第二显示区103的扫描线。每对扫描线的两条扫描线驱动的像素数量相同。因此，相对于示例性技术的扫描线横向设置且每条扫描线连接的栅极驱动芯片的输出口均通过一个放大电路连接扫描线的显示面板，减少了栅极驱动芯片内放大电路的数量，从而降低了显示面板10的制造成本。
在本实施例中，第一显示区101和第二显示区103中的扫描线数量相同。显示区101和显示区103内各扫描线驱动的像素数沿远离对角线105的方向逐渐减少。
在一实施例中，如图2所示，第一显示区101中的扫描线为768条。第二显示区103中的扫描线为768条，(第一显示区101和第二显示区103均不包括对角线105)。显示区100还包括对角线105上的扫描线。第一显示区101和第二显示区103中每条扫描线驱动的像素排列成线段，且这些线段全部平行。各线段两端的像素分别位于第一显示区101的一条边的边缘，或分别位于第二显示区 103的一条边的边缘。第一显示区101中以及第二显示区103中的每条扫描线均平行于对角线105。并且，从远离对角线105的一端沿靠近对角线105的方向上，第一显示区101和第二显示区103中每条扫描线驱动的像素数逐渐增加。显示区100中的每条扫描线分别与一个栅极控制芯片连接。如图2所示，第一显示区101包括栅极控制芯片G00-G0767。第一显示区101中的每个栅极控制芯片还分别与栅极驱动芯片连接，以从栅极驱动芯片中获取驱动信号，从而控制对应的扫描线连接的驱动晶体管的开启与闭合。第二显示区103包括栅极控制芯片G0-G767。第二显示区103中的每个栅极控制芯片分别与栅极驱动芯片连接，以从栅极驱动芯片中获取驱动信号，从而控制对应的扫描线连接的驱动晶体管的开启与闭合。与示例性技术的扫描线横向设置不同，显示区100内的扫描线平行于对角线105布线。从栅极控制芯片G0和栅极控制芯片G00连接的扫描线开始，一直到栅极控制芯片G767和栅极控制芯片G0767连接的扫描线为止(栅极控制芯片G767连接的扫描线驱动1366个像素，即4098个子像素)。栅极控制芯片G0和栅极控制芯片G00连接的扫描线只需要打开1个子像素，因此不用担心打开的电压失真问题。以此类推，直到第384个栅极控制芯片G384和栅极控制芯片G0384连接的扫描线为止，均不需要担心由于波形的失真导致驱动晶体管没有完全打开导致的充电时间不够的问题。也即是，栅极控制芯片G0-G384以及栅极控制芯片G00-G0384连接的扫描线均不需要增加运算放大器来提高栅极驱动芯片对扫描线的信号的驱动能力。栅极控制芯片G385-G767以及栅极控制芯片G0385-G0767连接的扫描线均需要栅极驱动芯片内增加运算放大器来提高栅极驱动芯片对扫描线的信号的驱动能力。在本实施例中，栅极控制芯片G0～G767以及栅极控制芯片G00～G0767均与同一个栅极驱动芯片连接，由同一个栅极驱动芯片控制。其中，控制的像素数相同的扫描线通过对应的栅极控制芯片与栅极驱动芯片的同一个输出口连接。当扫描线上控制的像素数达到一定数值时，栅极驱动芯片的输出口通过运算放大器与对应的栅极控制芯片连接。在本实施例中，栅极驱动芯片的输出口通过运算放大器单独与对角线105上的扫描线连接。也即对应于本实施例中，栅 极驱动芯片内分别与栅极控制芯片G0(G00)～G384(G0384)连接的端口上无运算放大器。栅极驱动芯片与栅极控制芯片G385(G0385)～G768(G0767)连接的输出口上分别连接有运算放大器，以驱动对应扫描线上的像素的开启。与示例性技术的扫描线横向设置的显示面板相比，该显示面板可以节省一半的运算放大器，从而降低显示面板的制造成本。
在本实施例中，如图2所示，栅极控制芯片G0控制的扫描线直至栅极控制芯片G384控制的扫描线对应驱动的像素为区域A内的像素。栅极控制芯片G385控制的扫描线直至栅极控制芯片G768控制的扫描线对应驱动的像素为区域B内的像素。栅极控制芯片G00控制的扫描线直至栅极控制芯片G0384控制的扫描线对应驱动的像素为区域D内的像素。栅极控制芯片G0385控制的扫描线直至栅极控制芯片G0767控制的扫描线对应驱动的像素为区域C内的像素。区域A和区域D中，每条扫描线连接的像素数少，栅极驱动芯片中无需增加运算放大器来增强对对应扫描线的信号的驱动能力，对应扫描线上的像素打开的时间充足，对应区域的画面显示效果好。区域B和区域C中，每条扫描线对应的栅极驱动芯片的输出口，需要通过增加运算放大器来增强对对应扫描线的信号的驱动能力。与传统的扫描线横向设置且栅极驱动芯片通过运算放大器连接的输出口连接两条扫描线的显示面板相比，每个输出口连接的扫描线驱动的总的像素数少，因此充电效果好，进而区域C和区域D的画面显示效果也会比较好。
本申请还提供一种显示装置。如图3所示，该显示装置包括显示面板10和显示控制电路20。显示面板10为如上述任一实施例所述的显示面板。显示面板10包括显示区100和驱动控制芯片300。驱动控制芯片300与显示区100连接，以对显示区100的显示进行控制。显示控制电路20与显示面板10内的驱动控制芯片300连接。显示控制电路20通过驱动控制芯片300对显示区100的显示进行控制。
在其他实施方式中，显示装置可以为任意类型的显示装置，例如LCD(Liquid Crystal Display，液晶显示装置)、OLED(Organic Electroluminesence  Display，有机电激光显示)显示装置、QLED(Quantum Dot Light Emitting Diodes，量子点发光二极管)显示装置或曲面显示装置等。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示面板，包括：
    显示区，包括驱动晶体管阵列基板和多条扫描线，每条所述扫描线至少与一个驱动晶体管连接以对这些驱动晶体管各自驱动的像素进行控制，所述显示区根据所述驱动晶体管阵列基板的一条对角线划分为第一显示区和第二显示区；以及
    控制极驱动芯片，包括多个放大电路，所述控制极驱动芯片通过输出口与扫描线连接，每个所述输出口设置为控制至少一条扫描线，控制的像素数大于第一预设值的输出口通过一所述放大电路连接所述扫描线，控制的像素数小于或等于第一预设值的输出口不通过所述放大电路连接扫描线。
  2. 根据权利要求1所述的显示面板，其中，所述多条扫描线包括一条位于所述对角线上的第一扫描线，设置为驱动所述驱动晶体管阵列基板对角线上的像素；所述对角线的两端与所述驱动晶体管阵列基板的边缘相交，相交处的像素为所述第一扫描线的起点驱动的像素，和所述第一扫描线的终点驱动的像素，并且所述第一扫描线与每行驱动晶体管中一个驱动晶体管的控制极连接。
  3. 根据权利要求1所述的显示面板，其中，每条所述扫描线驱动的像素排列成线段，且这些线段相互平行，各所述线段两端的像素分别位于所述第一显示区的一条边的边缘、或分别位于所述第二显示区的一条边的边缘，所述对角线两侧的扫描线中相邻两条扫描线驱动的同一行的像素间隔相等；
    所述控制极驱动芯片的每个输出口控制两条扫描线。
  4. 根据权利要求3所述的显示面板，其中，每个输出口设置为控制一对扫描线，每对扫描线包括：
    一第二扫描线，驱动的像素位于所述第一显示区；
    一第三扫描线，驱动的像素位于所述第二显示区。
  5. 根据权利要求4所述的显示面板，其中，每对扫描线中的两条扫描线 驱动的像素数量相同。
  6. 根据权利要求1所述的显示面板，其中，所述放大电路包括运算放大器。
  7. 根据权利要求1所述的显示面板，其中，还包括多个控制极控制芯片；一个所述控制极控制芯片分别与一条扫描线以及一个所述控制极驱动芯片的输出口连接；所述控制极控制芯片接收所述控制极驱动芯片的驱动信号，以控制对应的像素。
  8. 根据权利要求3所述的显示面板，其中，所述第一显示区中的扫描线和所述第二显示区中的扫描线数量相同。
  9. 根据权利要求1所述的显示面板，其中，所述控制极驱动芯片是栅极驱动芯片。
  10. 一种显示面板，包括：
    显示区，包括驱动晶体管阵列基板和多条扫描线，每条所述扫描线至少与一个驱动晶体管连接以对这些驱动晶体管各自驱动的像素进行控制，所述显示区根据所述驱动晶体管阵列基板的一条对角线划分为第一显示区和第二显示区，每条所述扫描线驱动的像素排列成线段，且这些线段全部相互平行，各所述线段两端的像素分别位于所述第一显示区的一条边的边缘，或分别位于所述第二显示区的一条边的边缘；以及
    栅极驱动芯片，包括多个增强所述输出口输出给扫描线的信号的驱动能力的放大电路，所述栅极驱动芯片的每个输出口设置为控制两条扫描线，控制的像素数大于第一预设值的输出口通过一所述放大电路连接扫描线，控制的像素数小于或等于第一预设值的输出口不通过所述放大电路连接扫描线。
  11. 一种显示装置，包括：
    显示控制电路；以及
    显示面板，所述显示控制电路与所述显示面板连接，以对所述显示面板进行控制，所述显示面板包括：
    显示区，包括驱动晶体管阵列基板和多条扫描线，每条所述扫描线至少 与一个驱动晶体管连接，所述显示区根据所述驱动晶体管阵列基板的一条对角线划分为第一显示区和第二显示区；
    控制极驱动芯片，包括多个放大电路，所述控制极驱动芯片通过输出口与扫描线连接，每个所述输出口设置为控制至少一条扫描线，控制的像素数大于第一预设值的输出口通过一所述放大电路连接所述扫描线，控制的像素数小于或等于第一预设值的输出口不通过所述放大电路连接扫描线。
  12. 根据权利要求11所述的显示装置，其特征在于，所述显示控制电路与所述显示面板中的控制极驱动芯片连接；所述显示控制电路通过所述控制极驱动芯片控制所述显示面板中的扫描线的开启与闭合。
  13. 根据权利要求11所述的显示装置，其中，所述多条扫描线包括一条位于所述对角线上的第一扫描线，用于驱动所述驱动晶体管阵列基板对角线上的像素；所述对角线的两端与所述驱动晶体管阵列基板的边缘相交，相交处的像素为所述第一扫描线的起点驱动的像素，和所述第一扫描线的终点驱动的像素，并且所述第一扫描线与每行驱动晶体管中一个驱动晶体管的控制极连接。
  14. 根据权利要求11所述的显示装置，其中，每条所述扫描线驱动的像素排列成线段，且这些线段相互平行，各所述线段两端的像素各位于所述第一显示区的一条边的边缘、或各位于所述第二显示区的一条边的边缘，所述对角线两侧的扫描线中相邻两条扫描线驱动的同一行的像素间隔相等；
    所述控制极驱动芯片的每个输出口设置为控制两条扫描线。
  15. 根据权利要求14所述的显示装置，其中，每个输出口设置为控制一对扫描线，每对扫描线包括：
    一第二扫描线，驱动的像素位于所述第一显示区；
    一第三扫描线，驱动的像素位于所述第二显示区。
  16. 根据权利要求15所述的显示装置，其中，每对扫描线中的两条扫描线驱动的像素数量相同。
  17. 根据权利要求11所述的显示装置，其中，所述放大电路包括运算放 大器。
  18. 根据权利要求11所述的显示装置，其中，还包括多个控制极控制芯片；一个所述控制极控制芯片分别与一条扫描线以及一个所述控制极驱动芯片的输出口连接；所述控制极控制芯片接收所述控制极驱动芯片的驱动信号，以控制对应的像素。
  19. 根据权利要求14所述的显示装置，其中，所述第一显示区中的扫描线和所述第二显示区中的扫描线数量相同。
  20. 根据权利要求11所述的显示装置，其中，所述控制极驱动芯片是栅极驱动芯片。
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