WO2020015443A1 - 透明显示面板及显示装置 - Google Patents

透明显示面板及显示装置 Download PDF

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Publication number
WO2020015443A1
WO2020015443A1 PCT/CN2019/086918 CN2019086918W WO2020015443A1 WO 2020015443 A1 WO2020015443 A1 WO 2020015443A1 CN 2019086918 W CN2019086918 W CN 2019086918W WO 2020015443 A1 WO2020015443 A1 WO 2020015443A1
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Prior art keywords
layer
transparent
display panel
transparent display
sub
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PCT/CN2019/086918
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English (en)
French (fr)
Inventor
邹清华
朱儒晖
段廷原
王凤丽
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京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to US16/620,948 priority Critical patent/US11404488B2/en
Publication of WO2020015443A1 publication Critical patent/WO2020015443A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/818—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/351—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels comprising more than three subpixels, e.g. red-green-blue-white [RGBW]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/876—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/878—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80524—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a transparent display panel and a display device.
  • OLED display panels have attracted widespread attention due to their advantages such as self-emission, no backlight, thin thickness, wide viewing angle, and fast response speed.
  • the existing OLED transparent display panel includes: multiple sub-pixels. Each sub-pixel includes an electroluminescent structure and a pixel circuit for driving the electroluminescent structure to emit light.
  • a general electroluminescent structure includes a transparent anode layer, an electroluminescent layer, and a transparent cathode layer which are arranged in a stack. Therefore, the area where the electroluminescent structure is located is the transparent light emitting area of the OLED transparent display panel.
  • the area where the pixel circuit is located is generally set as a non-transparent area, which causes the pixel aperture ratio on one side of the OLED transparent display panel to decrease.
  • An embodiment of the present disclosure provides a transparent display panel, including:
  • a pixel circuit located in each of the sub-pixels
  • An electroluminescence structure which is located in each of the sub-pixels and is stacked with the pixel circuit; the light-emitting area of the electroluminescence structure includes a transparent area and an overlapping area, and the overlapping area An area where the orthographic projection of the light emitting area and the area where the pixel circuit is located on the base substrate overlap each other.
  • the transparent display panel further includes: a reflective layer located in each of the sub-pixels;
  • the electroluminescence structure includes an anode layer, an electroluminescence layer, and a transparent cathode layer which are arranged in a stack;
  • the reflective layer is located between a layer where the pixel circuit is located and the electroluminescent layer;
  • the orthographic projection of the reflective layer on the base substrate covers the overlapping area.
  • the anode layer is a transparent anode layer provided on the entire surface of the light emitting area
  • the reflective layer is located between the transparent anode layer and a layer where the pixel circuit is located, and is disposed in a floating state.
  • the anode layer is a transparent anode layer provided on the entire surface of the light emitting region; the reflective layer is electrically connected to the anode layer.
  • the reflective layer is located between the anode layer and a layer where the pixel circuit is located.
  • the transparent display panel further includes: a first insulating layer located between the reflective layer and a layer where the pixel circuit is located, and the reflective layer and the anode. A second insulating layer between the layers;
  • the anode layer is electrically connected to the reflective layer through a first via hole penetrating the second insulating layer.
  • the reflective layer is disposed in direct contact with the anode layer.
  • the reflective layer is located between the anode layer and the electroluminescent layer.
  • the anode layer includes: a first sub-transparent anode layer and a second sub-transparent anode layer provided in a stack;
  • the reflective layer is located between the first sub-transparent anode layer and the second sub-transparent anode layer.
  • the anode layer is a transparent anode layer provided only in the transparent region; the reflective layer is electrically connected to the transparent anode layer and serves as a reflective anode layer.
  • the reflective layer is electrically connected to the transparent cathode layer.
  • the reflective layer is located between the anode layer and a layer where the pixel circuit is located;
  • the transparent display panel further includes a first insulating layer located between the reflective layer and a layer where the pixel circuit is located, a second insulating layer located between a layer where the reflective layer is located and the anode layer, and A pixel defining layer in each of the sub-pixels;
  • the transparent cathode layer is electrically connected to the reflective layer through a second via hole penetrating the pixel defining layer and the second insulating layer.
  • the orthographic projection of the reflective layer on the base substrate overlaps the overlap region.
  • the material of the reflective layer includes one or a combination of Al, Ag, and Mo.
  • the orthographic projection of the light-emitting area of the electroluminescent structure on the base substrate covers the area where the pixel circuit is located on the base substrate. Orthographic projection.
  • the emission colors of the electroluminescent layers in all the sub-pixels include one of the following:
  • the transparent display panel further includes: a packaging structure covering the pixel circuit and the electroluminescent structure;
  • the packaging structure includes one of the following:
  • an embodiment of the present disclosure further provides a display device including a transparent display panel provided by an embodiment of the present disclosure.
  • FIG. 1a is a schematic plan view of an OLED transparent display panel in the related art
  • FIG. 1b is a schematic cross-sectional structure diagram of the OLED transparent display panel shown in FIG. 1a;
  • FIG. 2a is a schematic plan view of a transparent display panel according to an embodiment of the present disclosure
  • FIG. 2b is a schematic partial cross-sectional structure diagram of a transparent display panel provided by an embodiment of the present disclosure
  • 3a is a schematic partial cross-sectional structure diagram of a transparent display panel according to an embodiment of the present disclosure
  • 3b is a schematic partial cross-sectional structure diagram of a transparent display panel provided by an embodiment of the present disclosure
  • 3c is a schematic partial cross-sectional structure diagram of a transparent display panel according to an embodiment of the present disclosure
  • 3d is a schematic partial cross-sectional structure diagram of a transparent display panel according to an embodiment of the present disclosure
  • 3e is a schematic partial cross-sectional structure diagram of a transparent display panel according to an embodiment of the present disclosure
  • 3f is a schematic partial cross-sectional structure diagram of a transparent display panel according to an embodiment of the present disclosure.
  • FIG. 3g is a schematic partial cross-sectional structure diagram of a transparent display panel according to an embodiment of the present disclosure.
  • the OLED transparent display panel may generally include a plurality of pixel units, and each pixel unit may include a plurality of sub-pixels PX.
  • Each sub-pixel PX may include an electroluminescent structure 110 and a pixel circuit 120 for driving the electroluminescent structure 110 to emit light.
  • the general electroluminescent structure 110 includes a transparent anode layer 114, an electroluminescent layer 112, and a transparent cathode layer 113 which are arranged in a stack. Therefore, the area where the electroluminescent structure 110 is located is the transparent area of the OLED transparent display panel.
  • the area where the pixel circuit 120 is located is generally set as a non-transparent area.
  • the electroluminescent structure 110 and the pixel circuit 120 are disposed on the substrate 100 in a stacked manner. Due to the limitation of the area where the pixel circuit 120 is located, the OLED transparent display panel faces the pixel circuit 120 away from the pixel circuit 120 The size of the pixel aperture ratio on one side is limited, thereby causing a problem that is not conducive to improving the pixel aperture ratio.
  • An embodiment of the present disclosure provides a transparent display panel for improving a pixel aperture ratio.
  • FIG. 2a and FIG. 2b An embodiment of the present disclosure provides a transparent display panel, as shown in FIG. 2a and FIG. 2b, which may include:
  • Pixel circuit 120 which is located in each sub-pixel PX;
  • the electroluminescent structure 110 is located in each sub-pixel PX and is stacked with the pixel circuit 120.
  • the electroluminescent structure 110 is configured to drive the electroluminescent structure 110 to emit light; the light-emitting area of the electroluminescent structure 110
  • the transparent area A and the overlapping area B are included.
  • the overlapping area B is an area where the orthographic projections of the light emitting area and the area where the pixel circuit 120 is located on the substrate 100 overlap each other. That is, the orthographic projection of the light emitting region of the electroluminescent structure 110 on the base substrate 100 and the orthographic projection of the pixel circuit 120 on the base substrate 100 have an overlapping region B.
  • each layer of the electroluminescent structure 110 in the transparent region A is transparent.
  • an overlapping area A can be provided by orthogonal projection of the light-emitting area of the electroluminescent structure 110 on the base substrate 100 and the area where the pixel circuit 120 is located on the front projection of the base substrate 100, so Increasing the area occupied by the electroluminescent structure 110 in the sub-pixel PX can increase the pixel aperture ratio of the transparent display panel on the side of the electroluminescent structure 110 facing away from the pixel circuit 120.
  • the electroluminescent structure 110 may include an anode layer 111, an electroluminescent layer 112, and a transparent cathode layer 113 which are arranged in a stack.
  • the pixel circuit 120 may include a storage capacitor and a transistor.
  • the transistor may include: an active layer 121 disposed on the base substrate 100, a gate electrode 122 insulated from the active layer 121, a source electrode 123 and a drain electrode 124 insulated from the gate electrode 122 and electrically connected to the active layer 121.
  • the drain 124 is electrically connected to the anode layer 111 in the electroluminescent structure 110.
  • a gate insulating layer is further provided between the layer where the active layer 121 is located and the layer where the gate 122 is located to insulate it.
  • An interlayer dielectric layer is further provided between the layer where the source electrode 123 and the drain electrode 124 are located and the layer where the gate electrode 122 is located to insulate it.
  • the material of the transparent cathode layer 113 may include an inorganic conductive material.
  • it may be one or a combination of Mg, Ag, and IZO.
  • a thin transparent cathode layer 113 can be formed by using a vapor deposition process using Mg and Ag as materials to make the cathode layer transparent.
  • the material of the electroluminescent layer 112 may include: an electroluminescent material, for example, an organic small molecule light emitting material, an organic polymer light emitting material, and an organic complex light emitting material.
  • an electroluminescent layer can be formed by an evaporation process or an inkjet printing process.
  • the electroluminescent structure 112 may further include a hole injection layer provided between the anode layer and the electroluminescent layer, a hole transport layer provided between the hole injection layer and the electroluminescent layer, and provided in a transparent state. An electron injection layer between the cathode layer and the electroluminescent layer, an electron transport layer provided between the electron injection layer and the electroluminescent layer, and the like.
  • the anode layer 111 may be a transparent anode layer provided on the entire surface of the light-emitting area, that is, the anode layer 111 whose orthographic projection is in the overlapping area B is also provided as a transparent anode layer.
  • the anode layer 111 may include a single transparent conductive layer, and a material thereof may include one or a combination of ITO (indium tin oxide) and IZO (indium zinc oxide).
  • the anode layer 111 may also include a plurality of transparent conductive layers arranged in a stack, for example, it may include a first sub-transparent anode layer and a second sub-transparent anode layer provided in a stack.
  • the material of the first sub-transparent anode layer and the second sub-transparent anode layer may include one or a combination of ITO and IZO.
  • it may also include a first sub-transparent anode layer to a third sub-transparent anode layer.
  • the material of the first sub transparent anode layer and the third sub transparent anode layer may include one or a combination of ITO and IZO
  • the second sub transparent anode layer may include Ag.
  • the sub-pixel PX may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • the sub-pixel may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • the sub-pixel may include only a white sub-pixel, which is not limited herein. That is, the light emitting colors of the electroluminescent layer 112 in all the sub-pixels PX include red, green, and blue; or red, green, blue, and white; or white.
  • the transparent display panel may further include: a packaging structure covering the pixel circuit 120 and the electroluminescent structure 110; the packaging structure includes a thin film package, a glass package, or a soft substrate package.
  • the packaging structure includes a thin film package, a glass package, or a soft substrate package.
  • the transparent display panel may further include: The reflective layer 130; the reflective layer 130 may be located between the layer where the pixel circuit 120 is located and the electroluminescent layer 112. And in the same sub-pixel PX, the reflection layer 130 covers the overlap area B on the orthographic projection of the base substrate 100.
  • the reflective layer 130 and the transparent cathode layer 113 can form a resonance cavity, so that the electroluminescent structure 110 can radiate more light in the direction of the transparent cathode layer 113 in the overlapping area B, and can further improve the The display brightness of the light-emitting structure 110 away from the pixel circuit 120.
  • the pixel circuit 120 as a whole is taken as an example to explain the content of the present application, and the specific structure of the transistor in the pixel circuit 120 is not shown.
  • the reflective layer 130 may be located between the anode layer 111 and the layer where the pixel circuit 120 is located, and the floating layer is provided, that is, the reflective layer 130 is not loaded with electricity signal.
  • the transparent display panel may further include a first insulating layer 140 located between the reflective layer 130 and a layer where the pixel circuit 120 is located, and a reflective layer 130 where the anode layer 111 is located. The second insulation layer 150 between the layers.
  • the material of the reflective layer 130 may include a metal, a metal alloy, or a metal stack.
  • a metal for example, one or a combination of Al, Ag, and Mo may be included.
  • the orthographic projection of the reflective layer 130 on the base substrate 100 and the overlapping area B may be overlapped. This can prevent the reflective layer 130 from blocking the transparent area A.
  • the orthographic projection of the electroluminescent structure 110 on the substrate 100 covers the area where the pixel circuit 120 is located.
  • the orthographic projection of the base substrate 100 This can maximize the area of the area where the electroluminescent structure 110 is located, and improve the aperture ratio of the sub-pixels.
  • FIG. 3b A schematic structural diagram of a transparent display panel corresponding to this embodiment is shown in FIG. 3b, which is a modification of the implementation of the reflective layer 130 in the first embodiment. Only the differences between this embodiment and the first embodiment will be described below, and the similarities will not be repeated here.
  • the reflective layer 130 may be electrically connected to the anode layer 111.
  • the reflective layer 130 may be located between the anode layer 111 and a layer where the pixel circuit 120 is located.
  • the anode layer 111 may be electrically connected to the reflective layer 130 through the first via hole 161 penetrating the second insulating layer 150. This can reduce the resistance of the anode layer 111 and improve its conductivity.
  • the orthographic projection of the first via 161 on the base substrate 100 is located within the orthographic projection of the reflective layer 130 on the base substrate 100.
  • FIG. 3 c A schematic structural diagram of a transparent display panel corresponding to this embodiment is shown in FIG. 3 c, which is a modification of the embodiment in which the reflective layer 130 and the anode layer 111 are connected in the second embodiment. Only the differences between this embodiment and the second embodiment will be described below, and the same points will not be repeated here.
  • the side of the reflective layer 130 facing away from the base substrate 100 is completely disposed in close proximity to the anode layer 111, that is, the reflective layer 100 is disposed in direct contact with the anode layer 111.
  • 130 is disposed directly below the anode layer 111, and the orthographic projections of the second insulating layer 150 and the reflective layer 130 on the base substrate do not overlap each other, and the second insulating layer 150 can play a flattening role. This can further reduce the resistance of the anode layer 111 and improve its conductivity.
  • FIG. 3D A schematic structural diagram of a transparent display panel corresponding to this embodiment is shown in FIG. 3D, which is a modification of the implementation of the reflective layer 130 in the first embodiment. Only the differences between this embodiment and the first embodiment will be described below, and the similarities will not be repeated here.
  • the reflective layer 130 may be electrically connected to the transparent cathode layer 113.
  • the reflective layer 130 may be located between the anode layer 111 and a layer where the pixel circuit 120 is located.
  • the transparent display panel may further include a pixel defining layer 170 located in each sub-pixel PX. In this way, the light emitting regions of the electroluminescent structures 110 can be spaced apart.
  • the transparent cathode layer 113 may be electrically connected to the reflective layer 130 through a second via hole 162 penetrating the pixel defining layer 170 and the second insulating layer 150. The use of the reflective layer 130 as an auxiliary cathode layer in this way can reduce the resistance of the transparent cathode layer 113 and increase its conductivity.
  • FIG. 3e A schematic structural diagram of a transparent display panel corresponding to this embodiment is shown in FIG. 3e, which is a modification of the implementation of the reflective layer 130 in the first embodiment. Only the differences between this embodiment and the first embodiment will be described below, and the similarities will not be repeated here.
  • the reflective layer 130 may be located between the anode layer 111 and the electroluminescent layer 112. This can reduce the resistance of the anode layer 111 and improve its conductivity.
  • FIG. 3f A schematic structural diagram of a transparent display panel corresponding to this embodiment is shown in FIG. 3f, which is a modification of the implementation of the reflective layer 130 in the first embodiment. Only the differences between this embodiment and the first embodiment will be described below, and the similarities will not be repeated here.
  • the anode layer 111 is a transparent anode layer.
  • the anode layer 111 may include a first sub-transparent anode layer 111 a and a second sub-transparent anode layer 111 b which are arranged in a stack.
  • the material of the first sub-transparent anode layer 111 a and the second sub-transparent anode layer 111 b may include one or a combination of ITO and IZO.
  • the reflective layer 130 may be located between the first sub transparent anode layer 111a and the second sub transparent anode layer 111b. This can reduce the resistance of the anode layer 111 and improve its conductivity.
  • FIG. 3g A schematic structural diagram of a transparent display panel corresponding to this embodiment is shown in FIG. 3g, which is a modification of the implementation of the reflective layer 130 in the first embodiment. Only the differences between this embodiment and the first embodiment will be described below, and the similarities will not be repeated here.
  • the anode layer 111 includes a transparent anode layer 111c provided only in the transparent area A; the reflective layer 130 is electrically connected to the transparent anode layer 111c and serves as a reflective anode Floor. That is, it can be considered that the transparent anode layer 111c and the reflective layer 130 together constitute the anode layer 111.
  • the material of the reflective layer 130 may include a metal material, and for example, may include one or a combination of Al, Ag, and Mo.
  • an embodiment of the present disclosure further provides a display device including the above-mentioned transparent display panel provided by the embodiment of the present disclosure.
  • the display device may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a notebook computer, and a digital photo frame.
  • Other essential components of the display device are understood by those of ordinary skill in the art, and are not repeated here, and should not be used as a limitation on the present disclosure.
  • the transparent display panel and the display device provided by the embodiments of the present disclosure can increase the electricity by setting the light-emitting area of the electroluminescent structure to the front projection of the substrate and the area where the pixel circuit is located.
  • the area occupied by the electroluminescent structure in the sub-pixel can increase the pixel aperture ratio of the transparent display panel on the side of the electroluminescent structure facing away from the pixel circuit.

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
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  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本公开公开了一种透明显示面板及显示装置，通过使电致发光结构的发光区域在衬底基板的正投影与像素电路所在区域在衬底基板的正投影设置有交叠区域，可以增加电致发光结构在子像素中占据的面积，从而可以提高透明显示面板在电致发光结构背离像素电路的一侧的像素开口率。

Description

透明显示面板及显示装置
相关申请的交叉引用
本申请要求在2018年07月18日提交中国专利局、申请号为201810808766.0、申请名称为“一种透明显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种透明显示面板及显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)显示面板，由于其具备自发光、不需背光源、厚度薄、视角广、反应速度快等优点，受到了广泛关注。现有的OLED透明显示面板，包括：多个子像素。各子像素中包括：电致发光结构和用于驱动电致发光结构发光的像素电路。为了实现透明显示，一般电致发光结构包括层叠设置的透明阳极层、电致发光层以及透明阴极层。因此电致发光结构所在区域即为OLED透明显示面板的透明发光区域。而像素电路所在区域一般设置为非透明区域，这样导致OLED透明显示面板一侧的像素开口率降低。
发明内容
本公开实施例提供了一种透明显示面板，包括：
衬底基板，所述衬底基板上具有多个子像素；
像素电路，所述像素电路位于各所述子像素内；
电致发光结构，所述电致发光结构位于各所述子像素内，且与所述像素电路层叠设置；所述电致发光结构的发光区域包括透明区域和交叠区域，所述交叠区域为所述发光区域与所述像素电路所在区域在所述衬底基板上的正 投影相互交叠的区域。
在具体实施时，在本公开实施例中，所述透明显示面板还包括：位于各所述子像素内的反射层；
所述电致发光结构包括层叠设置的阳极层，电致发光层以及透明阴极层；
所述反射层位于所述像素电路所在层和所述电致发光层之间；
同一所述子像素中，所述反射层在所述衬底基板的正投影覆盖所述交叠区域。
在具体实施时，在本公开实施例中，所述阳极层为在所述发光区域整面设置的透明阳极层；
所述反射层位于所述透明阳极层与所述像素电路所在层之间，且浮空设置。
在具体实施时，在本公开实施例中，所述阳极层为在所述发光区域整面设置的透明阳极层；所述反射层与所述阳极层电连接。
在具体实施时，在本公开实施例中，所述反射层位于所述阳极层与所述像素电路所在层之间。
在具体实施时，在本公开实施例中，所述透明显示面板还包括：位于所述反射层与所述像素电路所在层之间的第一绝缘层、以及位于所述反射层与所述阳极层之间的第二绝缘层；
同一所述子像素内，所述阳极层通过贯穿所述第二绝缘层的第一过孔与所述反射层电连接。
在具体实施时，在本公开实施例中，所述反射层与所述阳极层直接接触设置。
在具体实施时，在本公开实施例中，所述反射层位于所述阳极层与所述电致发光层之间。
在具体实施时，在本公开实施例中，所述阳极层包括：层叠设置的第一子透明阳极层和第二子透明阳极层；
所述反射层位于所述第一子透明阳极层和所述第二子透明阳极层之间。
在具体实施时，在本公开实施例中，所述阳极层为仅在所述透明区域内设置的透明阳极层；所述反射层与所述透明阳极层电连接，且作为反射阳极层。
在具体实施时，在本公开实施例中，所述反射层与所述透明阴极层电连接。
在具体实施时，在本公开实施例中，所述反射层位于所述阳极层与所述像素电路所在层之间；
所述透明显示面板还包括：位于所述反射层与所述像素电路所在层之间的第一绝缘层，位于所述反射层所在层与所述阳极层之间的第二绝缘层，以及位于各所述子像素内的像素界定层；
所述透明阴极层通过贯穿所述像素界定层和所述第二绝缘层的第二过孔与所述反射层电连接。
在具体实施时，在本公开实施例中，所述反射层在所述衬底基板的正投影与所述交叠区域重叠。
在具体实施时，在本公开实施例中，所述反射层的材料包括Al、Ag以及Mo中之一或组合。
在具体实施时，在本公开实施例中，同一所述子像素中，所述电致发光结构的发光区域在所述衬底基板的正投影覆盖所述像素电路所在区域在所述衬底基板的正投影。
在具体实施时，在本公开实施例中，全部所述子像素内的电致发光层的发光颜色包括以下之一：
红色，绿色以及蓝色；
红色，绿色，蓝色以及白色；
白色。
在具体实施时，在本公开实施例中，所述透明显示面板还包括：覆盖所述像素电路和所述电致发光结构的封装结构；
所述封装结构包括以下之一：
薄膜封装，玻璃封装，软基材封装。
相应地，本公开实施例还提供了一种显示装置，包括本公开实施例提供的透明显示面板。
附图说明
图1a为相关技术中的OLED透明显示面板的俯视结构示意图；
图1b为图1a所示的OLED透明显示面板的剖视结构示意图；
图2a为本公开实施例提供的透明显示面板的俯视结构示意图；
图2b为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3a为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3b为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3c为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3d为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3e为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3f为本公开实施例提供的透明显示面板的局部剖视结构示意图；
图3g为本公开实施例提供的透明显示面板的局部剖视结构示意图。
具体实施方式
如图1a与图1b所示，OLED透明显示面板一般可以包括：多个像素单元，每个像素单元可以包括：多个子像素PX。各子像素PX可以包括：电致发光结构110和用于驱动电致发光结构110发光的像素电路120。为了实现透明显示，一般电致发光结构110包括层叠设置的透明阳极层114、电致发光层112以及透明阴极层113。因此电致发光结构110所在区域即为OLED透明显示面板的透明区域。而为了提高显示效果，一般将像素电路120所在区域设置为非透明区域。然而，一般电致发光结构110和像素电路120是采用层叠设置的方式设置在衬底基板100上，由于像素电路120所在区域的限制，导致OLED透明显示面板在电致发光结构110背离像素电路120的一侧的像素开口率的 大小受到了限制，从而造成不利于提高像素开口率的问题。
本公开实施例提供一种透明显示面板，用于提高像素开口率。
为了使本公开的目的，技术方案和优点更加清楚，下面结合附图，对本公开实施例提供的透明显示面板及显示装置的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本公开，并不用于限定本公开。并且在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。需要注意的是，附图中各层薄膜厚度、大小和形状均不反映透明显示面板的真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
本公开实施例提供一种透明显示面板，如图2a与图2b所示，可以包括：
衬底基板100，衬底基板100上具有多个子像素PX；
像素电路120，像素电路120位于各子像素PX内；
电致发光结构110，电致发光结构110位于各子像素PX内，且与像素电路120层叠设置，电致发光结构110被配置为驱动电致发光结构110发光；电致发光结构110的发光区域包括透明区域A和交叠区域B，交叠区域B为发光区域与像素电路120所在区域在衬底基板100上的正投影相互交叠的区域。即电致发光结构110的发光区域在衬底基板100的正投影与像素电路120所在区域在衬底基板100的正投影具有交叠区域B。并且，电致发光结构110在透明区域A内的各膜层透明。
本公开实施例提供的透明显示面板，通过使电致发光结构110的发光区域在衬底基板100的正投影与像素电路120所在区域在衬底基板100的正投影设置有交叠区域A，可以增加电致发光结构110在子像素PX内占据的面积，从而可以提高透明显示面板在电致发光结构110背离像素电路120的一侧的像素开口率。
下面结合具体实施例，对本公开进行详细说明。需要说明的是，本实施例中是为了更好的解释本公开，但不限制本公开。
实施例一、
在具体实施时，在本公开实施例中，如图2b所示，电致发光结构110可以包括：层叠设置的阳极层111、电致发光层112以及透明阴极层113。像素电路120可以包括：存储电容和晶体管。晶体管可以包括：设置于衬底基板100上的有源层121，与有源层121绝缘设置的栅极122、与栅极122绝缘且与有源层121电连接的源极123和漏极124。并且，漏极124与电致发光结构110中的阳极层111电连接。在有源层121所在层和栅极122所在层之间还设置有栅绝缘层，以使其绝缘。在源极123和漏极124所在层与栅极122所在层之间还设置有层间介质层，以使其绝缘。需要说明的是，图2b中仅以像素电路120中的一个晶体管的结构为例进行说明。在实际应用中，像素电路的具体结构可以与相关技术中的电路基本相同，在此不做赘述。
在具体实施时，在本公开实施例中，透明阴极层113的材料可以包括无机导电材料。例如，可以为Mg、Ag、以及IZO中之一或组合。在实际应用中，可以通过蒸镀工艺，采用Mg和Ag作为材料形成膜层较薄的透明阴极层113，以使阴极层实现透明效果。
在具体实施时，在本公开实施例中，电致发光层112的材料可以包括：电致发光材料，例如，有机小分子发光材料、有机高分子发光材料、有机配合物发光材料。在实际制备过程中，可以采用蒸镀工艺或喷墨打印工艺形成电致发光层。并且，电致发光结构112还可以包括：设置于阳极层与电致发光层之间的空穴注入层，设置于空穴注入层与电致发光层之间的空穴传输层，设置于透明阴极层与电致发光层之间的电子注入层，设置于电子注入层与电致发光层之间的电子传输层等。
在具体实施时，在本公开实施例中，阳极层111可以为发光区域整面设置的透明阳极层，即正投影处于交叠区域B中的阳极层111也设置为透明阳极层。并且，阳极层111可以包括单层透明导电层，其材料可以包括ITO(氧化铟锡)、IZO(铟锌氧化物)中之一或组合。或者，阳极层111也可以包括层叠设置的多层透明导电层，例如可以包括层叠设置的第一子透明阳极层和第二子透明阳极层。该第一子透明阳极层和第二子透明阳极层材料可以包括： ITO、IZO中之一或组合。当然，也可以包括层叠设置的第一子透明阳极层至第三子透明阳极层。该第一子透明阳极层和第三子透明阳极层材料可以包括：ITO、IZO中之一或组合，第二子透明阳极层可以包括Ag。
在具体实施时，在本公开实施例中，子像素PX可以包括红色子像素、绿色子像素以及蓝色子像素。或者，子像素也可以包括红色子像素、绿色子像素、蓝色子像素以及白色子像素。或者，子像素也可以仅包括白色子像素，在此不作限定。即全部子像素PX内的电致发光层112的发光颜色包括红色，绿色以及蓝色；或者，红色，绿色，蓝色以及白色；或者，白色。
在具体实施时，在本公开实施例中，透明显示面板还可以包括：覆盖像素电路120和电致发光结构110的封装结构；封装结构包括是薄膜封装，玻璃封装或软基材封装，在此不做限定。
并且，为了避免像素电路中的晶体管受光照影响，以及提高显示亮度，在具体实施时，在本公开实施例中，如图3a所示，透明显示面板还可以包括：位于各子像素PX内的反射层130；反射层130可以位于像素电路120所在层和电致发光层112之间。并且同一子像素PX中，反射层130在衬底基板100的正投影覆盖交叠区域B。这样可以使反射层130与透明阴极层113形成共振腔，从而使电致发光结构110在交叠区域B向透明阴极层113的方向辐射出更多的光，进而可以提高透明显示面板在电致发光结构110背离像素电路120一侧的显示亮度。需要说明的是，图3a中是以像素电路120作为一个整体为例以说明本申请的内容，而并未示出像素电路120中的晶体管的具体结构。
并且，在具体实施时，在本公开实施例中，如图3a所示，可以将反射层130位于阳极层111与像素电路120所在层之间，且浮空设置，即反射层130未加载电信号。并且，为了避免反射层130与像素电路120电连接，透明显示面板还可以包括：位于反射层130与像素电路120所在层之间的第一绝缘层140、以及位于反射层130与阳极层111所在层之间的第二绝缘层150。
并且，在具体实施时，在本公开实施例中，反射层130的材料可以包括金属、金属合金或金属堆叠。例如，可以包括Al、Ag以及Mo中之一或组合。
并且，在具体实施时，在本公开实施例中，如图3a所示，可以使反射层130在衬底基板100的正投影与交叠区域B重叠。这样可以避免反射层130遮挡透明区域A。
并且，在具体实施时，在本公开实施例中，如图2a与图3a所示，同一子像素PX中，电致发光结构110在衬底基板100的正投影覆盖像素电路120所在区域在衬底基板100的正投影。这样可以使电致发光结构110所在区域的面积最大，提高子像素的开口率。
实施例二、
本实施例对应的透明显示面板的结构示意图如图3b所示，其针对实施例一中反射层130的实施方式进行了变形。下面仅说明本实施例与实施例一的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3b所示，反射层130可以与阳极层111电连接。并且，反射层130可以位于阳极层111与像素电路120所在层之间。具体地，同一子像素PX中，阳极层111可以通过贯穿第二绝缘层150的第一过孔161与反射层130电连接。这样可以降低阳极层111的电阻，提高其导电性。其中，第一过孔161在衬底基板100的正投影位于反射层130在衬底基板100的正投影内。
实施例三、
本实施例对应的透明显示面板的结构示意图如图3c所示，其针对实施例二中反射层130与阳极层111连接的实施方式进行了变形。下面仅说明本实施例与实施例二的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3c所示，反射层130背离衬底基板100的一面完全与阳极层111紧邻设置，即反射层100与阳极层111直接接触设置，反射层130直接设置在阳极层111的下方，且第二绝缘层150与反射层130在衬底基板上的正投影互不重叠，第二绝缘层150可以起到平坦化的作用。这样可以进一步降低阳极层111的电阻，提高其导电性。
实施例四、
本实施例对应的透明显示面板的结构示意图如图3d所示，其针对实施例一中反射层130的实施方式进行了变形。下面仅说明本实施例与实施例一的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3d所示，反射层130可以与透明阴极层113电连接。并且，反射层130可以位于阳极层111与像素电路120所在层之间。透明显示面板还可以包括：位于各子像素PX内的像素界定层170。这样可以将各电致发光结构110的发光区域间隔开。并且，在具体实施时，透明阴极层113可以通过贯穿像素界定层170和第二绝缘层150的第二过孔162与反射层130电连接。这样反射层130作为辅助阴极层使用，可以降低透明阴极层113的电阻，提高其导电性。
实施例五、
本实施例对应的透明显示面板的结构示意图如图3e所示，其针对实施例一中反射层130的实施方式进行了变形。下面仅说明本实施例与实施例一的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3e所示，可以使反射层130可以位于阳极层111与电致发光层112之间。这样可以降低阳极层111的电阻，提高其导电性。
实施例六、
本实施例对应的透明显示面板的结构示意图如图3f所示，其针对实施例一中反射层130的实施方式进行了变形。下面仅说明本实施例与实施例一的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3f所示，阳极层111为透明阳极层。具体地，阳极层111可以包括：层叠设置的第一子透明阳极层111a和第二子透明阳极层111b。其中，第一子透明阳极层111a和第二子透明阳极层111b的材料可以包括ITO、IZO中之一或组合。并且，反射层130可以位于第一子透明阳极层111a和第二子透明阳极层111b之间。这样可以降低阳极层111的电阻，提高其导电性。
实施例七、
本实施例对应的透明显示面板的结构示意图如图3g所示，其针对实施例一中反射层130的实施方式进行了变形。下面仅说明本实施例与实施例一的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3g所示，阳极层111包括仅在透明区域A内设置的透明阳极层111c；反射层130与透明阳极层111c电连接，且作为反射阳极层。即可以认为透明阳极层111c和反射层130共同组成了阳极层111。其中，反射层130的材料可以包括金属材料，例如，可以包括Al、Ag以及Mo中之一或组合。
基于同一发明构思，本公开实施例还提供了一种显示装置，包括本公开实施例提供的上述透明显示面板。该显示装置可以为：手机、平板电脑、电视机、笔记本电脑、数码相框等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。该显示装置的实施可以参见上述透明显示面板的实施例，重复之处不再赘述。
本公开实施例提供的透明显示面板及显示装置，通过使电致发光结构的发光区域在衬底基板的正投影与像素电路所在区域在衬底基板的正投影设置有交叠区域，可以增加电致发光结构在子像素内占据的面积，从而可以提高透明显示面板在电致发光结构背离像素电路的一侧的像素开口率。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (18)

  1. 一种透明显示面板，包括：
    衬底基板，所述衬底基板上具有多个子像素；
    像素电路，所述像素电路位于各所述子像素内；
    电致发光结构，所述电致发光结构位于各所述子像素内，且与所述像素电路层叠设置；所述电致发光结构的发光区域包括透明区域和交叠区域，所述交叠区域为所述发光区域与所述像素电路所在区域在所述衬底基板上的正投影相互交叠的区域。
  2. 如权利要求1所述的透明显示面板，所述透明显示面板还包括：位于各所述子像素内的反射层；
    所述电致发光结构包括层叠设置的阳极层，电致发光层以及透明阴极层；
    所述反射层位于所述像素电路所在层和所述电致发光层之间；
    同一所述子像素中，所述反射层在所述衬底基板的正投影覆盖所述交叠区域。
  3. 如权利要求2所述的透明显示面板，所述阳极层为在所述发光区域整面设置的透明阳极层；
    所述反射层位于所述透明阳极层与所述像素电路所在层之间，且浮空设置。
  4. 如权利要求2所述的透明显示面板，所述阳极层为在所述发光区域整面设置的透明阳极层；所述反射层与所述阳极层电连接。
  5. 如权利要求4所述的透明显示面板，所述反射层位于所述阳极层与所述像素电路所在层之间。
  6. 如权利要求5所述的透明显示面板，所述透明显示面板还包括：位于所述反射层与所述像素电路所在层之间的第一绝缘层、以及位于所述反射层与所述阳极层之间的第二绝缘层；
    同一所述子像素内，所述阳极层通过贯穿所述第二绝缘层的第一过孔与所述反射层电连接。
  7. 如权利要求5所述的透明显示面板，所述反射层与所述阳极层直接接触设置。
  8. 如权利要求4所述的透明显示面板，所述反射层位于所述阳极层与所述电致发光层之间。
  9. 如权利要求4所述的透明显示面板，所述阳极层包括：层叠设置的第一子透明阳极层和第二子透明阳极层；
    所述反射层位于所述第一子透明阳极层和所述第二子透明阳极层之间。
  10. 如权利要求2所述的透明显示面板，所述阳极层包括仅在所述透明区域内设置的透明阳极层；所述反射层与所述透明阳极层电连接，且作为反射阳极层。
  11. 如权利要求2所述的透明显示面板，所述反射层与所述透明阴极层电连接。
  12. 如权利要求11所述的透明显示面板，所述反射层位于所述阳极层与所述像素电路所在层之间；
    所述透明显示面板还包括：位于所述反射层与所述像素电路所在层之间的第一绝缘层，位于所述反射层所在层与所述阳极层之间的第二绝缘层，以及位于各所述子像素内的像素界定层；
    所述透明阴极层通过贯穿所述像素界定层和所述第二绝缘层的第二过孔与所述反射层电连接。
  13. 如权利要求2-12任一项所述的透明显示面板，所述反射层在所述衬底基板的正投影与所述交叠区域重叠。
  14. 如权利要求2-12任一项所述的透明显示面板，所述反射层的材料包括Al、Ag以及Mo中之一或组合。
  15. 如权利要求1-12任一项所述的透明显示面板，同一所述子像素中，所述电致发光结构的发光区域在所述衬底基板的正投影覆盖所述像素电路所 在区域在所述衬底基板的正投影。
  16. 如权利要求2-12任一项所述的透明显示面板，全部所述子像素内的电致发光层的发光颜色包括以下之一：
    红色，绿色以及蓝色；
    红色，绿色，蓝色以及白色；
    白色。
  17. 如权利要求1-12任一项所述的透明显示面板，所述透明显示面板还包括：覆盖所述像素电路和所述电致发光结构的封装结构；
    所述封装结构包括以下之一：
    薄膜封装，玻璃封装，软基材封装。
  18. 一种显示装置，包括如权利要求1-17任一项所述的透明显示面板。
PCT/CN2019/086918 2018-07-18 2019-05-14 透明显示面板及显示装置 WO2020015443A1 (zh)

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