WO2019223562A1 - 一种降低寄生电容和电源影响的电压时间转换器及方法 - Google Patents

一种降低寄生电容和电源影响的电压时间转换器及方法 Download PDF

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WO2019223562A1
WO2019223562A1 PCT/CN2019/086601 CN2019086601W WO2019223562A1 WO 2019223562 A1 WO2019223562 A1 WO 2019223562A1 CN 2019086601 W CN2019086601 W CN 2019086601W WO 2019223562 A1 WO2019223562 A1 WO 2019223562A1
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sampling
voltage
compensation
main
network
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PCT/CN2019/086601
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English (en)
French (fr)
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李婷
黄正波
张勇
倪亚波
王健安
付东兵
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中国电子科技集团公司第二十四研究所
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Priority to US17/057,702 priority Critical patent/US11115039B2/en
Publication of WO2019223562A1 publication Critical patent/WO2019223562A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
    • G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/50—Analogue/digital converters with intermediate conversion to time interval
    • H03M1/54—Input signal sampled and held with linear return to datum
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245—Details of sampling arrangements or methods
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/129—Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling ; Out-of-range indication

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  • the invention relates to the field of electronics, in particular to a voltage-time converter and method for reducing the influence of parasitic capacitance and power supply.
  • VTC Voltage-to-Time Converter
  • the sampling capacitance is time-multiplexed by other modules, its size is strictly limited, and the value is small, and When the amplitude of the input voltage is small, the influence of parasitic capacitance will severely limit the differential voltage swing at the input of the over-threshold electrical measurement circuit, thereby limiting the VTC output swing.
  • the threshold of the traditional VTC over-threshold electrical measurement circuit is often related to the power supply voltage. The threshold level of the over-threshold check unit will be affected by voltage and voltage disturbances, thereby reducing VTC conversion performance and severely limiting the application of VTC in small swing input voltages. Degradation of converter performance.
  • the present invention provides a voltage-time converter and method for reducing the influence of parasitic capacitance and power supply to solve the above technical problems.
  • the voltage-time converter for reducing the influence of parasitic capacitance and power supply provided by the present invention includes:
  • the main sampling network is used to sample the main input signal and the main reference level
  • Compensation sampling network used for compensating the input signal and compensating the reference level sampling
  • the main sampling network is provided with a main sampling capacitor and a main sampling common mode level for sampling and converting a difference between an input voltage and a reference voltage.
  • the compensation sampling network is provided with a compensated sampling capacitor and a compensated sampling common mode level.
  • the compensation sampling common mode level is used to sample and convert the difference between the input voltage and the reference level, and perform voltage compensation;
  • a discharge network configured to discharge the main sampling capacitor and the compensation sampling capacitor
  • the threshold crossing detection unit is configured to detect whether the level output by the discharge network exceeds a threshold, and complete the conversion from the input level to time.
  • the main sampling network and the compensation sampling network simultaneously sample the input voltage; in the conversion phase, the compensation sampling network is connected to the main sampling network and performs voltage time domain conversion simultaneously with the main sampling network.
  • the relationship between the voltage at the input terminal of the over-threshold detection unit and the input voltage is:
  • V TCD is the voltage at the input of the over-threshold detection unit
  • V CMSP is the main sampling common mode level
  • V IN is the input voltage
  • V REF is the reference voltage
  • V CC is the compensation sampling common mode level
  • C S is the main sampling Capacitance
  • C C is the compensation sampling capacitance
  • C P is the parasitic capacitance at the input of the threshold detector.
  • the relationship between the compensation sampling common mode level V CC and the power supply voltage V DD and the relationship between the voltage threshold V TH of the over-threshold detection unit and the power supply voltage V DD are:
  • K is a proportionality coefficient between the voltage threshold of the over-threshold detection unit and the power supply voltage
  • V TH is the voltage threshold of the over-threshold detection unit
  • V DD is the power supply voltage
  • the main sampling network further includes a main input sampling switch, a main reference level sampling switch, and a main common mode sampling switch
  • the compensation sampling network further includes a compensation input sampling switch, a compensation reference level sampling switch, and a compensation common mode sampling.
  • Switch the discharge network includes a first discharge switch, a second discharge switch, and a constant current source
  • the two ends of the main input sampling switch are respectively connected to the input voltage and one end of the main sampling capacitor.
  • the two ends of the main reference level sampling switch are respectively connected to the reference voltage and one end of the main sampling capacitor.
  • the main common mode sampling switch is connected to the main sampling common mode level;
  • the two ends of the compensation input sampling switch are respectively connected to the input voltage and one end of the compensation sampling capacitor.
  • the two ends of the compensation reference level sampling switch are respectively connected to the reference voltage and one end of the compensation sampling capacitor.
  • the compensation common mode sampling switch is connected to the compensation sampling common mode level;
  • One end of the first discharge switch is connected to the other end of the compensation sampling capacitor, the other end of the first discharge switch and one end of the second discharge switch are simultaneously connected to the input terminal of the threshold detection unit, and the other end of the second discharge switch
  • the constant current source is grounded, and the input end of the over-threshold detection unit is grounded through the parasitic capacitance of the input end of the over-threshold detection unit.
  • the structure of the switching capacitor of the main sampling network and the switching capacitor of the compensation sampling network are completely the same.
  • the corresponding device size parameter is proportional to the switching capacitance of the switching capacitor of the main sampling network and the switching capacitor of the compensation sampling network.
  • the RC time constant is the same.
  • the invention also provides a voltage-time conversion method for reducing the influence of parasitic capacitance and power supply, including:
  • the main sampling network is provided with a main sampling capacitor and a main sampling common mode level for sampling and converting a difference between an input voltage and a reference voltage.
  • the compensation sampling network is provided with a compensated sampling capacitor and a compensated sampling common mode level.
  • the compensation sampling common mode level is used to sample and convert the difference between the input voltage and the reference level, and perform voltage compensation;
  • the input voltage is sampled simultaneously through the main sampling network and the compensation sampling network;
  • the compensation sampling network is merged with the main sampling network, and at the same time, the conversion network is connected to detect whether the output level of the discharge network exceeds a threshold value and complete the conversion of the input level to time.
  • the relationship between the voltage at the input terminal of the over-threshold detection unit and the input voltage is:
  • V TCD is the voltage at the input of the over-threshold detection unit
  • V CMSP is the main sampling common mode level
  • V IN is the input voltage
  • V REF is the reference voltage
  • V CC is the compensation sampling common mode level
  • C S is the main sampling Capacitance
  • C C is the compensation sampling capacitance
  • C P is the parasitic capacitance at the input of the threshold detector.
  • the relationship between the compensation sampling common mode level V CC and the power supply voltage V DD and the relationship between the voltage threshold V TH of the over-threshold detection unit and the power supply voltage V DD are:
  • K is a proportionality coefficient between the voltage threshold of the over-threshold detection unit and the power supply voltage
  • V TH is the voltage threshold of the over-threshold detection unit
  • V DD is the power supply voltage
  • the voltage-time converter and method for reducing the influence of parasitic capacitance and power supply in the present invention reduce the influence of the traditional VTC parasitic capacitance on the VTC output swing by using a compensation sampling network; and Sampling the common mode level for compensation design, reducing the threshold of the traditional VTC threshold detection circuit is affected by the low frequency disturbance of the power supply voltage.
  • the output swing of the voltage-time converter of the present invention can reduce the influence of parasitic capacitance.
  • the level is related to the power supply voltage, which reduces the conversion error caused by the influence of the power supply voltage on the threshold, reduces the threshold voltage affected by the power supply voltage, and improves the accuracy and performance of the conversion.
  • Figure 1 is a schematic diagram of the principle of the present invention.
  • FIG. 2 is a schematic circuit diagram of a voltage-time converter that reduces the influence of parasitic capacitance and power in the embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a timing relationship of a voltage-time conversion method for reducing the influence of a parasitic capacitance and a power source in an embodiment of the present invention.
  • the main sampling network is used to sample the main input signal and the main reference level
  • Compensation sampling network used for compensating the input signal and compensating the reference level sampling
  • the main sampling network is provided with a main sampling capacitor and a main sampling common mode level for sampling and converting a difference between an input voltage and a reference voltage.
  • the compensation sampling network is provided with a compensated sampling capacitor and a compensated sampling common mode level.
  • the compensation sampling common mode level is used to sample and convert the difference between the input voltage and the reference level, and perform voltage compensation;
  • a discharge network configured to discharge the main sampling capacitor and the compensation sampling capacitor
  • the threshold crossing detection unit is configured to detect whether the level output by the discharge network exceeds a threshold, and complete the conversion from the input level to time.
  • the main sampling network mainly includes a main input sampling switch SW SM , a main reference level sampling switch SW RM , a main common mode sampling switch SW SPM, and a main sampling capacitor C S.
  • the main sampling common mode level is V CMSP , which is mainly used to sample and convert the difference between the input signal V IN and the reference voltage V REF .
  • the compensation sampling network mainly includes a compensation input sampling switch SW SC , a compensation reference sampling switch SW RC , a compensation common mode sampling switch SW SPC, and a compensation sampling capacitor C C.
  • the compensation sampling common mode level is V CC for sampling and conversion.
  • the discharge network mainly includes the discharge switches SW VTC1 , SW VTC2, and the current source I DIS , which is mainly used to discharge the input signals sampled by the main sampling capacitor C S and the compensation sampling capacitor C C.
  • the current source I DIS is a constant current source. The value is determined by the discharge clock pulse width, the TCD threshold level, the common mode at the TCD input and the swing of the input signal V REF -V IN .
  • the threshold detection unit in this embodiment is a threshold detection detector (TCD), which is used to detect whether the output network output level exceeds the threshold.
  • the TCD output is inverted. Specifically, the input is detected by the TCD. Terminal level discharge, when the input terminal level is lower than the threshold level, the TCD output is inverted, completing the input level to time conversion.
  • a compensation sampling network and a compensation voltage are used to eliminate the influence of the traditional VTC parasitic capacitance and TCD threshold on the power supply voltage fluctuation.
  • the compensation sampling network samples the input signal at the same time as the main sampling network during the sampling phase, accesses the conversion network during the conversion phase, and performs voltage-time conversion with the main sampling network at the same time.
  • the input terminal of the threshold detector TCD is passed.
  • the relationship between voltage and input voltage is:
  • V TCD is the voltage at the input of the over-threshold detection unit
  • V CMSP is the main sampling common mode level
  • V IN is the input voltage
  • V REF is the reference voltage
  • V CC is the compensation sampling common mode level
  • C S is the main sampling Capacitance
  • C C is the compensation sampling capacitance
  • C P is the parasitic capacitance at the input of the over-threshold detection unit.
  • the common mode level V CC is sampled so that its relationship with the power supply voltage is:
  • V TCD at the input terminal of VTC will be related to the power supply voltage V DD , thereby reducing the conversion error caused by the influence of the power supply voltage V DD on the threshold.
  • both ends of the SC main SW input sampling switches are connected to one end of the main input voltage V IN and the sampling capacitor C S of the main reference level sampling switch SW RM two ends, respectively, and the reference voltage V REF
  • One end of the primary sampling capacitor C S is connected to the other end of the main sampling capacitor C S by the main common mode sampling switches SW SPM main sampling and common-mode level V CMSP connection
  • SW compensated input sampling switch SC ends respectively input voltage V iN
  • One end of the compensation and the sampling capacitor C C is connected to both ends of the compensation reference level sampling switch SW RC are connected to the reference voltage V REF and the end of the compensation capacitor C C is sampled, the other end of the sampling capacitor C C is compensated by compensating the common mode sampling
  • the switch SW SPC is connected to the compensation sampling common mode level V CC ;
  • SW VTC1 end and the other end of compensating the sampling capacitor C C is connected to a first discharge switch, the other end of the first discharge switch SW VTC1 is connected to one end of a second discharge switch SW VTC2 and simultaneously access the threshold value detecting means input
  • the other end of the second discharge switch SW VTC2 is grounded through the constant current source I DIS .
  • One end of the parasitic capacitance C P of the input terminal of the threshold detection unit is connected to the input terminal of the threshold detection unit, and the other end is grounded.
  • the size of the main sampling capacitor is limited by other design indicators of the circuit, and when the value is small, the larger the compensation capacitor value is, the smaller the parasitic capacitance effect is.
  • the size of the corresponding device between the switched capacitor of the main sampling network and the switched capacitor of the compensated sampling network is proportional to ensure that the RC time constant of the main sampling network is the same as the RC time constant of the compensated sampling network.
  • the compensation sampling common mode level V CC can be used.
  • the arbitrary level generation method is designed, and it only needs to satisfy the voltage relationship in the above (Expression 2).
  • this embodiment also provides a voltage-time conversion method for reducing the influence of parasitic capacitance and power, including:
  • the main sampling network is provided with a main sampling capacitor and a main sampling common mode level for sampling and converting a difference between an input voltage and a reference voltage.
  • the compensation sampling network is provided with a compensated sampling capacitor and a compensated sampling common mode level.
  • the compensation sampling common mode level is used to sample and convert the difference between the input voltage and the reference level, and perform voltage compensation;
  • the input voltage is sampled simultaneously through the main sampling network and the compensation sampling network;
  • the compensation sampling network is connected to the conversion network, and the voltage-time conversion is performed simultaneously with the main sampling network.
  • the threshold crossing detection unit detects whether the level of the output network output exceeds the threshold, and completes the conversion of the input level to time.
  • the initial value of the TCD input voltage is:
  • the compensation sampling common mode level V CC is related to the threshold voltage of the threshold detector TCD:
  • K is a proportionality coefficient between the threshold voltage detector TCD threshold voltage V TH and the power supply voltage V DD
  • V TH represents the TCD rollover threshold
  • the compensation sampling level V CC can be designed with any level generation method, and only needs to meet The voltage relationship described in the above formula is sufficient. Substituting the V CC expression into the V TCD expression gives:
  • the TCD input voltage discharge relationship is:
  • the threshold detector detects whether the discharge level V TCD_DIS is lower than the threshold V TH , that is, the conversion output time corresponding to the input signal V IN is:
  • VTC discharges to time t 0 , V TCD_DISS -V TH ⁇ 0, the output of the threshold detector TCD is inverted, and the output time t 0 corresponding to V REF -V IN is recorded.
  • the VTC conversion ends.

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Abstract

一种降低寄生电容和电源影响的电压时间转换器和方法，其电压时间转换器包括：主采样网络、补偿采样网络、放电网络和过阈值检测单元，通过采用补偿采样网络，降低传统VTC寄生电容对VTC输出摆幅的影响；并且通过对补偿采样网络的采样共模电平进行补偿设计，降低传统VTC阈值检测电路阈值受到电源电压低频扰动的影响，该电压时间转换器的输出摆幅可以降低受到寄生电容的影响，VTC输入端电压共模电平与电源电压相关，降低了电源电压对阈值影响造成的转换误差，使阈值电压不受电源电压影响，提高了转换的精度和性能。

Description

一种降低寄生电容和电源影响的电压时间转换器及方法 技术领域
本发明涉及电子领域，尤其涉及一种降低寄生电容和电源影响的电压时间转换器及方法。
背景技术
电压-时间转换器(Voltage-to-Time Converter，简称VTC)是使用固定时钟脉宽采样输入电压，然后在另一个时钟相位采用恒流源进行放电，再采用过阈值检测单元检测放电电压是否到达阈值，过阈值则过阈值检测单元输出电平翻转，从而将输入电压信号转换成与输入电压幅度成正比的时钟延迟，完成输入电压到时钟延迟的转换。
传统VTC从采样相位转换到转换相位时，由于MOSFET开关和过阈值检测单元输入端都存在寄生电容，在采样电容被其他模块分时复用，其尺寸受到严格限制，且取值较小，并且输入电压幅值较小时，寄生电容影响将严重限制过阈值电测电路输入端电压差分摆幅，从而限制VTC输出摆幅。另外，传统VTC过阈值电测电路的阈值常常与电源电压相关，过阈值检查单元阈值电平将受到电压电压扰动影响，从而降低VTC转换性能，严重限制VTC在小摆幅输入电压中的应用，恶化转换器性能。
发明内容
鉴于以上所述现有技术的缺点，本发明提供一种降低寄生电容和电源影响的电压时间转换器及方法，以解决上述技术问题。
本发明提供的降低寄生电容和电源影响的电压时间转换器，包括：
主采样网络，用于进行主输入信号和主参考电平采样；
补偿采样网络，用于进行补偿输入信号和补偿参考电平采样；
所述主采样网络设置有主采样电容和用于采样和转换输入电压与参考电压差值的主采样共模电平，所述补偿采样网络设置有补偿采样电容和补偿采样共模电平，所述补偿采样共模电平用于采样和转换输入电压与参考电平差值，并进行电压补偿；
放电网络，用于对所述主采样电容和补偿采样电容进行放电；
过阈值检测单元，用于检测所述放电网络输出的电平是否过阈值，完成输入电平到时间的转换。
进一步，在采样阶段，所述主采样网络与补偿采样网络同时对输入电压进行采样；在转 换阶段，所述补偿采样网络接入主采样网络，与主采样网络同时进行电压时间域转换。
进一步，在转换阶段时，过阈值检测单元输入端的电压与输入电压关系为：
Figure PCTCN2019086601-appb-000001
其中，V TCD为过阈值检测单元输入端的电压，V CMSP为主采样共模电平，V IN为输入电压，V REF为参考电压，V CC为补偿采样共模电平，C S为主采样电容，C C为补偿采样电容，C P为过阈值检测器输入端寄生电容。
进一步，补偿采样共模电平V CC与电源电压V DD的关系，以及过阈值检测单元的电压阈值V TH与电源电压V DD的关系分别为：
Figure PCTCN2019086601-appb-000002
其中，K为过阈值检测单元电压阈值与电源电压的比例系数，V TH为过阈值检测单元的电压阈值，V DD为电源电压。
进一步，所述主采样网络还包括主输入采样开关、主参考电平采样开关和主共模采样开关；所述补偿采样网络还包括补偿输入采样开关、补偿参考电平采样开关和补偿共模采样开关；所述放电网络包括第一放电开关、第二放电开关和恒流源；
所述主输入采样开关两端分别与输入电压和主采样电容的一端连接，所述主参考电平采样开关的两端分别与参考电压和主采样电容的一端连接，主采样电容的另一端通过主共模采样开关与主采样共模电平连接；
所述补偿输入采样开关两端分别与输入电压和补偿采样电容的一端连接，所述补偿参考电平采样开关的两端分别与参考电压和补偿采样电容的一端连接，补偿采样电容的另一端通过补偿共模采样开关与补偿采样共模电平连接；
所述第一放电开关的一端与补偿采样电容的另一端连接，第一放电开关的另一端和所述第二放电开关一端同时与过阈值检测单元的输入端连接，第二放电开关的另一端通过恒流源接地，所述过阈值检测单元的输入端通过过阈值检测单元输入端寄生电容接地。
进一步，所述主采样网络开关电容与补偿采样网络开关电容结构完全相同，主采样网络开关电容与补偿采样网络开关电容之间对应器件尺寸参数成比例，主采样网络的RC时间常数与补偿采样网络的RC时间常数相同。
本发明还提供一种降低寄生电容和电源影响的电压时间转换方法，包括：
设置用于进行主输入信号和主参考电平采样的主采样网络，以及用于进行补偿输入信号 和补偿参考电平采样的补偿采样网络；
所述主采样网络设置有主采样电容和用于采样和转换输入电压与参考电压差值的主采样共模电平，所述补偿采样网络设置有补偿采样电容和补偿采样共模电平，所述补偿采样共模电平用于采样和转换输入电压与参考电平差值，并进行电压补偿；
在采样阶段，通过主采样网络与补偿采样网络同时对输入电压进行采样；
在转换阶段，将补偿采样网络与主采样网络合并，同时接入转换网络，检测所述放电网络输出的电平是否过阈值，完成输入电平到时间的转换。
进一步，在转换阶段时，过阈值检测单元输入端的电压与输入电压关系为：
Figure PCTCN2019086601-appb-000003
其中，V TCD为过阈值检测单元输入端的电压，V CMSP为主采样共模电平，V IN为输入电压，V REF为参考电压，V CC为补偿采样共模电平，C S为主采样电容，C C为补偿采样电容，C P为过阈值检测器输入端寄生电容。
进一步，所述补偿采样共模电平V CC与电源电压V DD的关系，以及过阈值检测单元的电压阈值V TH与电源电压V DD的关系分别为：
Figure PCTCN2019086601-appb-000004
其中，K为过阈值检测单元电压阈值与电源电压的比例系数，V TH为过阈值检测单元的电压阈值，V DD为电源电压。
本发明的有益效果：本发明中的降低寄生电容和电源影响的电压时间转换器及方法，通过采用补偿采样网络，降低传统VTC寄生电容对VTC输出摆幅的影响；并且通过对补偿采样网络的采样共模电平进行补偿设计，降低传统VTC阈值检测电路阈值受到电源电压低频扰动的影响，本发明的电压时间转换器的输出摆幅可以降低受到寄生电容的影响，VTC输入端电压共模电平与电源电压相关，降低了电源电压对阈值影响造成的转换误差，降低阈值电压受电源电压的影响，提高了转换的精度和性能。
附图说明
图1是本发明的原理示意图。
图2是本发明实施例中降低寄生电容和电源影响的电压时间转换器的电路示意图。
图3是本发明实施例中降低寄生电容和电源影响的电压时间转换方法的时序关系示意图。
具体实施方式
以下通过特定的具体实例说明本发明的实施方式，本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用，本说明书中的各项细节也可以基于不同观点与应用，在没有背离本发明的精神下进行各种修饰或改变。需说明的是，在不冲突的情况下，以下实施例及实施例中的特征可以相互组合。
需要说明的是，以下实施例中所提供的图示仅以示意方式说明本发明的基本构想，遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制，其实际实施时各组件的型态、数量及比例可为一种随意的改变，且其组件布局型态也可能更为复杂。
本实施例中的降低寄生电容和电源影响的电压时间转换器，包括：
主采样网络，用于进行主输入信号和主参考电平采样；
补偿采样网络，用于进行补偿输入信号和补偿参考电平采样；
所述主采样网络设置有主采样电容和用于采样和转换输入电压与参考电压差值的主采样共模电平，所述补偿采样网络设置有补偿采样电容和补偿采样共模电平，所述补偿采样共模电平用于采样和转换输入电压与参考电平差值，并进行电压补偿；
放电网络，用于对所述主采样电容和补偿采样电容进行放电；
过阈值检测单元，用于检测所述放电网络输出的电平是否过阈值，完成输入电平到时间的转换。
如图1所示，在本实施例中，主采样网络主要包括主输入采样开关SW SM、主参考电平采样开关SW RM、主共模采样开关SW SPM和主采样电容C S。其中主采样共模电平为V CMSP，主要用于采样和转换输入信号V IN与参考电压V REF的差值。补偿采样网络主要包括补偿输入采样开关SW SC、补偿参考点评采样开关SW RC、补偿共模采样开关SW SPC和补偿采样电容C C，其中补偿采样共模电平为V CC，用于采样和转换输入信号V IN与参考点评V REF的差值，并且通过V CC补偿电源电压对阈值的影响。放电网络主要包括放电开关SW VTC1、SW VTC2和电流源I DIS，主要用于将主采样电容C S和补偿采样电容C C采样的输入信号进行放电，其中电 流源I DIS为恒流源，其值由放电时钟脉宽、TCD阈值电平、TCD输入端共模和输入信号V REF-V IN的摆幅决定。本实施例中的过阈值检测单元为过阈值检测器TCD(Threshold-Crossing Detector)，用于检测放电网络输出电平是否过阈值，如果过阈值则TCD输出翻转，具体地，通过TCD检测其输入端电平放电情况，当输入端电平低于阈值电平时，TCD输出翻转，完成输入电平到时间的转换。本实施例通过采用一个补偿采样网络和补偿电压，分别消除传统VTC寄生电容和TCD阈值受电源电压波动的影响。
在本实施例中，补偿采样网络在采样阶段与主采样网络同时对输入信号进行采样，在转换阶段接入转换网络，与主采样网络同时进行电压时间转换，此时过阈值检测器TCD输入端电压与输入电压关系转变为：
Figure PCTCN2019086601-appb-000005
其中，V TCD为过阈值检测单元输入端的电压，V CMSP为主采样共模电平，V IN为输入电压，V REF为参考电压，V CC为补偿采样共模电平，C S为主采样电容，C C为补偿采样电容,C P为过阈值检测单元输入端寄生电容。假设补偿采样网络采样共模V CC＝0V，此时补偿电容尺寸越大，VTC输出摆幅受到寄生电容影响越小。
通过补偿设计采样网络采样共模电平V CC，使其与电源电压关系为：
Figure PCTCN2019086601-appb-000006
则VTC输入端电压共模电平V TCD将与电源电压V DD相关，从而降低电源电压V DD对阈值影响造成的转换误差。
如图2所示，主输入采样开关SW SC两端分别与输入电压V IN和主采样电容C S的一端连接，所述主参考电平采样开关SW RM的两端分别与参考电压V REF和主采样电容C S的一端连接，主采样电容C S的另一端通过主共模采样开关SW SPM与主采样共模电平V CMSP连接；补偿输入采样开关SW SC两端分别与输入电压V IN和补偿采样电容C C的一端连接，补偿参考电平采样开关SW RC的两端分别与参考电压V REF和补偿采样电容C C的一端连接，补偿采样电容C C的另一端通过补偿共模采样开关SW SPC与补偿采样共模电平V CC连接；
所述第一放电开关的SW VTC1一端与补偿采样电容C C的另一端连接，第一放电开关SW VTC1的另一端与第二放电开关SW VTC2的一端连接，并且同时接入过阈值检测单元输入端，第二放电开关SW VTC2的另一端通过恒流源I DIS接地，过阈值检测单元输入端寄生电容C P一端与过阈值检测单元输入端连接，另一端接地。
在本实施例中，主采样电容尺寸被电路其他设计指标限制，并且取值较小时，补偿电容取值越大，寄生电容影响越小，并且主采样网络开关电容与补偿采样网络开关电容结构完全相同，主采样网络开关电容与补偿采样网络开关电容之间对应器件尺寸参数成比例，确保主采样网络的RC时间常数与补偿采样网络的RC时间常数相同，补偿采样共模电平V CC可以采用任意电平产生方式进行设计，只需满足上述(式2)中的电压关系即可。
相应地，本实施例还提供一种降低寄生电容和电源影响的电压时间转换方法，包括
设置用于进行主输入信号和主参考电平采样的主采样网络，以及用于进行补偿输入信号和补偿参考电平采样的补偿采样网络；
所述主采样网络设置有主采样电容和用于采样和转换输入电压与参考电压差值的主采样共模电平，所述补偿采样网络设置有补偿采样电容和补偿采样共模电平，所述补偿采样共模电平用于采样和转换输入电压与参考电平差值，并进行电压补偿；
在采样阶段，通过主采样网络与补偿采样网络同时对输入电压进行采样；
在转换阶段，通过将补偿采样网络接入转换网络，与主采样网络同时进行电压时间转换，过阈值检测单元检测所述放电网络输出的电平是否过阈值，完成输入电平到时间的转换。
如图3所示，在本实施例中，当采样时钟Φ S和Φ SP高电平时，如图2所示电路图中，开关SW SM、SW SC、SW SPM和SW SPC导通，其余开关SW RM、SW RC、SW VTC1和SW VTC2断开，VTC进入采样阶段，主采样电容C S和补偿采样电容C C跟踪保持输入信号V IN.当下极板采样时钟Φ SP下降沿到来时，开关SW SPM和SW SPC断开，主采样电容C S和补偿采样电容C C保持输入信号V IN。
当转换时钟Φ VTC高电平时，开关SW RM、SW RC、SW VTC1和SW VTC2导通，其余SW SM、SW SC、SW SPM和SW SPC断开，VTC进入转换阶段。
TCD输入电压初始值为：
Figure PCTCN2019086601-appb-000007
其中补偿采样共模电平V CC与过阈值检测器TCD阈值电压相关：
Figure PCTCN2019086601-appb-000008
其中，K为过阈值检测器TCD阈值电压V TH与电源电压V DD之间的比例系数，V TH表示TCD翻转阈值，补偿采样电平V CC可以采用任意电平产生方式进行设计，只需满足上式所述电压关系即可。将V CC表达式代入V TCD表达式得：
Figure PCTCN2019086601-appb-000009
TCD输入电压放电关系为：
Figure PCTCN2019086601-appb-000010
过阈值检测器检测放电电平V TCD_DIS是否低于阈值V TH，即输入信号V IN对应的转换输出时间为：
Figure PCTCN2019086601-appb-000011
将V TCD表达式代入上式可以消除阈值电压V TH对输出时间的影响，即消除V TH受电源电压波动的干扰对系统整体性能的影响。
当VTC放电到时刻t 0时，V TCD_DISS-V TH<0,则过阈值检测器TCD输出翻转，记录下V REF-V IN所对应的输出时刻t 0.VTC转换结束。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。

Claims (9)

  1. 一种降低寄生电容和电源影响的电压时间转换器，其特征在于，包括：
    主采样网络，用于进行主输入信号和主参考电平采样；
    补偿采样网络，用于进行补偿输入信号和补偿参考电平采样；
    所述主采样网络设置有主采样电容和用于采样和转换输入电压与参考电压差值的主采样共模电平，所述补偿采样网络设置有补偿采样电容和补偿采样共模电平，所述补偿采样共模电平用于采样和转换输入电压与参考电平差值，并进行电压补偿；
    放电网络，用于对所述主采样电容和补偿采样电容进行放电；
    过阈值检测单元，用于检测所述放电网络输出的电平是否过阈值，完成输入电平到时间的转换。
  2. 根据权利要求1所述的降低寄生电容和电源影响的电压时间转换器，其特征在于：在采样阶段，所述主采样网络与补偿采样网络同时对输入电压进行采样；在转换阶段，所述补偿采样网络接入主采样网络，与主采样网络同时进行电压时间域转换。
  3. 根据权利要求2所述的降低寄生电容和电源影响的电压时间转换器，其特征在于：在转换阶段时，过阈值检测单元输入端的电压与输入电压关系为：
    Figure PCTCN2019086601-appb-100001
    其中，V TCD为过阈值检测单元输入端的电压，V CMSP为主采样共模电平，V IN为输入电压，V REF为参考电压，V CC为补偿采样共模电平，C S为主采样电容，C C为补偿采样电容，C P为过阈值检测器输入端寄生电容。
  4. 根据权利要求3所述的降低寄生电容和电源影响的电压时间转换器，其特征在于：补偿采样共模电平V CC与电源电压V DD的关系，以及过阈值检测单元的电压阈值V TH与电源电压V DD的关系分别为：
    Figure PCTCN2019086601-appb-100002
    其中，K为过阈值检测单元电压阈值与电源电压的比例系数，V TH为过阈值检测单元的电压阈值，V DD为电源电压。
  5. 根据权利要求2所述的降低寄生电容和电源影响的电压时间转换器，其特征在于：所述主采样网络还包括主输入采样开关、主参考电平采样开关和主共模采样开关；所述补偿采样网络还包括补偿输入采样开关、补偿参考电平采样开关和补偿共模采样开关；所述放电网络包括第一放电开关、第二放电开关和恒流源；
    所述主输入采样开关两端分别与输入电压和主采样电容的一端连接，所述主参考电平采样开关的两端分别与参考电压和主采样电容的一端连接，主采样电容的另一端通过主共模采样开关与主采样共模电平连接；
    所述补偿输入采样开关两端分别与输入电压和补偿采样电容的一端连接，所述补偿参考电平采样开关的两端分别与参考电压和补偿采样电容的一端连接，补偿采样电容的另一端通过补偿共模采样开关与补偿采样共模电平连接；
    所述第一放电开关的一端与补偿采样电容的另一端连接，第一放电开关的另一端和所述第二放电开关一端同时与过阈值检测单元的输入端连接，第二放电开关的另一端通过恒流源接地，所述过阈值检测单元的输入端通过过阈值检测单元输入端寄生电容接地。
  6. 根据权利要求5所述的降低寄生电容和电源影响的电压时间转换器，其特征在于：所述主采样网络开关电容与补偿采样网络开关电容结构完全相同，主采样网络开关电容与补偿采样网络开关电容之间对应器件尺寸参数成比例，主采样网络的RC时间常数与补偿采样网络的RC时间常数相同。
  7. 一种降低寄生电容和电源影响的电压时间转换方法，其特征在于：
    设置用于进行主输入信号和主参考电平采样的主采样网络，以及用于进行补偿输入信号和补偿参考电平采样的补偿采样网络；
    所述主采样网络设置有主采样电容和用于采样和转换输入电压与参考电压差值的主采样共模电平，所述补偿采样网络设置有补偿采样电容和补偿采样共模电平，所述补偿采样共模电平用于采样和转换输入电压与参考电平差值，并进行电压补偿；
    在采样阶段，通过主采样网络与补偿采样网络同时对输入电压进行采样；
    在转换阶段，将补偿采样网络与主采样网络合并，同时接入转换网络，检测所述放电网络输出的电平是否过阈值，完成输入电平到时间的转换。
  8. 根据权利要求7中的降低寄生电容和电源影响的电压时间转换方法，其特征在于：在转换阶段时，过阈值检测单元输入端的电压与输入电压关系为：
    Figure PCTCN2019086601-appb-100003
    其中，V TCD为过阈值检测单元输入端的电压，V CMSP为主采样共模电平，V IN为输入电压，V REF为参考电压，V CC为补偿采样共模电平，C S为主采样电容，C C为补偿采样电容，C P为过阈值检测器输入端寄生电容。
  9. 根据权利要求7中的降低寄生电容和电源影响的电压时间转换方法，其特征在于：所述补偿采样共模电平V CC与电源电压V DD的关系，以及过阈值检测单元的电压阈值V TH与电 源电压V DD的关系分别为：
    Figure PCTCN2019086601-appb-100004
    其中，K为过阈值检测单元电压阈值与电源电压的比例系数，V TH为过阈值检测单元的电压阈值，V DD为电源电压。
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