WO2019220540A1 - Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés - Google Patents

Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés Download PDF

Info

Publication number
WO2019220540A1
WO2019220540A1 PCT/JP2018/018765 JP2018018765W WO2019220540A1 WO 2019220540 A1 WO2019220540 A1 WO 2019220540A1 JP 2018018765 W JP2018018765 W JP 2018018765W WO 2019220540 A1 WO2019220540 A1 WO 2019220540A1
Authority
WO
WIPO (PCT)
Prior art keywords
resin composition
thermosetting resin
molecular weight
semiconductor element
mass
Prior art date
Application number
PCT/JP2018/018765
Other languages
English (en)
Japanese (ja)
Inventor
山本　和弘
Original Assignee
日立化成株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立化成株式会社 filed Critical 日立化成株式会社
Priority to KR1020207031519A priority Critical patent/KR102482629B1/ko
Priority to SG11202011196SA priority patent/SG11202011196SA/en
Priority to JP2020518855A priority patent/JP7136200B2/ja
Priority to PCT/JP2018/018765 priority patent/WO2019220540A1/fr
Priority to CN201880093364.5A priority patent/CN112204730A/zh
Priority to TW108116804A priority patent/TWI799582B/zh
Publication of WO2019220540A1 publication Critical patent/WO2019220540A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L33/00—Compositions of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides or nitriles thereof; Compositions of derivatives of such polymers
    • C08L33/04—Homopolymers or copolymers of esters
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L63/00—Compositions of epoxy resins; Compositions of derivatives of epoxy resins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L2203/00—Applications
    • C08L2203/20—Applications use in electrical or conductive gadgets
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L2312/00—Crosslinking
    • C08L2312/04—Crosslinking with phenolic resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/27003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
    • H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29387—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32104—Disposition relative to the bonding area, e.g. bond pad
    • H01L2224/32106—Disposition relative to the bonding area, e.g. bond pad the layer connector connecting one bonding area to at least two respective bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/83204—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1029—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being a lead frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1052—Wire or wire-like electrical connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices

Definitions

  • the present disclosure relates to a semiconductor device, a thermosetting resin composition used for manufacturing the semiconductor device, and a dicing die bonding integrated tape.
  • Multi Chip Packages Multi Chip Packages
  • Film adhesives are widely used for mounting semiconductor elements.
  • An example of a multi-stage stacked package using a film adhesive is a wire-embedded package. This package is manufactured through a process of embedding the semiconductor element and the wire in the film adhesive by press-bonding the film adhesive to the semiconductor element that has been wire-bonded on the substrate.
  • connection reliability One of important characteristics required for semiconductor devices such as the above-mentioned stacked MCP is connection reliability.
  • connection reliability In order to improve connection reliability, development of film adhesives in consideration of characteristics such as heat resistance, moisture resistance and reflow resistance has been performed.
  • Patent Document 1 discloses an adhesive sheet having a thickness of 10 to 250 ⁇ m containing a thermosetting component and a filler.
  • Patent document 2 discloses the adhesive composition containing the mixture containing an epoxy resin and a phenol resin, and an acrylic copolymer.
  • connection reliability of a semiconductor device depends greatly on whether or not a semiconductor element can be mounted without generating voids on the bonding surface. Therefore, a high-fluid film adhesive is used so that the semiconductor element can be crimped without generating voids, or the melt viscosity is low so that the generated voids can be eliminated in the sealing process of the semiconductor elements. Ingenuity has been made such as using a film adhesive.
  • Patent Document 3 discloses a low viscosity and low tack strength adhesive sheet.
  • the adhesive sheets of Patent Documents 1 and 3 contain a relatively large amount of epoxy resin for the purpose of achieving high fluidity because the wires are embedded during crimping. For this reason, thermosetting easily proceeds due to heat generated during the manufacturing process of the semiconductor device. Thereby, the adhesive film becomes highly elastic, in other words, the adhesive sheet is not easily deformed even under high temperature and high pressure conditions at the time of sealing, and the gap formed at the time of pressure bonding may not eventually disappear.
  • the adhesive composition of Patent Document 2 has a low elastic modulus, voids can be eliminated in the sealing process, but due to the high viscosity, the wire embeddability during crimping is poor. It tends to be enough.
  • a controller chip for controlling the operation of the semiconductor device has been arranged at the top of the stacked semiconductor elements.
  • a packaging technique for a semiconductor device in which a controller chip is arranged at the bottom has been developed.
  • a relatively thick film adhesive is used when crimping a second-stage semiconductor element among multi-layered semiconductor elements, and a controller is provided inside the film adhesive.
  • the film-like adhesive used for such applications is required to have high fluidity that can embed a controller chip, a wire connecting the chip and the circuit pattern, and a step due to unevenness on the substrate surface.
  • This problem can be solved by using a high-fluid adhesive sheet such as the adhesive sheets of Patent Documents 1 and 3.
  • thermosetting treatment is often performed under pressure conditions. In this way, when heat is applied in a state where pressure is applied from the outside, the embedding property is improved while the resin is more easily flowed, and the above-mentioned problems often occur.
  • thermosetting resin composition useful for manufacturing a semiconductor device having excellent connection reliability and a dicing die bonding integrated tape including an adhesive layer made of the thermosetting resin composition.
  • the present inventors In order to develop a package in which the controller chip is embedded in a cured product of a film adhesive, the present inventors have conducted extensive research on the selection of resin for the film adhesive and the adjustment of physical properties. As a result, the present inventors have found that the melt viscosity of the film adhesive has a correlation with circuit contamination at the time of embedding and sink marks generated in the subsequent heat process.
  • a semiconductor device is disposed so as to cover a substrate, a first semiconductor element disposed on the substrate, and a region where the first semiconductor element is disposed on the substrate. And a first sealing layer that covers the surface of the first sealing layer opposite to the substrate side, and has a larger area than the first semiconductor element.
  • the first sealing layer is made of a cured product of a thermosetting resin composition, and the melt viscosity at 120 ° C. of the thermosetting resin composition is 2500 to 11500 Pa ⁇ s.
  • the semiconductor device is a mode in which a first semiconductor element (for example, a controller chip) is embedded in a cured product of a thermosetting resin composition, and the operation speed can be increased.
  • the first sealing layer is a cured product of a thermosetting resin composition having a melt viscosity of 2500 to 11,500 Pa ⁇ s at 120 ° C., so that there are sufficient gaps at the interface with the substrate or the first semiconductor element. In addition to being less, the occurrence of problems of contamination and sink marks on the substrate is sufficiently suppressed, so that excellent connection reliability between the substrate and the first semiconductor element can be achieved.
  • the semiconductor device according to the present disclosure may further include a circuit pattern formed on the surface of the substrate, and a first wire that electrically connects the first semiconductor element and the circuit pattern.
  • a semiconductor device according to the present disclosure includes a second wire that electrically connects a second semiconductor element and a circuit pattern, and a second sealing that seals the second semiconductor element and the second wire. And a layer.
  • the semiconductor device according to the present disclosure may further include a third semiconductor element stacked on the second semiconductor element.
  • the thermosetting resin composition constituting the film adhesive comprises a low molecular weight component (for example, epoxy resin) having a molecular weight of 10 to 1,000 and a high molecular weight component (for example, acrylic rubber) having a molecular weight of 100,000 to 1,000,000.
  • the low molecular weight component content M1 is 23 to 35 parts by weight with respect to 100 parts by weight of the resin component contained in the thermosetting resin composition
  • the high molecular weight component content M2 is the thermosetting resin.
  • the amount is preferably 25 to 45 parts by mass with respect to 100 parts by mass of the resin component contained in the composition.
  • the low molecular weight component contributes to excellent embedding properties, while the high molecular weight component contributes to suppression of problems caused by excessive flow.
  • the total amount (M1 + M2) of the low molecular weight component and the high molecular weight component is 54 to 76 parts by mass with respect to 100 parts by mass of the resin component contained in the thermosetting resin composition. Is preferred.
  • the molecular weight (weight average molecular weight) of the resin component contained in the thermosetting resin composition means a value measured by gel permeation chromatography (GPC) and converted using a standard polystyrene calibration curve.
  • the semiconductor device When a substrate having a circuit pattern on its surface is used as a substrate, the semiconductor device according to the present disclosure further includes a first wire that electrically connects the first semiconductor element and the circuit pattern.
  • a second wire that electrically connects the second semiconductor element and the circuit pattern, and a second sealing layer that seals the second semiconductor element and the second wire are further provided. It may be provided.
  • thermosetting resin composition undergoes a curing process for heating the thermosetting resin composition, and at least one of the wires and at least one of the semiconductor elements is converted into a thermosetting resin composition after the curing process.
  • the thermosetting resin composition has a melt viscosity of 2500 to 11500 Pa ⁇ s at 120 ° C., which is used in a manufacturing process of a semiconductor device including a process of forming an embedded state.
  • the resin has fluidity capable of embedding a semiconductor element or the like, and is contaminated in peripheral circuits at the time of embedding and a subsequent heat process (thermosetting treatment of the thermosetting resin composition). Problems due to excessive fluid flow can be sufficiently suppressed.
  • the dicing die bonding integrated tape according to the present disclosure includes an adhesive layer and an adhesive layer made of the thermosetting resin composition.
  • thermosetting resin composition used in the manufacture thereof and a dicing die bonding integrated tape including an adhesive layer made of the thermosetting resin composition are provided.
  • This thermosetting resin composition has excellent embeddability capable of embedding at least one of a semiconductor element such as a controller chip and a wire, and contamination of peripheral circuits at the time of embedding and excessive resin in the subsequent heat process. Problems caused by flow can be sufficiently suppressed.
  • FIG. 1 is a cross-sectional view schematically showing an example of a semiconductor device.
  • FIG. 2 is a cross-sectional view schematically showing an example of a laminate including a film adhesive and a second semiconductor element.
  • FIG. 3 is a cross-sectional view schematically showing the process of manufacturing the semiconductor device shown in FIG. 4 is a cross-sectional view schematically showing a process of manufacturing the semiconductor device shown in FIG.
  • FIG. 5 is a cross-sectional view schematically showing a process of manufacturing the semiconductor device shown in FIG. 6 is a cross-sectional view schematically showing a process of manufacturing the semiconductor device shown in FIG.
  • FIG. 7A to FIG. 7E are cross-sectional views schematically showing the process of manufacturing a laminate composed of a film adhesive and a second semiconductor element.
  • FIG. 8A is a photograph showing a cross section of a structure in which a phenomenon called “sink” does not occur
  • FIG. 8B shows a structure in which “sink” occurs (sink depth: 140 ⁇ m). It is a photograph which shows the cross section of).
  • FIG. 9A is a cross-sectional view schematically showing a structure for evaluating whether or not voids are generated
  • FIG. 9B is a photograph of the structure in which no voids are generated.
  • c) is a photograph of a structure in which voids are generated.
  • FIG. 1 is a cross-sectional view schematically showing a semiconductor device according to this embodiment.
  • the semiconductor device 100 shown in this figure includes a substrate 10, a first semiconductor element Wa disposed on the surface of the substrate 10, and a first sealing layer 20 that seals the first semiconductor element Wa.
  • the second semiconductor element Wb disposed above the first semiconductor element Wa, and the second sealing layer 40 that seals the second semiconductor element Wb.
  • the substrate 10 has circuit patterns 10a and 10b on the surface. From the viewpoint of suppressing warpage of the semiconductor device 100, the thickness of the substrate 10 is, for example, 90 to 180 ⁇ m, and may be 90 to 140 ⁇ m.
  • the substrate 10 may be an organic substrate or a metal substrate such as a lead frame.
  • the first semiconductor element Wa is a controller chip for driving the semiconductor device 100.
  • the first semiconductor element Wa is bonded to the circuit pattern 10 a via an adhesive 15 and is connected to the circuit pattern 10 b via the first wire 11.
  • the shape of the first semiconductor element Wa in plan view is, for example, a rectangle (square or rectangle).
  • the length of one side of the first semiconductor element Wa is, for example, 5 mm or less, and may be 2 to 4 mm or 1 to 4 mm.
  • the thickness of the first semiconductor element Wa is, for example, 10 to 150 ⁇ m, and may be 20 to 100 ⁇ m.
  • the second semiconductor element Wb has a larger area than the first semiconductor element Wa.
  • the second semiconductor element Wb is mounted on the substrate 10 via the first sealing layer 20 so as to cover the entire first semiconductor element Wa and a part of the circuit pattern 10b.
  • the shape of the second semiconductor element Wb in plan view is, for example, a rectangle (square or rectangle).
  • the length of one side of the second semiconductor element Wb is, for example, 20 mm or less, and may be 4 to 20 mm or 4 to 12 mm.
  • the thickness of the second semiconductor element Wb is, for example, 10 to 170 ⁇ m, and may be 20 to 120 ⁇ m.
  • the second semiconductor element Wb is connected to the circuit pattern 10 b through the second wire 12 and is sealed by the sealing layer 25.
  • 1st sealing layer 20 consists of hardened
  • the film adhesive 20P and the 2nd semiconductor element Wb are substantially the same size.
  • the laminated body 30 shown in FIG. 2 consists of the film adhesive 20P and the 2nd semiconductor element Wb, and is also called a semiconductor chip with an adhesive. As will be described later, the laminated body 30 is manufactured through a dicing process and a pickup process (see FIG. 7).
  • a method for manufacturing the semiconductor device 100 will be described. First, the structure 50 shown in FIG. 3 is manufactured. That is, the first semiconductor element Wa is disposed on the surface of the substrate 10 via the adhesive 15. Thereafter, the first semiconductor element Wa and the circuit pattern 10 b are electrically connected by the first wire 11.
  • the film-like adhesive 20 ⁇ / b> P of the laminate 30 separately prepared is pressed against the substrate 10.
  • the thickness of the film adhesive 20P may be set as appropriate according to the thickness of the first semiconductor element Wa, and may be in the range of 20 to 200 ⁇ m, for example, 30 to 200 ⁇ m or 40 to 150 ⁇ m. May be.
  • a sufficient distance (distance G in FIG. 5) between the first semiconductor element Wa and the second semiconductor element Wb can be secured.
  • the distance G is preferably 50 ⁇ m or more, for example, and may be 50 to 75 ⁇ m or 50 to 80 ⁇ m.
  • the pressure bonding of the film adhesive 20P to the substrate 10 is preferably performed, for example, under conditions of 80 to 180 ° C. and 0.01 to 0.50 MPa for 0.5 to 3.0 seconds.
  • the film adhesive 20P is cured by heating.
  • This curing treatment is preferably performed, for example, under conditions of 60 to 175 ° C. and 0.01 to 1.0 MPa for 5 minutes or more.
  • the 1st semiconductor element Wa is sealed with the hardened
  • the curing treatment of the film adhesive 20P may be performed in a pressurized atmosphere from the viewpoint of reducing voids.
  • the semiconductor device 100 is completed by sealing the second semiconductor element Wb with the second sealing layer 40. (See FIG. 1).
  • a dicing die bonding integrated tape 8 (hereinafter, referred to as “tape 8” in some cases) is placed in a predetermined device (not shown).
  • the tape 8 includes the base material layer 1, the adhesive layer 2, and the adhesive layer 20A in this order.
  • the base material layer 1 is, for example, a polyethylene terephthalate film (PET film).
  • PET film polyethylene terephthalate film
  • the semiconductor wafer W is a thin semiconductor wafer having a thickness of 10 to 100 ⁇ m, for example.
  • the semiconductor wafer W may be single crystal silicon, or may be a compound semiconductor such as polycrystalline silicon, various ceramics, and gallium arsenide.
  • the tape 8 is attached so that the adhesive layer 20A is in contact with one surface of the semiconductor wafer W.
  • This step is preferably performed under a temperature condition of 50 to 100 ° C., more preferably 60 to 80 ° C. When the temperature is 50 ° C. or higher, it is possible to obtain good adhesion between the semiconductor wafer W and the adhesive layer 20A. When the temperature is 100 ° C. or lower, the adhesive layer 20A is prevented from excessively flowing in this step.
  • the semiconductor wafer W, the adhesive layer 2 and the adhesive layer 20A are diced. As a result, the semiconductor wafer W is divided into individual semiconductor elements Wb.
  • the adhesive layer 20A is also singulated to form a film adhesive 20P. Examples of the dicing method include a method using a rotary blade or a laser. Note that the semiconductor wafer W may be thinned by grinding the semiconductor wafer W prior to dicing.
  • the adhesive layer 2 is, for example, a UV curable type
  • the adhesive layer 2 is cured by irradiating the adhesive layer 2 with ultraviolet rays, as shown in FIG.
  • the adhesive force between the adhesive 20P is reduced.
  • the base material layer 1 is expanded under normal temperature or cooling conditions, and the semiconductor elements Wa are separated from each other, and are pushed up by the needle 42 to be laminated from the adhesive layer 2.
  • the film-like adhesive 20P of the body 30 is peeled off, and the laminate 30 is sucked and picked up by the suction collet 44.
  • the laminated body 30 obtained in this way is used for manufacturing the structure 50 shown in FIG.
  • thermosetting resin composition constituting the film adhesive 20P will be described.
  • the film adhesive 20P is obtained by dividing the adhesive layer 20A into pieces, and both are made of the same thermosetting resin composition.
  • This thermosetting resin composition can be, for example, a semi-cured (B stage) state and then a completely cured product (C stage) state by a subsequent curing process.
  • the thermosetting resin composition preferably contains the following components.
  • component (a) Thermosetting resin (hereinafter sometimes simply referred to as “component (a)”)
  • component (b) High molecular weight component
  • component (c) Inorganic filler
  • component (a1) component when the (a) thermosetting resin contains an epoxy resin, the epoxy resin (hereinafter sometimes simply referred to as “(a1) component”) corresponds to the “low molecular weight component”.
  • the (a) thermosetting resin contains a phenol resin (hereinafter sometimes simply referred to as “component (a2)”) that can be a curing agent for the epoxy resin.
  • thermosetting resin composition may further contain the following components.
  • component (d) Coupling agent (hereinafter sometimes simply referred to as “component (d)”)
  • component (e) Curing accelerator
  • the thermosetting resin composition preferably contains both a low molecular weight component (component (a1)) having a molecular weight of 10 to 1,000 and a high molecular weight component (component (b)) having a molecular weight of 100,000 to 1,000,000.
  • component (a1) a low molecular weight component having a molecular weight of 10 to 1,000
  • component (b) a high molecular weight component having a molecular weight of 100,000 to 1,000,000.
  • the content M1 of the low molecular weight component is preferably 23 to 35 parts by mass and more preferably 25 to 35 parts by mass with respect to 100 parts by mass of the resin component contained in the thermosetting resin composition. .
  • the softening point of the low molecular weight component is preferably 50 ° C. or less, and may be, for example, 10 to 30 ° C.
  • the content M2 of the high molecular weight component is preferably 25 to 45 parts by mass, more preferably 30 to 40 parts by mass with respect to 100 parts by mass of the resin component contained in the thermosetting resin composition. .
  • the content M2 of the high molecular weight component is 25 parts by mass or more, it is easy to suppress problems caused by excessive flow (substrate contamination, sink marks, warpage, etc.), and on the other hand, it is 45 parts by mass or less. There is an effect that it is easy to achieve excellent embedding.
  • the softening point of a high molecular weight component is more than 50 degreeC and 100 degrees C or less.
  • the total amount of the low molecular weight component and the high molecular weight component (M1 + M2) is preferably 54 to 76 parts by mass, and 55 to 75 parts by mass with respect to 100 parts by mass of the resin component contained in the thermosetting resin composition. More preferably. When the total amount is 54 parts by mass or more, the effect of using these components in combination tends to be sufficiently exerted. On the other hand, when the total amount is 76 parts by mass or less, excellent pickup properties are achieved. The effect is easy.
  • the resin components contained in the thermosetting resin composition other than the low molecular weight component and the high molecular weight component mainly include thermosetting resins having a molecular weight of 1001 to 99,000.
  • the melt viscosity at 120 ° C. of the thermosetting resin composition is 2500 to 11500 Pa ⁇ s from the viewpoint of connection reliability.
  • the melt viscosity is 2500 Pa ⁇ s or more, it is possible to sufficiently suppress the occurrence of the problem of contamination and sink marks on the substrate 10 during the pressure-bonding process. For example, if there is a region (sink mark) where the cured product of the thermosetting resin composition does not exist between the second semiconductor element Wb and the substrate 10, the sealing material for the second sealing layer 40 is in that region. Intrusions, which tends to cause a problem that the second semiconductor element Wb is easily peeled off.
  • thermosetting resin composition is 11500 Pa ⁇ s or less, the gap at the interface with the substrate 10 or the first semiconductor element Wa can be sufficiently reduced.
  • the melt viscosity is preferably 5000 to 11000 Pa ⁇ s, more preferably 5000 to 10000 Pa ⁇ s, and further preferably 5000 to 9000 Pa ⁇ s.
  • the melt viscosity was measured while increasing the temperature at a heating rate of 5 ° C./min while giving 5% strain to the thermosetting resin composition formed into a film using ARES (manufactured by TA Instruments). Means measured value.
  • the melt viscosity at 100 ° C. of the thermosetting resin composition is preferably 3500 to 13500 Pa ⁇ s from the viewpoint of connection reliability.
  • this melt viscosity is 3500 Pa ⁇ s or more, it is possible to sufficiently suppress the occurrence of the problem of contamination and sink marks on the substrate 10 during the pressure-bonding process.
  • the melt viscosity is 13500 Pa ⁇ s or less, the gap at the interface with the substrate 10 or the first semiconductor element Wa can be sufficiently reduced.
  • This melt viscosity is preferably 5500 to 10500 Pa ⁇ s.
  • the amount of (a) thermosetting resin, (b) high molecular weight component and (c) inorganic filler should be adjusted appropriately. That's fine.
  • FIG. 9A shows a transparent substrate 10, a first semiconductor element Wa thereon, a first sealing layer 20 (cured product of the film adhesive 20P), and a second semiconductor element thereon. It is a structure provided with Wb.
  • FIGS. 9B and 9C are photographs taken from the back side of the transparent substrate 10 (in the direction of the arrow in FIG. 9A).
  • the embedding property of the film adhesive is sufficient and no void is generated.
  • the embedding property of the film adhesive is insufficient, and the void V is generated.
  • the storage elastic modulus at 180 ° C. of the cured product (C stage) of the thermosetting resin composition is preferably 10 MPa or more, more preferably 25 MPa or more, 50 MPa or more, or 100 MPa. It may be the above.
  • the upper limit value of the storage elastic modulus is, for example, 600 MPa and may be 500 MPa.
  • the storage elastic modulus at 180 ° C. of the cured product of the thermosetting resin composition can be measured by using a dynamic viscoelastic device using a film-like adhesive cured at a temperature of 175 ° C. as a sample. it can.
  • the component (a1) can be used without particular limitation as long as it has an epoxy group in the molecule.
  • Examples of the component (a1) include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, bisphenol A novolak type epoxy resin, bisphenol F novolak type.
  • Epoxy resin dicyclopentadiene skeleton-containing epoxy resin, stilbene-type epoxy resin, triazine skeleton-containing epoxy resin, fluorene skeleton-containing epoxy resin, triphenolphenolmethane type epoxy resin, biphenyl type epoxy resin, xylylene type epoxy resin, biphenyl aralkyl type epoxy Resin, naphthalene type epoxy resin, polyfunctional phenols, polycyclic aromatic diglycidyl ether compounds such as anthracene, etc. You may use these individually by 1 type or in combination of 2 or more types.
  • the component (a1) may be a cresol novolac type epoxy resin, a bisphenol F type epoxy resin, or a bisphenol A type epoxy resin from the viewpoint of heat resistance.
  • the epoxy equivalent of the component (a1) may be 90 to 300 g / eq, 110 to 290 g / eq, or 130 to 280 g / eq.
  • the epoxy equivalent of the component (a1) is in such a range, the fluidity tends to be ensured while maintaining the bulk strength of the film adhesive.
  • the content of the component (a1) is 5 to 50 parts by mass, 10 to 40 parts by mass, or 20 to 30 with respect to 100 parts by mass of the total mass of the components (a), (b), and (c). It may be a mass part.
  • the content of the component (a1) is 5 parts by mass or more, the embedding property of the film adhesive tends to be better. It exists in the tendency which can suppress generation
  • the component (a2) can be used without particular limitation as long as it has a phenolic hydroxyl group in the molecule.
  • examples of the component (a2) include phenols such as phenol, cresol, resorcin, catechol, bisphenol A, bisphenol F, phenylphenol, and aminophenol, and / or naphthols such as ⁇ -naphthol, ⁇ -naphthol, and dihydroxynaphthalene.
  • Phenols such as novolak-type phenolic resin, allylated bisphenol A, allylated bisphenol F, allylated naphthalene diol, phenol novolak, phenol and the like obtained by condensation or cocondensation with a compound having an aldehyde group such as formaldehyde under an acidic catalyst And / or phenol aralkyl resins and naphthol aralkyl resins synthesized from naphthols and dimethoxyparaxylene or bis (methoxymethyl) biphenyl. You may use these individually by 1 type or in combination of 2 or more types.
  • the component (a2) may be a phenol aralkyl resin, a naphthol aralkyl resin, or a novolac type phenol resin from the viewpoint of hygroscopicity and heat resistance.
  • the hydroxyl equivalent of the component (a2) may be 80 to 250 g / eq, 90 to 200 g / eq, or 100 to 180 g / eq.
  • the adhesive strength tends to be maintained higher while maintaining the fluidity of the film adhesive.
  • the softening point of the component (a2) may be 50 to 140 ° C, 55 to 120 ° C, or 60 to 100 ° C.
  • the content of the component (a2) is 5 to 50 parts by mass, 10 to 40 parts by mass, or 20 to 30 with respect to 100 parts by mass of the total mass of the components (a), (b), and (c). It may be a mass part.
  • the content of the component (a2) is 5 parts by mass or more, better curability tends to be obtained.
  • the content of the component (a2) is 50 parts by mass or less, the embedding property of the film adhesive tends to be better.
  • the ratio of the epoxy equivalent of component (a1) to the hydroxyl equivalent of component (a2) is 0.30 / 0.70 from the viewpoint of curability. ⁇ 0.70 / 0.30, 0.35 / 0.65 ⁇ 0.65 / 0.35, 0.40 / 0.60 ⁇ 0.60 / 0.40, or 0.45 / 0.55 ⁇ It may be 0.55 / 0.45.
  • the equivalent ratio is 0.30 / 0.70 or more, more sufficient curability tends to be obtained.
  • the equivalent ratio is 0.70 / 0.30 or less, the viscosity can be prevented from becoming too high, and more sufficient fluidity can be obtained.
  • the component (b) preferably has a glass transition temperature (Tg) of 50 ° C. or lower.
  • component (b) examples include acrylic resins, polyester resins, polyamide resins, polyimide resins, silicone resins, butadiene resins, acrylonitrile resins, and modified products thereof.
  • the component may contain an acrylic resin from a fluid viewpoint.
  • the acrylic resin means a polymer containing a structural unit derived from a (meth) acrylic acid ester.
  • the acrylic resin is preferably a polymer containing a structural unit derived from a (meth) acrylic acid ester having a crosslinkable functional group such as an epoxy group, an alcoholic or phenolic hydroxyl group, or a carboxyl group as a structural unit.
  • the acrylic resin may be an acrylic rubber such as a copolymer of (meth) acrylic acid ester and acrylonitrile.
  • the glass transition temperature (Tg) of the acrylic resin may be ⁇ 50 to 50 ° C. or ⁇ 30 to 30 ° C. If the Tg of the acrylic resin is ⁇ 50 ° C. or higher, the flexibility of the adhesive composition tends to be prevented from becoming too high. Thereby, it becomes easy to cut
  • the glass transition temperature (Tg) means a value measured using a DSC (thermal differential scanning calorimeter) (for example, “Thermo Plus 2” manufactured by Rigaku Corporation).
  • the weight average molecular weight (Mw) of the acrylic resin may be 100,000 to 3 million or 500,000 to 2 million.
  • Mw means a value measured by gel permeation chromatography (GPC) and converted using a standard polystyrene calibration curve.
  • acrylic resins include, for example, SG-70L, SG-708-6, WS-023 EK30, SG-280 EK23, HTR-860P-3CSP, HTR-860P-3CSP-3DB (all Nagase ChemteX Corporation) Company-made).
  • the content of the component (b) is 5 to 70 parts by mass, 10 to 50 parts by mass, or 15 to 30 with respect to 100 parts by mass of the total mass of the components (a), (b), and (c). It may be a mass part.
  • the content of the component (b) is 5 parts by mass or more, it is possible to further improve the control of fluidity during molding and the handleability at high temperatures.
  • the content of component (b) is 70 parts by mass or less, the embedding property can be further improved.
  • the component (c) examples include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, aluminum borate whisker, and boron nitride. And silica. You may use these individually by 1 type or in combination of 2 or more types. Among these, the component (c) may be silica from the viewpoint of compatibility with the resin.
  • the average particle diameter of the component (c) may be 0.005 to 1 ⁇ m or 0.05 to 0.5 ⁇ m from the viewpoint of improving adhesiveness.
  • an average particle diameter means the value calculated
  • the content of the component (c) is 5 to 50 parts by mass, 15 to 45 parts by mass, or 25 to 40 with respect to 100 parts by mass of the total mass of the components (a), (b), and (c). It may be a mass part.
  • the content of the component (c) is 5 parts by mass or more, the fluidity of the film adhesive tends to be further improved.
  • the content of the component (c) is 50 parts by mass or less, the dicing property of the film adhesive tends to be better.
  • the component (d) may be a silane coupling agent.
  • the silane coupling agent include ⁇ -ureidopropyltriethoxysilane, ⁇ -mercaptopropyltrimethoxysilane, 3-phenylaminopropyltrimethoxysilane, 3- (2-aminoethyl) aminopropyltrimethoxysilane, and the like. It is done. You may use these individually by 1 type or in combination of 2 or more types.
  • the content of the component (d) may be 0.01 to 5 parts by mass with respect to 100 parts by mass of the total mass of the components (a), (b), and (c).
  • a component is not specifically limited, What is generally used can be used.
  • the component (e) include imidazoles and derivatives thereof, organic phosphorus compounds, secondary amines, tertiary amines, quaternary ammonium salts, and the like. You may use these individually by 1 type or in combination of 2 or more types. Among these, from the viewpoint of reactivity, the component (e) may be imidazoles and derivatives thereof.
  • imidazoles examples include 2-methylimidazole, 1-benzyl-2-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-methylimidazole, and the like. You may use these individually by 1 type or in combination of 2 or more types.
  • the content of the component (e) may be 0.01 to 1 part by mass with respect to 100 parts by mass of the total mass of the component (a), the component (b), and the component (c).
  • the dicing die bonding integrated tape 8 shown in FIG. 7A and the manufacturing method thereof will be described.
  • the production method of the tape 8 includes a step of applying a varnish of an adhesive composition containing a solvent on a base film (not shown), and heating and drying the applied varnish at 50 to 150 ° C. Forming a step.
  • the varnish of the adhesive composition can be prepared, for example, by mixing or kneading the components (a) to (c) and, if necessary, the components (d) and (e) in a solvent. Mixing or kneading can be performed by using a normal stirrer, a raking machine, a three-roller, a ball mill or the like and appropriately combining these.
  • the solvent for producing the varnish is not particularly limited as long as it can uniformly dissolve, knead or disperse the above-described components, and a conventionally known solvent can be used.
  • solvents include ketone solvents such as acetone, methyl ethyl ketone, methyl isobutyl ketone, and cyclohexanone, dimethylformamide, dimethylacetamide, N methylpyrrolidone, toluene, xylene, and the like. It is preferable to use methyl ethyl ketone, cyclohexanone, etc. in terms of fast drying speed and low price.
  • a base film For example, a polyester film, a polypropylene film (OPP film etc.), a polyethylene terephthalate film, a polyimide film, a polyetherimide film, a polyether naphthalate film, a methylpentene film etc. are mentioned.
  • a known method can be used, and examples thereof include a knife coating method, a roll coating method, a spray coating method, a gravure coating method, a bar coating method, and a curtain coating method.
  • the drying conditions are not particularly limited as long as the solvent used is sufficiently volatilized.
  • the drying can be performed by heating at 50 to 150 ° C. for 1 to 30 minutes.
  • the heat drying may be performed by raising the temperature stepwise at a temperature within the range of 50 to 150 ° C.
  • the tape 8 can be obtained by laminating the laminated film obtained as described above and a dicing tape (a laminated body of the base material layer 1 and the adhesive layer 2).
  • the base material layer 1 include plastic films such as a polytetrafluoroethylene film, a polyethylene terephthalate film, a polyethylene film, a polypropylene film, a polymethylpentene film, and a polyimide film.
  • the base material layer 1 may be subjected to surface treatment such as primer coating, UV treatment, corona discharge treatment, polishing treatment, etching treatment, and the like as necessary.
  • the adhesive layer 2 may be a UV curable type or a pressure sensitive type.
  • the tape 8 may further include a protective film (not shown) that covers the adhesive layer 2.
  • this invention is not limited to the said embodiment.
  • the package in the form in which the two semiconductor elements Wa and Wb are stacked is illustrated.
  • the third semiconductor element may be stacked above the second semiconductor element Wb.
  • One or more semiconductor elements may be further stacked thereon.
  • Varnishes (total 6 types) containing the components shown in Table 1 and Table 2 were prepared as follows. That is, cyclohexanone was added to a composition containing an epoxy resin and a phenol resin as thermosetting resins and an inorganic filler and stirred. Acrylic rubber as a high molecular weight component was added thereto and stirred, and then a coupling agent and a curing accelerator were further added and stirred until each component was sufficiently uniform to obtain a varnish.
  • the varnish containing the above components was filtered through a 100 mesh filter and vacuum degassed.
  • the varnish after vacuum defoaming was applied on a polyethylene terephthalate (PET) film (thickness 38 ⁇ m) subjected to a release treatment.
  • PET polyethylene terephthalate
  • the applied varnish was heat-dried in two stages at 90 ° C. for 5 minutes and then at 140 ° C. for 5 minutes.
  • an adhesive sheet provided with a film adhesive (thickness: 60 ⁇ m) in a B-stage state on a PET film as a base film was obtained.
  • melt viscosity of film adhesive The melt viscosity at 100 ° C. and 120 ° C. of the film adhesive was measured by the following method. That is, a film for measurement was obtained by laminating five sheets of a film adhesive having a thickness of 60 ⁇ m to a thickness of 300 ⁇ m, and punching it to a size of 10 mm ⁇ 10 mm. A circular aluminum plate jig having a diameter of 8 mm was set in a dynamic viscoelastic device ARES (manufactured by TA Instruments), and the sample was further set therein.
  • ARES dynamic viscoelastic device
  • the embedding property of the film adhesive was evaluated by the following method.
  • a dicing die bonding integrated film HR-9004-10 manufactured by Hitachi Chemical Co., Ltd., adhesive layer thickness 10 ⁇ m, adhesive layer thickness 110 ⁇ m
  • a semiconductor wafer (diameter: 8 inches, thickness: 50 ⁇ m). It was.
  • a first laminated body composed of a first semiconductor element (controller chip, size: 3.0 mm ⁇ 3.0 mm) and a film adhesive was obtained.
  • the film adhesive is semi-cured by heating at 120 ° C. for 2 hours. I let you.
  • the 2nd semiconductor element was crimped
  • alignment was performed so that the center positions of the first semiconductor element and the second semiconductor element that were previously crimped coincide with each other in plan view.
  • the structure obtained as described above was put into a pressure oven, heated from 35 ° C. to 140 ° C.
  • the die shear strength (adhesive strength) of the cured product of the film adhesive was measured by the following method. First, each film-like adhesive (thickness 120 ⁇ m) according to Examples and Comparative Examples was attached to a semiconductor wafer (thickness 400 ⁇ m) at 70 ° C. By dicing this, a laminate composed of a semiconductor element (size: 5 mm ⁇ 5 mm) and a film adhesive was obtained. On the other hand, a substrate having a surface coated with a solder resist ink (AUS308) was prepared. The semiconductor element was pressure-bonded to this surface via a film adhesive under the conditions of 120 ° C., 0.1 MPa, and 5 seconds.
  • AUS308 solder resist ink
  • the sample for a measurement was obtained by hardening a film adhesive by further heating at 170 degreeC for 3 hours. This sample was allowed to stand for 168 hours under the conditions of 85 ° C. and 60 RH%. Thereafter, the sample was allowed to stand at 25 ° C. and 50% RH for 30 minutes, and then the die shear strength was measured at 250 ° C., and this was taken as the adhesive strength.
  • a universal bond tester series 4000 manufactured by Dage was used for the measurement of die shear strength. Tables 3 and 4 show the results.
  • the reflow resistance of the film adhesive was evaluated by the following method. First, a structure similar to the structure used for the evaluation of embedding was produced. An evaluation package was obtained by sealing the second semiconductor element of the structure with a mold sealing material (trade name “CEL-9750ZHF10, manufactured by Hitachi Chemical Co., Ltd.). The conditions were 175 ° C./6.7 MPa / 90 seconds, and the curing conditions were 175 ° C. and 5 hours. Twenty-four packages described above were prepared, and these were exposed to the environment defined by JEDEC (level 3, 30 ° C., 60 RH%, 192 hours) to absorb moisture.
  • JEDEC level 3, 30 ° C., 60 RH%, 192 hours
  • thermosetting resin composition capable of sufficiently suppressing the above, a semiconductor device produced using the same, and a method for producing the same.
  • Adhesive layer 8 ... Dicing die bonding integrated tape, 10 ... Board

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Organic Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Medicinal Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)

Abstract

Le dispositif à semi-conducteur selon la présente invention comprend : un substrat ; un premier élément semi-conducteur disposé sur le substrat ; une première couche d'encapsulation qui encapsule le premier élément semi-conducteur ; et un second élément semi-conducteur disposé de manière à recouvrir la surface de la première couche d'encapsulation à l'opposé de sa surface côté substrat, et ayant une surface plus grande que celle du premier élément semi-conducteur. La première couche d'encapsulation est formée à partir d'un produit durci d'une composition de résine thermodurcissable dont la viscosité à l'état fondu à 120 °C s'inscrit dans la plage de 2 500 à 11 500 Pa∙s.
PCT/JP2018/018765 2018-05-15 2018-05-15 Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés WO2019220540A1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020207031519A KR102482629B1 (ko) 2018-05-15 2018-05-15 반도체 장치, 그리고 그 제조에 사용하는 열경화성 수지 조성물 및 다이싱 다이 본딩 일체형 테이프
SG11202011196SA SG11202011196SA (en) 2018-05-15 2018-05-15 Semiconductor device, thermosetting resin composition used for production thereof, and dicing die bonding integrated tape
JP2020518855A JP7136200B2 (ja) 2018-05-15 2018-05-15 半導体装置、並びに、その製造に使用する熱硬化性樹脂組成物及びダイシングダイボンディング一体型テープ
PCT/JP2018/018765 WO2019220540A1 (fr) 2018-05-15 2018-05-15 Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés
CN201880093364.5A CN112204730A (zh) 2018-05-15 2018-05-15 半导体装置及其制造中使用的热固化性树脂组合物以及切割-芯片接合一体型带
TW108116804A TWI799582B (zh) 2018-05-15 2019-05-15 半導體裝置以及在其製造中使用的熱硬化性樹脂組成物以及切晶黏晶一體型帶

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2018/018765 WO2019220540A1 (fr) 2018-05-15 2018-05-15 Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés

Publications (1)

Publication Number Publication Date
WO2019220540A1 true WO2019220540A1 (fr) 2019-11-21

Family

ID=68539657

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2018/018765 WO2019220540A1 (fr) 2018-05-15 2018-05-15 Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés

Country Status (6)

Country Link
JP (1) JP7136200B2 (fr)
KR (1) KR102482629B1 (fr)
CN (1) CN112204730A (fr)
SG (1) SG11202011196SA (fr)
TW (1) TWI799582B (fr)
WO (1) WO2019220540A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022163465A1 (fr) * 2021-01-28 2022-08-04 昭和電工マテリアルズ株式会社 Dispositif à semi-conducteur, son procédé de production, composition de résine thermodurcissable, film de fixation et film intégré de découpage en dés/fixation de puce

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022182532A (ja) * 2021-05-28 2022-12-08 キオクシア株式会社 半導体装置およびその製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010118554A (ja) * 2008-11-13 2010-05-27 Nec Electronics Corp 半導体装置およびその製造方法
JP2010182816A (ja) * 2009-02-04 2010-08-19 Nitto Denko Corp 熱硬化型ダイボンドフィルム
JP2012191027A (ja) * 2011-03-11 2012-10-04 Sekisui Chem Co Ltd 接着剤層付き半導体チップ及び半導体装置の製造方法
JP2015120836A (ja) * 2013-12-24 2015-07-02 日東電工株式会社 接着フィルム、ダイシング・ダイボンドフィルム、半導体装置の製造方法及び半導体装置
JP2018014501A (ja) * 2017-08-07 2018-01-25 日立化成株式会社 フィルム状接着剤及びダイシングダイボンディング一体型接着シート

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5236134B2 (ja) 2001-01-26 2013-07-17 日立化成株式会社 接着剤組成物、接着部材、半導体搭載用支持部材及び半導体装置等
JP2005103180A (ja) 2003-10-02 2005-04-21 Matsushita Electric Ind Co Ltd 洗濯機
US7560821B2 (en) * 2005-03-24 2009-07-14 Sumitomo Bakelite Company, Ltd Area mount type semiconductor device, and die bonding resin composition and encapsulating resin composition used for the same
JP5524465B2 (ja) 2007-10-24 2014-06-18 日立化成株式会社 接着シート及びこれを用いた半導体装置およびその製造方法
CN103249559B (zh) * 2010-11-18 2015-08-05 日立化成株式会社 半导体密封填充用膜状树脂组合物、半导体装置的制造方法和半导体装置
KR102067945B1 (ko) * 2012-03-08 2020-01-17 히타치가세이가부시끼가이샤 접착시트 및 반도체 장치의 제조 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010118554A (ja) * 2008-11-13 2010-05-27 Nec Electronics Corp 半導体装置およびその製造方法
JP2010182816A (ja) * 2009-02-04 2010-08-19 Nitto Denko Corp 熱硬化型ダイボンドフィルム
JP2012191027A (ja) * 2011-03-11 2012-10-04 Sekisui Chem Co Ltd 接着剤層付き半導体チップ及び半導体装置の製造方法
JP2015120836A (ja) * 2013-12-24 2015-07-02 日東電工株式会社 接着フィルム、ダイシング・ダイボンドフィルム、半導体装置の製造方法及び半導体装置
JP2018014501A (ja) * 2017-08-07 2018-01-25 日立化成株式会社 フィルム状接着剤及びダイシングダイボンディング一体型接着シート

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022163465A1 (fr) * 2021-01-28 2022-08-04 昭和電工マテリアルズ株式会社 Dispositif à semi-conducteur, son procédé de production, composition de résine thermodurcissable, film de fixation et film intégré de découpage en dés/fixation de puce

Also Published As

Publication number Publication date
TW202010788A (zh) 2020-03-16
CN112204730A (zh) 2021-01-08
SG11202011196SA (en) 2020-12-30
JP7136200B2 (ja) 2022-09-13
TWI799582B (zh) 2023-04-21
KR102482629B9 (ko) 2024-03-25
KR20210008341A (ko) 2021-01-21
JPWO2019220540A1 (ja) 2021-07-01
KR102482629B1 (ko) 2022-12-29

Similar Documents

Publication Publication Date Title
WO2020013250A1 (fr) Procédé de fabrication de dispositif à semi-conducteur, composition de résine thermodurcissable, et film de fixation de matrice de découpage en dés
CN113348221A (zh) 胶黏剂组合物、膜状胶黏剂、胶黏剂片及半导体装置的制造方法
JP2023017948A (ja) 接着剤組成物、フィルム状接着剤、接着シート、及び半導体装置の製造方法
WO2019151260A1 (fr) Procédé de fabrication de dispositif à semi-conducteur et film adhésif
WO2019220540A1 (fr) Dispositif à semi-conducteur, composition de résine thermodurcissable utilisée pour sa production, et bande intégrée de liaison de puces et de découpage en dés
JP2024010048A (ja) 半導体装置
JP7322897B2 (ja) 接着フィルム、ダイシング・ダイボンディング一体型フィルム及び半導体パッケージの製造方法
WO2019150445A1 (fr) Adhésif en forme de film, procédé de production associé, et dispositif semi-conducteur et procédé de production associé
WO2022163465A1 (fr) Dispositif à semi-conducteur, son procédé de production, composition de résine thermodurcissable, film de fixation et film intégré de découpage en dés/fixation de puce
JP7513015B2 (ja) 接着剤組成物、フィルム状接着剤、接着シート、及び半導体装置の製造方法
TWI785196B (zh) 熱硬化性樹脂組成物、膜狀接著劑、接著片及半導體裝置的製造方法
TWI827779B (zh) 切晶-黏晶一體型膜及半導體裝置的製造方法
WO2023157846A1 (fr) Adhésif de type film et son procédé de production, film de découpage en dés/puces intégré, et dispositif à semi-conducteur et son procédé de production
WO2023181397A1 (fr) Film adhésif pour semi-conducteur, film de collage de puce d'individualisation et procédé de fabrication de dispositif à semi-conducteur
WO2023152837A1 (fr) Adhésif sous forme de film, film deux-en-un de découpage en dés et de fixage de puce, dispositif semiconducteur et procédé de fabrication associé
WO2022149582A1 (fr) Adhésif de type film, film de découpage en dés/fixation de puce intégré, dispositif à semi-conducteur et son procédé de production
JP2023142901A (ja) 半導体用接着フィルム、ダイシング・ダイボンディング一体型フィルム、及び半導体装置の製造方法
JP2024091963A (ja) 接着剤組成物、フィルム状接着剤、接着シート、及び半導体装置の製造方法
TW202414550A (zh) 半導體裝置的製造方法、接著層及切晶黏晶一體型膜
TW202237786A (zh) 接著劑組成物、膜狀接著劑、切割晶粒接合一體型膜、以及半導體裝置及其製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18919040

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2020518855

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18919040

Country of ref document: EP

Kind code of ref document: A1