WO2019218729A1 - 一种氮化物发光二极管组件 - Google Patents

一种氮化物发光二极管组件 Download PDF

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WO2019218729A1
WO2019218729A1 PCT/CN2019/074127 CN2019074127W WO2019218729A1 WO 2019218729 A1 WO2019218729 A1 WO 2019218729A1 CN 2019074127 W CN2019074127 W CN 2019074127W WO 2019218729 A1 WO2019218729 A1 WO 2019218729A1
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Prior art keywords
layer
defect
nitride
defect control
control layer
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PCT/CN2019/074127
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English (en)
French (fr)
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蓝永凌
林兓兓
蔡吉明
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厦门三安光电有限公司
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Publication of WO2019218729A1 publication Critical patent/WO2019218729A1/zh
Priority to US16/949,639 priority Critical patent/US11522106B2/en
Priority to US17/981,088 priority patent/US11817528B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025Physical imperfections, e.g. particular concentration or distribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the present invention is in the field of semiconductor optoelectronic devices, and more particularly to a nitride light emitting diode assembly capable of controlling the size and density of "V" shaped defects.
  • a nitride light emitting diode is a semiconductor solid-state light-emitting device that uses a semiconductor PN junction as a light-emitting material to directly convert electricity into light.
  • a conventional light emitting diode structure generally includes: a substrate, and an N-type nitride layer, a stress releasing layer, an active layer, an electron blocking layer, and a P-type nitride layer which are sequentially disposed on the substrate.
  • the stress relieving layer is composed of an InGaN layer and a GaN layer which are alternately stacked periodically, and the stress releasing layer which is grown at a low temperature generally achieves stress release by opening some "V” shaped defects, but these "V” shaped defects are
  • the initial is due to the lattice mismatch between the sapphire substrate and the GaN epitaxial layer and the large difference in thermal expansion coefficient, which is then formed by the amplification of the stress relief layer, so the opening size and defect of the "V” shaped defect
  • the density is uncontrollable, resulting in uneven distribution of electronic holes in the LED device, causing leakage, affecting the luminous efficiency of the LED and causing the Droop effect.
  • the present invention firstly proposes a nitride light emitting diode assembly comprising: an N-type doped nitride layer; an active layer on the N-type doped nitride layer; P-type doped nitrogen a layer of the defect layer is disposed on the active layer; the defect control layer is further disposed between the N-type doped nitride layer and the active layer, and the defect control layer includes a first defect control layer, a second defect control layer and a third defect control layer, wherein the third defect control layer is an aluminum-containing ternary nitride superlattice structure or an aluminum-containing ternary nitride Single layer structure.
  • the aluminum-containing ternary nitride single layer structure is an AlGaN single layer or an InAIN single layer.
  • the first defect control layer, the second defect control layer, and the third defect control layer are all n-type impurity doped layers, and the n-type impurity concentration of the N-type doped nitride layer is second.
  • the present invention also provides a nitride light emitting diode assembly, comprising: an N-type doped nitride layer; an active layer on the N-type doped nitride layer; a P-type doped nitride layer, located in Above the source layer; characterized in that: a defect control layer is further disposed between the N-type doped nitride layer and the active layer, and the defect control layer includes a first defect control layer and a second defect control layer And a third defect control layer, wherein the third defect control layer is an aluminum-containing quaternary nitride superlattice structure or an aluminum-containing quaternary nitrogen monolayer structure.
  • the superlattice structure is periodically stacked
  • the layer composition where 0 ⁇ xlS0.3, 0 ⁇ yl ⁇ 0.3, 0 ⁇ ml ⁇ 0.3, 0 ⁇ zl ⁇ 0.3, and xl and ml, y 1 and Z 1 are not equal at the same time.
  • the aluminum-containing quaternary nitrogen single layer structure is an AlInGaN single layer.
  • the first defect control layer, the second defect control layer, and the third defect control layer are all n-type impurity doped layers, and the n-type impurity concentration of the N-type doped nitride layer is controlled by the second defect.
  • the present invention further provides a nitride light emitting diode assembly, comprising: an N-type doped nitride layer; an active layer on the N-type doped nitride layer; a P-type doped nitride layer, located in Above the source layer; characterized in that: a defect control layer is further disposed between the N-type doped nitride layer and the active layer, and the defect control layer includes a first defect control layer and a second defect control layer And a third defect regulating layer, wherein the third defect regulating layer is a superlattice structure composed of an aluminum-containing ternary nitride and a quaternary nitride.
  • the superlattice structure is periodically stacked
  • the superlattice structure is periodically stacked
  • the superlattice structure is periodically stacked
  • the first defect control layer, the second defect control layer, and the third defect control layer are all n-type impurity doped layers, and the n-type impurity concentration of the N-type doped nitride layer is >second
  • the present invention provides a first defect control layer, a second defect modulation layer, and a third defect modulation layer between the N-type layer and the active layer to regulate the size and density of the "V"-shaped defect. Colleagues also regulate the antistatic ability of devices due to more defects.
  • the three-layer defect control layer not only the density and size of the "V"-shaped defects are controlled, but also the hole injection efficiency is improved, and the electron migration rate and electron overflow are reduced, the efficiency Droop effect of the device is lowered, and the efficiency is improved.
  • the uniformity of the distribution of the electron holes in the active layer effectively improves the effective composite radiation luminous efficiency of the device.
  • FIG. 1 is a cross-sectional structural view of a nitride light emitting diode assembly according to Embodiment 1 of the present invention, and the left side is an energy band distribution diagram of a third defect control layer.
  • FIG. 2 is a cross-sectional structural view of another nitride light emitting diode assembly according to Embodiment 1 of the present invention, wherein the left side is an energy band distribution diagram of the third defect control layer.
  • FIG. 3 is an atomic force microscope comparison diagram of a light-emitting diode assembly of a first embodiment of the present invention and a light-emitting diode assembly provided by the prior art, wherein FIG. 3a is an atomic force microscope diagram of a light-emitting diode assembly provided by the prior art.
  • FIG. 3b is an atomic force microscope diagram of a nitride light emitting diode assembly according to Embodiment 1 of the present invention.
  • FIG. 4 is a cross-sectional structural view showing a nitride light emitting diode assembly according to Embodiment 2 of the present invention.
  • the drawing is labeled: 100: substrate; 110: buffer layer; 200: N-type doped nitride layer; 210: platform; 2 20: first electrode; 300: defect control layer; 310: first modulation Layer; 320: second modulation layer; 330 : third modulation layer; 340: "V" shaped defect; 400: active layer; 500: P type doped nitride layer; 510: electron blocking layer; 520: P type ohmic contact layer.
  • FIG. 1 is a schematic cross-sectional view of a nitride light emitting diode assembly according to an embodiment of the present invention.
  • a substrate 100 is first provided.
  • the substrate 100 may be sapphire, silicon, carbonized sulphate, zinc oxide, gallium nitride, aluminum nitride or other materials suitable for epitaxial growth of crystals.
  • an N-type doped nitride layer 200 is formed on the upper surface of the substrate 100.
  • the material of the N-type doped nitride layer 200 may be GaN doped with silicon or germanium or tin or lead, or may be unintentionally doped. GaN layer.
  • the N-type doped nitride layer 200 has a platform 210, and a first electrode 220 is formed on the platform 210.
  • the buffer layer 110 can improve the problem that the lattice constant of the material of the N-type doped nitride layer 200 and the substrate 100 does not match.
  • the buffer layer 110 is an A1N layer or a GaN layer or an AlGaN layer or a composite structure layer in which any two of them are alternately formed.
  • the buffer layer 110 may also be composed of other materials so as to better match the material of the substrate 100, and then Improve the problem of lattice mismatch.
  • a defect control layer, an active layer 400, and a P-type doped nitride layer 500 are sequentially deposited on the N-type doped nitride layer 200.
  • the defect control layer is used to adjust the size of the "V" type defect 340 and the density of the defect, and improve the injection efficiency of the hole and improve the luminous efficiency of the device under the premise of ensuring the antistatic capability of the device.
  • the defect control layer in this embodiment includes a first defect control layer 310, a second defect control layer 420, and a third defect control layer 330.
  • the first defect control layer 310 is a “V” type defect 340 depth control layer, which is a low temperature grown n-type doped GaN layer, and controls the “V” by controlling the thickness and growth temperature of the first defect control layer 310.
  • the depth of the shape defect 340 improves the hole injection efficiency.
  • the doping concentration of the first defect control layer 310 is smaller than that of the N-type doped nitride layer 200, and the thickness of the specific first defect control layer 310 is 50 to 5000.
  • the concentration of the n-type impurity in the first defect control layer 310 is 1 x 10 17 to 5 x 10 18 /cm 3 .
  • the second defect control layer 320 is formed on the first defect control layer 310, and the material thereof is n-type doped GaN.
  • the concentration of the n-type impurity is greater than the concentration of the n-type impurity in the first defect-regulating layer 310, and is smaller than the impurity concentration of the N-type doped nitride layer 200, for improving the antistatic ability caused by the "V"-shaped defect 340. Improve the antistatic ability of LEDs.
  • the second defect control layer 320 has a thickness of 10 to 1000, and the n-type impurity concentration is Ixl0 17 to lxl 19 /cm 3 .
  • the third defect control layer 330 is formed on the second defect control layer 320, and is an aluminum-containing ternary nitride superlattice structure, which is composed of an aluminum-containing high-energy layer and a low-aluminum-free layer. Layer composition.
  • the superlattice structure may be a periodically stacked A1 al Ga wN layer and an In el Ga wN layer, a periodically stacked A1 a2 In a2 N layer, and an In cl Al cl N layer, where 0 ⁇ al ⁇ 0.3, 0 ⁇ el ⁇ 0.3, 0 ⁇ a2 ⁇ 0.3, 0 ⁇ cl ⁇ 0.3.
  • the superlattice structure has a lamination period of at least 2 pairs (ie, 4 layers), and the third defect layer is an n-type doped structure layer having an n-type doping concentration of Ixl0 17 ⁇ lxl0 18 /cm 3 and a thickness of 100 persons. ⁇ 5000 people.
  • the left side of FIG. 1 is a band diagrm of the third defect control layer 330, and the third defect control layer 330 is a superlattice structure formed by periodically stacking at least two material layers, one of which is The aluminum-containing high-energy layer and the other layer are aluminum-free low-level layers, so the energy band diagram shows periodic changes of high and low energy levels.
  • the first defect control layer 310, the second defect control layer 320, and the third defect control layer 330 in the defect control layer 300 are all n-type doped layers, which are in the N-type doped nitride layer 200.
  • the concentration relationship of the N-type impurity is: n-type impurity concentration of the N-type doped nitride layer 200 > n-type impurity concentration of the second defect control layer 320 > n-type impurity concentration of the first defect control layer 310 > third defect regulation The n-type impurity concentration of layer 330.
  • the third defect control layer 330 is an aluminum-containing ternary nitride superlattice structure
  • doping of the A1 component can increase the density of the "V" type defect 340, and by controlling the defect density, the hole is made from defects.
  • the side enters the active layer to improve hole injection efficiency.
  • the high- and low-level superlattice structure is used to reduce the electron migration rate and reduce the electron overflow, improve the composite uniformity of the electron hole in the active layer 400, improve the luminous efficiency and reduce the Droop effect.
  • the active layer 400 continues to be formed over the defect control layer, which is the composite radiation center of the electron-hole. It includes alternately stacking a barrier layer and a well layer, and the barrier layer may be a GaN layer or an AlGaN layer or an AlInGaN layer; the well layer may be an InGaN layer.
  • the P-type doped nitride layer 500 is formed on the active layer 400.
  • the P-type dopant impurity may be magnesium or any of calcium, barium, and strontium. In the present embodiment, it is preferred that the P-type impurity is magnesium for providing a hole.
  • an electron blocking layer 510 may be formed on the active layer 400 to further prevent electron overflow.
  • a second electrode is formed on the P-type doped nitride layer 500.
  • the material of the second electrode may be chromium gold (Cr/Au).
  • a P-type ohmic contact layer 520 may be selectively formed between the P-type doped nitride layer 500 and the second electrode before the step of forming the second electrode.
  • the P-type ohmic contact layer 520 is for reducing the impedance between the p-type doped nitride layer 500 and the second electrode.
  • the material of the P-type ohmic contact layer 520 may be a nickel gold stack, indium tin oxide or zinc oxide.
  • a first electrode 220 is formed on the terrace 210 exposed by the N-type doped nitride layer 200.
  • the material of the first electrode 220 may be titanium/aluminum/titanium/gold (Ti/Al/Ti/Au), thereby forming an LED assembly, when current is injected into the active layer 400 through the first electrode 220 and the second electrode.
  • Ti/Al/Ti/Au titanium/aluminum/titanium/gold
  • a nitride light emitting diode assembly of the present embodiment includes a substrate 100, an N-type doped nitride layer 200, a defect control layer, an active layer 400, and a P-type doped nitride layer. 500, a first electrode 2 20 and a second electrode.
  • the N-type doped nitride layer 200 is located on the upper surface of the substrate 100; the defect control layer is disposed on the N-type doped nitride layer 200, including the first defect control layer 310, the second defect control layer 320, and the third defect control
  • the layer 330 is disposed on the defect control layer, and the P-type doped nitride layer 500 is on the active layer 400.
  • the first electrode 220 is on the exposed substrate 210 of the N-type doped layer
  • the second electrode 530 is on the P-type doped nitride layer 500.
  • a buffer layer 110 is interposed between the substrate 100 and the N-type doped nitride layer 200 for improving the problem of lattice constant mismatch between the N-type nitride layer and the hetero-substrate 100.
  • An electron blocking layer 510 is located between the active layer 400 and the P-type doped nitride layer 500 to further block electron overflow.
  • the P-type ohmic contact layer 520 is located between the P-type doped nitride layer 500 and the second electrode 530 for reducing the impedance between the P-type doped nitride layer 500 and the second electrode 530.
  • the exposed platform 210 may not be disposed on the N-type nitride layer 200, and the first The electrode 220 may be disposed on the lower surface of the substrate 100.
  • the third modulation layer in the defect control layer is a quaternary nitride superlattice structure containing aluminum, and the superlattice structure is composed of periodically stacked A1 xl In Yl Ga myN layer and A1 ml In Zl G ai - ml - Z1 NS composition, wherein 0 ⁇ xls 0.3, 0 ⁇ yl ⁇ 0.3, 0 ⁇ ml ⁇ 0.3, 0 ⁇ zl ⁇ 0.3, and xl is equal to ml, yl and zl are not equal.
  • the third defect control layer 330 in the defect control layer is a superlattice structure composed of an aluminum-containing ternary nitride and a quaternary nitride. That is, the superlattice structure is composed of a periodically stacked AUIn ⁇ Gaw ⁇ N layer and InwGa ⁇ NS, where 0 ⁇ x2s0.3, 0 ⁇ y2 ⁇ 0.3, 0 ⁇ m2 ⁇ 0.3; the superlattice structure can also be The periodically stacked A1 x3 In y3 Ga n p N layer and the In Z3 A1 ⁇ N layer are composed, wherein 0 ⁇ x3 ⁇ 0.3, 0 ⁇ y3 ⁇ 0.3, 0 ⁇ z3 ⁇ 0.3; the superlattice structure is further improved Ground can also be periodically stacked Where 0 ⁇ x4 ⁇ 0.3
  • FIG. 3 an atomic force microscope comparison diagram of a nitride light-emitting diode assembly provided by the present invention and a light-emitting diode assembly provided by the prior art, it can be seen that the present invention provides a nitride light-emitting diode assembly and current
  • the third defect control layer 330 is a single layer structure, and may be an aluminum-containing ternary nitride single layer structure, such as an AlGaN single layer or an InAIN single layer; Aluminum quaternary nitride single layer structure, such as AlInGaN single layer.
  • a nitride light emitting diode assembly provided by the embodiment includes a substrate 100, and a buffer layer 110, an N-type doped nitride layer 200, and a defect control layer sequentially disposed on the substrate 100. 300, an active layer 400, an electron blocking layer 510, a P-type doped nitride layer 500, and a P-type ohmic contact layer 520.
  • the N-type doped nitride layer 200 is provided with a platform 210, the platform is provided with a first electrode 220, and is located at the P-type The second electrode 530 on the contact layer 520.
  • the defect control layer 300 sequentially includes a first defect control layer 310, a second defect control layer 320, and a third defect control layer 330.
  • the first defect control layer 310 is a low-growth n-type doped GaN layer
  • the second defect control layer 320 is also an n-type doped GaN layer, but the doping concentration of the n-type impurity in the second defect control layer 320 is greater than the doping concentration of the n-type impurity in the first defect control layer 310.
  • the third defect control layer 330 is an aluminum-containing ternary nitride single layer structure, such as an AlGaN single layer or an InAIN single layer, or an aluminum quaternary nitride single layer structure, such as an AlInGaN single layer.
  • the thickness of the first defect control layer 310 is 50 A to 5000 A.
  • the concentration of the n-type impurity in the first defect control layer 310 is 1 x 10 17 to 5 x 10 18 /cm 3 .
  • the second defect control layer 320 has a thickness of 10 to 1000 A and an n-type impurity concentration of Ixl0 17 to lxl 19 /cm 3 .
  • the thickness of the third defect layer is from 100 to 5,000, and the n-type doping concentration is 1 x lO 17 ⁇ lxl 18 / cm 3 .
  • the present invention provides a defect control layer between the N-type doped nitride layer 200 and the active layer 400 for regulating the density and size of the "V"-shaped defects inside the LED assembly, specifically, by setting the A defect control layer 310 regulates the depth of the "V" shaped defect 340, and the second defect regulating layer 320 is provided to improve the problem of lowering the antistatic ability of the device due to the presence of defects.
  • the third defect control layer 330 regulates the density of the "V" shaped defect 340.

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Abstract

本发明属于半导体光电器件领域,尤其涉及一种可控制"V"形缺陷大小及密度的氮化物发光二极管组件,通过于N型层和有源层之间设置依次第一缺陷调控层、第二缺陷调变层和第三缺陷调变层,在调控"V"形缺陷的大小及密度的同事,也调控器件由于缺陷较多而产生的抗静电能力降低问题。通过三层缺陷调控层的协同作用,不仅控制了"V"形缺陷的密度及大小,提升了电洞注入效率,同时也降低电子迁移速率与减少电子溢流,降低器件的Efficiency Droop效应,提升电子电洞于有源层中分布的均匀性,有效降低器件的非辐射复合辐射,提升发光效率。

Description

一种氮化物发光二极管组件 技术领域
[0001] 本发明属于半导体光电器件领域, 尤其涉及一种可控制“V”形缺陷大小及密度 的氮化物发光二极管组件。
背景技术
[0002] 氮化物发光二极管 (英文为 Light Emitting Diode, 简称 LED) 是一种半导体固 体发光器件, 其利用半导体 PN结作为发光材料, 可以直接将电转换为光。 传统 的发光二极管的结构一般包括: 衬底、 以及依次位于衬底上的 N型氮化物层、 应 力释放层、 有源层、 电子阻挡层和 P型氮化物层。
[0003] 目前应力释放层由周期性交替层叠的 InGaN层和 GaN层组成, 低温生长的应力 释放层一般是通过开出一些“V”形缺陷来实现应力释放, 但是这些“V”形缺陷的 起始是因为蓝宝石衬底与 GaN外延层之间存在晶格失配和较大的热膨胀系数差异 产生的, 然后经过应力释放层的放大作用形成的, 因此“V”形缺陷的开口大小以 及缺陷密度具有不可控性, 使得 LED器件的电子电洞分布不均, 产生漏电, 影响 LED的发光效率及导致 Droop效应。
[0004] 因此我们急需找出一种发光二极管, 可以控制“V”型缺陷的密度, 降低 Droop效 应, 提升高电流密度产品的亮度。
发明概述
技术问题
问题的解决方案
技术解决方案
[0005] 为了解决上述问题, 本发明首先提出一种氮化物发光二极管组件, 包括: N型 掺杂氮化物层; 有源层, 位于 N型掺杂氮化物层之上; P型掺杂氮化物层, 位于 有源层之上; 其特征在于: 所述 N型掺杂氮化物层与所述有源层之间还设置有缺 陷调控层, 所述缺陷调控层包括第一缺陷调控层、 第二缺陷调控层和第三缺陷 调控层, 所述第三缺陷调控层为含铝三元氮化物超晶格结构或含铝三元氮化物 单层结构。
[0006] 优选的, 所述超晶格结构由周期性层叠的 A1 alGa
Figure imgf000004_0001
mN层组成, 其中, 0<al<0.3, 0<el<0.3=
[0007] 优选的, 所述超晶格结构由周期性层叠的 Ala2In mN层和 In elAl
Figure imgf000004_0002
组成, 其中, 0<a2<0.3, 0<cl<0.3=
[0008] 优选的, 所述含铝三元氮化物单层结构为 AlGaN单层或者 InAIN单层。
[0009] 优选的, 所述第一缺陷调控层、 第二缺陷调控层、 第三缺陷调控层均为 n型杂 质掺杂层, 且 N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型杂质浓度 >第一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂质浓度。
[0010] 本发明还提供一种氮化物发光二极管组件, 包括: N型掺杂氮化物层; 有源层 , 位于 N型掺杂氮化物层之上; P型掺杂氮化物层, 位于有源层之上; 其特征在 于: 所述 N型掺杂氮化物层与所述有源层之间还设置有缺陷调控层, 所述缺陷调 控层包括第一缺陷调控层、 第二缺陷调控层和第三缺陷调控层, 所述第三缺陷 调控层为含铝四元氮化物超晶格结构或者含铝四元氮单层结构。
[0011] 优选的, 该超晶格结构由周期性层叠的
Figure imgf000004_0003
层组成, 其中, 0<xlS0.3, 0<yl<0.3, 0<ml<0.3, 0<zl<0.3, 且 xl与 ml、 y 1与 Z1不同时相等。
[0012] 优选的, 所述含铝四元氮单层结构为 AlInGaN单层。
[0013] 优选的, 述第一缺陷调控层、 第二缺陷调控层、 第三缺陷调控层均为 n型杂质 掺杂层, N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型杂质浓度 >第 一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂质浓度。
[0014] 本发明进一步提出一种氮化物发光二极管组件, 包括: N型掺杂氮化物层; 有 源层, 位于 N型掺杂氮化物层之上; P型掺杂氮化物层, 位于有源层之上; 其特 征在于: 所述 N型掺杂氮化物层与所述有源层之间还设置有缺陷调控层, 所述缺 陷调控层包括第一缺陷调控层、 第二缺陷调控层和第三缺陷调控层, 所述第三 缺陷调控层为含铝的三元氮化物和四元氮化物组成的超晶格结构。
[0015] 优选的, 所述超晶格结构由周期性层叠的
Figure imgf000004_0004
组成, 其中 0<x2s0.3, 0<y2<0.3, 0<m2s0.3。 [0016] 优选的, 所述超晶格结构由周期性层叠的
Figure imgf000005_0001
成, 其中, 0 < x3s0.3, 0 < y3<0.3 , 0 < z3<0.3=
[0017] 优选的, 所述超晶格结构由周期性层叠的
Figure imgf000005_0002
成, 其中, 0 < x4s0.3, 0 < y4<0.3 , 0 < z4<0.3=
[0018] 优选的, 所述第一缺陷调控层、 第二缺陷调控层、 第三缺陷调控层均为 n型杂 质掺杂层, 且 N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型杂质浓度 >第一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂质浓度。
发明的有益效果
有益效果
[0019] 本发明通过于 N型层和有源层之间设置依次第一缺陷调控层、 第二缺陷调变层 和第三缺陷调变层, 在调控“V”形缺陷的大小及密度的同事, 也调控器件由于缺 陷较多而产生的抗静电能力降低问题。 通过三层缺陷调控层的协同作用, 不仅 控制了“V”形缺陷的密度及大小, 提升了电洞注入效率, 同时也降低电子迁移速 率与减少电子溢流, 降低器件的 Efficiency Droop效应, 提升电子电洞于有源层中 分布的均匀性, 有效提升器件的有效复合辐射发光效率。
对附图的简要说明
附图说明
[0020] 图 1为本发明实施例 1提供的一氮化物发光二极管组件的剖视结构示意图, 其左 侧为第三缺陷调控层的能带分布图。
[0021] 图 2为本发明实施例 1提供的另一氮化物发光二极管组件的剖视结构示意图, 其 左侧为第三缺陷调控层的能带分布图。
[0022] 图 3为本发明实施例 1一氮化物发光二管组件与现有技术提供的发光二极管组件 的原子力显微镜对比图, 其中, 图 3a为现有技术提供的发光二极管组件原子力显 微镜图, 图 3b为本发明具体实施例 1提供的氮化物发光二极管组件的原子力显微 镜图。
[0023] 图 4为本发明实施例 2提供一氮化物发光二极管组件的剖视结构示意图。
[0024] 附图标注: 100: 衬底; 110: 缓冲层; 200: N型掺杂氮化物层; 210: 平台; 2 20: 第一电极; 300: 缺陷调控层; 310: 第一调变层; 320: 第二调变层; 330 : 第三调变层; 340: “V”形缺陷; 400: 有源层; 500: P型掺杂氮化物层; 510 : 电子阻挡层; 520: P型欧姆接触层。
发明实施例
本发明的实施方式
[0025] 下面, 参照附图对本发明的实施例进行详细说明。 在此, 本发明的范围不局限 于下面所要说明的实施形态, 本发明的实施形态可变形为多种其他形态。
[0026] 实施例 1
[0027] 图 1为本实施例提出的一种氮化物发光二极管组件的示意剖面图。 参看附图 1, 首先提供一衬底 100, 该衬底 100材料可以为蓝宝石、 硅、 碳化桂、 氧化锌、 氮 化镓、 氮化铝或者其它适于晶体外延生长的材料。 接着于衬底 100的上表面形成 N型掺杂氮化物层 200, N型掺杂氮化物层 200的材料可以为掺杂硅或者锗或者锡 或者铅的 GaN, 也可以包含非故意掺杂的 GaN层。 本实施例中, N型掺杂氮化物 层 200具有一平台 210, 一第一电极 220形成于该平台 210上。
[0028] 在形成 N型掺杂氮化物之前, 还包括于衬底 100上形成缓冲层 110的步骤。 该缓 冲层 110能够改善 N型掺杂氮化物层 200与衬底 100材料晶格常数不匹配的问题。 缓冲层 110为 A1N层或者 GaN层或者 AlGaN层或者其中任意两者交替形成的复合 结构层, 当然缓冲层 110的也可以由其它材料构成, 以便能更好地与衬底 100材 料相匹配, 继而改善晶格失配的问题。
[0029] 然后, 于 N型掺杂氮化物层 200上依次沉积缺陷调控层、 有源层 400和 P型掺杂 氮化物层 500。 缺陷调控层用于调控“V”型缺陷 340的大小以及缺陷的密度, 在保 证器件抗静电能力的前提下提升电洞的注入效率, 提升器件的发光效率。
[0030] 具体地, 本实施例中的缺陷调控层包括第一缺陷调控层 310、 第二缺陷调控层 3 20和第三缺陷调控层 330。 其中, 第一缺陷调控层 310为“V”型缺陷 340深度调控 层, 其为低温生长的 n型掺杂 GaN层, 通过控制第一缺陷调控层 310的厚度、 生 长温度, 进而控制“V”形缺陷 340的深度, 提升电洞注入效率。 且第一缺陷调控 层 310的掺杂浓度小于 N型掺杂氮化物层 200, 具体的第一缺陷调控层 310的厚度 为 50人~5000人。 第一缺陷调控层 310中 n型杂质的浓度是 1x10 17~5xl0 18/cm 3
[0031] 第二缺陷调控层 320形成于第一缺陷调控层 310之上, 其材料为 n型掺杂的 GaN , 其 n型杂质的浓度大于第一缺陷调控层 310中 n型杂质浓度, 小于 N型掺杂氮化 物层 200的杂质浓度, 用于改善“V”形缺陷 340造成的抗静电能力下降的问题, 提 升发光二极管的抗静电能力。 第二缺陷调控层 320的厚度为 10人~1000人, n型杂 质浓度为 Ixl0 17~lxl0 19/cm 3
[0032] 第三缺陷调控层 330形成于第二缺陷调控层 320之上, 为含铝三元氮化物超晶格 结构, 该超晶格结构为由含铝高能级层和不含铝低能级层构成。 具体地, 该超 晶格结构可以为周期性层叠的 A1 alGa wN层和 In elGa wN层、 周期性层叠的 A1 a2 In a2N层和 In clAl clN层, 其中, 0 < al<0.3, 0 < el<0.3 , 0 < a2<0.3 , 0 < cl<0.3 。 上述超晶格结构的层叠周期至少为 2对 (即 4层) , 第三缺陷层为 n型掺杂结构 层, 其 n型掺杂浓度为 Ixl0 17~lxl0 18/cm 3, 厚度为 100人 ~5000人。 图 1左侧为第 三缺陷调控层 330的能带分布示意图 (band diagrm) , 由于第三缺陷调控层 330 为周期性层叠的至少两个材料层所形成的超晶格结构, 其中一层为含铝高能级 层, 另一层为不含铝低能级层, 因此其能带分布图呈高、 低能级的周期性变化
[0033] 因此, 缺陷调控层 300中的第一缺陷调控层 310、 第二缺陷调控层 320、 第三缺 陷调控层 330均为 n型掺杂层, 它们与 N型掺杂氮化物层 200中 N型杂质的浓度关系 为: N型掺杂氮化物层 200的 n型杂质浓度 >第二缺陷调控层 320的 n型杂质浓度 > 第一缺陷调控层 310的 n型杂质浓度 >第三缺陷调控层 330的 n型杂质浓度。
[0034] 由于第三缺陷调控层 330为含铝三元氮化物超晶格结构, A1组分的掺杂可以增 加“V”型缺陷 340的密度, 通过控制缺陷密度, 使得电洞从缺陷的侧面进入有源 层, 提升电洞注入效率。 并利用高、 低能级的超晶格结构降低电子迁移速率与 降低电子溢流, 提升电子电洞于有源层 400中的复合均匀性, 提升发光效率并降 低 Droop效应。
[0035] 继续参看附图 1, 于缺陷调控层之上继续形成有源层 400, 有源层 400是电子-电 洞的复合辐射中心。 其包括交替层叠势垒层和势阱层, 势垒层可以为 GaN层或者 AlGaN层或者 AlInGaN层; 势阱层可以为 InGaN层。
[0036] 继续于有源层 400之上形成 P型掺杂氮化物层 500, P型掺杂杂质可以为镁, 也可 以为钙、 锶、 钡中的任意一种。 本实施例中优选 P型杂质为镁, 用于提供电洞。 在形成 P型掺杂氮化物层 500之前, 可以先于有源层 400上形成一电子阻挡层 510 , 进一步防止电子溢流。
[0037] 继之, 于 P型掺杂氮化物层 500上形成第二电极。 第二电极的材料可以为铬金 ( Cr/Au) 。 在本实施例中, 在形成第二电极的步骤之前, 也可以选择性的于 P型 掺杂氮化物层 500及第二电极之间形成 P型欧姆接触层 520。 P型欧姆接触层 520用 于降低 p型掺杂氮化物层 500与第二电极之间的阻抗。 P型欧姆接触层 520的材料 可以为镍金叠层、 铟锡氧化物或者氧化锌。
[0038] 接着, 于 N型掺杂氮化物层 200暴露出的平台 210上形成第一电极 220。 第一电极 220的材料可以为钛 /铝 /钛 /金 (Ti/Al/Ti/Au) , 至此形成一发光二极管组件, 当 通过第一电极 220和第二电极向有源层 400注入电流时, 来自 N型掺杂氮化物层 20 0的电子与来自于 P型掺杂氮化物层 500的电洞会在有源层 400内结合, 以使有源 层 400产生光。
[0039] 继续参看附图 1, 本实施提出的一种氮化物发光二极管组件包括衬底 100、 N型 掺杂氮化物层 200、 缺陷调控层、 有源层 400、 P型掺杂氮化物层 500、 第一电极 2 20和第二电极。 N型掺杂氮化物层 200位于衬底 100的上表面; 缺陷调控层位于 N 型掺杂氮化物层 200之上, 包括第一缺陷调控层 310、 第二缺陷调控层 320和第三 缺陷调控层 330; 有源层 400位于缺陷调控层之上, P型掺杂氮化物层 500位于有 源层 400之上。 第一电极 220位于 N型掺杂层暴露出的平台 210上, 第二电极 530位 于 P型掺杂氮化物层 500之上上。 此外, 缓冲层 110位于衬底 100与 N型掺杂氮化物 层 200之间, 用于改善 N型氮化物层与异质衬底 100之间晶格常数不匹配的问题。 电子阻挡层 510位于有源层 400与 P型掺杂氮化物层 500之间, 以进一步阻挡电子 溢流。 P型欧姆接触层 520位于 P型掺杂氮化物层 500及第二电极 530之间, 用于降 低 P型掺杂氮化物层 500与第二电极 530之间的阻抗。
[0040] 作为本实施例的变形实施方式, 参看附图 2, 当衬底 100的材料为氮化镓或者 Si 时, N型氮化物层 200上可以不设置暴露出的平台 210, 而第一电极 220则可以设 置于衬底 100的下表面。
[0041] 作为本实施例的另一变形实施方式, 缺陷调控层中的第三调变层为含铝的四元 氮化物超晶格结构, 该超晶格结构由周期性层叠的 A1 xlIn ylGa myN层和 A1 mlIn zlGa i— ml— Z1NS组成, 其中, 0<xls0.3, 0<yl<0.3, 0<ml<0.3, 0<zl<0.3, 且 xl与 ml、 yl与 zl不同时相等。
[0042] 作为本实施例的再一变形实施方式, 缺陷调控层中的第三缺陷调控层 330为含 铝的三元氮化物和四元氮化物组成的超晶格结构。 即该超晶格结构由周期性层 叠的 AUIn^Gaw^N层和 InwGa^NS组成, 其中 0<x2s0.3, 0<y2<0.3, 0 < m2<0.3; 该超晶格结构也可以由周期性层叠的 A1 x3In y3Ga npN层和 In Z3A1 ^ N层组成, 其中, 0<x3<0.3, 0<y3<0.3, 0<z3<0.3; 该超晶格结构更进一地也 可以由周期性层叠的
Figure imgf000009_0001
其中, 0 < x4<0.3
, 0<y4<0.3, 0<z4<0.3=
[0043] 参看附图 3, 本发明提供的一氮化物发光二管组件与现有技术提供的发光二极 管组件的原子力显微镜对比图, 可以看出, 本发明提供的一氮化物发光二极管 组件与现有技术提供的发光二极管组件的原子力显微镜图, 在相同测试条件下 , 相同放大倍数的前提下, 本发明提供的一氮化物发光二极管组件的“形缺陷 340 密度及“V”形缺陷 340的大小均大于现有技术中的发光二极管组件。 当然由于第 二缺陷调变层的存在, 较多的“V”型缺陷 340并不会导致器件的抗静电能力降低 以及由此产生的漏电问题。 相反, 通过第一缺陷调控层 310、 第二缺陷调控层 32 0、 第三缺陷调控层 330的相互配合, 不仅控制了“V”形缺陷 340的密度及大小, 提升了电洞注入效率, 同时也降低电子迁移速率与减少电子溢流, 降低器件的 Ef ficiency Droop效应, 提升电子电洞于有源层 400中分布的均勻性, 有效提升器件 的有效复合辐射发光效率及均匀性。
[0044] 实施例 2
[0045] 本实施例与实施例 1的区别在于: 第三缺陷调控层 330为单层结构, 可以为含铝 三元氮化物单层结构, 例如 AlGaN单层或者 InAIN单层; 也可以为含铝四元氮化 物单层结构, 例如 AlInGaN单层。
[0046] 参看附图 4, 本实施例提供的一种氮化物发光二极管组件, 包括衬底 100, 以及 依次位于衬底 100上的缓冲层 110、 N型掺杂氮化物层 200、 缺陷调控层 300、 有源 层 400、 电子阻挡层 510、 P型掺杂氮化物层 500和 P型欧姆接触层 520。 N型掺杂氮 化物层 200设置有一平台 210, 该平台上设置有一第一电极 220, 以及位于 P型欧 姆接触层 520上的第二电极 530。 缺陷调控层 300依次包括第一缺陷调控层 310、 第二缺陷调控层 320和第三缺陷调控层 330, 第一缺陷调控层 310为低温生长的 n 型掺杂的 GaN层, 第二缺陷调控层 320同样为 n型掺杂的 GaN层, 但, 第二缺陷调 控层 320中 n型杂质的掺杂浓度大于第一缺陷调控层 310中 n型杂质的掺杂浓度。 第三缺陷调控层 330为含铝三元氮化物单层结构, 例如 AlGaN单层或者 InAIN单层 , 或者含铝四元氮化物单层结构, 例如 AlInGaN单层。
[0047] 进一步地, N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型杂质浓度
>第一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂质浓度。 具体为第 一缺陷调控层 310的厚度为 50 A ~5000 A。 第一缺陷调控层 310中 n型杂质的浓度 是 1x10 17~5xl0 18/cm 3。 第二缺陷调控层 320的厚度为 10人 -1000 A , n型杂质浓 度为 Ixl0 17~lxl0 19/cm 3。 第三缺陷层的厚度为 100人~5000人, n型掺杂浓度为 1 xlO 17~lxl0 18/cm 3
[0048] 本发明通过于 N型掺杂氮化物层 200和有源层 400之间设置缺陷调控层, 用于调 控发光二极管组件内部“V”形缺陷的密度及大小, 具体地, 通过设置第一缺陷调 控层 310来调控“V”形缺陷 340的深度, 通过设置第二缺陷调控层 320来改善器件 因缺陷的存在而导致的抗静电能力降低的问题。 第三缺陷调控层 330调控“V”形 缺陷 340的密度, 通过三层缺陷调控层的密切配合、 协同作用, 不仅控制了“V” 形缺陷的密度及大小, 提升了电洞注入效率, 同时也降低电子迁移速率与减少 电子溢流, 降低器件的 Efficiency Droop效应, 提升电子电洞于有源层中分布的均 匀性, 有效提升器件的有效复合辐射发光效率。
[0049] 以上实施方式仅用于说明本发明, 而并非用于限定本发明, 本领域的技术人员 , 在不脱离本发明的精神和范围的情况下, 可以对本发明做出各种修饰和变动 , 因此所有等同的技术方案也属于本发明的范畴, 本发明的专利保护范围应视 权利要求书范围限定。

Claims

权利要求书
[权利要求 1] 一种氮化物发光二极管组件, 包括: N型掺杂氮化物层; 有源层, 位 于 N型掺杂氮化物层之上; P型掺杂氮化物层, 位于有源层之上; 其 特征在于: 所述 N型掺杂氮化物层与所述有源层之间还设置有缺陷调 控层, 所述缺陷调控层包括第一缺陷调控层、 第二缺陷调控层和第三 缺陷调控层, 所述第三缺陷调控层为含铝三元氮化物超晶格结构或含 铝三元氮化物单层结构。
[权利要求 2] 根据权利要求 1所述的一种氮化物发光二极管组件, 其特征在于: 所 述超晶格结构由周期性层叠的 A1 alGa wN层和 In elGa mN层组成, 其 中, 0 < al<0.3, 0 < el<0.3=
[权利要求 3] 根据权利要求 1所述的一种氮化物发光二极管组件, 其特征在于: 所 述超晶格结构由周期性层叠的 A1 a2In wN层和 In elAl mN层组成, 其 中, 0 < a2<0.3, 0 < cl<0.3=
[权利要求 4] 根据权利要求 1所述的一种氮化物发光二极管组件, 其特征在于: 所 述含铝三元氮化物单层结构为 AlGaN单层或者 InAIN单层。
[权利要求 5] 根据权利要求 1所述的一种氮化物发光二极管组件, 其特征在于: 所 述第一缺陷调控层、 第二缺陷调控层、 第三缺陷调控层均为 n型杂质 掺杂层, 且 N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型 杂质浓度 >第一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂 质浓度。
[权利要求 6] 一种氮化物发光二极管组件, 包括: N型掺杂氮化物层; 有源层, 位 于 N型掺杂氮化物层之上; P型掺杂氮化物层, 位于有源层之上; 其 特征在于: 所述 N型掺杂氮化物层与所述有源层之间还设置有缺陷调 控层, 所述缺陷调控层包括第一缺陷调控层、 第二缺陷调控层和第三 缺陷调控层, 所述第三缺陷调控层为含铝四元氮化物超晶格结构或者 含铝四元氮化物单层结构。
[权利要求 7] 根据权利要求 6所述的一种氮化物发光二极管组件, 其特征在于: 所 述超晶格结构由周期性层叠的 A1 xlIn ylGa nylN层和 A1 mlIn zlGa !-ml-zl N层组成, 其中, 0<xlS0.3, 0<yl<0.3, 0<ml<0.3, 0<zl<0.3, 且 xl与 ml、 yl与 zl不同时相等。
[权利要求 8] 根据权利要求 6所述的一种氮化物发光二极管组件, 其特征在于: 含 铝四元氮化物单层结构为 AlInGaN单层。
[权利要求 9] 根据权利要求 6所述的一种氮化物发光二极管组件, 其特征在于: 所 述第一缺陷调控层、 第二缺陷调控层、 第三缺陷调控层均为 n型杂质 掺杂层, N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型杂 质浓度 >第一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂质 浓度。
[权利要求 10] 一种氮化物发光二极管组件, 包括: N型掺杂氮化物层; 有源层, 位 于 N型掺杂氮化物层之上; P型掺杂氮化物层, 位于有源层之上; 其 特征在于: 所述 N型掺杂氮化物层与所述有源层之间还设置有缺陷调 控层, 所述缺陷调控层包括第一缺陷调控层、 第二缺陷调控层和第三 缺陷调控层, 所述第三缺陷调控层为含铝的三元氮化物和四元氮化物 组成的超晶格结构。
[权利要求 11] 根据权利要求 10所述的一种氮化物发光二极管组件, 其特征在于: 所 述超晶格结构由周期性层叠的
Figure imgf000012_0001
成, 其中 0<x2<().3, 0<y2<0.3, 0<m2<0.3=
[权利要求 12] 根据权利要求 10所述的一种氮化物发光二极管组件, 其特征在于: 所 述超晶格结构由周期性层叠的
Figure imgf000012_0002
成, 其中, 0<x3s0.3, 0<y3<0.3, 0<z3<0.3=
[权利要求 13] 根据权利要求 10所述的一种氮化物发光二极管组件, 其特征在于: 所 述超晶格结构由周期性层叠的
Figure imgf000012_0003
层组成
, 其中, 0<x4S().3, 0<y4<0.3, 0<z4<0.3=
[权利要求 14] 根据权利要求 10所述的一种氮化物发光二极管组件, 其特征在于: 所 述第一缺陷调控层、 第二缺陷调控层、 第三缺陷调控层均为 n型杂质 掺杂层, 且 N型掺杂氮化物层的 n型杂质浓度 >第二缺陷调控层的 n型 杂质浓度 >第一缺陷调控层的 n型杂质浓度 >第三缺陷调控层的 n型杂 质浓度。
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