WO2019214415A1 - 显示基板及其检测方法、显示面板及显示装置 - Google Patents

显示基板及其检测方法、显示面板及显示装置 Download PDF

Info

Publication number
WO2019214415A1
WO2019214415A1 PCT/CN2019/083221 CN2019083221W WO2019214415A1 WO 2019214415 A1 WO2019214415 A1 WO 2019214415A1 CN 2019083221 W CN2019083221 W CN 2019083221W WO 2019214415 A1 WO2019214415 A1 WO 2019214415A1
Authority
WO
WIPO (PCT)
Prior art keywords
display
layer pattern
area
conductive
resistive layer
Prior art date
Application number
PCT/CN2019/083221
Other languages
English (en)
French (fr)
Inventor
余超智
Original Assignee
京东方科技集团股份有限公司
合肥京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 合肥京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Publication of WO2019214415A1 publication Critical patent/WO2019214415A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a display substrate and a method for detecting the same, a display panel, and a display device.
  • the organic electroluminescent diode (OLED) display device is a brand-new display technology, and its display quality is comparable to that of a thin film transistor active-drive liquid crystal display (TFT-LCD), and its price is much lower than its low cost. It will be widely used. LCD technology challenges. Organic electroluminescent devices have high brightness, wide viewing angle, active illumination, high contrast, ultra-thin, portable, etc., and are recognized as new after cathode ray tube (CRT), plasma display (PDP), liquid crystal display (LCD). A generation of display technology.
  • CTR cathode ray tube
  • PDP plasma display
  • LCD liquid crystal display
  • OLED should be injected from the cathode when working, which requires the lower the cathode work function, but the better
  • These metals of the cathode such as aluminum, magnesium, calcium, etc., are generally more active and easily react with the influent water vapor.
  • water vapor also chemically reacts with the hole transport layer and the electron transport layer, and these reactions cause device failure. Therefore, the effective packaging of the OLED, so that the functional layers of the device are separated from the components of moisture, oxygen and the like in the atmosphere, can greatly extend the life of the device.
  • the present disclosure provides a display substrate, a method of detecting the same, a display panel, and a display device.
  • a display substrate includes a display area and a non-display area located at a periphery of the display area, the non-display area includes a package area, and the display substrate further includes a resistive layer pattern, the resistor The layer pattern is located on a side of the package area near the center of the display substrate, and the resistance layer pattern is composed of a moisture sensitive resistor material.
  • the resistive layer pattern is capable of absorbing moisture in the air to cause a change in its own resistance value.
  • the package area is composed of a plurality of strip-shaped regions connected to each other and disposed around an edge of the non-display area.
  • two metal PADs separated from each other are further disposed in the non-display area, and the two metal PADs pass through two conductive lines passing through the package area and two of the resistance layer patterns. The ends are electrically connected.
  • the display substrate further includes two conductive lines, wherein the first ends of the two conductive lines are located on a side of the package area facing away from the display area, wherein a second end of the conductive line is One end of the resistive layer pattern is electrically connected, and the other end of the other conductive line is electrically connected to the other end of the resistive layer pattern.
  • the non-display area further includes a chip bonding area on a side of the package area facing away from the display area, and a test chip and two first leads are disposed on the chip bonding area, a first end of the two conductive lines is located in the chip bonding area, wherein a first end of one conductive line is electrically connected to a pin of the test chip through a first lead, and a first end of the other conductive line
  • the other lead of the test chip is electrically connected by another first lead such that the test chip is configured to be capable of acquiring the resistance of the resistive layer pattern.
  • the non-display area further includes a PAD area on a side of the package area facing away from the display area, and two first conductive patterns separated from each other are disposed on the PAD area; a portion of the line is located in the PAD region, wherein a first end of one conductive line is electrically connected to a first conductive pattern, and a first end of the other conductive line is electrically connected to another first conductive pattern;
  • the first conductive pattern is configured to be in electrical contact with the probe such that the probe acquires the resistance of the resistive layer pattern.
  • the resistive layer pattern is between the display area and the package area.
  • the resistive layer pattern is a ring structure, and the ring is disposed at a periphery of the display area, and the annular structure has a notch.
  • the material of the resistance layer pattern is selected from a lithium chloride moisture sensitive material or an organic polymer film humidity sensitive material.
  • the test chip is a lighting chip.
  • a method for detecting the display substrate as described above including:
  • the resistance value of the resistance layer pattern is greater than a preset threshold, it is determined that water vapor enters the display area through the package area.
  • the display substrate further includes two conductive lines, wherein the first ends of the two conductive lines are located on a side of the package area facing away from the display area, wherein a second end of the conductive line is One end of the resistive layer pattern is electrically connected, and the second end of the other conductive line is electrically connected to the other end of the resistive layer pattern; and the step of obtaining the resistance value of the resistive layer pattern includes:
  • the resistance value of the resistive layer pattern is measured by the two conductive wires using a test chip or a probe.
  • a test chip and two first leads are disposed on the chip bonding area of the display substrate, wherein a first end of one of the conductive lines passes through a first lead and a pin of the test chip is electrically connected Connecting, the first end of the other conductive line is electrically connected to the other pin of the test chip through another first lead; the step of obtaining the resistance value of the resistive layer pattern includes:
  • the test chip is a lighting chip.
  • two first conductive patterns separated from each other are disposed on the PAD area of the display substrate, wherein a first end of one conductive line is electrically connected to a first conductive pattern of the PAD area, and another conductive line is electrically connected. The first end is electrically connected to another first conductive pattern of the PAD region; the step of acquiring the resistance of the resistive layer pattern includes:
  • the probe is electrically contacted with the first conductive pattern to obtain a resistance value of the resistance layer pattern.
  • an embodiment of the present disclosure further provides a display panel employing the display substrate as described above.
  • an embodiment of the present disclosure further provides a display device using the display panel as described above.
  • FIG. 1 is a schematic structural view 1 showing a display substrate in an embodiment of the present disclosure
  • Figure 2 is a cross-sectional view of the display panel employing the display substrate of Figure 1 taken along line A-A of Figure 1;
  • Figure 3 is a cross-sectional view of the display panel employing the display substrate of Figure 1 taken along line B-B of Figure 1;
  • FIG. 4 is a second schematic structural view of a display substrate in an embodiment of the present disclosure.
  • FIG. 5-8 are schematic structural views of an OLED display panel adopting four different packaging modes in an embodiment of the present disclosure
  • Figure 9 is a diagram showing the device arrangement at the chip bonding area in the embodiment of the present disclosure.
  • the display products in the related art use a large amount of semiconductor devices such as thin film transistors, organic electroluminescent diodes, water vapor and oxygen to seriously affect the performance and lifetime of these semiconductor devices. Therefore, high requirements are placed on the packaging of the display product.
  • the related art lacks a means for detecting the encapsulation effect, and only after the semiconductor fails, causing the display product to fail to work, it can be found that the encapsulation effect is not good, causing huge losses.
  • the present disclosure provides a display substrate for providing a means capable of detecting a package effect.
  • the display substrate includes a display area and a non-display area located at a periphery of the display area, and the non-display area includes a package area.
  • the display substrate further includes a resistive layer pattern, and the resistive layer pattern is located on a side of the package area near a center of the display substrate.
  • the material of the resistive layer pattern is composed of a humidity sensitive resist material for sensing whether water vapor enters the display area through the package area;
  • the display substrate further includes two conductive lines, the first ends of the two conductive lines are located on a side of the package area facing away from the display area, wherein the second end of the one conductive line and the resistance layer One end of the pattern is electrically connected, and the other end of the other conductive line is electrically connected to the other end of the resistive layer pattern.
  • the display substrate having the above structure can still obtain the resistance value of the resistive layer pattern through the first ends of the two conductive lines after the process of the counter-casing and assembly into the display product, due to the resistive layer pattern Located on the side of the package area near the center of the display substrate, the humidity resistance material has a characteristic that its own resistance value changes when water vapor is absorbed. Therefore, the resistance layer pattern can sense whether water vapor passes through the package area. Enter the display area. When moisture enters the display area through the package area, the resistance value of the resistance layer pattern increases, and whether the moisture is transmitted through the package area into the display area can be accurately determined according to whether the resistance value of the resistance layer pattern is increased. Therefore, when water vapor enters the display area through the package area, the dehumidification process can be performed in time, and the package structure is repaired, and the poor packaging effect can affect the life of the display product and even cause the display product to fail.
  • the material of the resistive layer pattern may be selected from a semiconductor ceramic moisture sensitive material, a lithium chloride humidity sensitive material or an organic polymer film humidity sensitive material.
  • Semiconductor ceramic moisture sensitive materials are not feasible due to the complicated manufacturing process.
  • the lithium chloride moisture sensitive material may be prepared by mixing lithium chloride and polyvinyl alcohol, coated on a display substrate by a dispenser, and then removed by heating to remove the organic solvent.
  • the organic polymer moisture sensitive material is made of a polymer film, and the commonly used polymer materials are polystyrene, polyimide, butyric acid acetate fiber, etc., and the polymer material is melted in an organic solution and coated by a dispensing machine. It is coated on the display substrate and then removed by heating to remove the organic solvent.
  • the resistive layer pattern may be disposed in the display area or may be disposed between the package area and the display area.
  • the resistive layer pattern is disposed in the non-display area and located between the package area and the display area for convenient setting without affecting the display effect.
  • the resistor layer pattern may be an annular structure, and the ring is disposed at a periphery of the display area, and the ring structure has a notch to form two free ends, and the second ends of the two conductive lines are respectively Connected to the two free ends of the resistive layer pattern for detecting the resistance of the resistive layer pattern.
  • the annular structure enables the resistive layer pattern to detect whether water vapor enters the entire periphery of the display area, and the detecting structure is more accurate and effective.
  • the resistive layer pattern is not limited to the ring structure.
  • the resistive layer pattern may also be formed by connecting a plurality of strip-shaped metal layers around the edge of the non-display area; or the resistive layer pattern may also be a plurality of resistor blocks arranged at intervals The periphery of the area is not listed here.
  • the non-display area of the display substrate further includes a chip bonding area and a PAD area on a side of the package area facing away from the display area.
  • the chip bonding area and the PAD area are crimping areas, and the chip bonding area is an area for crimping the signal line of the display area with the pins of the external chip, and the PAD area is a signal line of the display area and an external driving circuit.
  • the chip bonding area is provided with a plurality of leads, and the PAD area is provided with a conductive pattern.
  • the lead of the chip bonding area and the pin of the chip are used to connect the external chip and the signal line of the display substrate.
  • the conductive pattern of the PAD region is used to connect the leads of the external driving circuit board and the signal lines of the array substrate. Therefore, the lead of the chip bonding region and the conductive pattern of the PAD region must have no insulating layer and are bare.
  • the chip bonding region has two first leads.
  • the first ends of the two conductive lines of the present disclosure are located in the chip bonding area, wherein a first end of one conductive line is electrically connected to one pin of the test chip through a first lead, and the first end of the other conductive line
  • the terminal is electrically connected to the other pin of the test chip through another first lead, so that the test chip acquires the resistance of the resistive layer pattern.
  • the test chip may be a lighting chip, and a program for acquiring the resistance of the resistance layer pattern is added in a lighting program, and the resistance value of the obtained resistance layer pattern is displayed through the display screen of the lighting device to realize the detection of the packaging effect. .
  • the detection cost can be saved.
  • the detection of the package effect can also be compatible by the chips in other related technologies, that is, the first ends of the two conductive lines are electrically connected to the corresponding pins of the chip through the first lead, and the acquisition is increased.
  • a program for the resistance value of a resistive layer pattern can be set up a separate test chip to detect the package effect.
  • the PAD region has two first conductive patterns, and a portion of the two conductive lines of the present disclosure are located in the PAD region.
  • One of the conductive lines is electrically connected to one first conductive pattern, and the other conductive line is electrically connected to the other first conductive pattern; the two first conductive patterns are used for electrical contact with the probe, so that the probe Obtaining a resistance value of the resistance layer pattern.
  • two metal PADs separated from each other may be disposed in the PAD region, and the two metal PADs are respectively electrically connected to the two ends of the resistive layer pattern by two conductive lines passing through the package region For the sexual connection, the probe is in contact with the two metal PADs respectively, and the resistance value of the resistive layer pattern can be detected.
  • the two conductive lines are disposed to extend through the PAD region to the chip bonding region, so that the resistance value of the resistance layer pattern can be obtained by the probe in the PAD region, and The resistance value of the resistance layer pattern is obtained by the test chip in the chip bonding area, and the package effect can be detected in different manufacturing process stages of the display substrate. Moreover, after being assembled into a finished product, the effect of the package can still be detected by the test chip to achieve permanent detection.
  • the present disclosure also provides a display panel and a display device.
  • the display panel adopts the display substrate as described above, and can detect the packaging effect of the display panel.
  • the display device adopts the above display panel, and can realize permanent detection of the packaging effect of the display device.
  • the technical solution of the present disclosure is applicable to an OLED display product, and is also applicable to a thin film transistor display product.
  • the package can be as follows:
  • the first type as shown in FIG. 5, the package cover + dry sheet package, the specific structure is: a package cover 20 and the OLED display substrate 10 are used for the box, and the packaged area is coated with the ultraviolet curing adhesive 30 for sealing. a drying sheet 31 is disposed on the surface of the package cover adjacent to the OLED display substrate; in this case, the resistance layer pattern 1 may be disposed as shown in FIG. 5;
  • the glass frit (Frit) package has a specific structure: a package cover 20 is used with the OLED display substrate 10, and a glass glue 40 is applied to the package area for sealing;
  • the resistance layer pattern 1 can be set as shown in FIG. 6;
  • the Dam&Fill package has a specific structure: a package cover 20 is used to form a package with the OLED display substrate 10, and a UV-curable adhesive 30 is applied to the package area for sealing, and the package cover 20 is provided. Filling a filling glue 50 between the OLED display substrate 10; in this case, the resistance layer pattern 1 can be set as shown in FIG. 7;
  • the fourth type as shown in FIG. 8 , the specific structure is: forming a composite film 60 on the surface of the OLED display substrate 10 , the composite film 60 covering the display area and the package area, including an organic film and an inorganic film;
  • the resistance layer pattern 1 can be set as shown in FIG.
  • the present disclosure further provides a method for detecting a display substrate as described above, including:
  • the resistance value of the resistance layer pattern is obtained by a portion of the two conductive lines located away from the display area of the package region, and when the resistance value of the resistance layer pattern is greater than a preset threshold, it is determined that the water vapor enters the display area through the package area.
  • the above detection method can still obtain the resistance value of the resistance layer pattern through the first ends of the two conductive lines after the substrate-to-box process and after assembling the display product, since the resistance layer pattern is located in the package area.
  • the resistive layer pattern can sense whether moisture passes through the package area into the display area.
  • the resistance value of the resistance layer pattern increases, and whether the moisture layer enters the display area through the package area can be accurately determined according to whether the resistance layer pattern is increased. Therefore, when water vapor enters the display area through the package area, the dehumidification process can be performed in time, and the package structure is repaired, and the poor packaging effect can affect the life of the display product and even cause the display product to fail.
  • the preset threshold is a resistance value of the resistive layer pattern when the resistive layer pattern is formed on the display substrate.
  • the chip bonding region of the display substrate has two first leads, wherein a first end of one conductive line is electrically connected to a pin of the test chip through a first lead, and the other The first end of the conductive wire is electrically connected to the other pin of the test chip through another first lead.
  • the step of obtaining the resistance of the resistive layer pattern includes:
  • the pins of the test chip are soldered to the corresponding first leads, and the test chip is controlled to obtain the resistance of the resistive layer pattern.
  • the test chip may be a lighting chip, and a program for acquiring the resistance of the resistance layer pattern is added in the lighting program, and the resistance value of the obtained resistance layer pattern is displayed on the display screen of the lighting device to realize the detection of the packaging effect. .
  • the detection cost can be saved.
  • the PAD area of the display substrate has two first conductive patterns, wherein one conductive line is electrically connected to one first conductive pattern of the PAD area, and the other conductive line and the other of the PAD area A first conductive pattern is electrically connected, and the step of obtaining the resistance of the resistive layer pattern comprises:
  • the probe is electrically contacted with the first conductive pattern to obtain the resistance of the resistive layer pattern.
  • the two conductive lines are disposed to extend through the PAD region to the chip bonding region, so that the resistance of the resistance layer pattern can be obtained by the probe in the PAD region, and
  • the chip bonding area obtains the resistance of the resistance layer pattern through the test chip, and the package effect can be detected in different manufacturing process stages of the display substrate.
  • the effect of the package can still be detected by the test chip to achieve permanent detection.
  • the OLED display product packaged by the glass glue is taken as an example to specifically introduce the technical solution of the present disclosure.
  • the OLED display substrate in this embodiment includes a substrate 100 including a display area 101 and a non-display area located at the periphery of the display area 101.
  • the non-display area includes a package area 102, which may be The package region 102 is coated with a glass paste 40, and then the substrate OLED display substrate 10 and the package cover 20 are formed to form an OLED display panel, and finally assembled to form a display device.
  • the OLED display substrate further includes a resistive layer pattern 1 disposed on the substrate 100, and the resistive layer pattern 1 is located between the package region 102 and the display region 101.
  • the material of the resistive layer pattern 1 is selected from a humidity sensitive resist material for sensing whether moisture vapor enters the display region 101 through the package region. Specifically, a lithium chloride humidity sensitive material or an organic polymer film humidity sensitive material can be selected.
  • the resistive layer pattern 1 is a ring-shaped structure, and the ring is disposed at the periphery of the display region 101, and the annular structure has a notch 11 to form two free ends.
  • the OLED display substrate further includes two conductive lines 2, and the first ends of the two conductive lines 2 extend through the PAD region to the chip bonding region, on the side of the package region 102 facing away from the display region 101.
  • the second end of one of the conductive lines 2 is electrically connected to a free end of the resistive layer pattern 1, and the second end of the other conductive line 2 is electrically connected to the other free end of the resistive layer pattern 1.
  • the conductive line 2 can be made of the same metal film as the anode or cathode of the OLED to simplify the fabrication process.
  • a resistive layer pattern 1 is formed between the package region 102 and the display region 101, and the conductive line 2 is located on the side of the resistive layer pattern 1 close to the substrate 100, and the resistive layer pattern 1 A free end is in electrical contact.
  • the PAD region has a first conductive pattern 3, wherein one conductive line 2 is electrically connected to one first conductive pattern 3, and the other conductive line 2 is electrically connected to another first conductive pattern 3.
  • the two first conductive patterns 3 are used for electrical contact with the probe such that the probe acquires the resistance value of the resistive layer pattern.
  • the two first conductive patterns 3 may both be metal PADs.
  • the chip bonding region may be located between the two ends of the two conductive lines 2 extending from the two PAD regions, respectively. As shown in FIG. 9 , the chip bonding region has two first leads 31 , wherein the first end of one of the conductive lines 2 is electrically connected to one pin 32 of the test chip 4 through a first lead 31 , and the other conductive line The first end of 2 is electrically connected to the other pin 32 of the test chip 4 through another first lead 31, so that the test chip 4 acquires the resistance value of the resistive layer pattern.
  • the test chip 4 may be a lighting chip, connected to the flexible circuit board 5 for lighting detection, and a program for acquiring the resistance value of the resistance layer pattern is added in the lighting program, and the obtained resistance layer pattern is displayed through the display screen of the lighting device.
  • the resistance value is used to detect the package effect. By setting the detection of the lighting effect of the lighting chip compatible package, the detection cost can be saved.
  • the resistance value of the resistance layer pattern 1 is obtained by electrically contacting the probe with the two first conductive patterns 3 of the PAD region, and is performed with the preset threshold value. Comparing, if the obtained resistance value is greater than the preset threshold, it is determined that water vapor enters the display area 101;
  • the resistance value of the resistive layer pattern 1 can be obtained by the lighting chip 4 while the lighting is detected, and the resistance value of the obtained resistive layer pattern 1 is displayed on the display screen of the lighting device. Then, the resistance value of the obtained resistance layer pattern 1 is compared with the preset threshold. If the obtained resistance value is greater than the preset threshold, it is determined that moisture enters the display area 101.
  • the display panel of the lighting chip 4, the flexible circuit board 5, and the lighting device can be integrated in the entire machine of the display device to achieve permanent monitoring of the resistance value of the resistance layer pattern 1.
  • one end of the two conductive lines is respectively connected to both ends of the resistance layer pattern, and the other ends of the two conductive lines are extended to the chip bonding area through the PAD area, thereby being able to be displayed.
  • the package effect is detected multiple times to determine whether water vapor enters the display area, the dehumidification process can be performed in time, and the package structure is repaired, and the poor package effect is affected, which may affect the life of the display product or even cause display. The problem of product failure.

Abstract

本申请公开了一种显示基板及其检测方法、显示面板及显示装置。所述显示基板包括显示区域和位于显示区域外围的非显示区域，所述非显示区域包括封装区域，所述显示基板还包括一电阻层图形，所述电阻层图形位于所述封装区域的靠近显示基板的中心的一侧，并且所述电阻层图形由湿敏电阻材料构成。

Description

显示基板及其检测方法、显示面板及显示装置
相关申请的交叉引用
本申请主张在2018年5月7日在中国提交的中国专利申请号No.201810427576.4的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，特别是涉及一种显示基板及其检测方法、显示面板及显示装置。
背景技术
有机电致发光二极管(OLED)显示器件是一种全新的显示技术，其显示质量可与薄膜晶体管有源驱动液晶显示器(TFT-LCD)相比拟，而价格远比其低廉，它将对广泛使用的LCD技术发起挑战。有机电致发光器件具有高亮度、宽视角、主动发光、高对比度、超薄、便携等特点，被公认是继阴极射线管(CRT)、等离子显示(PDP)、液晶显示(LCD)之后的新一代显示技术。
研究表明，空气中的水汽和氧气等成分对OLED的寿命影响很大，其原因主要从以下方面进行考虑：OLED工作时要从阴极注入电子，这就要求阴极功函数越低越好，但做阴极的这些金属如铝、镁、钙等，一般比较活波，易与渗透进来的水汽发生反应。另外，水汽还会与空穴传输层以及电子传输层发生化学反应，这些反应都会引起器件失效。因此对OLED进行有效封装，使器件的各功能层与大气中的水汽、氧气等成分隔开，就可以大大延长器件寿命。
目前的封装技术主要有四种：封装盖+干燥片封装、玻璃胶封装、Dam&fill封装和薄膜封装，但是对于如何检测封装效果，业内还没有很好的手段。
发明内容
本公开提供一种显示基板及其检测方法、显示面板及显示装置。
一方面，本公开实施例中提供一种显示基板，包括显示区域和位于显示区域外围的非显示区域，所述非显示区域包括封装区域，所述显示基板还包括一电阻层图形，所述电阻层图形位于所述封装区域的靠近显示基板的中心的一侧，并且所述电阻层图形由湿敏电阻材料构成。
可选地，所述电阻层图形能够吸收空气中的水汽而导致其本身电阻值发生变化。
可选地，所述封装区域由彼此连接的多个条形区域构成，且围绕所述非显示区域的边缘设置。
可选地，在所述非显示区域中还设置有彼此分离的两个金属PAD，并且所述两个金属PAD通过穿过所述封装区域的两条导电线与所述电阻层图形的两个末端分别电性连接。
可选地，所述显示基板还包括两条导电线，所述两条导电线的第一端均位于所述封装区域的背离所述显示区域的一侧，其中一条导电线的第二端与所述电阻层图形的一个末端电性连接，另一条导电线的第二端与所述电阻层图形的另一个末端电性连接。
可选地，所述非显示区域还包括位于所述封装区域的背离显示区域的一侧的芯片绑定区域，在所述芯片绑定区域上设置有测试芯片和两条第一引线，所述两条导电线的第一端位于所述芯片绑定区域，其中一条导电线的第一端通过一条第一引线与所述测试芯片的一引脚电性连接，另一条导电线的第一端通过另一条第一引线与所述测试芯片的另一引脚电性连接，以使得所述测试芯片被配置为能够获取所述电阻层图形的电阻。
可选地，所述非显示区域还包括位于所述封装区域的背离显示区域的一侧的PAD区域，在所述PAD区域上设置有彼此分离的两个第一导电图形；所述两条导电线的一部分位于所述PAD区域，其中一条导电线的第一端与一个第一导电图形电性连接，另一条导电线的第一端与另一个第一导电图形电性连接；所述两个第一导电图形被配置为能够与探针电性接触，以使得探针获取所述电阻层图形的电阻。
可选地，所述电阻层图形位于显示区域和封装区域之间。
可选地，所述电阻层图形为环状结构，环设在所述显示区域的外围，且 所述环状结构具有一缺口。
可选地，所述电阻层图形的材料选择氯化锂湿敏电阻材料或有机高分子膜湿敏电阻材料。
可选地，所述测试芯片为点灯芯片。
另一方面，本公开实施例中还提供一种对如上所述的显示基板进行检测的方法，包括：
获取所述电阻层图形的电阻值；
将所述电阻层图形的电阻值与预设阈值进行比较；以及
当所述电阻层图形的电阻值大于预设阈值时，判定水汽透过封装区域进入显示区域。
可选地，所述显示基板还包括两条导电线，所述两条导电线的第一端均位于所述封装区域的背离所述显示区域的一侧，其中一条导电线的第二端与所述电阻层图形的一个末端电性连接，另一条导电线的第二端与所述电阻层图形的另一个末端电性连接；所述获取所述电阻层图形的电阻值的步骤包括：
利用测试芯片或探针通过所述两条导电线来测定所述电阻层图形的电阻值。
可选地，在所述显示基板的芯片绑定区域上设置有测试芯片和两条第一引线，其中一条导电线的第一端通过一条第一引线与所述测试芯片的一引脚电性连接，另一条导电线的第一端通过另一条第一引线与所述测试芯片的另一引脚电性连接；所述获取所述电阻层图形的电阻值的步骤包括：
将所述测试芯片的引脚焊接在对应的第一引线上，控制所述测试芯片获取所述电阻层图形的电阻值。
可选地，所述测试芯片为点灯芯片。
可选地，在所述显示基板的PAD区域上设置有彼此分离的两个第一导电图形，其中一条导电线的第一端与PAD区域的一个第一导电图形电性连接，另一条导电线的第一端与PAD区域的另一个第一导电图形电性连接；所述获取所述电阻层图形的电阻的步骤包括：
将探针与第一导电图形电性接触，以获取所述电阻层图形的电阻值。
另一方面，本公开实施例中还提供一种显示面板，采用如上所述的显示 基板。
另一方面，本公开实施例中还提供一种显示装置，采用如上所述的显示面板。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例或相关技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1表示本公开实施例中显示基板的结构示意图一；
图2表示采用图1的显示基板的显示面板沿图1中A-A的剖视图；
图3表示采用图1的显示基板的显示面板沿图1中B-B的剖视图；
图4表示本公开实施例中显示基板的结构示意图二；
图5-图8表示本公开实施例中采用四种不同的封装方式的OLED显示面板的结构示意图；以及
图9表示本公开实施例中芯片绑定区域处的器件布置的示意图。
具体实施方式
相关技术中的显示产品会大量使用半导体器件，如：薄膜晶体管、有机电致发光二极管，水汽和氧气会严重影响这些半导体器件的性能和寿命。因此，对显示产品的封装提出了很高的要求。但是相关技术中缺乏对封装效果进行检测的手段，只有在半导体失效，导致显示产品不能工作后，才能发现封装效果不好，造成巨大的损失。
为了解决上述技术问题，本公开提供一种显示基板，用于提供一种能够对封装效果进行检测的手段。
所述显示基板包括显示区域和位于显示区域外围的非显示区域，所述非显示区域包括封装区域。所述显示基板还包括一电阻层图形，所述电阻层图形位于所述封装区域的靠近显示基板的中心的一侧。所述电阻层图形的材料由湿敏电阻材料构成，用于感应是否有水汽透过封装区域进入显示区域；
所述显示基板还包括两条导电线，所述两条导电线的第一端均位于所述封装区域的背离所述显示区域的一侧，其中一条导电线的第二端与所述电阻层图形的一端电性连接，另一条导电线的第二端与所述电阻层图形的另一端电性连接。
具有上述结构的显示基板，当其在对盒工艺后以及组装成显示产品后，仍然能够通过所述两条导电线的第一端来获取位于电阻层图形的电阻值，由于所述电阻层图形位于封装区域的靠近显示基板的中心的一侧，利用湿敏电阻材料在吸收到水汽时其自身的电阻值会发生变化的特性，因此，所述电阻层图形能够感应是否有水汽透过封装区域进入显示区域。当有水汽透过封装区域进入显示区域时，所述电阻层图形的电阻值会增加，根据所述电阻层图形的电阻值是否增加即可准确判断是否有水汽透过封装区域进入显示区域。从而当有水汽透过封装区域进入显示区域时，能够及时进行除湿工艺，并对封装结构进行修复，克服封装效果不好会影响显示产品的寿命，甚至造成显示产品的失效的问题。
其中，所述电阻层图形的材料可以选择半导体陶瓷湿敏材料、氯化锂湿敏电阻材料或有机高分子膜湿敏电阻材料。半导体陶瓷湿敏材料由于制造工艺很复杂，可行性不足。氯化锂湿敏材料可由氯化锂和聚乙烯醇混合制作，通过点胶机涂覆在显示基板上，再通过加热去除其中的有机溶剂。有机高分子湿敏材料用高分子薄膜制成的，常用的高分子材料有聚苯乙烯、聚酰亚胺、酪酸醋酸纤维等，并将高分子材料融于有机溶液中，通过点胶机涂覆在显示基板上，再通过加热去除其中的有机溶剂。
所述电阻层图形可以设置在显示区域，也可以设置在封装区域和显示区域之间。
可选地，所述电阻层图形设置在非显示区域中，且位于封装区域和显示区域之间，便于设置，而且不会影响显示效果。具体可以设置所述电阻层图形为环状结构，环设在所述显示区域的外围，且所述环状结构具有一缺口，形成两个自由端，所述两个导电线的第二端分别与所述电阻层图形的两个自由端连接，用于检测所述电阻层图形的电阻。环状结构使得所述电阻层图形能够检测显示区域的整个外围是否有水汽进入，检测结构更加准确、有效。
当然，所述电阻层图形并不局限于环状结构。例如，所述电阻层图形还可以由多个条形的金属层连接而成，围绕所述非显示区域的边缘设置；或者所述电阻层图形还可以为多个电阻块，间隔排布在显示区域的外围，在此不再一一列举。
所述显示基板的非显示区域还包括位于所述封装区域的背离显示区域的一侧的芯片绑定区域和PAD区域。芯片绑定区域和PAD区域为压接区域，芯片绑定区域为将显示区的信号线与外部的芯片的引脚进行压接的区域，PAD区域为将显示区的信号线与外部的驱动电路板的引线进行压接的区域。所述芯片绑定区域设有多条引线，所述PAD区域设有导电图形。所述芯片绑定区域的引线与芯片的引脚，用于连接外部的芯片和显示基板的信号线。PAD区域的导电图形用于连接外部的驱动电路板的引线和阵列基板的信号线，因而，所述芯片绑定区域的引线和所述PAD区域的导电图形上方必须没有绝缘层，是裸露的。
在一个具体的实施方式中，所述芯片绑定区域具有两条第一引线。本公开的两条导电线的第一端位于所述芯片绑定区域，其中一条导电线的第一端通过一条第一引线与测试芯片的一引脚电性连接，另一条导电线的第一端通过另一条第一引线与测试芯片的另一引脚电性连接，以使得所述测试芯片获取所述电阻层图形的电阻。
具体地，所述测试芯片可以为点灯芯片，在点灯程序中增加获取所述电阻层图形的电阻的程序，通过点灯设备的显示屏显示获取的电阻层图形的电阻值，实现对封装效果的检测。通过设置点灯芯片兼容封装效果的检测，能够节约检测成本。
当然，也可以通过其它相关技术中的芯片来兼容封装效果的检测，即，所述两条导电线的第一端通过第一引线与该芯片对应的引脚电性连接，并增加获取所述电阻层图形的电阻值的程序。或者，设置单独的测试芯片来检测封装效果。
在另一个具体的实施方式中，所述PAD区域具有两个第一导电图形，本公开的两条导电线的一部分位于所述PAD区域。其中一条导电线与一个第一导电图形电性连接，另一条导电线与另一个第一导电图形电性连接；所述两 个第一导电图形用于与探针电性接触，以使得探针获取所述电阻层图形的电阻值。或者，可以在所述PAD区域中设置有彼此分离的两个金属PAD，并且所述两个金属PAD通过穿过所述封装区域的两条导电线与所述电阻层图形的两个末端分别电性连接，所述探针与两个金属PAD分别接触，即可检测所述电阻层图形的电阻值。
可选地，结合上述两个具体的实施方式，设置所述两条导电线经过PAD区域延伸至芯片绑定区域，从而可以在PAD区域通过探针获取所述电阻层图形的电阻值，还可以在芯片绑定区域通过测试芯片获取所述电阻层图形的电阻值，在显示基板的不同制作工艺阶段均能够检测封装效果。而且在组装成成品后，仍然可以通过测试芯片检测封装的效果，实现永久检测。
本公开还提供一种显示面板及显示装置，所述显示面板采用如上所述的显示基板，能够实现对显示面板的封装效果进行检测。所述显示装置采用上述的显示面板，能够实现对显示装置的封装效果的永久检测。当有水汽透过封装区域进入显示区域时，能够及时进行除湿工艺，并对封装结构进行修复，克服封装效果不好影响显示产品的寿命，甚至造成显示产品的失效的问题。
本公开的技术方案适用于OLED显示产品，也适用于薄膜晶体管显示产品。
以OLED显示产品为例，其封装方式可以为以下四种：
第一种：如图5所示，封装盖+干燥片封装，具体的结构为：用一封装盖20与OLED显示基板10对盒，并在封装区域涂覆紫外光固化胶30进行密封，在封装盖的靠近OLED显示基板的表面设置干燥片31；在这种情况下，可以如图5所示设置电阻层图形1；
第二种：如图6所示，玻璃粉(Frit)封装，具体的结构为：用一封装盖20与OLED显示基板10对盒，并在封装区域涂覆玻璃胶40进行密封；在这种情况下，可以如图6所示设置电阻层图形1；
第三种：如图7所示，Dam&Fill封装，具体的结构为：用一封装盖20与OLED显示基板10对盒，并在封装区域涂覆紫外光固化胶30进行密封，并在封装盖20和OLED显示基板10之间填充一种填充胶50；在这种情况下，可以如图7所示设置电阻层图形1；
第四种：如图8所示，薄膜封装，具体的结构为：在OLED显示基板10的表面形成一复合薄膜60，所述复合薄膜60覆盖显示区域和封装区域，包括有机薄膜和无机薄膜；在这种情况下，可以如图8所示设置电阻层图形1。
本公开的技术方案均适合上述四种封装方式。
需要说明的是，上述四种封装方式中相同结构的名称用同一附图标记标识，以方便理解。
基于同一发明构思，本公开还提供一种对如上所述的显示基板进行检测的方法，包括：
通过两条导电线的位于封装区域的背离显示区域的部分获取电阻层图形的电阻值，当所述电阻层图形的电阻值大于预设阈值时，判定水汽透过封装区域进入显示区域。
上述检测方法在显示基板对盒工艺后以及组装成显示产品后，仍然能够通过所述两条导电线的第一端来获取位于电阻层图形的电阻值，由于所述电阻层图形位于封装区域的靠近显示基板的中心的一侧，因此，所述电阻层图形能够感应是否有水汽透过封装区域进入显示区域。当有水汽透过封装区域进入显示区域时，所述电阻层图形的电阻值会增加，根据所述电阻层图形是否增加即可准确判断是否有水汽透过封装区域进入显示区域。从而当有水汽透过封装区域进入显示区域时，能够及时进行除湿工艺，并对封装结构进行修复，克服封装效果不好会影响显示产品的寿命，甚至造成显示产品的失效的问题。
所述预设阈值为在显示基板上制作完电阻层图形时，此时电阻层图形的电阻值。
在一个具体的实施方式中，所述显示基板的芯片绑定区域具有两条第一引线，其中一条导电线的第一端通过一条第一引线与测试芯片的一引脚电性连接，另一条导电线的第一端通过另一条第一引线与测试芯片的另一引脚电性连接，则，获取所述电阻层图形的电阻的步骤包括：
将测试芯片的引脚焊接在对应的第一引线上，控制所述测试芯片获取所述电阻层图形的电阻。
其中，所述测试芯片可以为点灯芯片，在点灯程序中增加获取所述电阻 层图形的电阻的程序，通过点灯设备的显示屏上显示获取的电阻层图形的电阻值，实现对封装效果的检测。通过设置点灯芯片兼容封装效果的检测，能够节约检测成本。
在另一个具体的实施方式中，所述显示基板的PAD区域具有两个第一导电图形，其中一条导电线与PAD区域的一个第一导电图形电性连接，另一条导电线与PAD区域的另一个第一导电图形电性连接，则，获取所述电阻层图形的电阻的步骤包括：
将探针与所述第一导电图形电性接触，获取所述电阻层图形的电阻。
可选地，结合上述两个具体的实施方式，设置所述两条导电线经过PAD区域延伸至芯片绑定区域，从而可以在PAD区域通过探针获取所述电阻层图形的电阻，还可以在芯片绑定区域通过测试芯片获取所述电阻层图形的电阻，在显示基板的不同制作工艺阶段均能够检测封装效果。而且在组装成成品后，仍然可以通过测试芯片检测封装的效果，实现永久检测。
下面将结合附图和实施例，对本公开的具体实施方式作进一步详细描述。以下实施例用于说明本公开，但不用来限制本公开的范围。
本实施例中以通过玻璃胶进行封装的OLED显示产品为例，来具体介绍本公开的技术方案。
参见图1-图3所示，本实施例中的OLED显示基板包括基底100，基底100包括显示区域101和位于显示区域101外围的非显示区域，所述非显示区域包括封装区域102，可以在封装区域102涂布玻璃胶40，然后对盒OLED显示基板10与封装盖20，形成OLED显示面板，最后组装形成显示装置。
OLED显示基板还包括设置在基底100上的电阻层图形1，电阻层图形1位于封装区域102和显示区域101之间。电阻层图形1的材料选择湿敏电阻材料，用于感应是否有水汽透过封装区域进入显示区域101。具体可以选择氯化锂湿敏电阻材料或有机高分子膜湿敏电阻材料。电阻层图形1为环状结构，环设在显示区域101的外围，且所述环状结构具有一缺口11，形成两个自由端。
参见图4所示，OLED显示基板还包括两条导电线2，两条导电线2的第一端均经过PAD区域延伸至芯片绑定区域，位于封装区域102的背离显示区 域101的一侧。其中一条导电线2的第二端与电阻层图形1的一自由端电性连接，另一条导电线2的第二端与电阻层图形1的另一自由端电性连接。
导电线2可以与OLED的阳极或阴极由同一金属薄膜制得，以简化制作工艺。在显示基板的显示区域的制作完成后，在封装区域102和显示区域101之间形成电阻层图形1，导电线2位于电阻层图形1的靠近基底100的一侧，并与电阻层图形1的一自由端电性接触。
其中，PAD区域具有第一导电图形3，其中一条导电线2与一个第一导电图形3电性连接，另一条导电线2与另一个第一导电图形3电性连接。两个第一导电图形3用于与探针电性接触，以使得探针获取电阻层图形的电阻值。所述两个第一导电图形3可以均为金属PAD。
芯片绑定区域可以位于两条导电线2的从两个PAD区域分别延伸出的两个末端之间。如图9所示，芯片绑定区域具有两条第一引线31，其中一条导电线2的第一端通过一条第一引线31与测试芯片4的一引脚32电性连接，另一条导电线2的第一端通过另一条第一引线31与测试芯片4的另一引脚32电性连接，以使得所述测试芯片4获取所述电阻层图形的电阻值。
其中，测试芯片4可以为点灯芯片，与点灯检测的柔性电路板5连接，在点灯程序中增加获取所述电阻层图形的电阻值的程序，通过点灯设备的显示屏显示获取的电阻层图形的电阻值，实现对封装效果的检测。通过设置点灯芯片兼容封装效果的检测，能够节约检测成本。
本实施例中对OLED显示基板进行检测的方法具体包括：
在OLED显示基板10与封装盖20对盒后，通过将探针与PAD区域的两个第一导电图形3电性接触，来获取电阻层图形1的电阻值，并与所述预设阈值进行比较，如果获取的电阻值大于所述预设阈值，判定有水汽进入显示区域101；
在组装成显示装置后，可以在点灯检测的同时，通过点灯芯片4获取电阻层图形1的电阻值，并在点灯设备的显示屏上显示获取的电阻层图形1的电阻值。然后将获取电阻层图形1的电阻值与所述预设阈值进行比较，如果获取的电阻值大于所述预设阈值，判定有水汽进入显示区域101。
而且还可以把点灯芯片4、柔性电路板5和点灯设备的显示屏集成在显 示装置的整机中，实现对电阻层图形1的电阻值的永久监测。
本实施例中通过设置电阻层图形，并设置两条导电线的一端分别与电阻层图形的两端连接，且两条导电线的另一端经过PAD区域延伸至芯片绑定区域，从而能够在显示面板封装完成后，多次对封装效果进行检测，以判定是否有水汽进入显示区域，能够及时进行除湿工艺，并对封装结构进行修复，克服封装效果不好会影响显示产品的寿命，甚至造成显示产品的失效的问题。
需要说明的是以上仅是以OLED显示基板为例来具体介绍本公开的技术方案，本公开的技术方案应用于薄膜晶体管显示基板或其他显示区域设置有半导体器件的显示基板上时，具体的实现原理与OLED显示基板相同，不再详述。
以上所述仅是本公开的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开技术原理的前提下，还可以做出若干改进和替换，这些改进和替换也应视为本公开的保护范围。

Claims (18)

  1. 一种显示基板，包括显示区域和位于显示区域外围的非显示区域，所述非显示区域包括封装区域，所述显示基板还包括一电阻层图形，所述电阻层图形位于所述封装区域的靠近显示基板的中心的一侧，并且所述电阻层图形由湿敏电阻材料构成。
  2. 根据权利要求1所述的显示基板，其中，所述电阻层图形能够吸收水汽而导致其本身电阻值发生变化。
  3. 根据权利要求1所述的显示基板，其中，所述封装区域由彼此连接的多个条形区域构成，且围绕所述非显示区域的边缘设置。
  4. 根据权利要求1所述的显示基板，其中，在所述非显示区域中还设置有彼此分离的两个金属PAD，并且所述两个金属PAD通过穿过所述封装区域的两条导电线与所述电阻层图形的两个末端分别电性连接。
  5. 根据权利要求1所述的显示基板，其中，所述显示基板还包括两条导电线，所述两条导电线的第一端均位于所述封装区域的背离所述显示区域的一侧，其中一条导电线的第二端与所述电阻层图形的一个末端电性连接，另一条导电线的第二端与所述电阻层图形的另一个末端电性连接。
  6. 根据权利要求5所述的显示基板，其中，所述非显示区域还包括位于所述封装区域的背离显示区域的一侧的芯片绑定区域，在所述芯片绑定区域上设置有测试芯片和两条第一引线，所述两条导电线的第一端位于所述芯片绑定区域，其中一条导电线的第一端通过一条第一引线与所述测试芯片的一引脚电性连接，另一条导电线的第一端通过另一条第一引线与所述测试芯片的另一引脚电性连接，以使得所述测试芯片被配置为能够获取所述电阻层图形的电阻。
  7. 根据权利要求5所述的显示基板，其中，所述非显示区域还包括位于所述封装区域的背离显示区域的一侧的PAD区域，在所述PAD区域上设置有彼此分离的两个第一导电图形；所述两条导电线的一部分位于所述PAD区域，其中一条导电线的第一端与一个第一导电图形电性连接，另一条导电线的第一端与另一个第一导电图形电性连接；所述两个第一导电图形被配置为 能够与探针电性接触，以使得探针获取所述电阻层图形的电阻。
  8. 根据权利要求17任一项所述的显示基板，其中，所述电阻层图形位于显示区域和封装区域之间。
  9. 根据权利要求8所述的显示基板，其中，所述电阻层图形为环状结构，环设在所述显示区域的外围，且所述环状结构具有一缺口。
  10. 根据权利要求1-9任一项所述的显示基板，其中，所述电阻层图形的材料选择氯化锂湿敏电阻材料或有机高分子膜湿敏电阻材料。
  11. 根据权利要求6所述的显示基板，其中，所述测试芯片为点灯芯片。
  12. 一种对权利要求1-11任一项所述的显示基板进行检测的方法，包括：
    获取所述电阻层图形的电阻值；
    将所述电阻层图形的电阻值与预设阈值进行比较；以及
    当所述电阻层图形的电阻值大于预设阈值时，判定水汽透过封装区域进入显示区域。
  13. 根据权利要求12所述的检测方法，其中，所述显示基板还包括两条导电线，所述两条导电线的第一端均位于所述封装区域的背离所述显示区域的一侧，其中一条导电线的第二端与所述电阻层图形的一个末端电性连接，另一条导电线的第二端与所述电阻层图形的另一个末端电性连接；所述获取所述电阻层图形的电阻值的步骤包括：
    利用测试芯片或探针通过所述两条导电线来测定所述电阻层图形的电阻值。
  14. 根据权利要求13所述的检测方法，其中，在所述显示基板的芯片绑定区域上设置有测试芯片和两条第一引线，其中一条导电线的第一端通过一条第一引线与所述测试芯片的一引脚电性连接，另一条导电线的第一端通过另一条第一引线与所述测试芯片的另一引脚电性连接；所述获取所述电阻层图形的电阻值的步骤包括：
    将所述测试芯片的引脚焊接在对应的第一引线上，控制所述测试芯片获取所述电阻层图形的电阻值。
  15. 根据权利要求14所述的检测方法，其中，所述测试芯片为点灯芯片。
  16. 根据权利要求13所述的检测方法，其中，在所述显示基板的PAD区 域上设置有彼此分离的两个第一导电图形，其中一条导电线的第一端与PAD区域的一个第一导电图形电性连接，另一条导电线的第一端与PAD区域的另一个第一导电图形电性连接；所述获取所述电阻层图形的电阻的步骤包括：
    将探针与第一导电图形电性接触，以获取所述电阻层图形的电阻值。
  17. 一种显示面板，采用权利要求1-11任一项所述的显示基板。
  18. 一种显示装置，其中，采用权利要求17所述的显示面板。
PCT/CN2019/083221 2018-05-07 2019-04-18 显示基板及其检测方法、显示面板及显示装置 WO2019214415A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810427576.4 2018-05-07
CN201810427576.4A CN108649053B (zh) 2018-05-07 2018-05-07 显示基板及其检测方法、显示面板及显示装置

Publications (1)

Publication Number Publication Date
WO2019214415A1 true WO2019214415A1 (zh) 2019-11-14

Family

ID=63749541

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/083221 WO2019214415A1 (zh) 2018-05-07 2019-04-18 显示基板及其检测方法、显示面板及显示装置

Country Status (2)

Country Link
CN (1) CN108649053B (zh)
WO (1) WO2019214415A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108649053B (zh) * 2018-05-07 2021-08-27 京东方科技集团股份有限公司 显示基板及其检测方法、显示面板及显示装置
CN111710618B (zh) * 2020-07-15 2021-10-12 广芯微电子（广州）股份有限公司 一种晶圆钝化层缺陷的检测方法
CN112018158B (zh) * 2020-08-06 2022-07-29 武汉华星光电半导体显示技术有限公司 一种显示面板以及显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120273127A1 (en) * 2007-09-12 2012-11-01 Samsung Mobile Display Co., Ltd. Apparatus of encapsulating display panel and method of manufacturing organic light emitting display device using the same
CN105392272A (zh) * 2015-10-16 2016-03-09 京东方科技集团股份有限公司 柔性电路板、覆晶薄膜、使用其的绑定方法和显示器件
CN105788453A (zh) * 2016-05-19 2016-07-20 京东方科技集团股份有限公司 显示面板及显示装置、显示面板绑定区的湿度调节方法
CN107946478A (zh) * 2017-12-15 2018-04-20 京东方科技集团股份有限公司 封装结构及其制作方法、封装缺陷检测方法、oled器件和显示装置
CN108649053A (zh) * 2018-05-07 2018-10-12 京东方科技集团股份有限公司 显示基板及其检测方法、显示面板及显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120273127A1 (en) * 2007-09-12 2012-11-01 Samsung Mobile Display Co., Ltd. Apparatus of encapsulating display panel and method of manufacturing organic light emitting display device using the same
CN105392272A (zh) * 2015-10-16 2016-03-09 京东方科技集团股份有限公司 柔性电路板、覆晶薄膜、使用其的绑定方法和显示器件
CN105788453A (zh) * 2016-05-19 2016-07-20 京东方科技集团股份有限公司 显示面板及显示装置、显示面板绑定区的湿度调节方法
CN107946478A (zh) * 2017-12-15 2018-04-20 京东方科技集团股份有限公司 封装结构及其制作方法、封装缺陷检测方法、oled器件和显示装置
CN108649053A (zh) * 2018-05-07 2018-10-12 京东方科技集团股份有限公司 显示基板及其检测方法、显示面板及显示装置

Also Published As

Publication number Publication date
CN108649053B (zh) 2021-08-27
CN108649053A (zh) 2018-10-12

Similar Documents

Publication Publication Date Title
WO2019214415A1 (zh) 显示基板及其检测方法、显示面板及显示装置
WO2014190581A1 (zh) Oled面板及其制作方法与封装效果的检测方法
KR102035005B1 (ko) 터치 표시장치
WO2016107093A1 (zh) 显示面板及其制作方法、显示装置
RU2738785C1 (ru) Панель отображения, устройство отображения, способ обнаружения трещины в герметизирующем слое панели отображения и способ изготовления панели отображения
US10600992B2 (en) Package structure, method for manufacturing the same, method for detecting package defect, OLED device and display apparatus
CN105489634B (zh) 一种显示面板及其制造方法、以及显示装置
US8664963B2 (en) Test device for measuring permeability of a barrier material
US20190204963A1 (en) Touch substrate
WO2019174118A1 (zh) 显示设备及显示设备阻水效果的测试方法
US20140353594A1 (en) OLED Panel, Manufacturing Method, and Related Testing Method
CN110708790A (zh) 发光基板及电子装置
JP2008192326A (ja) 表示装置、並びにその製造方法及び検査方法
KR20050025513A (ko) 유기전계발광표시장치의 특성평가수단
KR20150145305A (ko) 유기 발광 표시 장치 및 그 제조방법
CN113434052B (zh) 显示面板、测试电路及显示面板的触控测试方法
TWI243624B (en) Organic light-emitting diode display panel element and manufacturing method thereof
CN112802770B (zh) 刻蚀量检测方法和显示面板母板
CN211297015U (zh) 发光基板及电子装置
TWI710819B (zh) 液晶顯示器
CN108470841B (zh) 显示器件、显示面板以及显示面板封装良率的测量方法
TWI604649B (zh) 有機發光二極體觸控結構
TW200843551A (en) Organic LED apparatus and manufacturing the thereof
CN113327933A (zh) 显示模组及其制作方法
KR20070050759A (ko) 공정온도 측정이 가능한 오엘이디 디스플레이 소자

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19800188

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19800188

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 28.05.2021)

122 Ep: pct application non-entry in european phase

Ref document number: 19800188

Country of ref document: EP

Kind code of ref document: A1