WO2019200812A1 - 一种软开关电路 - Google Patents

一种软开关电路 Download PDF

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Publication number
WO2019200812A1
WO2019200812A1 PCT/CN2018/103247 CN2018103247W WO2019200812A1 WO 2019200812 A1 WO2019200812 A1 WO 2019200812A1 CN 2018103247 W CN2018103247 W CN 2018103247W WO 2019200812 A1 WO2019200812 A1 WO 2019200812A1
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Prior art keywords
mos transistor
mos tube
switching
capacitor
switching mos
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PCT/CN2018/103247
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English (en)
French (fr)
Inventor
刘军
张建光
蒋中为
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深圳市金威源科技股份有限公司
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Publication of WO2019200812A1 publication Critical patent/WO2019200812A1/zh

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits

Definitions

  • the present invention relates to a soft switching circuit.
  • LLC is a resonant circuit that controls the switching frequency (frequency adjustment) to achieve a constant output voltage, also known as a LLC resonant converter, LLC resonant converter.
  • ZVS zero voltage turn-on
  • ZCS zero current turn-off
  • FIG. 1 shows a typical circuit for an LLC resonant converter.
  • the LLC converter shown in Figure 1 consists of two main MOS switches, Q1 and Q2.
  • the duty cycle of the input PWM signal is 0.5; the diode D1 connected in parallel between the source-drain (sd) of the main MOS switch Q1, The diode D3 of the source-drain (s -d) pole of the main MOS switch Q2 is connected in parallel; in fact, the diode D1 and the diode D3 are the body diodes of the MOS switch transistor Q1 and the MOS switch transistor Q2, respectively.
  • Vin is the DC bus voltage
  • the main switch MOS transistor Q1 and the main switch MOS transistor Q2 are controlled to generate a square wave voltage
  • the resonant capacitor Cr, the resonant inductor Lr, and the magnetizing inductance Lp form a resonant network
  • T1A, T1B are ideal transformer primary and secondary windings
  • Diode D2, diode D4, and output capacitor C3 together form an output rectification filter network.
  • the output may be from 300 to 750V, or even wider.
  • the output may be from 300 to 750V, or even wider.
  • the characteristics make the power MOSFET loss large, which is not conducive to the efficiency improvement and heat dissipation of the power MOSFET tube.
  • the present invention is directed to the present but in some voltage ranges, due to some special features of the LLC circuit in the soft switching circuit Sex, making the power MOSFET loss large, is not conducive to efficiency and heat dissipation of the power MOSFET tube.
  • a soft switching circuit comprising an LLC resonant converter having a switching MOS transistor Q1 and a switching MOS transistor Q2; characterized in that: further comprising a control device, a switch MOS transistor Q3, switching MOS transistor Q4, capacitor C1, capacitor C2;
  • the two ends of the capacitor C1 are respectively connected to the drain of the switch MOS transistor Q1 and the drain of the switch MOS transistor Q3, and the source of the switch MOS transistor Q3 is connected to the source of the switch MOS transistor Q1;
  • the two ends of the capacitor C2 are respectively connected to the drain of the switch MOS transistor Q2 and the drain of the switch MOS transistor Q4, and the source of the switch MOS transistor Q4 is connected to the source of the switch MOS transistor Q2;
  • the control device generates a driving signal drv connected to the gates of the switching MOS transistor Q3 and the switching MOS transistor Q4, respectively.
  • the control signal drv controls the MOS transistor Q3 and the switching MOS transistor Q4 to be turned on, and the capacitor C1 and the capacitor C2 are connected in parallel to the LLC resonance.
  • Both ends of the converter switch MOS transistor Q1 and the switching MOS transistor Q2, such as incorporating capacitors Cl, C2, cause the MOS transistor voltage to rise slowly to reduce dv*di*dt and turn-off loss, and the capacitances of C1 and C2 are released in the next cycle.
  • FIG. 1 is a schematic diagram of a current LLC resonant converter.
  • FIG. 2 is a schematic diagram of a LLC resonant converter in a soft switching circuit of the present invention.
  • Embodiment 1 is a schematic diagram of an LLC resonant converter in the soft switching circuit of this embodiment.
  • Vin is a DC bus voltage
  • the main Switch MOS transistor Q1 The main switch MOS transistor Q2 is controlled to generate a square wave voltage
  • the resonant capacitor Cr, the resonant inductor Lr, and the magnetizing inductance Lp form a resonant network
  • T1A, T1B are ideal transformer primary and secondary windings
  • Diode D2, diode D4, and output capacitor C3 form an output rectification filter network.
  • a capacitor is connected in parallel between the main switch MOS transistor Q1 and the main switch MOS transistor Q2, and the other IJ is the capacitor C1 and the capacitor C2.
  • two switching MOS transistors are used to control the capacitor. Whether C1 and capacitor C2 are connected in parallel to the main switch MOS transistor Q1, and the main switch MOS transistor Q2.
  • the two ends of the capacitor C1 are respectively connected to the drain of the switching MOS transistor Q1 and the drain of the switching MOS transistor Q3, and the source of the switching MOS transistor Q3 is connected to the source of the switching MOS transistor Q1; the two ends of the capacitor C2 are respectively connected to the switching MOS transistor The drain of Q2 and the drain of the switching MOS transistor Q4, the source of the switching MOS transistor Q4 is connected to the source of the switching MOS transistor Q2; the control device generates the driving signal drv to the gate of the switching MOS transistor Q3 and the switching MOS transistor Q4, respectively. .
  • the power supply is in the wide output voltage range, above the low voltage and heavy load conditions, and the transformer excitation current can be extracted to add the capacitor energy to meet the LLC soft switching condition.
  • the switch MOS transistor Q4 is not turned on, and the capacitor is not incorporated.
  • the main switching MOS transistor Q1, the main switching MOS transistor Q2 realizes zero voltage turn-on ZVS, and the diode D2 and the diode D4 realize zero current shutdown.
  • ZCS but the main switch MOS transistor Q1, the main switch MOS transistor Q2 is hard-off, large load will bring a lot of voltage spikes and turn-off losses at high frequencies, such as incorporating capacitor C1, capacitor C2 to make the main switch MOS transistor Q1
  • the main switch MOS transistor Q2 voltage rises slowly to reduce dv*di*dt and turn-off loss.
  • Capacitor C1 and capacitor C2 absorb energy and release it to the power supply in the next cycle.
  • the operating switching frequency of the LLC has a great relationship with the output voltage and gain. Because of the low voltage and heavy load, high frequency and large excitation current will appear. In addition, the high-frequency reloading also requires the switching MOS transistor Q3 and the switching MOS transistor Q4 to be turned on. Therefore, there is also a drv signal similar to the low-voltage reload. In fact, as long as the low-voltage and heavy-duty load can work continuously, high frequency will appear, which mainly meets the loss dv*di*dt contrast size. Because the DV*DI is small in the low-voltage heavy load, the DV*DI is small in the high-voltage and heavy-load. The DT plus increases the loss.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本发明提供一种软开关电路,包括LLC谐振转换器;还包括控制装置,开关MOS管Q3、开关MOS管Q4、电容C1、电容C2;电容C1的两端分别接开关MOS管Q1的漏极和开关MOS管Q3的漏极,开关MOS管Q3的源极与开关MOS管Q1的源极相连;电容C2的两端分别接开关MOS管Q2的漏极和开关MOS管Q4的漏极,开关MOS管Q4的源极与开关MOS管Q2的源极相连;控制装置产生驱动信号drv分别接开关MOS管Q3和开关MOS管Q4的栅极。本发明由于在高频下大负载会带来很大电压尖峰及关断损耗时,控制信号drv控制MOS管Q3和开关MOS管Q4导通,将电容C1和电容C2并联到LLC谐振转换器开关MOS管Q1和开关MOS管Q2的两端,如并入电容C1、C2使MOS管电压上升慢减少dv*di*dt及关断损耗,电容C1、C2吸收能量在下一周期又释放到电源中。

Description

一种软幵关电路 技术领域
[0001] 本发明涉及软开关电路。
背景技术
[0002] 与传统 PWM (脉宽调节) 变换器不同, LLC是一种通过控制开关频率 (频率 调节) 来实现输出电压恒定的谐振电路, 又称为 LLC谐振变换器、 LLC谐振转换 器。 它的优点是: 实现原边两个主 MOS开关的零电压开通 (ZVS)和副边整流二极 管的零电流关断 (ZCS), 通过软开关技术, 可以降低电源的开关损耗, 提高功率 变换器的效率和功率密度图 1给出了 LLC谐振变换器的典型线路。 如图 1所示 LLC 转换器包括 Q1和 Q2两个主 MOS开关, 其输入 PWM信号的占空比都为 0.5 ; 在主 MOS开关 Q1的源—漏极 (s-d) 间并联的二极管 D1, 在主 MOS开关 Q2的源—漏 (s -d)极间并联的二极管 D3 ; 事实上二极管 D1和二极管 D3分别是 MOS开关管 Q1、 MOS开关管 Q2的体二极管。 谐振电容 Cr, 原副边匝数相等的中心抽头变压器 T1 , 等效电感 Lr, 励磁电感 Lp, 全波整流二极管 D2和 D4以及输出电容 Co。
[0003] 如图 1的 LLC电路可知: Vin为直流母线电压, 主开关 MOS管 Q1, 主开关 MOS 管 Q2—起受控产生方波电压;
[0004] 谐振电容 Cr、 谐振电感 Lr、 励磁电感 Lp—起构成谐振网络;
[0005] T1A, T1B为理想变压器原、 副边线圈;
[0006] 二极管 D2,二极管 D4, 输出电容 C3—起构成输出整流滤波网络。
[0007] 输出电压范围宽的条件下, 比如通电粧模块上, 输出可能从 300到 750V, 甚至 更宽, 大家都喜欢用 LLC电路来提高效率, 但在一些电压范围内, 由于 LLC电路 的一些特性, 使得功率 MOSFET损耗大, 不利于效率提高与功率 MOSFET管子散 热。
发明概述
技术问题
[0008] 本发明针对目前但在一些电压范围内, 由于软开关电路中, LLC电路的一些特 性, 使得功率 MOSFET损耗大, 不利于效率提高与功率 MOSFET管子散热。 问题的解决方案
技术解决方案
[0009] 本发明为实现其技术目的所采用的技术方案是: 一种软开关电路, 包括具有开 关 MOS管 Q1、 开关 MOS管 Q2的 LLC谐振转换器; 其特征在于: 还包括控制装置 , 开关 MOS管 Q3、 开关 MOS管 Q4、 电容 C1、 电容 C2;
[0010] 所述的电容 C1的两端分别接开关 MOS管 Q1的漏极和开关 MOS管 Q3的漏极, 开 关 MOS管 Q3的源极与开关 MOS管 Q1的源极相连;
[0011] 所述的电容 C2的两端分别接开关 MOS管 Q2的漏极和开关 MOS管 Q4的漏极, 开 关 MOS管 Q4的源极与开关 MOS管 Q2的源极相连;
[0012] 所述的控制装置产生驱动信号 drv分别接开关 MOS管 Q3和开关 MOS管 Q4的栅极
[0013] 本发明由于在高频下大负载会带来很大电压尖峰及关断损耗时, 控制信号 drv 控制 MOS管 Q3和开关 MOS管 Q4导通, 将电容 C1和电容 C2并联到 LLC谐振转换 器开关 MOS管 Q1和开关 MOS管 Q2的两端, 如并入电容 Cl、 C2使 MOS管电压上 升慢减少 dv*di*dt及关断损耗, 电容 Cl、 C2吸收能量在下一周期又释放到电源中
[0014] 下面结合附图和具体实施例对本发明进行进一步的描述。
发明的有益效果
对附图的简要说明
附图说明
[0015] 图 1是目前 LLC谐振变换器原理图。
[0016] 图 2是本发明软开关电路中 LLC谐振变换器原理图。
发明实施例
本发明的实施方式
[0017] 实施例 1, 如图 2所示是本实施例软开关电路中 LLC谐振变换器原理图, 如图 2 所示, 本实施例的 LLC谐振变换器中, Vin为直流母线电压, 主开关 MOS管 Q1, 主开关 MOS管 Q2—起受控产生方波电压;
[0018] 谐振电容 Cr、 谐振电感 Lr、 励磁电感 Lp—起构成谐振网络;
[0019] T1A, T1B为理想变压器原、 副边线圈;
[0020] 二极管 D2,二极管 D4, 输出电容 C3—起构成输出整流滤波网络。
[0021] 另外, 有条件的在主开关 MOS管 Q1, 主开关 MOS管 Q2两端并联一个电容, 分 另 IJ是电容 C1和电容 C2, 如图 2所示, 采用两个开关 MOS管控制电容 C1和电容 C2 是否并联到主开关 MOS管 Q1, 主开关 MOS管 Q2两端。 电容 C1的两端分别接开关 MOS管 Q1的漏极和开关 MOS管 Q3的漏极, 开关 MOS管 Q3的源极与开关 MOS管 Q1的源极相连; 电容 C2的两端分别接开关 MOS管 Q2的漏极和开关 MOS管 Q4的 漏极, 开关 MOS管 Q4的源极与开关 MOS管 Q2的源极相连; 控制装置产生驱动信 号 drv分别接开关 MOS管 Q3和开关 MOS管 Q4的栅极。
[0022] 电源在宽输出电压范围中, 低压重载条件以上, 变压器励磁电流能抽掉加入电 容能量满足 LLC软开关条件。 我们加入驱动信号 drv, 使开关 MOS管 Q3、 开关 M OS管 Q4导通, 使电容 C1、 电容 C2并入主开关 MOS管 Q1, 主开关 MOS管 Q2两端 上, 其它情况下开关 MOS管 Q3、 开关 MOS管 Q4不导通, 电容不并入。 因在这种 情况下 LLC工作效率范围变化比较大, 在高频段没并入电容时主开关 MOS管 Q1 , 主开关 MOS管 Q2虽然实现零电压开通 ZVS,二极管 D2、 二极管 D4实现零电流 关断 ZCS, 但主开关 MOS管 Q1, 主开关 MOS管 Q2硬关断, 在高频下大负载会带 来很大电压尖峰及关断损耗, 如并入电容 C1、 电容 C2使主开关 MOS管 Q1, 主开 关 MOS管 Q2电压上升慢减少 dv*di*dt及关断损耗, 电容 C1、 电容 C2吸收能量在 下一周期又释放到电源中。 输出低压重载时, 因 LLC工作开关频率与输出电压及 增益有很大关系, 因在低压重载时才会出现高频与大的励磁电流。 另外, 高频 重载时也会需要使开关 MOS管 Q3、 开关 MOS管 Q4导通, 因此, 此时也会有与低 压重载一样的 drv信号。 其实低压重载只要带载能连续工作就会出现高频, 主要 满足其损耗 dv*di*dt对比大小, 因在低压重载 DV*DI大 DT小, 而在高压重载时 D V*DI小 DT大加上反而增加损耗。

Claims

权利要求书
[权利要求 1] 一种软开关电路, 包括具有主开关 MOS管 Q1、 主开关 MOS管 Q2的 LL
C谐振转换器; 其特征在于: 还包括控制装置, 开关 MOS管 Q3、 开关
MOS管 Q4、 电容 C1、 电容 C2;
所述的电容 C1的两端分别接主开关 MOS管 Q1的漏极和开关 MOS管 Q3 的漏极, 开关 MOS管 Q3的源极与主开关 MOS管 Q1的源极相连; 所述的电容 C2的两端分别接主开关 MOS管 Q2的漏极和开关 MOS管 Q4 的漏极, 开关 MOS管 Q4的源极与主开关 MOS管 Q2的源极相连; 所述的控制装置产生驱动信号 drv分别接开关 MOS管 Q3和开关 MOS管 Q4的栅极。
[权利要求 2] 根据权利要求 1所述的软开关电路, 其特征在于: 所述的控制装置产 生的驱动信号 drv在输出低压重载时控制开关 MOS管 Q3和开关 MOS管 Q4导通。
[权利要求 3] 根据权利要求 1所述的软开关电路, 其特征在于: 所述的控制装置产 生的驱动信号 drv在输出高频重载时控制开关 MOS管 Q3和开关 MOS管 Q4导通。
PCT/CN2018/103247 2018-04-17 2018-08-30 一种软开关电路 WO2019200812A1 (zh)

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