WO2019100795A1 - 一种编码方法、装置、电子设备和存储介质 - Google Patents

一种编码方法、装置、电子设备和存储介质 Download PDF

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Publication number
WO2019100795A1
WO2019100795A1 PCT/CN2018/103089 CN2018103089W WO2019100795A1 WO 2019100795 A1 WO2019100795 A1 WO 2019100795A1 CN 2018103089 W CN2018103089 W CN 2018103089W WO 2019100795 A1 WO2019100795 A1 WO 2019100795A1
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Prior art keywords
sequence
encoded
code rate
transmission code
preset
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PCT/CN2018/103089
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English (en)
French (fr)
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王加庆
郑方政
张荻
孙韶辉
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电信科学技术研究院有限公司
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Priority to EP18882160.7A priority Critical patent/EP3716509A4/en
Priority to US16/766,734 priority patent/US11476971B2/en
Priority to JP2020528386A priority patent/JP7039699B2/ja
Priority to KR1020207018258A priority patent/KR102365382B1/ko
Publication of WO2019100795A1 publication Critical patent/WO2019100795A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H04L1/001—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding applied to control information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0072—Error control for data other than payload data, e.g. control data
    • H04L1/0073—Special arrangements for feedback channel

Definitions

  • the present application relates to the field of communications technologies, and in particular, to an encoding method, apparatus, electronic device, and storage medium.
  • the Polar Codes of the eMBB (Enhanced Moblie Broad Band) scene control channel coding scheme of the 5th Generation (5th-Generation, 5G) is a binary symmetric channel capacity.
  • the new coding method has excellent decoding performance.
  • the 5G specifies that the downlink code of the downlink code has a maximum length of 512 bits and the uplink transmission has a maximum of 1024 bits.
  • the length of the information sequence of the uplink control information (UCI) is greatly increased.
  • the UCI is up to 543 bits
  • the 8688 bits far exceed the maximum mother code length of 1024 bits for the uplink transmission polar code. Therefore, it is necessary to study how to encode and transmit the UCI of multi-carrier aggregation.
  • the prior art method divides the information sequence with a large length into two segments at an appropriate code rate, and the two segments of the information sequence utilize the maximum respectively.
  • a CRC sequence is added after the UCI information sequence Information bits to obtain a UCI payload, and then a code block segmentation is performed on the UCI payload.
  • the payload is divided into two segments, which are respectively coded by the polarization code.
  • the coded blocks are respectively subjected to rate matching operation, and finally the code block concatenation is used as the final output.
  • the multi-segment UCI may have only one CRC, and may require multiple segments of decoding to obtain candidate paths for each decoding, and it is necessary to jointly use the CRC for verification.
  • the UCI information sequence Information bits are code block segmentation, and each segment is added with a sequence of L-bit CRC, and then Each bit of the CRC added bit stream is subjected to polarization code encoding, and the coded block is subjected to rate matching operation, and finally code block concatenation is used as the final output.
  • each piece of polar coding can be verified according to a respective CRC.
  • the CRC overhead is doubled, and the CRC is at least 11 bits according to the current standard, so the system performance is significantly reduced, and the decoding is simple and easy to operate.
  • the embodiment of the present application discloses an encoding method, an apparatus, an electronic device, and a storage medium, which are used to solve the problem that the sequence to be encoded in the prior art is inflexible.
  • an embodiment of the present application discloses an encoding method, where the method includes:
  • Each subsequence after segmentation is encoded and concatenated after encoding.
  • the determining, according to the length of the sequence to be encoded and the transmission code rate, determining the target number of the sequence to be encoded includes:
  • a target number of segments to be encoded is determined according to a length of the sequence to be encoded, a transmission code rate, and a preset first function.
  • the preset first function includes:
  • the g(R) is a linear function
  • the g(R) c1*R+b1
  • c1 is a maximum bit length to be encoded
  • b1 is a preset first offset value
  • the method before performing segmentation processing on the sequence to be encoded according to the target quantity, the method includes:
  • determining the temporary value according to the length of the sequence to be encoded and the target number includes:
  • the first value is 1.
  • the method further includes: before performing the segmentation processing on the sequence to be encoded according to the target quantity, the method further includes:
  • the determining, according to the transmission code rate, the ratio threshold corresponding to the transmission code rate includes:
  • the ratio threshold corresponding to the transmission code rate is a preset value.
  • the determining, according to the transmission code rate, the ratio threshold corresponding to the transmission code rate includes:
  • the determining, according to the transmission code rate and the preset second function, the ratio threshold corresponding to the transmission code rate includes:
  • the transmission code rate is not less than a preset second rate threshold, determining the ratio threshold according to the transmission code rate, and a preset linear function c3*R+b3, or int(c3*R+b3), C3 is the maximum bit length to be encoded, b3 is the preset third offset value, R is the transmission code rate, and int is rounded.
  • the determining, according to the transmission code rate and the preset second function, the ratio threshold corresponding to the transmission code rate includes:
  • the transmission code rate is not less than a preset third rate threshold and is less than a preset fourth rate threshold, according to the transmission code rate, and a preset linear function c4*R+b4, or int(c4) *R+b4) determines the ratio threshold, c4 is the maximum bit length to be encoded, b4 is the preset fourth offset value, R is the transmission code rate, and int is rounded.
  • the scaling factor is greater than zero and less than or equal to one.
  • the offset value is greater than -150 and less than 200.
  • the segmentizing the sequence to be encoded according to the target quantity includes:
  • target sequence is a sequence of information, or a sequence of information sequences and a cyclic redundancy check CRC sequence.
  • the segmentation process includes:
  • An embodiment of the present application discloses an encoding apparatus, where the apparatus includes:
  • a determining module configured to determine, according to a length of the sequence to be encoded and a transmission code rate, a target number of segments to be encoded
  • a segmentation module configured to perform segmentation processing on the sequence to be encoded according to the target number
  • An encoding module is configured to encode each subsequence after segmentation and concatenate after encoding.
  • An embodiment of the present application discloses an electronic device, where the electronic device includes: a memory and a processor;
  • the processor is configured to read a program in the memory, and perform the following process: determining a target number of the sequence to be encoded according to a length of the sequence to be encoded and a transmission code rate;
  • Each subsequence after segmentation is encoded and concatenated after encoding.
  • the processor is specifically configured to determine, according to a length of the sequence to be encoded, a transmission code rate, and a preset first function, a target number of the sequence segment to be encoded.
  • the processor is further configured to determine a temporary value according to a length of the sequence to be encoded and the target number before performing segmentation processing on the sequence to be encoded according to the target quantity; Transmitting a code rate, determining a proportional threshold corresponding to the transmission code rate; determining whether the temporary value is greater than or equal to the ratio threshold; if yes, performing a subsequent step.
  • the processor is configured to determine the second quantity by using the target quantity and the preset first value, and determine a ratio of a length of the sequence to be encoded and the second quantity to a temporary value; Or determining a second ratio of the length of the sequence to be encoded to the target number, and determining a product of the second ratio and the preset second scaling factor as a temporary value.
  • the processor is further configured to: if the temporary value is less than the proportional threshold, adjust the target quantity before performing segmentation processing on the sequence to be encoded according to the target quantity .
  • the processor is configured to determine that a ratio threshold corresponding to the transmission code rate is a preset value, if the transmission code rate is less than a preset first rate threshold.
  • the processor is specifically configured to determine, according to a transmission code rate and a preset second function, a proportional threshold corresponding to the transmission code rate.
  • the processor is specifically configured to: if the transmission code rate is not less than a preset second rate threshold, according to the transmission code rate, and a preset linear function c3*R+b3, or int ( C3*R+b3) determines the ratio threshold, c3 is the maximum bit length to be encoded, b3 is the preset third offset value, R is the transmission code rate, and int is rounded.
  • the processor is specifically configured to determine a target sequence according to the sequence to be encoded
  • target sequence is a sequence of information, or a sequence of information sequences and a cyclic redundancy check CRC sequence.
  • the embodiment of the present application discloses a computer readable storage medium storing a computer program executable by an electronic device, when the program is run on the electronic device, causing the electronic device to perform any of the above encoding methods The steps of the method.
  • the embodiment of the present application discloses an encoding method, an apparatus, an electronic device, and a storage medium, which are used to solve the problem that the sequence to be encoded in the prior art is inflexible.
  • the method includes: determining a target number of the sequence to be encoded according to a length of the sequence to be encoded and a transmission code rate; and performing segmentation processing on the sequence to be encoded according to the target number; Each subsequence after processing is encoded and concatenated after encoding.
  • the target number of the sequence segments to be encoded is determined according to the length of the sequence to be encoded and the transmission code rate, and the sequence to be encoded is segmented according to the target number. Flexible processing of the encoded sequence for segmentation improves the performance of the encoding.
  • 1 is a schematic diagram of a prior art UCI segment for Polar coding
  • FIG. 2 is a schematic diagram of a prior art UCI segment for Polar coding
  • FIG. 3 is a schematic diagram of a coding process according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a coding process according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a segmentation according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a segmentation according to an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a segmentation according to an embodiment of the present application.
  • FIG. 8 is a structural diagram of an encoding apparatus according to an embodiment of the present application.
  • FIG. 9 is an electronic device according to an embodiment of the present application.
  • the embodiment of the present application provides an encoding method, apparatus, electronic device, and storage medium.
  • FIG. 3 is a schematic diagram of an encoding process according to an embodiment of the present application, where the process includes the following steps:
  • S301 Determine, according to the length of the sequence to be encoded and the transmission code rate, a target number of segments to be encoded.
  • S302 Perform segmentation processing on the sequence to be encoded according to the target number.
  • S303 Encode each subsequence after segmentation and concatenate after encoding.
  • the coding method provided by the embodiment of the present application is applied to a sender, and the sender may be a base station or a user equipment (UE).
  • the sender may be a base station or a user equipment (UE).
  • UE user equipment
  • the present application intends to perform segmentation processing on the sequence to be encoded, and encodes each subsequence after segmentation processing to improve coding performance.
  • the sender knows at what transmission rate R is used to transmit the bit stream.
  • the target number determines the number of sequence segments to be encoded, called the target number, and determine the target segmentation of the sequence to be encoded according to the length of the sequence to be encoded and the transmission code rate. Quantity, the target number is a positive integer.
  • the sequence to be encoded may be segmented according to the target quantity, and may be equally divided or non-equalized when performing segmentation processing.
  • the sequence to be encoded may be an information sequence including UCI, or may be an information sequence including UCI and a CRC sequence for verification, that is, the sequence to be encoded is the obtained UCI payload.
  • each subsequence after the segmentation process is determined, and the subsequence is encoded to obtain each code block, and the plurality of code blocks obtained after the coding are leveld. Linked to get the entire encoded bitstream.
  • the target number of the sequence segments to be encoded is determined according to the length of the sequence to be encoded and the transmission code rate, and the sequence to be encoded is segmented according to the target number.
  • Flexible processing of the encoded sequence for segmentation improves the performance of the encoding.
  • the determining the target number of the sequence to be encoded according to the length of the sequence to be encoded and the transmission code rate includes:
  • a target number of segments to be encoded is determined according to a length of the sequence to be encoded, a transmission code rate, and a preset first function.
  • a specific first function is stored in the specific transmitting end.
  • the sequence may be based on the sequence to be encoded.
  • a length, a transmission rate, and a preset first function determine a target number of segments to be encoded.
  • K/g(R)) or N ceiling(a1*K/g(R)), wherein the g(R) is a function of the transmission code rate R.
  • g(R) is a linear function or a nonlinear function
  • a1 is a first scaling factor
  • K is the length of the sequence to be encoded
  • R is the transmission code rate of the sequence to be encoded
  • N is the target number.
  • K is the length of the sequence to be encoded
  • R is the transmission code rate of the sequence to be encoded.
  • g(R) may be a linear function, and g(R) may also be a nonlinear function.
  • the first offset value ranges from greater than -150 to less than 200. If the embodiment of the present application is a coding method of a polarization code, c1 is the maximum mother code length and may be 1024 bits.
  • N ceiling(a*K/g(R)).
  • the target number N ceiling(a1*K/(c1*R+b1));
  • the target number N ceiling(a1*K/(c1*R);
  • the target number N ceiling(K/(c1*R+b1));
  • the target number N ceiling(K/(c1*R)).
  • a i to A 1 are preset constants, and any one or more of A i to A 1 may be 0 or non-zero.
  • N ceiling(a1*K/(c2*(A i *R i +A i-1 R i- 1 +...+A 1 R)+b2)).
  • the target number N ceiling(a1*K/(c2*(A i *R i +A i-1 R i-1 +...+A 1 R )+b2));
  • the target number N ceiling(a1*K/(c2*(A i *R i +A i-1 R i-1 +...+A 1 R) ));
  • the target number N ceiling(*K/(c2*(A i *R i +A i-1 R i-1 +...+A 1 R)+ B2));
  • the target number N ceiling(*K/(c2*(A i *R i +A i-1 R i-1 +...+A 1 R)))) .
  • a i to A 1 are preset constants, and the constants in A i to A 1 may be 0 or non-zero, and the corresponding constant 0 item does not exist, and the item whose constant is not 0 exists.
  • the demarcation point can successfully capture the segmentation boundary.
  • determine whether to segment according to the target number determine whether the preset condition is met, if the preset condition is met.
  • the sequence to be encoded may be segmented according to the target number. If the condition is not met, the determined target number may be adjusted, and the sequence to be encoded is segmented according to the adjusted target number.
  • the method before performing segmentation processing on the sequence to be encoded according to the target number, the method includes:
  • the sequence to be encoded before performing the segmentation process, it may be determined whether the sequence to be encoded is segmented according to the target number.
  • the temporary value is determined according to the length of the sequence to be encoded and the target number, and the temporary value is a sub-length of each segment of the sequence to be encoded after the theoretical segmentation, that is, according to the length of the sequence to be encoded and The target number, a determined ratio, and the proportional threshold corresponding to the transmission code rate is determined according to the transmission code rate.
  • the ratio of the proportional threshold and the temporary value it is determined whether the sequence to be encoded is segmented according to the target number.
  • the sequence to be encoded is segmented according to the target number. If the temporary value is less than the proportional threshold, the target number needs to be adjusted, and the sequence to be encoded is divided according to the adjusted target number. Segment processing.
  • the first value is stored in the sending end.
  • the second quantity may be determined according to the target quantity and the saved first value, and the length of the sequence to be encoded is determined.
  • the ratio to the second amount is determined to be a temporary value.
  • the sum of the target quantity and the first value may be determined as the second quantity, or the difference between the target quantity and the first value may be determined as the second quantity.
  • the number, the first value may be 0, may be 1, may be 1.5, may be 2, may also be other values, preferably, the first value is 1.
  • the second scaling factor a2 is stored in the sending end.
  • the temporary value may be determined according to the length of the sequence to be encoded, the target number, and the second scaling factor.
  • the target quantity needs to be adjusted.
  • the target quantity may be adjusted to Nk, or N+k, where k is an integer greater than 0, preferably, k. Is 1.
  • Determining a ratio threshold corresponding to the transmission code rate includes:
  • the ratio threshold corresponding to the transmission code rate is a preset value.
  • the first code rate threshold and the preset value are saved in the sending end, and when determining the ratio threshold corresponding to the transmission code rate, the transmission may be determined according to the transmission code rate and the first code rate threshold.
  • the ratio threshold corresponding to the code rate If the transmission code rate is less than the preset first rate threshold, the ratio threshold corresponding to the transmission code rate is determined to be a preset value.
  • the first rate threshold R1 may be any value greater than 0.
  • the ratio threshold corresponding to R is a preset value. If R1 is greater than or equal to 1, it is considered that regardless of the transmission code rate, the corresponding proportional threshold is For this preset value.
  • the first rate threshold is 1/5, or 2/5.
  • the sending end may determine, according to the saved preset second function, the specific ratio of the transmission code rate according to the transmission code rate.
  • Thresholds include:
  • the second code rate threshold R2 may be any value less than or equal to 1, and when R is greater than or equal to R2, determined according to the transmission code rate, and a preset linear function c3*R+b3, or int(c3*R+b3). Proportional threshold.
  • R2 is less than or equal to 0, it can be considered that regardless of the transmission code rate, the corresponding proportional threshold is determined according to the linear function c3*R+b3, or int(c3*R+b3).
  • the second rate threshold is 1/5, or 2/5.
  • R1 R2, and 0 ⁇ R1 ⁇ 1, and 0 ⁇ R2 ⁇ 1; when R ⁇ R1, the corresponding proportional threshold is the preset value; when R ⁇ R1, the corresponding proportional threshold is according to the linear function c3* R+b3, or int(c3*R+b3) is determined.
  • the transmission code rate may be not less than a preset third rate threshold and less than the preset fourth.
  • the code rate threshold is determined according to the transmission code rate, and a preset linear function c4*R+b4, or int(c4*R+b4), where c4 is the maximum bit length to be encoded, and b4 is pre- Set the fourth offset value, R is the transmission code rate, and int is rounded.
  • the third code rate threshold R3 is smaller than the fourth code rate threshold R4.
  • R3 may be an arbitrary value less than 1
  • the fourth code rate threshold R4 may be an arbitrary value greater than 0.
  • R3 is 0 and R4 is 1, it can be considered that regardless of the transmission code rate, the corresponding proportional threshold is determined according to the linear function c4*R+b4, or int(c4*R+b4).
  • the corresponding proportional threshold is determined according to a linear function c3*R+b3, or int(c3*R+b3);
  • the corresponding proportional threshold is determined according to the linear function c4*R+b4, or int(c4*R+b4).
  • R1 R3, and 0 ⁇ R1 ⁇ 1, 0 ⁇ R3 ⁇ 1, and 0 ⁇ R4 ⁇ 1;
  • R2 R3, and 0 ⁇ R2 ⁇ 1, 0 ⁇ R3 ⁇ 1, and 0 ⁇ R4 ⁇ 1;
  • the corresponding proportional threshold is determined according to a linear function c3*R+b3, or int(c3*R+b3);
  • the corresponding proportional threshold is determined according to the linear function c4*R+b4, or int(c4*R+b4).
  • the determination relationship between the transmission code rate R and the proportional threshold in the following table can be obtained, where R1 is the first rate threshold, R2 is the second rate threshold, R3 is the third rate threshold, and R4 is The fourth code rate threshold.
  • N ceiling(K/(1024*R))
  • the sequence to be encoded can be directly divided into 6 segments.
  • the segment temporary value and the proportional threshold may be determined after determining the target number N.
  • Figure 7 is a schematic illustration of a segmentation according to the above embodiment, with the segmentation boundary successfully capturing the segmentation boundary.
  • the uplink control channel (PUCCH) is used to transmit the UCI after synchronization, and the UCI transmitted on the PUCCH includes an uplink scheduling request (SR) and a downlink hybrid automatic repeat request acknowledgement (HARQ-). ACK) information, and periodic channel quality indication (CQI) information of the UE.
  • the transmitting end adds a CRC sequence for the check after the information sequence of the UCI before the encoding of the UCI.
  • the code is to be encoded.
  • the sequence is segmented and encoded, and may be segmented first, and then the CRC sequence is added, or the CRC sequence may be added first, and then segmented.
  • And performing segmentation processing on the sequence to be encoded according to the target quantity including:
  • target sequence is a sequence of information, or a sequence of information sequences and a cyclic redundancy check CRC sequence.
  • the target sequence is determined according to the sequence to be encoded, and the target sequence is a UCI payload formed by adding a CRC sequence to the information bits of the UCI information sequence; when the sequence to be encoded is itself a sequence of information including UCI and When the CRC sequence is used for verification, the sequence to be encoded can be directly used as the target sequence.
  • the UCI information sequence Information bits are first subjected to code block segmentation, a sequence such as an L-bit CRC is added to each segment, and then a bit stream of each CRC is added for polarization coding.
  • the coded and coded code blocks are respectively subjected to a rate matching operation, and finally the code block concatenation is used together as a final output.
  • the sequence to be encoded when the sequence to be encoded is a UCI information sequence, the sequence to be encoded may be directly used as a target sequence, and the target sequence is segmented by a target number; when the sequence to be encoded is an information sequence including UCI itself And when the CRC sequence is used for verification, the CRC sequence needs to be removed from the sequence to be encoded, and the obtained information sequence of UCI is used as the target sequence, thereby performing segmentation processing.
  • the segmentation process when it is performed, it may be an equal division process, and may be a non-divided process; or it may be a first 0 process and then an equal process.
  • sequence to be coded may be equally divided, or non-equalized, or first processed and then equally processed.
  • the target sequence may be equally divided, or non-divided, or first processed and then halved.
  • FIG. 4 is a schematic diagram of an encoding process according to an embodiment of the present application, where the process includes the following steps:
  • S401 Determine, according to the length of the sequence to be encoded, the transmission code rate, and the preset first function, the target number of the sequence to be encoded.
  • S402 Determine a temporary value according to the length of the sequence to be encoded and the target number, and determine a proportional threshold corresponding to the transmission code rate according to the transmission code rate.
  • S403 Determine whether the temporary value is greater than or equal to the proportional threshold, if yes, proceed to S405, and if no, proceed to S404.
  • S404 Adjust the target quantity, and perform S405 according to the adjusted target quantity.
  • S405 Perform segmentation processing on the sequence to be encoded according to the target number.
  • S406 Encode each subsequence after segmentation and concatenate after encoding.
  • FIG. 8 is a structural diagram of an encoding apparatus according to an embodiment of the present disclosure, where the apparatus includes:
  • a determining module 81 configured to determine, according to a length of the sequence to be encoded and a transmission code rate, a target number of segments to be encoded
  • a segmentation module 82 configured to perform segmentation processing on the sequence to be encoded according to the target number
  • the encoding module 83 is configured to encode each sub-sequence processed by the segmentation and concatenate after encoding.
  • the determining module 81 is further configured to: determine a temporary value according to the length of the sequence to be encoded and the target number; and determine a proportional threshold corresponding to the transmission code rate according to the transmission code rate;
  • the device also includes:
  • a determining module determining whether the temporary value is greater than or equal to the proportional threshold
  • the segmentation module 82 is triggered.
  • the determining module 81 is specifically configured to determine the second quantity by using the target quantity and the preset first value, and determine a ratio of a length of the sequence to be encoded and the second quantity to a temporary value; or determine to be A second ratio of the length of the encoded sequence to the target number, and a product of the second ratio and the preset second scaling factor is determined to be a temporary value.
  • the device also includes:
  • An update module for adjusting the number of targets.
  • the determining module 81 is specifically configured to determine that the ratio threshold corresponding to the transmission code rate is a preset value, if the transmission code rate is less than a preset first rate threshold.
  • the determining module 81 is specifically configured to determine a proportional threshold corresponding to the transmission code rate according to a transmission code rate and a preset second function.
  • the determining module 81 is specifically configured to: if the transmission code rate is not less than a preset second rate threshold, according to the transmission code rate, and a preset linear function c3*R+b3, or int(c3*R) +b3) Determine the ratio threshold, c3 is the maximum bit length to be encoded, b3 is the preset third offset value, R is the transmission code rate, and int is rounded.
  • the determining module 81 is specifically configured to: if the transmission code rate is not less than a preset third rate threshold, and is less than a preset fourth rate threshold, according to the transmission code rate, and a preset linear function c4 *R+b4, or int(c4*R+b4) determines the ratio threshold, c4 is the maximum bit length to be encoded, b4 is the preset fourth offset value, R is the transmission code rate, and int is rounded.
  • the segmentation module 82 is specifically configured to determine a target sequence according to the sequence to be encoded, and perform segmentation processing on the target sequence according to the target number, where the target sequence is an information sequence, or an information sequence and a loop The remainder verifies the sequence formed by the CRC sequence.
  • Figure 9 is an electronic device according to an embodiment of the present application, the electronic device includes: a memory 92 and a processor 91;
  • the processor 91 is configured to read a program in the memory, and perform the following process: determining a target number of the sequence to be encoded according to a length of the sequence to be encoded and a transmission code rate;
  • Each subsequence after segmentation is encoded and concatenated after encoding.
  • the processor 91 is specifically configured to determine, according to a length of the sequence to be encoded, a transmission code rate, and a preset first function, a target number of the sequence segment to be encoded.
  • the processor 91 is further configured to: before the segmentation process of the sequence to be encoded according to the target quantity, determine a temporary value according to a length of the sequence to be encoded and the target number; according to a transmission code rate Determining a ratio threshold corresponding to the transmission code rate; determining whether the temporary value is greater than or equal to the ratio threshold; if yes, performing a subsequent step.
  • the processor 91 is configured to determine a second quantity by using the target quantity and a preset first value, and determine a ratio of a length of the sequence to be encoded and the second quantity to a temporary value; or determine to wait A second ratio of the length of the encoded sequence to the target number, and a product of the second ratio and the preset second scaling factor is determined to be a temporary value.
  • the processor 91 is further configured to: if the temporary value is less than the proportional threshold, adjust the target quantity before performing segmentation processing on the sequence to be encoded according to the target quantity.
  • the processor 91 is specifically configured to determine that a ratio threshold corresponding to the transmission code rate is a preset value, if the transmission code rate is less than a preset first rate threshold.
  • the processor 91 is specifically configured to determine a proportional threshold corresponding to the transmission code rate according to a transmission code rate and a preset second function.
  • the processor 91 is specifically configured to: if the transmission code rate is not less than a preset second rate threshold, according to the transmission code rate, and a preset linear function c3*R+b3, or int(c3*R) +b3) Determine the ratio threshold, c3 is the maximum bit length to be encoded, b3 is the preset third offset value, R is the transmission code rate, and int is rounded.
  • the processor 91 is specifically configured to: if the transmission code rate is not less than a preset third rate threshold, and less than a preset fourth rate threshold, according to the transmission code rate, and a preset linear function c4 *R+b4, or int(c4*R+b4) determines the ratio threshold, c4 is the maximum bit length to be encoded, b4 is the preset fourth offset value, R is the transmission code rate, and int is rounded.
  • the processor 91 is specifically configured to determine a target sequence according to a sequence to be encoded
  • target sequence is a sequence of information, or a sequence of information sequences and a cyclic redundancy check CRC sequence.
  • FIG. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
  • the bus architecture may include any number of interconnected buses and bridges, specifically one or more processors represented by the processor 91.
  • the various circuits of the memory represented by memory 92 are linked together.
  • the bus architecture can also link various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and, therefore, will not be further described herein.
  • the bus interface provides an interface.
  • the processor 91 is responsible for managing the bus architecture and general processing, and the memory 92 can store data used by the processor 91 in performing operations.
  • a computer readable storage medium storing a computer program executable by an electronic device, the program causing the electronic device to perform the following steps when the program is run on the electronic device:
  • Each subsequence after segmentation is encoded and concatenated after encoding.
  • the determining, according to the length of the sequence to be encoded and the transmission code rate, determining the target number of the sequence to be encoded includes:
  • a target number of segments to be encoded is determined according to the length of the sequence to be encoded, the transmission code rate, and a preset first function.
  • the preset first function includes:
  • the g(R) is a linear function
  • the g(R) c1*R+b1
  • c1 is a maximum bit length to be encoded
  • b1 is a preset first offset value
  • the method before performing segmentation processing on the sequence to be encoded according to the target quantity, the method includes:
  • determining the temporary value according to the length of the sequence to be encoded and the target number includes:
  • the first value is 1.
  • the method further includes: before performing the segmentation processing on the sequence to be encoded according to the target quantity, the method further includes:
  • the determining, according to the transmission code rate, the ratio threshold corresponding to the transmission code rate includes:
  • the ratio threshold corresponding to the transmission code rate is a preset value.
  • the determining, according to the transmission code rate, the ratio threshold corresponding to the transmission code rate includes:
  • the determining, according to the transmission code rate and the preset second function, the ratio threshold corresponding to the transmission code rate includes:
  • the transmission code rate is not less than a preset second rate threshold, determining the ratio threshold according to the transmission code rate, and a preset linear function c3*R+b3, or int(c3*R+b3), C3 is the maximum bit length to be encoded, b3 is the preset third offset value, R is the transmission code rate, and int is rounded.
  • the determining, according to the transmission code rate and the preset second function, the ratio threshold corresponding to the transmission code rate includes:
  • the transmission code rate is not less than a preset third rate threshold and is less than a preset fourth rate threshold, according to the transmission code rate, and a preset linear function c4*R+b4, or int(c4) *R+b4) determines the ratio threshold, c4 is the maximum bit length to be encoded, b4 is the preset fourth offset value, R is the transmission code rate, and int is rounded.
  • the scaling factor is greater than zero and less than or equal to one.
  • the offset value is greater than -150 and less than 200.
  • the segmentizing the sequence to be encoded according to the target quantity includes:
  • target sequence is a sequence of information, or a sequence of information sequences and a cyclic redundancy check CRC sequence.
  • the segmentation process includes:
  • the embodiment of the present application discloses an encoding method, an apparatus, an electronic device, and a storage medium, which are used to solve the problem that the sequence to be encoded in the prior art is inflexible.
  • the method includes: determining a target number of the sequence to be encoded according to a length of the sequence to be encoded and a transmission code rate; and performing segmentation processing on the sequence to be encoded according to the target number; Each subsequence after processing is encoded and concatenated after encoding.
  • the target number of the sequence segments to be encoded is determined according to the length of the sequence to be encoded and the transmission code rate, and the sequence to be encoded is segmented according to the target number. Flexible processing of the encoded sequence for segmentation improves the performance of the encoding.
  • embodiments of the present application can be provided as a method, system, or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

本申请公开了一种编码方法、装置、电子设备和存储介质，用以解决现有技术中对待编码的序列分段不灵活的问题。方法包括：根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；根据所述目标数量，对所述待编码的序列进行分段处理；将分段处理后的每个子序列进行编码，并在编码后级联。由于在本申请实施例中，根据待编码的序列的长度及传输码率，确定对待编码的序列分段的目标数量，根据目标数量，对待编码的序列进行分段处理。灵活地对待编码的序列进行分段处理，提高了编码的性能。

Description

一种编码方法、装置、电子设备和存储介质
本申请要求在2017年11月24日提交中国专利局、申请号为201711192729.3、发明名称为“一种编码方法、装置、电子设备和存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，特别涉及一种编码方法、装置、电子设备和存储介质。
背景技术
作为第五代移动通信技术(5th-Generation，5G)的eMBB(Enhanced Moblie Broad Band，增强移动宽带)场景控制信道编码方案的极化码(Polar Codes)，是一种可以达到二进制对称信道容量的新型编码方式，且具有优异的译码性能。
然而polar码在母码长度较大的时候，具有较大的存储量与时延(latency)，所以5G规定下行传输polar码母码长度最大为512比特，上行传输最大为1024比特。然而由于大规模多入多出技术(Massive Multiple-Input Multiple-Output，Massive MIMO)的影响，导致上行控制信息(UCI)的信息序列的长度激增。
如单载波时，UCI最大为543个比特，而且5G可以支持最多16个载波的UCI在一个上行载波上传输，如此以来，可能存在一个载波需要传输的UCI的长度为543*16＝8688比特，而8688比特远远超过了上行传输polar码最大母码长度1024比特，因此需要研究如何对多载波聚合的UCI进行编码与传输。
为了解决长度较大的UCI在中低码率时严重损失polar码性能的问题，现有技术的方法是把长度较大的信息序列在适当码率时分为两段，两段信息序列分别利用最大母码1024进行极化码编码。假定UCI payload size(净载荷大小)＝512，polar码率为1/6，则编码比特总数为512*6＝3072比特。
根据现有协议，需要根据polar最大母码长度1024进行重复得到3072比特，非重复的真正码率仅为512/1024＝1/2，这无疑会明显降低上行控制信道性能。因此需要首先将payload第一长度划分为两段，512/2＝256比特，这256比特利用Nmax＝1024的Polar母码进行编码得1024比特，这样512的payload会得到2048个编码比特然后再重复至3072比特，此时非重复的实际码率为256/1024＝1/4比R＝1/2会明显提高性能。
图1为现有技术中UCI分段进行Polar编码的一种方式，首先在UCI信息序列Information bits后添加CRC序列，得到UCI payload，然后对UCI payload进行代码块分段 (Code block segmentation)，被分为两段的payload分别进行极化码编码，编码后的码块分别进行速率匹配(rate matching)操作，最后把码块级联(Code block concatenation)在一起作为最后的输出。图1所示的UCI分段中，多段UCI可以只有一个CRC，也可以每译码时需要多段译码得到候选路径，需要联合起来用此CRC进行校验。
图2为现有技术中UCI分段进行Polar编码的另一种方式，首先将UCI信息序列Information bits进行代码块分段(Code block segmentation)，每段添加如L比特CRC的序列，然后再对每段添加CRC的比特流进行极化码编码，编码后的码块分别进行速率匹配(rate matching)操作，最后把码块级联(Code block concatenation)在一起作为最后的输出。图2所示的方式，在译码时，每段polar编码可以分别根据各自相应的CRC进行校验。CRC开销增加一倍，根据目前的标准进展CRC至少11比特，所以会明显降低系统性能，同时也会有译码简单，便于操作的优点。
目前所有讨论都是基于单载波的编码方案，或者是多载波只分两段时的编码方法，特别是待编码的比特数大于编码允许的最大信息序列长度时，如何灵活地分段，目前没有任何方案。
发明内容
本申请实施例公开了一种编码方法、装置、电子设备和存储介质，用以解决现有技术中对待编码的序列分段不灵活的问题。
为达到上述目的，本申请实施例公开了一种编码方法，所述方法包括：
根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
根据所述目标数量，对所述待编码的序列进行分段处理；
将分段处理后的每个子序列进行编码，并在编码后级联。
可选地，所述根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量包括：
根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
可选地，所述预设的第一函数包括：
N＝a1*K/g(R)的整数，其中，所述g(R)为线性函数或非线性函数，a1为第一缩放因子，K为待编码的序列的长度，R为传输码率，N为目标数量。
可选地，当所述g(R)为线性函数时，所述g(R)＝c1*R+b1，其中，c1为最大待编码比特长度，b1为预设的第一偏置值。
可选地，当所述g(R)为非线性函数时，所述g(R)＝c2*(A i*R i+A i-1R i-1+……+A 1R)+b2，其中，c2为最大待编码比特长度，b2为预设的第二偏置值，i为预设的不小于2的常数，A i－A 1为预设的常数。
可选地，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法包括：
根据待编码的序列的长度及所述目标数量，确定临时值；
根据传输码率，确定所述传输码率对应的比例阈值；
判断所述临时值是否大于等于所述比例阈值；
如果是，则进行后续步骤。
可选地，所述根据待编码的序列的长度及所述目标数量，确定临时值包括：
将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或
确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
可选地，所述第一数值为1。
可选地，如果所述临时值小于所述比例阈值，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法还包括：
对所述目标数量进行调整。
可选地，所述根据传输码率，确定所述传输码率对应的比例阈值包括：
如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
可选地，所述根据传输码率，确定所述传输码率对应的比例阈值包括：
根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
可选地，所述根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值包括：
如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
可选地，所述根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值包括：
如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述 传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
可选地，缩放因子大于0小于等于1。
可选地，偏置值大于-150小于200。
可选地，所述根据所述目标数量，对所述待编码的序列进行分段处理包括：
根据待编码的序列，确定目标序列；
根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
可选地，所述分段处理，包括：
等分处理；或
非等分处理；或
补0处理后等分处理。
本申请实施例公开了一种编码装置，所述装置包括：
确定模块，用于根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
分段模块，用于根据所述目标数量，对所述待编码的序列进行分段处理；
编码模块，用于将分段处理后的每个子序列进行编码，并在编码后级联。
本申请实施例公开了一种电子设备，所述电子设备包括：包括：存储器和处理器；
所述处理器，用于读取存储器中的程序，执行下列过程：根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
根据所述目标数量，对所述待编码的序列进行分段处理；
将分段处理后的每个子序列进行编码，并在编码后级联。
可选地，所述处理器，具体用于根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
可选地，所述处理器，还用于在根据所述目标数量，对所述待编码的序列进行分段处理之前，根据待编码的序列的长度及所述目标数量，确定临时值；根据传输码率，确定所述传输码率对应的比例阈值；判断所述临时值是否大于等于所述比例阈值；如果是，则进行后续步骤。
可选地，所述处理器，具体用于将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
可选地，所述处理器，还用于如果所述临时值小于所述比例阈值，在根据所述目标数量，对所述待编码的序列进行分段处理之前，对所述目标数量进行调整。
可选地，所述处理器，具体用于如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
可选地，所述处理器，具体用于根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
可选地，所述处理器，具体用于如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
可选地，所述处理器，具体用于如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
可选地，所述处理器，具体用于根据待编码的序列，确定目标序列；
根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
本申请实施例公开了一种计算机可读存储介质，其存储有可由电子设备执行的计算机程序，当所述程序在所述电子设备上运行时，使得所述电子设备执行上述编码方法中任一所述方法的步骤。
本申请实施例公开了一种编码方法、装置、电子设备和存储介质，用以解决现有技术中对待编码的序列分段不灵活的问题。方法包括：根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；根据所述目标数量，对所述待编码的序列进行分段处理；将分段处理后的每个子序列进行编码，并在编码后级联。由于在本申请实施例中，根据待编码的序列的长度及传输码率，确定对待编码的序列分段的目标数量，根据目标数量，对待编码的序列进行分段处理。灵活地对待编码的序列进行分段处理，提高了编码的性能。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根 据这些附图获得其他的附图。
图1为现有技术中一种UCI分段进行Polar编码的示意图；
图2为现有技术中一种UCI分段进行Polar编码的示意图；
图3为本申请实施例提供的一种编码过程示意图；
图4为本申请实施例提供的一种编码过程示意图；
图5为本申请实施例提供的一种分段示意图；
图6为本申请实施例提供的一种分段示意图；
图7为本申请实施例提供的一种分段示意图；
图8为本申请实施例提供的一种编码装置结构图；
图9为本申请实施例提供的一种电子设备。
具体实施方式
为了灵活地对待编码的序列进行分段，本申请实施例提供了一种编码方法、装置、电子设备和存储介质。
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
图3为本申请实施例提供了一种编码过程示意图，该过程包括以下步骤：
S301：根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量。
S302：根据所述目标数量，对所述待编码的序列进行分段处理。
S303：将分段处理后的每个子序列进行编码，并在编码后级联。
本申请实施例提供的编码方法应用于发送端，具体的该发送端可以是基站或UE(User Equipment，用户终端设备)。
发送端中存在待编码的序列，本申请意于将待编码的序列进行分段处理，针对分段处理后的每个子序列进行编码，提高编码性能。发送端知道自身以什么样的传输码率R来传输编比特流。
要对待编码的序列进行分段处理，首先应确定对待编码的序列分段的数量，称为目标数量，可以是根据待编码的序列的长度及传输码率，确定对待编码的序列分段的目标数量，该目标数量为正整数。
当确定出了目标数量后，就可以根据该目标数量，对待编码的序列进行分段处理，在进行分段处理时，可以是等分，也可以是非等分。
在本申请实施例中，待编码的序列可以是包括UCI的信息序列，也可以是包括UCI的信息序列和用于校验的CRC序列，即该待编码的序列为得到的UCI payload。传输码率(R)为待编码的序列的长度(K)与对待编码的序列进行极化编码和速率匹配(rate matching)后得到得序列的长度(M)的比值，即R＝K/M。
当将待编码的序列进行分段处理后，则确定了分段处理后的每个子序列，就可以对该子序列进行编码得到每个码块，并对编码后得到的多个码块进行级联，得到整个编码的比特流。
由于在本申请实施例中，根据待编码的序列的长度及传输码率，确定对待编码的序列分段的目标数量，根据目标数量，对待编码的序列进行分段处理。灵活地对待编码的序列进行分段处理，提高了编码的性能。
实施例1：
在本申请实施例中，为了更加灵活、合理的确定分段的数量，所述根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量包括：
根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
具体的发送端中保存有预设的第一函数，在根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量时，可以是根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
发送端中保存的第一函数中可以包含，关于待编码的序列的长度与传输码率的子函数，该子函数为g(R)，预设的第一函数可以是N＝int(a1*K/g(R))或N＝ceiling(a1*K/g(R))，其中，所述g(R)为关于传输码率R的函数。而且g(R)为线性函数或非线性函数，a1为第一缩放因子，K为待编码的序列的长度，R为待编码的序列的传输码率，N为目标数量。
在本申请实施例中，该第一函数可以是a1*K/g(R)的整数，具体可以是对a1*K/g(R)向下取整，则第一函数为N＝int(a1*K/g(R))；也可以是对a1*K/g(R)向上取整，则第一函数为N＝ceiling(a1*K/g(R))；其中a1为第一缩放因子，第一缩放因子的范围为大于0小于等于1。K为待编码的序列的长度，R为待编码的序列的传输码率。
上述的g(R)可以是线性函数，g(R)也可以是非线性函数。
当g(R)为线性函数时，可以是g(R)＝c1*R+b1，其中，c1为最大待编码比特长 度，b1为预设的第一偏置值。
较佳地，该第一偏置值的范围为大于-150小于200。如果本申请实施例为极化码的编码方法，则c1为最大母码长度，可以是1024比特。
另外，较佳地，在本申请实施例中，当该g(R)为线性函数时，N＝ceiling(a*K/g(R))。
因为，a1、b1的取值不同，对应的线性函数g(R)不同，相应的第一函数也就不同，下面通过不同的情况，对a1、b1在不同取值时进行说明。如果第一函数为N＝ceiling(a1*K/g(R))，g(R)＝c1*R+b1：
当a1不为1，b1不为0时，具体的，目标数量N＝ceiling(a1*K/(c1*R+b1))；
当a1不为1，b1为0时，具体的，目标数量N＝ceiling(a1*K/(c1*R)；
当a1为1，b1不为0时，具体的，目标数量N＝ceiling(K/(c1*R+b1))；
当a1为1，b1为0时，具体的，目标数量N＝ceiling(K/(c1*R))。
如果第一函数为N＝int(a1*K/g(R))，具体的目标数量与上述类似，不再进行赘述。
当g(R)为非线性函数时，可以是g(R)＝c2*(A i*R i+A i-1R i-1+……+A 1R)+b2，其中，c2为最大待编码比特长度，b2为预设的第二偏置值，i为预设的不小于2的常数，A i－A 1为预设的常数。如果本申请实施例为极化码的编码方法，则c2为最大母码长度，可以是1024比特。上述的A i至A 1为预设的常数，A i至A 1中的任意一个或多个可以是0，也可以是非0。
另外，较佳地，在本申请实施例中，当该g(R)为非线性函数时，N＝ceiling(a1*K/(c2*(A i*R i+A i-1R i-1+……+A 1R)+b2))。
因为，a1、b2的取值不同，对应的非线性函数g(R)不同，相应的第一函数也就不同，下面通过不同的情况，对a1、b2在不同取值时进行说明。
当a1不为1，b2不为0时，具体的，目标数量N＝ceiling(a1*K/(c2*(A i*R i+A i-1R i-1+……+A 1R)+b2))；
当a1不为1，b2为0时，具体的，目标数量N＝ceiling(a1*K/(c2*(A i*R i+A i-1R i-1+……+A 1R)))；
当a1为1，b2不为0时，具体的，目标数量N＝ceiling(*K/(c2*(A i*R i+A i-1R i-1+……+A 1R)+b2))；
当a1为1，b2为0时，具体的，目标数量N＝ceiling(*K/(c2*(A i*R i+A i-1R i-1+……+A 1R)))。
上述的A i至A 1为预设的常数，A i至A 1中的常数可以是0，也可以是非0，则对应的常数为0的项不存在，常数不为0的项存在。
例如只存在三项，可以是g(R)＝c2*(A 3*R 3+A 2R 2+A 1R)+b2。
例如只存在两项，可以是g(R)＝c2*(A 4*R 4+A 1R)+b2。
如果第一函数为N＝int(a1*K/(c2*(A i*R i+A i-1R i-1+……+A 1R)+b2))，具体的目标数量与上述类似，不再进行赘述。
实施例2：
为了更加准确地进行分段，使分界点可以成功捕获到分段边界，当确定了目标数量后，确定是否根据该目标数量进行分段，可以判断是否满足预设的条件，如果满足预设的条件，则可以根据目标数量，对该待编码的序列进行分段，如果不满足条件，则可以对确定的目标数量进行调整，根据调整后的目标数量，对待编码的序列进行分段。在上述各实施例的基础上，在本申请实施例中，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法包括：
根据待编码的序列的长度及所述目标数量，确定临时值；
根据传输码率，确定所述传输码率对应的比例阈值；
判断所述临时值是否大于等于所述比例阈值；
如果是，则进行后续步骤。
在本申请实施例中，在进行分段处理之前，可以先判断是否根据目标数量，对待编码的序列进行分段处理。
具体可以是先根据待编码的序列的长度及目标数量，确定临时值，该临时值为理论上的分段后的待编码的序列每段的子长度，也就是根据待编码的序列的长度及目标数量，确定的一个比值，并根据传输码率，确定该传输码率对应的比例阈值。
根据比例阈值与临时值的大小，确定是否根据目标数量，对待编码的序列进行分段处理。
如果临时值大于等于比例阈值，则根据目标数量，对待编码的序列进行分段处理，如果临时值小于比例阈值，则需要对目标数量进行调整，根据调整后的目标数量，对待编码的序列进行分段处理。
发送端中保存有第一数值，在根据待编码的序列的长度及目标数量，确定临时值时，可以是根据目标数量与保存的第一数值，确定第二数量，将待编码的序列的长度与第二数量的比值确定为临时值。在根据目标数量与保存的第一数值，确定第二数量时，可以是将目标数量与第一数值的和确定为第二数量，也可以是将目标数量与第一数值的差确定为第二数量，第一数值可以是0，可以是1，也可以是1.5，也可以是2，还可以是其他的数值，较优的，该第一数值为1。
如果第一数值为0，也就是将待编码的序列的长度K及目标数量N的比值作为临时值，该临时值＝K/N。如果该第一数值为1，且将目标数量与第一数值的差确定为第二数量，第二数量为N-1，则该临时值为待编码的序列的长度K及第二数量N-1的比值，即该临时值＝K/(N-1)。
发送端中保存有第二缩放因子a2，在根据待编码的序列的长度K及目标数量N，确定临时值时，可以是根据待编码的序列的长度、目标数量和第二缩放因子，确定临时值，具体可以是，先确定待编码的序列的长度与目标数量的第二比值，将第二比值与该第二缩放因子的乘积，确定为临时值。即该临时值＝a2*K/N。或者，也可以是将目标数量与第一数值的差确定为第二数量，第二数量为N-1，确定待编码的序列的长度K及第二数量N-1的比值，将该比值与该第二缩放因子的乘积，确定为临时值，即该临时值＝a2*K/(N-1)。
如果临时值小于比例阈值，则需要对目标数量进行调整，在对目标数量进行调整时，具体可以是将目标数量调整为N-k，或N+k，k为大于0的整数，较佳地，k为1。
实施例3：
在判断临时值与比例阈值的大小时，不同的传输码率，确定比例阈值的过程可以是不同的，在上述各实施例的基础上，在本申请实施例中，所述根据传输码率，确定所述传输码率对应的比例阈值包括：
如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
在本申请实施例中，发送端中保存有第一码率阈值和预设值，在确定传输码率对应的比例阈值时，可以是根据传输码率与第一码率阈值的大小，确定传输码率对应的比例阈值，如果传输码率小于预设的第一码率阈值，则确定传输码率对应的比例阈值为预设值。
该第一码率阈值R1可以为大于0的任意值，当R小于R1时，R对应的比例阈值为预设值，如果R1大于等于1，则认为无论什么传输码率，对应的比例阈值均为该预设值。
较佳地，第一码率阈值为1/5，或2/5。
在针对传输码率，确定比例阈值时，在本申请实施例中，发送端可以根据保存的预设的第二函数确定，具体的所述根据传输码率，确定所述传输码率对应的比例阈值包括：
根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
在根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值时，可以是如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
该第二码率阈值R2可以为小于等于1的任意值，当R大于等于R2时，根据传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定比例阈值。
如果R2小于等于0，则可以认为无论什么传输码率，对应的比例阈值均根据线性函数c3*R+b3，或int(c3*R+b3)确定。
较佳地，第二码率阈值为1/5，或2/5。
如果R1＝R2，且0<R1＜1，且0<R2＜1；当R<R1时，对应的比例阈值均为该预设值；当R≥R1，对应的比例阈值根据线性函数c3*R+b3，或int(c3*R+b3)确定。
在根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值时，也可以是如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
第三码率阈值R3小于第四码率阈值R4，在此基础上，R3可以为小于1的任意值，第四码率阈值R4可以为大于0的任意值。当R3≤R＜R4，对应的比例阈值均根据线性函数c4*R+b4，或int(c4*R+b4)确定。
如果R3为0，R4为1，则可以认为无论什么传输码率，对应的比例阈值均根据线性函数c4*R+b4，或int(c4*R+b4)确定。
还可以是，R1＝R3，R2＝R4，且0<R1＜1，且0<R2＜1，0<R3＜1，且0<R4＜1；当R<R1时，对应的比例阈值均为该预设值；
当R1≤R＜R2时，对应的比例阈值根据线性函数c3*R+b3，或int(c3*R+b3)确定；
当R≥R2时，对应的比例阈值根据线性函数c4*R+b4，或int(c4*R+b4)确定。
还可以是，R1＝R3，且0<R1＜1，0<R3＜1，且0<R4＜1；
当R<R1时，对应的比例阈值均为该预设值；
当R1≤R＜R4时，对应的比例阈值根据线性函数c4*R+b4，或int(c4*R+b4)确定。
还可以是，R2＝R3，且0<R2＜1，0<R3＜1，且0<R4＜1；
当R≥R2时，对应的比例阈值根据线性函数c3*R+b3，或int(c3*R+b3)确定；
当R3≤R＜R2时，对应的比例阈值根据线性函数c4*R+b4，或int(c4*R+b4)确定。
根据上述的描述，可以得到以下表格中的传输码率R与比例阈值的确定关系，其中，R1为第一码率阈值，R2为第二码率阈值，R3为第三码率阈值，R4为第四码率阈值。
传输码率R 比例阈值
R<R1 预设值
R≥R2 c3*R+b3，或int(c3*R+b3)
R3≤R＜R4 c4*R+b4，或int(c4*R+b4)
以下为分段的一个具体实施例：
Figure PCTCN2018103089-appb-000001
即，在码率小于等于0.2，时，可以采用预设值Ksegthr＝370进行分段，当码率大于0.2，小于等于0.4时，采用线性函数Ksegthr＝1024*R+150进行分段。
假定，待编码的序列的长度为K＝543*4＝2172比特，传输码率R＝0.4。
在确定对待编码的序列分段的目标数量时，可以是根据N＝ceiling(K/(1024*R))来确定，则对待编码的序列分段的目标数量为N＝ceiling(2172/(1024*0.4))＝6段，可以直接将待编码的序列分为6段。上述例子本质上是将编码后比特数M＝K/R利用最大母码长度1024分段。图5是采用N＝ceiling(K/(1024*R))只有两个分段的例子，其中菱形表示分界点。
在确定对编码的序列分段的目标数量时，可以是根据N＝ceiling(K/(1024*R+b))来确定，其中，b＝56or 72。当b＝56时，则对待编码的序列分段的目标数量为N＝ceiling(2172/(1024*0.4+56))＝6段，当b＝72时，则对待编码的序列分段的目标数量为N＝ceiling(2172/(1024*0.4+72))＝6段。上述例子本质上将编码后比特数M＝K/R利用长度1024+b/R进行分段。图6是采用N＝ceiling(K/(1024*R+b))，offset＝56or 72，的一个例子，该例子最多只分两段，菱形表示b为56时的分界点，圆形表示b为72时的分界点。
上述为根据确定的目标数量对待编码的序列直接进行分段，为了使分段更加准确，更精准地捕获到分界点，还可以在确定出目标数量N之后，确定分段临时值，与比例阈值的关系，以及根据传输码率，来确定是否对目标数量进行更新。
具体的，可以是首先根据N＝ceiling(K/(1024*R))计算得到N的具体数值，得到N的具体值后，确定临时值。根据临时值与比例阈值的大小和传输码率确定分为N段还是N-1段。
以下为分段的另一具体实施例：
Figure PCTCN2018103089-appb-000002
Figure PCTCN2018103089-appb-000003
即，在码率小于等于0.2，时，可以采用预设值Ksegthr＝370进行分段，当码率大于0.2时，采用线性函数Ksegthr＝832*R+200进行分段。
图7为根据上述实施例分段的示意图，分界点成功捕获到了分段边界。
实施例4：
在长期演进(Long Term Evolution，LTE)系统中，上行控制信道(PUCCH)用于传输同步以后的UCI，PUCCH上传输的UCI包括上行调度请求(SR)、下行混合自动重传请求确认(HARQ-ACK)信息、以及UE的周期信道质量指示(CQI)信息。为了保证接收端能对接收到的UCI进行准确性的校验，发送端在对UCI编码之前，在UCI的信息序列之后会附加用于校验的CRC序列，在本申请实施例中，对待编码的序列进行分段处理，并进行编码，具体可以是先分段，再附加CRC序列，也可以是先附加CRC序列，再分段，在上述各实施例的基础上，在本申请实施例中，所述根据所述目标数量，对所述待编码的序列进行分段处理包括：
根据待编码的序列，确定目标序列；
根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
具体的，在进行分段时，如果是在UCI信息序列Information bits后添加CRC序列，得到UCI payload，然后对UCI payload进行代码块分段(Code block segmentation)，则当待编码的序列为UCI信息序列时，则需要根据该待编码的序列，确定目标序列，该目标序列为UCI信息序列Information bits后添加了CRC序列后构成的UCI payload；当待编码的序列为本身为包括UCI的信息序列和用于校验的CRC序列时，则可以直接将该待编码的序列，作为目标序列。
或者，在进行分段时，首先将UCI信息序列Information bits进行代码块分段(Code block segmentation)，每段添加如L比特CRC的序列，然后再对每段添加CRC的比特流进行极化码编码，编码后的码块分别进行速率匹配(rate matching)操作，最后把码块级联(Code block concatenation)在一起作为最后的输出。则当待编码的序列为UCI信息序列时，则可以直接将该待编码的序列，作为目标序列，对该目标序列采用目标数量进行分段；当待编码的序列为本身为包括UCI的信息序列和用于校验的CRC序列时，则需要在该待编码的序列中去掉CRC序列，将得到的UCI的信息序列作为目标序列，从而进行分段处理。
实施例5：
在上述各实施例的基础上，在进行分段处理时，可以是等分处理，可以是非等分处理；也可以是先补0处理后再等分处理。
如果是对待编码的序列进行分段处理，则可以是对待编码的序列进行等分处理，或非等分处理，或先补0处理后再等分处理。
如果是对目标序列进行分段处理，则可以是对目标序列，进行等分处理，或非等分处理，或先补0处理后再等分处理。
图4为本申请实施例提供的一种编码过程示意图，该过程包括以下步骤：
S401：根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
S402：根据待编码的序列的长度及所述目标数量，确定临时值，并根据传输码率，确定所述传输码率对应的比例阈值。
S403：判断所述临时值是否大于等于所述比例阈值，如果是，则进行S405，如果否，则进行S404。
S404：对所述目标数量进行调整，并根据调整后的目标数量，进行S405。
S405：根据所述目标数量，对所述待编码的序列进行分段处理。
S406：将分段处理后的每个子序列进行编码，并在编码后级联。
实施例6：
图8为本申请实施例提供的一种编码装置结构图，所述装置包括：
确定模块81，用于根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
分段模块82，用于根据所述目标数量，对所述待编码的序列进行分段处理；
编码模块83，用于将分段处理后的每个子序列进行编码，并在编码后级联。
可选地，所述确定模块81，还用于根据待编码的序列的长度及所述目标数量，确定临时值；根据传输码率，确定所述传输码率对应的比例阈值；
所述装置还包括：
判断模块，判断所述临时值是否大于等于所述比例阈值；
如果是，则触发分段模块82。
所述确定模块81，具体用于将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
所述装置还包括：
更新模块，用于对所述目标数量进行调整。
所述确定模块81，具体用于如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
所述确定模块81，具体用于根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
所述确定模块81，具体用于如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
所述确定模块81，具体用于如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
所述分段模块82，具体用于根据待编码的序列，确定目标序列；根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
实施例7：
图9为本申请实施例提供的一种电子设备，所述电子设备包括：包括：存储器92和处理器91；
所述处理器91，用于读取存储器中的程序，执行下列过程：根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
根据所述目标数量，对所述待编码的序列进行分段处理；
将分段处理后的每个子序列进行编码，并在编码后级联。
所述处理器91，具体用于根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
所述处理器91，还用于在根据所述目标数量，对所述待编码的序列进行分段处理之前，根据待编码的序列的长度及所述目标数量，确定临时值；根据传输码率，确定所述传输码率对应的比例阈值；判断所述临时值是否大于等于所述比例阈值；如果是，则进行后续步骤。
所述处理器91，具体用于将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
所述处理器91，还用于如果所述临时值小于所述比例阈值，在根据所述目标数量，对所述待编码的序列进行分段处理之前，对所述目标数量进行调整。
所述处理器91，具体用于如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
所述处理器91，具体用于根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
所述处理器91，具体用于如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
所述处理器91，具体用于如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
所述处理器91，具体用于根据待编码的序列，确定目标序列；
根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
如图9所示，为本申请实施例提供的电子设备结构示意图，其中在图9中，总线架构可以包括任意数量的互联的总线和桥，具体由处理器91代表的一个或多个处理器和存储器92代表的存储器的各种电路链接在一起。总线架构还可以将诸如外围设备、稳压器和功率管理电路等之类的各种其他电路链接在一起，这些都是本领域所公知的，因此，本文不再对其进行进一步描述。总线接口提供接口。处理器91负责管理总线架构和通常的处理，存储器92可以存储处理器91在执行操作时所使用的数据。
实施例8：
一种计算机可读存储介质，其特征在于，其存储有可由电子设备执行的计算机程序，当所述程序在所述电子设备上运行时，使得所述电子设备执行如下步骤：
根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
根据所述目标数量，对所述待编码的序列进行分段处理；
将分段处理后的每个子序列进行编码，并在编码后级联。
可选地，所述根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量包括：
根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分 段的目标数量。
可选地，所述预设的第一函数包括：
N＝a1*K/g(R)的整数，其中，所述g(R)为线性函数或非线性函数，a1为第一缩放因子，K为待编码的序列的长度，R为传输码率，N为目标数量。
可选地，当所述g(R)为线性函数时，所述g(R)＝c1*R+b1，其中，c1为最大待编码比特长度，b1为预设的第一偏置值。
可选地，当所述g(R)为非线性函数时，所述g(R)＝c2*(A i*R i+A i-1R i-1+……+A 1R)+b2，其中，c2为最大待编码比特长度，b2为预设的第二偏置值，i为预设的不小于2的常数，A i－A 1为预设的常数。
可选地，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法包括：
根据待编码的序列的长度及所述目标数量，确定临时值；
根据传输码率，确定所述传输码率对应的比例阈值；
判断所述临时值是否大于等于所述比例阈值；
如果是，则进行后续步骤。
可选地，所述根据待编码的序列的长度及所述目标数量，确定临时值包括：
将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或
确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
可选地，所述第一数值为1。
可选地，如果所述临时值小于所述比例阈值，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法还包括：
对所述目标数量进行调整。
可选地，所述根据传输码率，确定所述传输码率对应的比例阈值包括：
如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
可选地，所述根据传输码率，确定所述传输码率对应的比例阈值包括：
根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
可选地，所述根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值包括：
如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
可选地，所述根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值包括：
如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
可选地，缩放因子大于0小于等于1。
可选地，偏置值大于-150小于200。
可选地，所述根据所述目标数量，对所述待编码的序列进行分段处理包括：
根据待编码的序列，确定目标序列；
根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
可选地，所述分段处理，包括：
等分处理；或
非等分处理；或
补0处理后等分处理。
本申请实施例公开了一种编码方法、装置、电子设备和存储介质，用以解决现有技术中对待编码的序列分段不灵活的问题。方法包括：根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；根据所述目标数量，对所述待编码的序列进行分段处理；将分段处理后的每个子序列进行编码，并在编码后级联。由于在本申请实施例中，根据待编码的序列的长度及传输码率，确定对待编码的序列分段的目标数量，根据目标数量，对待编码的序列进行分段处理。灵活地对待编码的序列进行分段处理，提高了编码的性能。
对于系统/装置实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者一个操作与另一个实体或者另一个操作区分开来，而不一定要求或者暗示这些实体或者操作之间存在任何这种实际的关系或者顺序。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产 品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本申请的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。
显然，本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请实施例的精神和范围。这样，倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (29)

  1. 一种编码方法，其特征在于，所述方法包括：
    根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
    根据所述目标数量，对所述待编码的序列进行分段处理；
    将分段处理后的每个子序列进行编码，并在编码后级联。
  2. 如权利要求1所述的方法，其特征在于，所述根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量，具体包括：
    根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
  3. 如权利要求2所述的方法，其特征在于，所述预设的第一函数包括：
    N＝a1*K/g(R)的整数，其中，所述g(R)为线性函数或非线性函数，a1为第一缩放因子，K为待编码的序列的长度，R为传输码率，N为目标数量。
  4. 如权利要求3所述的方法，其特征在于，当所述g(R)为线性函数时，所述g(R)＝c1*R+b1，其中，c1为最大待编码比特长度，b1为预设的第一偏置值。
  5. 如权利要求3所述的方法，其特征在于，当所述g(R)为非线性函数时，所述g(R)＝c2*(A i*R i+A i-1R i-1+……+A 1R)+b2，其中，c2为最大待编码比特长度，b2为预设的第二偏置值，i为预设的不小于2的常数，A i－A 1为预设的常数。
  6. 如权利要求1所述的方法，其特征在于，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法还包括：
    根据待编码的序列的长度及所述目标数量，确定临时值；
    根据传输码率，确定所述传输码率对应的比例阈值；
    判断所述临时值是否大于等于所述比例阈值；
    如果是，则进行后续步骤。
  7. 如权利要求6所述的方法，其特征在于，所述根据待编码的序列的长度及所述目标数量，确定临时值包括：
    将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或
    确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
  8. 如权利要求6所述的方法，其特征在于，所述第一数值为1。
  9. 如权利要求6所述的方法，其特征在于，如果所述临时值小于所述比例阈值，在根据所述目标数量，对所述待编码的序列进行分段处理之前，所述方法还包括：
    对所述目标数量进行调整。
  10. 如权利要求6所述的方法，其特征在于，所述根据传输码率，确定所述传输码率对应的比例阈值包括：
    如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
  11. 如权利要求6所述的方法，其特征在于，所述根据传输码率，确定所述传输码率对应的比例阈值，具体包括：
    根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
  12. 如权利要求11所述的方法，其特征在于，所述根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值，具体包括：
    如果传输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
  13. 如权利要求11所述的方法，其特征在于，所述根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值，具体包括：
    如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
  14. 如权利要求3-5任一项或7所述的方法，其特征在于，缩放因子大于0小于等于1。
  15. 如权利要求3-5任一项或12或13所述的方法，其特征在于，偏置值大于-150小于200。
  16. 如权利要求1所述的方法，其特征在于，所述根据所述目标数量，对所述待编码的序列进行分段处理，具体包括：
    根据待编码的序列，确定目标序列；
    根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
  17. 如权利要求1或16所述的方法，其特征在于，所述分段处理，包括：
    等分处理；或
    非等分处理；或
    补0处理后等分处理。
  18. 一种编码装置，其特征在于，所述装置包括：
    确定模块，用于根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
    分段模块，用于根据所述目标数量，对所述待编码的序列进行分段处理；
    编码模块，用于将分段处理后的每个子序列进行编码，并在编码后级联。
  19. 一种电子设备，其特征在于，包括：存储器和处理器；
    所述处理器，用于读取存储器中的程序，执行下列过程：
    根据待编码的序列的长度及传输码率，确定对所述待编码的序列分段的目标数量；
    根据所述目标数量，对所述待编码的序列进行分段处理；
    将分段处理后的每个子序列进行编码，并在编码后级联。
  20. 如权利要求19所述的电子设备，其特征在于，所述处理器，具体用于：根据待编码的序列的长度、传输码率及预设的第一函数，确定对所述待编码的序列分段的目标数量。
  21. 如权利要求19所述的电子设备，其特征在于，所述处理器，还用于：在根据所述目标数量，对所述待编码的序列进行分段处理之前，根据待编码的序列的长度及所述目标数量，确定临时值；根据传输码率，确定所述传输码率对应的比例阈值；判断所述临时值是否大于等于所述比例阈值；如果是，则进行后续步骤。
  22. 如权利要求21所述的电子设备，其特征在于，所述处理器，具体用于：将所述目标数量与预设的第一数值，确定第二数量，将待编码的序列的长度与所述第二数量的比值确定为临时值；或确定待编码的序列的长度与所述目标数量的第二比值，将第二比值与预设的第二缩放因子的乘积，确定为临时值。
  23. 如权利要求21所述的电子设备，其特征在于，所述处理器，还用于：如果所述临时值小于所述比例阈值，在根据所述目标数量，对所述待编码的序列进行分段处理之前，对所述目标数量进行调整。
  24. 如权利要求21所述的电子设备，其特征在于，所述处理器，具体用于：如果传输码率小于预设的第一码率阈值，则确定所述传输码率对应的比例阈值为预设值。
  25. 如权利要求21所述的电子设备，其特征在于，所述处理器，具体用于：根据传输码率及预设的第二函数，确定所述传输码率对应的比例阈值。
  26. 如权利要求25所述的电子设备，其特征在于，所述处理器，具体用于：如果传 输码率不小于预设的第二码率阈值，则根据所述传输码率，及预设的线性函数c3*R+b3，或int(c3*R+b3)确定所述比例阈值，c3为最大待编码比特长度，b3为预设的第三偏置值，R为传输码率，int为取整。
  27. 如权利要求25所述的电子设备，其特征在于，所述处理器，具体用于：如果传输码率不小于预设的第三码率阈值，且小于预设的第四码率阈值，则根据所述传输码率，及预设的线性函数c4*R+b4，或int(c4*R+b4)确定所述比例阈值，c4为最大待编码比特长度，b4为预设的第四偏置值，R为传输码率，int为取整。
  28. 如权利要求19所述的电子设备，其特征在于，所述处理器，具体用于：根据待编码的序列，确定目标序列；根据所述目标数量，对所述目标序列进行分段处理，所述目标序列为信息序列，或信息序列及循环冗余校验CRC序列构成的序列。
  29. 一种计算机可读存储介质，其特征在于，其存储有可由电子设备执行的计算机程序，当所述程序在所述电子设备上运行时，使得所述电子设备执行权利要求1～17中任一所述方法的步骤。
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