WO2019095297A1 - 有机发光二极管显示模组及其制作方法及电子装置 - Google Patents

有机发光二极管显示模组及其制作方法及电子装置 Download PDF

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Publication number
WO2019095297A1
WO2019095297A1 PCT/CN2017/111692 CN2017111692W WO2019095297A1 WO 2019095297 A1 WO2019095297 A1 WO 2019095297A1 CN 2017111692 W CN2017111692 W CN 2017111692W WO 2019095297 A1 WO2019095297 A1 WO 2019095297A1
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Prior art keywords
layer
display module
lead
via hole
conductive line
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PCT/CN2017/111692
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English (en)
French (fr)
Inventor
苏伟盛
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深圳市柔宇科技有限公司
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Application filed by 深圳市柔宇科技有限公司 filed Critical 深圳市柔宇科技有限公司
Priority to US16/764,671 priority Critical patent/US11043544B2/en
Priority to JP2020527047A priority patent/JP2021503168A/ja
Priority to KR1020207017243A priority patent/KR102410356B1/ko
Priority to CN201780091740.2A priority patent/CN110709993A/zh
Priority to EP17931968.6A priority patent/EP3712946A1/en
Priority to PCT/CN2017/111692 priority patent/WO2019095297A1/zh
Priority to TW107140933A priority patent/TWI668892B/zh
Publication of WO2019095297A1 publication Critical patent/WO2019095297A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/70—Testing, e.g. accelerated lifetime tests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an organic light emitting diode display module, a method for fabricating the organic light emitting diode display module, and an electronic device.
  • the existing flexible organic light emitting diode display module comprises an anode, a light emitting layer and a cathode, and the cathode has an integral layer shape for controlling the anode and the cathode to apply a voltage to the light emitting layer.
  • the display module is bent, the optical characteristics of the bending portion of the display module are obviously poor.
  • the existing display module cannot obtain the radius of curvature of each position on the display module according to the cathode, so that the display module cannot display the mode. Make appropriate display compensation for each location of the group.
  • Embodiments of the present invention provide an organic light emitting diode display module, a method of fabricating the organic light emitting diode display module, and an electronic device.
  • the display module includes:
  • a base body on which a lead wire and a power line are formed
  • the flat layer is provided with a first via hole and a second via hole, and a part of the lead wire corresponds to a position of the first via hole;
  • An anode layer formed on the flat layer and in the second via
  • the pixel defining layer is formed with a third via hole and a fourth via hole, and a part of the anode layer corresponds to the third via hole position,
  • the fourth via is in communication with the first via
  • the cathode layer formed on the pixel defining layer, the light emitting layer, and the lead, the cathode layer including a plurality of wire blocks disposed at intervals, each of the wire blocks being provided with a bent conductive And a wire, one end of each of the conductive wires is connected to the lead wire, and the other end is connected to the power line.
  • the OLED display module of the embodiment of the present invention divides the cathode layer into a plurality of conductive lines, so that the radius of curvature of one position of the display module can be determined according to the radius of curvature of each conductive line, so that the display module can The radius of curvature of the strip of conductive lines compensates the display module.
  • An ammeter capable of being connected to the conductive through the lead and for detecting a current flowing through the conductive line
  • a processor for calculating each of the conductive lines according to a length of the conductive line, a Poisson's ratio of the conductive line, a resistivity of the conductive line, the current, and a voltage supplied by the power line a shape variable of a conductive line;
  • the memory stores a plurality of shape variable values of the conductive line and a plurality of curvature radius values corresponding to the plurality of the shape variable values, and the processor according to the shape variable and the A plurality of the curvature radius values stored in the memory determine a radius of curvature of the conductive line.
  • the OLED display module of the embodiment of the present invention facilitates obtaining a current flowing through the conductive line by dividing the cathode layer into a plurality of conductive lines, so that the processor can calculate the shape variable of each conductive line. Then, the radius of curvature of the conductive line is determined according to the shape variable of each conductive line and the plurality of curvature radius values stored in the memory.
  • the flat layer is provided with a first via hole and a second via hole, and a part of the lead wire corresponds to a position of the first via hole;
  • a pixel defining layer on the flat layer and the anode layer, wherein the pixel defining layer is formed with a third via hole and a fourth via hole, and a part of the anode layer corresponds to a position of the third via hole,
  • the fourth via is in communication with the first via
  • the cathode layer Forming a cathode layer on the pixel defining layer, the light emitting layer, and the lead, the cathode layer comprising a plurality of spaced-apart wire blocks, each of the wire blocks being provided with a bent conductive line One end of each of the conductive wires is connected to the lead wire, and the other end is connected to the power line.
  • the OLED display module manufactured by the OLED display module of the embodiment of the present invention can divide the cathode layer into a plurality of conductive lines, so that a position of the display module can be determined according to the radius of curvature of each conductive line.
  • the radius of curvature so that the display module can display and compensate the display module according to the radius of curvature of each conductive line.
  • FIG. 1 is a cross-sectional view of a display module in accordance with some embodiments of the present invention.
  • FIG. 2 is a schematic plan view of a cathode layer in accordance with some embodiments of the present invention.
  • FIG. 3 is a plan view showing the connection of conductive wires to power lines and leads, respectively, according to some embodiments of the present invention.
  • FIG. 4 is a cross-sectional view of a display module in accordance with some embodiments of the present invention.
  • FIG. 5 is a schematic plan view of an electronic device in accordance with some embodiments of the present invention.
  • FIG. 6 is a schematic diagram showing the principle of a processor controlling an ammeter connected to a conductive line according to some embodiments of the present invention.
  • FIG. 7 is a schematic diagram of the working principle of a display module according to some embodiments of the present invention.
  • FIG. 8 is a schematic diagram showing the principle of connecting a processor-controlled ammeter or a touch detection circuit to a conductive line according to some embodiments of the present invention.
  • FIG. 9 is a schematic diagram of the working principle of a display module according to some embodiments of the present invention.
  • FIG. 10 is a schematic flow chart of a method for fabricating a display module according to some embodiments of the present invention.
  • FIG. 11 is a schematic diagram of the principle of a method for fabricating a display module according to some embodiments of the present invention.
  • FIG. 12 is a schematic flow chart of a method for fabricating a display module according to some embodiments of the present invention.
  • FIG. 13 is a schematic flow chart of a method for fabricating a display module according to some embodiments of the present invention.
  • FIG. 14 is a schematic diagram of the principle of a method for fabricating a display module according to some embodiments of the present invention.
  • FIG. 15 is a schematic diagram showing the principle of a method for fabricating a display module according to some embodiments of the present invention.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
  • features defining “first” or “second” may include one or more of the described features either explicitly or implicitly.
  • the meaning of "a plurality” is two or more unless specifically and specifically defined otherwise.
  • connection In the description of the present invention, it should be noted that the terms “installation”, “connected”, and “connected” are to be understood broadly, and may be fixed or detachable, for example, unless otherwise explicitly defined and defined. Connected, or connected in one Connected; may be mechanically connected, may be electrically connected or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediate medium, may be internal communication of two elements or an interaction relationship of two elements.
  • the specific meanings of the above terms in the present invention can be understood on a case-by-case basis.
  • the first feature "on” or “under” the second feature may include direct contact of the first and second features, and may also include first and second features, unless otherwise specifically defined and defined. It is not in direct contact but through additional features between them.
  • the first feature "above”, “above” and “above” the second feature includes the first feature directly above and above the second feature, or merely indicating that the first feature level is higher than the second feature.
  • the first feature “below”, “below” and “below” the second feature includes the first feature directly below and below the second feature, or merely the first feature level being less than the second feature.
  • the OLED display module 100 of the embodiment of the present invention includes a substrate 10 , a planar layer 20 , an anode layer 30 , a pixel defining layer 40 , a light emitting layer 50 , and a cathode layer 60 .
  • a lead 11 and a power supply line 12 are formed on the base 10.
  • the flat layer 20 is formed on the base 10, and the flat layer 20 is provided with a first via 21 and a second via 22, and a portion of the leads 11 corresponds to the position of the first via 21.
  • the anode layer 30 is formed on the flat layer 20 and in the second via 22.
  • the pixel defining layer 40 is formed on the flat layer 20 and the anode layer 30.
  • the pixel defining layer 40 is formed with a third via hole 41 and a fourth via hole 42.
  • the partial anode layer 30 corresponds to the position of the third via hole 41, and the fourth The via hole 42 is in communication with the first via hole 21.
  • the light emitting layer 50 is formed in the third via 41 and on the anode layer 30.
  • the cathode layer 60 is formed on the pixel defining layer 40, the light emitting layer 50, and the lead 11.
  • the cathode layer 60 includes a plurality of spaced-apart wire segments 61, and each of the wire blocks 61 is provided with a bent conductive wire 612. One end of the strip conductive wire 612 is connected to the lead wire 11 and the other end is connected to the power source line 12.
  • the lead 11 may be completely exposed on the substrate 10 (as shown in FIG. 1); or, a portion of the lead 11 may be exposed outside the substrate 10 (for example, when the lead 11 and the gate layer 17 are in the same layer).
  • One end of the lead 11 is electrically connected to one end of the conductive line 612, and the other end of the lead 11 may be electrically connected to other electronic components (for example, a circuit board) or may be electrically connected to any electronic component.
  • the light emitting layer 50 includes a plurality of light emitting units 51 arranged at intervals, and each of the light emitting units 51 corresponds to a pixel unit of the display module 100.
  • Each of the conductive blocks 61 may be electrically connected to the corresponding plurality of light emitting units 51; or each conductive block 61 may also be electrically connected to each of the plurality of light emitting units 51; or each conductive block 61 may also be Corresponding to one of the light-emitting units 51, the conductive lines 612 in each of the conductive blocks 61 are electrically connected to the corresponding one of the light-emitting units 51.
  • One end of the power line 12 is electrically connected to the conductive line 612, and the other end of the power line 12 is displayed.
  • the power supply external to the module 100 is electrically connected to supply power to the conductive line 612 through the power line 12.
  • the OLED display module 100 of the embodiment of the present invention divides the cathode layer 60 into a plurality of conductive lines 612. Therefore, the radius of curvature of one position of the display module 100 can be determined according to the radius of curvature of each of the conductive lines 612, thereby displaying
  • the module 100 is capable of performing display compensation on the display module 100 according to the radius of curvature of each of the conductive lines 612.
  • an OLED display module 100 includes a substrate 10 , a planar layer 20 , an anode layer 30 , a pixel defining layer 40 , a light emitting layer 50 , and a cathode layer 60 .
  • the substrate 10 includes a lead 11 , a power supply line 12 , a substrate 13 , a buffer layer 14 , a semiconductor layer 15 , a first insulating layer 16 , a gate layer 17 , a second insulating layer 18 , a drain 191 , and a source 192 .
  • the buffer layer 14 is formed on the substrate 13, the semiconductor layer 15 is formed on the buffer layer 14, the first insulating layer 16 is formed on the buffer layer 14 and the semiconductor layer 15, and the gate layer 17 is formed on the first insulating layer 16, A second insulating layer 18 is formed on the gate layer 17 and the first insulating layer 16.
  • the semiconductor layer 15 includes a plurality of semiconductor units 151 that are spaced apart.
  • the drain electrode 191 is formed on a side of the second insulating layer 18 away from the first insulating layer 16 and electrically connected to one end of the semiconductor unit 151 through the second insulating layer 18 and the first insulating layer 16 .
  • the source 192 is formed on a side of the second insulating layer 18 away from the first insulating layer 16 and electrically connected to the other end of the semiconductor unit 151 through the second insulating layer 18 and the first insulating layer 16 .
  • the semiconductor unit 151, the drain electrode 191, the source electrode 192, and the gate layer 17 collectively constitute a thin film transistor.
  • the lead 11 may be formed on a side of the second insulating layer 18 away from the first insulating layer 16.
  • the power supply line 12 may be formed on a side of the second insulating layer 18 remote from the first insulating layer 16.
  • the substrate 13 may have a circular, elliptical, rectangular, triangular, pentagonal, hexagonal or arbitrary polygonal sheet-like structure, and the material of the substrate 13 may include glass or polyimide (PI).
  • the material of the buffer layer 14 may include copper phthalocyanine (CuPc).
  • the material of the first insulating layer 16 may include silicon dioxide (SiO 2 ).
  • the material of the second insulating layer 18 may include silicon dioxide (SiO 2 ).
  • the flat layer 20 is formed on the substrate 10, and specifically, the flat layer 20 is formed on the drain electrode 191, the source electrode 192, the lead electrode 11, and the second insulating layer 18.
  • the flat layer 20 is provided with a first via 21 and a second via 22 .
  • the first via 21 corresponds to the position of the lead 11 such that a portion of the lead 11 is located within the first via 21.
  • the second via 22 corresponds to the position of the drain 191 so that a portion of the drain 191 is located in the second via 22, and when the anode layer 30 is not formed on the flat layer 20 and the second via 22, a portion of the drain 191 is exposed from the second via hole 22.
  • the material of the planarization layer 20 may include a photoresist.
  • the anode layer 30 is formed on the flat layer 20 and in the second via 22. A portion of the anode layer 30 is located in the second via 22 and is electrically connected to the drain 191.
  • a pixel defining layer 40 is formed on the flat layer 20 and the anode 30.
  • the pixel defining layer 40 is formed with a third via 41 and a fourth via 42.
  • the portion of the anode layer 30 corresponds to the position of the third via hole 41 such that a portion of the anode layer 30 is located in the third via hole 41.
  • the fourth via hole 42 corresponds to and communicates with the first via hole 21, and when the pixel defining layer 40 is not provided with the cathode layer 60, the lead 11 A portion is exposed from the flat layer 20.
  • the material of the pixel definition layer 40 may include a photoresist.
  • the light emitting layer 50 is formed in the third via 41 and on the anode layer 30.
  • the light emitting layer 50 includes a plurality of light emitting units 51, and each of the light emitting units 51 is electrically connected to a corresponding drain electrode 191 through the anode 30.
  • Each of the light emitting units 51 corresponds to a pixel unit of the display module 100.
  • a cathode layer 60 is formed on the pixel defining layer 40, the luminescent layer 50, and the lead 11.
  • the cathode layer 60 includes a plurality of spaced-apart conductor segments 61, each of which is provided with a bend
  • the folded conductive lines 612 have one end connected to the lead 11 and one end connected to the power line 12 through the pixel defining layer 40 and the flat layer 20.
  • the wire segments 61 are distributed in an array on the pixel defining layer 40, the light emitting layer 50, and the leads 11.
  • Each of the conductive blocks 61 may also correspond to one of the light emitting units 51.
  • the conductive lines 612 in each of the conductive blocks 61 are electrically connected to the corresponding one of the light emitting units 51.
  • the material of the conductive wire 612 may be any one of magnesium (Mg), magnesium silver alloy (MgAg), and magnesium strontium alloy (YbMg).
  • the OLED display module 100 of the embodiment of the present invention divides the cathode layer 60 into a plurality of conductive lines 612. Therefore, the radius of curvature of one position of the display module 100 can be determined according to the radius of curvature of each of the conductive lines 612, thereby displaying
  • the module 100 is capable of performing display compensation on the display module 100 according to the radius of curvature of each of the conductive lines 612.
  • the OLED display module 100 of the embodiment of the present invention further has the following beneficial effects: First, the lead 11 is formed on a side of the second insulating layer 18 away from the first insulating layer 16, so that the lead 11 is not required to be additional. The substrate is further facilitated to produce a thinner display module 100.
  • the conductive lines 612 in each of the conductive blocks 61 are electrically connected to the corresponding one of the light emitting units 51, so that each of the conductive lines 612 can supply a voltage to a corresponding light emitting unit 51.
  • the lead 11 of the above embodiment is formed on the first insulating layer 16, and the lead 11 and the gate layer 17 are on the same layer.
  • the second insulating layer 18 defines a fifth via hole (not shown) corresponding to the first via hole 21 and the fourth via hole 42.
  • the partial lead wire 11 corresponds to the position of the fifth via hole so that the partial lead wire 11 is located.
  • the lead 11 can be exposed from the fifth via hole and the first via hole 21.
  • the lead 11 is formed on the side of the first insulating layer 16 away from the buffer layer 14, so that the lead 11 is fabricated without an additional substrate, thereby facilitating the fabrication of the thinner display module 100.
  • the display module 100 further includes an encapsulation layer 70 formed on the pixel defining layer 40 and the cathode layer 60 and covering the pixel defining layer 40 and the cathode layer 60 .
  • the encapsulation layer 70 is used to insulate the cathode layer 60 from contact with water vapor and oxygen to prevent the cathode layer 60 from chemically reacting with water vapor and oxygen to cause the cathode layer 60 to fail.
  • the display module 100 further includes a conductive layer 101 disposed in the first via 21 and between the lead 11 and the cathode layer 60 , and the lead 11 passes through the conductive layer 101 . It is electrically connected to the cathode layer 60.
  • the material properties of the conductor layer 101 are more similar to the material properties of the lead 11 with respect to the material properties of the lead 11 and the material properties of the conductive line 612, and the material properties of the conductor layer 101 and the material properties of the conductive line 612 It is also more similar, thereby improving the stability of the electrical connection between the conductive line 612 and the lead 11.
  • an electronic device 200 includes the above.
  • the ammeter 80 can be electrically connected to the conductive line 612 through the lead 11 and the ammeter 80 can be used to detect the current flowing through the conductive line 612.
  • the processor 201 is configured to calculate each conductive according to the length of the conductive line 612, the Poisson's ratio of the conductive line 612, the resistivity of the conductive line 612, the current flowing through the conductive line 612, and the voltage supplied from the power line 12 to the conductive line 612.
  • the memory 202 stores a plurality of shape variable values of the conductive line 612 and a plurality of curvature radius values corresponding to the plurality of shape variable values
  • the processor 201 stores the plurality of curvature radius values stored in the memory 202 according to the shape variable of each of the conductive lines 612. The radius of curvature of the conductive line 612 is determined.
  • the galvanometer 80, the processor 201, and the memory 202 can all be disposed on the main board 203 in the electronic device 200, and the galvanometer 80 (or the main board 203) can be electrically connected to the display module 100 through the flexible circuit board.
  • the processor 201 controls the lead 11 to be disconnected from the ammeter 80 so that the conductive line 612 can serve as a cathode of the display module 100; when it is required to detect the radius of curvature of the display module 100
  • the processor 201 controls the lead 11 to be electrically connected to the ammeter 80 such that the conductive line 612 can be used as a strain resistor.
  • the display module 100 When the display module 100 is in use, the display module 100 is mainly subjected to the pressing force perpendicular to the display module 100, and the display module 100 is substantially not subjected to the pulling force along the periphery of the display module 100, perpendicular to the display module.
  • the pressing force of 100 causes the display module 100 to be bent and deformed. Therefore, the shape of the conductive line 612 is substantially caused by the pressing force perpendicular to the display module 100, that is, the shape of the conductive line 612 is substantially formed by the bending of the display module 100 and the conductive line 612.
  • the shape variable of the conductive line 612 corresponds to the radius of curvature of one of the conductive lines 612. According to the formula:
  • ⁇ R in the formulas (1) and (2) is the amount of change in resistance after the conductive line 612 is deformed
  • R is the resistance before the deformation of the conductive line 612
  • ⁇ is the Poisson's ratio of the conductive line 612
  • ⁇ ⁇ L. /L ( ⁇ L is a shape variable of the conductive line 612, L is the length before the conductive line 612 is deformed)
  • ⁇ is the amount of change in resistivity after the conductive line 612 is deformed
  • ⁇ is the resistivity before the conductive line 612 is deformed.
  • K is the strain sensitivity of the conductive line 612.
  • the shape variable of each of the conductive lines 612 can be calculated according to the formula (1), the formula (2), the current flowing through the conductive line 612, and the voltage supplied from the power line 12 to the conductive line 612, and then according to the shape of each of the conductive lines 612.
  • the variable and the plurality of curvature radius values held by the memory 202 determine the radius of curvature of the conductive line 612.
  • the OLED display module 100 of the embodiment of the present invention facilitates the current flowing through the conductive line 612 by the galvanometer 80 by dividing the cathode layer 60 into a plurality of conductive lines 612.
  • the processor 201 can calculate each strip.
  • the shape variable of the conductive line 612 determines the radius of curvature of the conductive line 612 according to the shape variable of each conductive line 612 and the plurality of curvature radius values held by the memory 202.
  • the number of galvanometers 80 is plural, and the number of conductive lines 612 is multiple.
  • a plurality of conductive lines 612 correspond to a plurality of ammeters 80, each galvanometer 80 for detecting current flowing through the corresponding conductive line 612.
  • multiple ammeters 80 are capable of obtaining current flowing through each of the conductive lines 612.
  • the display module 100 includes a screen display time and a curvature detection time from the start of displaying the current frame picture to the start of displaying the next frame picture.
  • the processor 201 is also used to:
  • control galvanometer 80 is disconnected from the lead 11 and a display driving signal is applied to the conductive line 612 to drive the display module 100 to display an image screen;
  • control galvanometer 80 is turned on with the lead 11 to cause the ammeter 80 to detect the current of the conductive line 612.
  • the curvature detection time is less than or equal to the time that the user cannot resolve (for example, 30 milliseconds). Due to the image sticking phenomenon, the image seen by the human eye disappears, and the human eye can continue to retain the image of the screen for about 0.1-0.4 seconds, so that the user can always "see” the screen displayed by the display module 100.
  • the screen display time of the present embodiment is equal to the curvature detection time. In other embodiments, the screen display time is less than the curvature detection time; or the screen display time is greater than the curvature detection time.
  • the conductive line 612 of the present embodiment can be used as the electrode of the display module 100 during the display time of the screen.
  • the conductive line 612 can be used as the strain resistance during the curvature detection time. Therefore, the display module 100 of the present embodiment does not need to be provided with the strain resistor. It is also possible to detect the radius of curvature of the display module 100.
  • the display module 100 further includes a touch detection circuit 90 .
  • the touch detection circuit 90 can be connected to the conductive line 612 through the lead 11 and used to detect the touch corresponding to the user's touch.
  • the touch signal includes a screen display time, a curvature detection time, and a touch detection time from the start of displaying the current frame picture to the start of displaying the next frame picture.
  • the processor 201 is also used to:
  • control galvanometer 80 is disconnected from the lead 11 , the touch detection circuit 90 is controlled to be disconnected from the lead 11 , and the display driving signal is applied to the conductive line 612 to drive the display module 100 to display an image image;
  • control galvanometer 80 is turned on with the lead 11 to cause the ammeter 80 to detect the current of the conductive line 612;
  • the touch detection circuit 90 is controlled to be electrically connected to the lead 11 to cause the touch detection circuit 90 to detect the touch signal generated by the conductive line 612.
  • the sum of the curvature detection time and the touch detection time is less than or equal to a time that the user cannot distinguish (for example, 30 milliseconds). Due to the image sticking phenomenon, the image seen by the human eye disappears, and the human eye can continue to retain the image of the screen for about 0.1-0.4 seconds, so that the user can always "see” the screen displayed by the display module 100.
  • the screen display time, the curvature detection time, and the touch detection time of the present embodiment are all equal. In other embodiments, the screen display time is less than the curvature detection time and the touch detection time; or the screen display time is greater than the curvature detection time and the touch detection time.
  • the conductive line 612 of the present embodiment can be used as an electrode of the display module 100 during the display time of the screen, and the conductive line The 612 can be used as the strain resistance in the curvature detection time, and the conductive line 612 can be used as the touch electrode in the touch detection time. Therefore, the display module 100 of the present embodiment can detect the display module 100 without setting the strain resistance.
  • the radius of curvature of the display module 100 can detect the touch position of the user touch display module 100 without setting a touch electrode.
  • the time between the display module 100 from the start of displaying the current frame picture to the start of displaying the next frame picture is less than or equal to 20 milliseconds.
  • the curvature detection time is less than 20 milliseconds, so that the curvature detection time is less than or equal to the time that the user cannot distinguish (for example , 30 milliseconds), due to the phenomenon of image sticking, after the image seen by the human eye disappears, the human eye can still retain the image of about 0.1-0.4 seconds, so the user can always "see" the display module 100.
  • the sum of the curvature detection time and the touch detection time is less than 20 milliseconds, so that the sum of the curvature detection time and the touch detection time is less than or equal to the time that the user cannot distinguish (for example, 30 milliseconds), due to the phenomenon of image sticking, After the image seen by the eye disappears, the human eye can continue to retain the image of the screen for about 0.1-0.4 seconds, so the user can always "see" the screen displayed by the display module 100.
  • a method for fabricating an OLED display module 100 includes:
  • a substrate 10 is provided, and a lead 11 and a power line 12 are formed on the base 10;
  • a flat layer 20 is formed on the substrate 10, and the flat layer 20 is provided with a first via hole 21 and a second via hole 22, and a part of the lead wires 11 corresponds to the position of the first via hole 21;
  • a pixel defining layer 40 is formed on the flat layer 20 and the anode layer 30, and the pixel defining layer 40 is formed with a third via hole 41 and a fourth via hole 42.
  • Part of the anode layer 30 corresponds to the position of the third via hole 41, and the fourth via hole 42 communicates with the first via hole 21;
  • a cathode layer 60 is formed on the pixel defining layer 40, the light emitting layer 50, and the lead 11.
  • the cathode layer 60 includes a plurality of spaced-apart conductor blocks 61, and each of the wire blocks 61 is provided with a bent conductive line 612. One end of each of the conductive wires 612 is connected to the lead 11 and the other end is connected to the power supply line 12.
  • the OLED display module 100 fabricated by the OLED display module 100 of the embodiment of the present invention can divide the cathode layer 60 into a plurality of conductive lines 612, so that the display can be determined according to the radius of curvature of each conductive line 612.
  • the radius of curvature of a position of the module 100 enables the display module 100 to display compensation of the display module 100 according to the radius of curvature of each of the conductive lines 612.
  • step S6 includes:
  • the initial cathode layer 64 is cut to obtain the cathode layer 60.
  • the initial cathode layer 64 may be formed by laser cutting, and the cathode layer 60 includes a plurality of spaced-apart wire segments 61, each of which is provided with a bent conductive wire 612, one end of each conductive wire 612 It is connected to the lead 11 and the other end is connected to the power supply line 12. Since the FMM process is an existing fabrication process, the equipment required to fabricate the initial cathode layer 64 is readily available, thereby reducing the fabrication cost of the cathode layer 60.
  • the step of forming the cathode layer 60 on the pixel defining layer 40, the light emitting layer 50, and the lead 11 includes:
  • the initial cathode layer 64 is evaporated on the pixel defining layer 40, the light emitting layer 50, and the lead 11;
  • the initial cathode layer 64 may be formed by laser cutting, and the cathode layer 60 includes a plurality of spaced-apart wire segments 61, each of which is provided with a bent conductive wire 612, one end of each conductive wire 612 It is connected to the lead 11 and the other end is connected to the power supply line 12. Since the evaporation is an existing fabrication process, the equipment required to fabricate the initial cathode layer 64 is readily available, thereby reducing the fabrication cost of the cathode layer 60.
  • the method for fabricating the OLED display module 100 further includes:
  • the encapsulation layer 70 is formed on the cathode layer 60 and the pixel defining layer 40 by Thin Film Encapsulation (TFE) to obtain the display module 100.
  • TFE Thin Film Encapsulation
  • the encapsulation layer 70 is used to insulate the cathode layer 60 from contact with water vapor and oxygen to prevent the cathode layer 60 from chemically reacting with water vapor and oxygen, thereby improving the service life of the display module 100.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
  • features defining “first” or “second” may include at least one of the features, either explicitly or implicitly.
  • the meaning of "a plurality” is at least two, such as two, three, etc., unless specifically defined otherwise.

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Abstract

有机发光二极管显示模组（100）包括基体（10）、形成在基体（10）上的平坦层（20）、形成在平坦层（20）上及第二过孔（22）内的阳极层（30）、形成在平坦层（20）及阳极层（30）上的像素定义层（40）、形成在第三过孔（41）内并在阳极层（30）上的发光层（50）及阴极层（60）。基体（10）上形成有引线（11）及电源线（12）。平坦层（20）开设第一及第二过孔（21、22），部分引线（11）在第一过孔（21）内。像素定义层（40）形成有第三及第四过孔（41、42），部分阳极层（30）与第三过孔（41）位置相对应，第四过孔（42）与第一过孔（21）连通。阴极层（60）形成在像素定义层（40）、发光层（50）及引线（11）上，阴极层（60）包括间隔设置的导线区块（61），导线区块（61）内有弯折的导电线（612），导电线（612）的两端与引线（11）及电源线（12）分别连接。还提供了一种显示模组（100）的制作方法及电子装置（200）。

Description

有机发光二极管显示模组及其制作方法及电子装置 技术领域
本发明涉及显示技术领域，特别涉及一种有机发光二极管显示模组、有机发光二极管显示模组的制作方法及电子装置。
背景技术
现有的柔性有机发光二极管显示模组包括阳极、发光层及阴极，阴极呈整体的层状以便于控制阳极及阴极给发光层施加电压。当显示模组发生弯曲时，显示模组弯曲处的光学特性明显较差，现有的显示模组不能够根据阴极获得显示模组上的各个位置的曲率半径，从而显示模组无法对显示模组的各个位置做适当的显示补偿。
发明内容
本发明的实施例提供一种有机发光二极管显示模组、有机发光二极管显示模组的制作方法及电子装置。
本发明实施方式的有机发光二极管显示模组，所述显示模组包括：
基体，所述基体上形成有引线及电源线；
形成在所述基体上的平坦层，所述平坦层开设有第一过孔及第二过孔，部分所述引线与所述第一过孔的位置相对应；
形成在所述平坦层上及所述第二过孔内的阳极层；
形成在所述平坦层及所述阳极层上的像素定义层，所述像素定义层形成有第三过孔及第四过孔，部分所述阳极层与所述第三过孔位置相对应，所述第四过孔与所述第一过孔连通；
形成在所述第三过孔内并在所述阳极层上的发光层；
形成在所述像素定义层、所述发光层、及所述引线上的阴极层，所述阴极层包括间隔设置的多个导线区块，每个所述导线区块内设置有弯折的导电线，每个所述导电线的一端与所述引线连接，另一端与所述电源线连接。
本发明实施方式的有机发光二极管显示模组通过将阴极层分割成多条导电线，因此根据每条导电线的曲率半径能够确定显示模组的一个位置的曲率半径，从而显示模组能够根据每条导电线的曲率半径对显示模组进行显示补偿。
本发明实施方式的电子装置包括：
上述实施方式所述的显示模组；
电流计，所述电流计能够通过所述引线与所述导电性连接，并用于检测流经所述导电线的电流；
处理器，所述处理器用于根据所述导电线的长度、所述导电线的泊松比、所述导电线的电阻率、所述电流、及所述电源线提供的电压计算每个所述导电线的形变量；及
存储器，所述存储器保存有所述导电线的多个形变量值及与多个所述形变量值对应的多个曲率半径值，所述处理器根据每个所述导电线的形变量及所述存储器保存的多个所述曲率半径值确定所述导电线的曲率半径。
本发明实施方式的有机发光二极管显示模组通过将阴极层分割成多条导电线，从而便于通过电流计获得流经导电线的电流，如此，处理器能够计算得到每条导电线的形变量，再根据每条导电线的形变量及存储器保存的多个曲率半径值确定导电线的曲率半径。
本发明实施方式的有机发光二极管显示模组的制作方法包括：
提供一个基体，所述基体上形成有引线及电源线；
在所述基体上形成平坦层，所述平坦层开设有第一过孔及第二过孔，部分所述引线与所述第一过孔的位置相对应；
在所述平坦层上及所述第二过孔内形成阳极层；
在所述平坦层及所述阳极层上形成像素定义层，所述像素定义层形成有第三过孔及第四过孔，部分所述阳极层与所述第三过孔的位置相对应，所述第四过孔与所述第一过孔连通；
在所述第三过孔内并在所述阳极层上形成发光层；
在所述像素定义层、所述发光层、及所述引线上形成阴极层，所述阴极层包括间隔设置的多个导线区块，每个所述导线区块内设置有弯折的导电线，每个所述导电线的一端与所述引线连接，另一端与所述电源线连接。
本发明实施方式的有机发光二极管显示模组的制作方法制作的有机发光二极管显示模组通过将阴极层分割成多条导电线，因此根据每条导电线的曲率半径能够确定显示模组的一个位置的曲率半径，从而显示模组能够根据每条导电线的曲率半径对显示模组进行显示补偿。
本发明的实施方式的附加方面和优点将在下面的描述中部分给出，部分将从下面的描述中变得明显，或通过本发明的实施方式的实践了解到。
附图说明
本发明的上述和/或附加的方面和优点从结合下面附图对实施方式的描述中将变得明显和容易理解，其中：
图1是本发明某些实施方式的显示模组的剖视图。
图2是本发明某些实施方式的阴极层的平面示意图。
图3是本发明某些实施方式的导电线分别与电源线及引线连接的平面示意图。
图4是本发明某些实施方式的显示模组的剖视图。
图5是本发明某些实施方式的电子装置的平面示意图。
图6是本发明某些实施方式的处理器控制电流计与导电线连接的原理示意图。
图7是本发明某些实施方式的显示模组的工作原理示意图。
图8是本发明某些实施方式的处理器控制电流计或触控检测电路分别与导电线连接的原理示意图。
图9是本发明某些实施方式的显示模组的工作原理示意图。
图10是本发明某些实施方式的显示模组的制作方法的流程示意图。
图11是本发明某些实施方式的显示模组的制作方法的原理示意图。
图12是本发明某些实施方式的显示模组的制作方法的流程示意图。
图13是本发明某些实施方式的显示模组的制作方法的流程示意图。
图14是本发明某些实施方式的显示模组的制作方法的原理示意图。
图15是本发明某些实施方式的显示模组的制作方法的原理示意图。
具体实施方式
下面详细描述本发明的实施方式，所述实施方式的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。
在本发明的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本发明的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连 接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本发明中的具体含义。
在本发明中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本发明提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
请参阅图1-3，本发明实施方式的有机发光二极管显示模组100包括基体10、平坦层20、阳极层30、像素定义层40、发光层50及阴极层60。基体10上形成有引线11及电源线12。平坦层20形成在基体10上，平坦层20开设有第一过孔21及第二过孔22，部分引线11与第一过孔21的位置相对应。阳极层30形成在平坦层20上及第二过孔22内。像素定义层40形成在平坦层20及阳极层30上，像素定义层40形成有第三过孔41及第四过孔42，部分阳极层30与第三过孔41的位置相对应，第四过孔42与第一过孔21连通。发光层50形成在第三过孔41内并在阳极层30上。阴极层60形成在像素定义层40、发光层50、及引线11上，阴极层60包括间隔设置的多个导线区块61，每个导线区块61内设置有弯折的导电线612，每条导电线612的一端与引线11连接，另一端与电源线12连接。
具体地，引线11可以完全露出在基体10上(如图1所示)；或者，引线11的一部分露出在基体10外(例如当引线11与栅极层17位于同一层时)。引线11的一端与导电线612的一端电性连接，引线11的另一端可以与其他电子元件(例如，电路板)电性连接也可以不电性连接任何电子元件。发光层50包括间隔设置的多个发光单元51，每个发光单元51对应一个显示模组100的像素单元。每个导线区块61可以与多个发光单元51对应，并且每个导线区块61内的导电线612与对应的多个发光单元51均电性连接；或者，每个导电区块61也可以与一个发光单元51对应，每个导电区块61内的导电线612与对应的一个发光单元51电性连接。电源线12的一端与导电线612电性连接，电源线12的另一端与显示 模组100外部的电源电性连接以通过电源线12给导电线612供电。
本发明实施方式的有机发光二极管显示模组100通过将阴极层60分割成多条导电线612，因此根据每条导电线612的曲率半径能够确定显示模组100的一个位置的曲率半径，从而显示模组100能够根据每条导电线612的曲率半径对显示模组100进行显示补偿。
请参阅图1，本发明实施方式的有机发光二极管显示模组100包括基体10、平坦层20、阳极层30、像素定义层40、发光层50及阴极层60。
基体10包括引线11、电源线12、基材13、缓冲层14、半导体层15、第一绝缘层16、栅极层17、第二绝缘层18、漏极191、源极192。缓冲层14形成在基材13上，半导体层15形成在缓冲层14上，第一绝缘层16形成在缓冲层14及半导体层15上，栅极层17形成在第一绝缘层16上，第二绝缘层18形成在栅极层17及第一绝缘层16上。半导体层15包括间隔设置的多个半导体单元151。漏极191形成在第二绝缘层18的远离第一绝缘层16的一侧上并穿过第二绝缘层18及第一绝缘层16与半导体单元151的一端电性连接。源极192形成在第二绝缘层18的远离第一绝缘层16的一侧上并穿过第二绝缘层18及第一绝缘层16与半导体单元151的另一端电性连接。半导体单元151、漏极191、源极192及栅极层17共同组成薄膜晶体管(Thin-film transistor)。引线11可形成在第二绝缘层18的远离第一绝缘层16的一侧上。电源线12可以形成在第二绝缘层18的远离第一绝缘层16的一侧上。基材13可以呈圆形、椭圆形、矩形、三角形、五边形、六边形或任意多边形的片状结构，基材13的材料可包括玻璃或聚酰亚胺(Polyimide,PI)。缓冲层14的材料可包括铜酞菁(CuPc)。第一绝缘层16的材料可包括二氧化硅(SiO2)。第二绝缘层18的材料可包括二氧化硅(SiO2)。
平坦层20形成在基体10上，具体地，平坦层20形成在漏极191、源极192、引线11及第二绝缘层18上。平坦层20开设有第一过孔21及第二过孔22。第一过孔21与引线11的位置相对应以使部分引线11位于第一过孔21内。第二过孔22与漏极191的位置相对应对应以使部分漏极191位于第二过孔22内，当平坦层20上及第二过孔22内没有形成阳极层30时，部分漏极191从第二过孔22露出。当引线11上没有设置像素定义层40及阴极层60时，引线11的一部分从平坦层20露出。平坦层20的材料可包括光刻胶。
阳极层30形成在平坦层20上及第二过孔22内。阳极层30的一部分位于第二过孔22内并与漏极191电性连接。
像素定义层40形成在平坦层20及阳极30上。像素定义层40形成有第三过孔41及第四过孔42。部分阳极层30与第三过孔41的位置相对应以使部分阳极层30位于第三过孔41内，当像素定义层40上没有设置发光层50时，部分阳极层30从第三过孔41露出。第四过孔42与第一过孔21对应并连通，当像素定义层40没有设置阴极层60时，引线11的 一部分从平坦层20露出。像素定义层40的材料可包括光刻胶。
发光层50形成在第三过孔41内并在阳极层30上。发光层50包括多个发光单元51，每个发光单元51通过阳极30与一条对应的漏极191电性连接。每个发光单元51对应一个显示模组100的像素单元。
请参阅图1-3，阴极层60形成在像素定义层40、发光层50、及引线11上，阴极层60包括间隔设置的多个导线区块61，每个导线区块61内设置有弯折的导电线612，每条导电线612的一端与引线11连接，另一端穿过像素定义层40及平坦层20与电源线12连接。导线区块61呈阵列分布在像素定义层40、发光层50及引线11上。每个导电区块61也可以与一个发光单元51对应，每个导电区块61内的导电线612与对应的一个发光单元51电性连接。导电线612的材料可镁(Mg)、镁银合金(MgAg)、镁镱合金(YbMg)中的任意一种。
本发明实施方式的有机发光二极管显示模组100通过将阴极层60分割成多条导电线612，因此根据每条导电线612的曲率半径能够确定显示模组100的一个位置的曲率半径，从而显示模组100能够根据每条导电线612的曲率半径对显示模组100进行显示补偿。
本发明实施方式的有机发光二极管显示模组100还具有以下有益效果：第一，引线11形成在第二绝缘层18的远离第一绝缘层16的一侧上，从而制作引线11不需要额外的基材，进而便于制作厚度更薄的显示模组100。
第二，每个导电区块61内的导电线612与对应的一个发光单元51电性连接，便于每条导电线612能够给一个对应的发光单元51提供一个电压。
在某些实施方式中，上述实施方式的引线11形成在第一绝缘层16上，引线11与栅极层17在同一层上。第二绝缘层18开设有与第一过孔21及第四过孔42均对应的第五过孔(图未示)，部分引线11与第五过孔的位置相对应以使部分引线11位于第五过孔内，引线11能够从第五过孔及第一过孔21露出。引线11形成在第一绝缘层16的远离缓冲层14的一侧上，从而制作引线11不需要额外的基材，进而便于制作厚度更薄的显示模组100。
请参阅图1，在某些实施方式中，显示模组100还包括封装层70，封装层70形成在像素定义层40及阴极层60上并覆盖像素定义层40及阴极层60。封装层70用于隔绝阴极层60与水汽、氧气接触以避免阴极层60与水汽及氧气发生化学反应而导致阴极层60失效。
请参阅图4，在某些实施方式中，显示模组100还包括导体层101，导电层101设置在第一过孔21内并位于引线11与阴极层60之间，引线11通过导电层101与阴极层60电连接。具体地，相对于引线11的材料特性与导电线612的材料特性的相近程度，导体层101的材料特性与引线11的材料特性更相近，并且导体层101的材料特性与导电线612的材料特性也更相近，从而提升了导电线612与引线11之间的电连接的稳定性。
请参阅图1、图5及图6，本发明实施方式的本发明实施方式的电子装置200包括上述 任意一实施方式的有机发光二极管显示模组100、电流计80、处理器201及存储器202。电流计80能过通过引线11与导电线612电性连接，电流计80能够用于检测流经导电线612的电流。处理器201用于根据导电线612的长度、导电线612的泊松比、导电线612的电阻率、流经导电线612的电流、及电源线12给导电线612提供的电压计算每条导电线612的形变量。存储器202保存有导电线612的多个形变量值及与多个形变量值对应的多个曲率半径值，处理器201根据每条导电线612的形变量及存储器202保存的多个曲率半径值确定导电线612的曲率半径。
具体地，电流计80、处理器201、存储器202均可以设置在电子装置200中的主板203上，电流计80(或主板203)可通过柔性电路板与显示模组100电性连接。当显示模组100用于显示图像画面时，处理器201控制引线11与电流计80断开连接以使导电线612可作为显示模组100的阴极；当需要检测显示模组100的曲率半径时，处理器201控制引线11与电流计80电连接以使导电线612可作为应变电阻使用。
由于显示模组100在使用时，显示模组100主要受到垂直于显示模组100的按压力，而显示模组100基本不会受到沿显示模组100四周向外的拉力，垂直于显示模组100的按压力会使显示模组100发生弯曲形变。因此导电线612的形变量基本由垂直于显示模组100的按压力引起，也即是导电线612的形变量基本由显示模组100及导电线612的弯曲形成。从而导电线612的形变量会与一条导电线612的曲率半径对应。根据公式：
Figure PCTCN2017111692-appb-000001
Figure PCTCN2017111692-appb-000002
其中，公式(1)及公式(2)中的ΔR为导电线612发生形变后的电阻变化量，R为导电线612发生形变前的电阻，μ为导电线612的泊松比，ε＝ΔL/L(ΔL为导电线612发生形变量，L为导电线612发生形变前的长度)，Δρ为导电线612发生形变后的电阻率变化量，ρ为导电线612发生形变前的电阻率，K为导电线612的应变灵敏度。根据公式(1)、公式(2)、流经导电线612的电流、及电源线12给导电线612提供的电压能够计算每条导电线612的形变量，再根据每条导电线612的形变量及存储器202保存的多个曲率半径值确定导电线612的曲率半径。
本发明实施方式的有机发光二极管显示模组100通过将阴极层60分割成多条导电线612，从而便于通过电流计80获得流经导电线612的电流，如此，处理器201能够计算得到每条导电线612的形变量，再根据每条导电线612的形变量及存储器202保存的多个曲率半径值确定导电线612的曲率半径。
请参阅图6，在某些实施方式中，电流计80的数量为多个，导电线612的数量为多条， 多条导电线612对应多个电流计80，每个电流计80用于检测流经对应的导电线612的电流。如此，多个电流计80能够获得流经每条导电线612的电流。
请参阅图6及图7，在某些实施方式中，显示模组100从开始显示当前帧画面到开始显示下一帧画面之间包括画面显示时间和曲率检测时间。处理器201还用于：
在画面显示时间内，控制电流计80与引线11断开连接、并给导电线612施加有显示驱动信号以驱动显示模组100显示图像画面；及
在曲率检测时间内，控制电流计80与引线11导通以使电流计80检测导电线612的电流。
具体地，曲率检测时间小于或等于用户不能分辨的时间(例如，30毫秒)。由于残影现象，人眼所看到的画面消失后，人眼仍能继续保留画面0.1-0.4秒左右的图像，因此用户能够始终能够“看到”显示模组100显示的画面。本实施方式的画面显示时间等于曲率检测时间。在其他实施方式中，画面显示时间小于曲率检测时间；或者，画面显示时间大于曲率检测时间。
本实施方式的导电线612在画面显示时间内可用于作为显示模组100的电极，导电线612在曲率检测时间内可用于作为应变电阻，因此本实施方式的显示模组100不需要设置应变电阻也能够检测显示模组100的曲率半径。
请参阅图8及图9，在某些实施方式中，显示模组100还包括触控检测电路90，触控检测电路90能够通过引线11与导电线612连接并用于检测与用户触控对应的触控信号，显示模组100从开始显示当前帧画面到开始显示下一帧画面之间包括画面显示时间、曲率检测时间、和触控检测时间。处理器201还用于：
在画面显示时间内，控制电流计80与引线11断开连接、控制触控检测电路90与引线11断开连接、并给导电线612施加有显示驱动信号以驱动显示模组100显示图像画面；
在曲率检测时间内，控制电流计80与引线11导通以使电流计80检测导电线612的电流；及
在触控检测时间内，控制触控检测电路90与引线11导通以使触控检测电路90检测导电线612产生的触控信号。
具体地，曲率检测时间与触控检测时间之和小于或等于用户不能分辨的时间(例如，30毫秒)。由于残影现象，人眼所看到的画面消失后，人眼仍能继续保留画面0.1-0.4秒左右的图像，因此用户能够始终能够“看到”显示模组100显示的画面。本实施方式的画面显示时间、曲率检测时间及触控检测时间均相等。在其他实施方式中，画面显示时间小于曲率检测时间及触控检测时间；或者，画面显示时间大于曲率检测时间及触控检测时间。
本实施方式的导电线612在画面显示时间内可用于作为显示模组100的电极，导电线 612在曲率检测时间内可用于作为应变电阻，导电线612在触控检测时间内可用于作为触控电极，因此本实施方式的显示模组100不需要设置应变电阻也能够检测显示模组100的曲率半径；同时显示模组100不需要设置触控电极也能够检测用户触控显示模组100的触控位置。
在某些实施方式中，显示模组100从开始显示当前帧画面到开始显示下一帧画面之间的时间小于或等于20毫秒。
由于显示模组100从开始显示当前帧画面到开始显示下一帧画面之间的时间小于或等于20毫秒，因此曲率检测时间小于20毫秒，从而曲率检测时间小于或等于用户不能分辨的时间(例如，30毫秒)，由于残影现象，人眼所看到的画面消失后，人眼仍能继续保留画面0.1-0.4秒左右的图像，因此用户能够始终能够“看到”显示模组100显示的画面；或者，曲率检测时间与触控检测时间之和小于20毫秒，从而曲率检测时间与触控检测时间之和小于或等于用户不能分辨的时间(例如，30毫秒)，由于残影现象，人眼所看到的画面消失后，人眼仍能继续保留画面0.1-0.4秒左右的图像，因此用户能够始终能够“看到”显示模组100显示的画面。
请参阅图1、图10及图11，本发明实施方式的有机发光二极管显示模组100的制作方法包括：
S1，提供一个基体10，基体10上形成有引线11及电源线12；
S2，在基体10上形成平坦层20，平坦层20开设有第一过孔21及第二过孔22，部分引线11与第一过孔21的位置相对应；
S3，在平坦层20上及第二过孔22内形成阳极层30；
S4，在平坦层20及阳极层30上形成像素定义层40，像素定义层40形成有第三过孔41及第四过孔42。部分阳极层30与第三过孔41的位置相对应，第四过孔42与第一过孔21连通；
S5，在第三过孔41内并在阳极层30上形成发光层50；
S6，在像素定义层40、发光层50、及引线11上形成阴极层60，阴极层60包括间隔设置的多个导线区块61，每个导线区块61内设置有弯折的导电线612，每个导电线612的一端与引线11连接，另一端与电源线12连接。
本发明实施方式的有机发光二极管显示模组100的制作方法制作的有机发光二极管显示模组100通过将阴极层60分割成多条导电线612，因此根据每条导电线612的曲率半径能够确定显示模组100的一个位置的曲率半径，从而显示模组100能够根据每条导电线612的曲率半径对显示模组100进行显示补偿。
请参阅图12及图14，在某些实施方式中，在像素定义层40、发光层50、及引线11 上形成阴极层60的步骤(步骤S6)包括：
S61，利用精细金属掩模(fine metal mask,FMM)工艺在像素定义层40、发光层50、及引线11上制作初始阴极层64；
S62，切割初始阴极层64以得到阴极层60。
具体地，初始阴极层64可通过激光切割形成，阴极层60包括间隔设置的多个导线区块61，每个导线区块61内设置有弯折的导电线612，每个导电线612的一端与引线11连接，另一端与电源线12连接。由于FMM工艺为现有的制作工艺，因而制作初始阴极层64所需要的设备容易获得从而降低了阴极层60的制作成本。
请参阅图13及图14，在某些实施方式中，在像素定义层40、发光层50、及引线11上形成阴极层60的步骤(步骤S6)包括：
S63，在像素定义层40、发光层50、及引线11上蒸镀初始阴极层64；
S64，切割初始阴极层64以得到阴极层60。
具体地，初始阴极层64可通过激光切割形成，阴极层60包括间隔设置的多个导线区块61，每个导线区块61内设置有弯折的导电线612，每个导电线612的一端与引线11连接，另一端与电源线12连接。由于蒸镀为现有的制作工艺，因而制作初始阴极层64所需要的设备容易获得从而降低了阴极层60的制作成本。
请参阅图15，在某些实施方式中，有机发光二极管显示模组100的制作方法还包括：
利用薄膜封装技术(Thin Film Encapsulation,TFE)在阴极层60及像素定义层40上设置制作封装层70以得到显示模组100。
封装层70用于隔绝阴极层60与水汽、氧气接触以避免阴极层60与水汽及氧气发生化学反应，从而提升显示模组100的使用寿命。
在本说明书的描述中，参考术语“某些实施方式”、“一个实施方式”、“一些实施方式”、“示意性实施方式”、“示例”、“具体示例”、或“一些示例”等的描述意指结合所述实施方式或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施方式或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施方式或示例。而且，描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施方式或示例中以合适的方式结合。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个所述特征。在本发明的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
尽管上面已经示出和描述了本发明的实施方式，可以理解的是，上述实施方式是示例 性的，不能理解为对本发明的限制，本领域的普通技术人员在本发明的范围内可以对上述实施方式进行变化、修改、替换和变型，本发明的范围由权利要求及其等同物限定。

Claims (14)

  1. 一种有机发光二极管显示模组，其特征在于，所述显示模组包括：
    基体，所述基体上形成有引线及电源线；
    形成在所述基体上的平坦层，所述平坦层开设有第一过孔及第二过孔，部分所述引线与所述第一过孔的位置相对应；
    形成在所述平坦层上及所述第二过孔内的阳极层；
    形成在所述平坦层及所述阳极层上的像素定义层，所述像素定义层形成有第三过孔及第四过孔，部分所述阳极层与所述第三过孔位置相对应，所述第四过孔与所述第一过孔连通；
    形成在所述第三过孔内并在所述阳极层上的发光层；
    形成在所述像素定义层、所述发光层、及所述引线上的阴极层，所述阴极层包括间隔设置的多个导线区块，每个所述导线区块内设置有弯折的导电线，每个所述导电线的一端与所述引线连接，另一端与所述电源线连接。
  2. 根据权利要求1所述的显示模组，其特征在于，所述基体包括：
    基材；
    设置所述基材上的缓冲层；
    形成在所述缓冲层上的半导体层；
    形成在所述缓冲层及所述半导体层上的第一绝缘层；
    形成在所述第一绝缘层上的栅极层；
    形成在所述栅极层及所述第一绝缘层上的第二绝缘层；
    与所述半导体层电性连接的漏极及源极，所述引线、所述漏极及所述源极形成在所述第二绝缘层上，所述漏极与所述第二过孔的位置相对应。
  3. 根据权利要求1所述的显示模组，其特征在于，所述基体包括：
    基材；
    设置所述基材上的缓冲层；
    形成在所述缓冲层上的半导体层；
    形成在所述缓冲层及所述半导体层上的第一绝缘层；
    形成在所述第一绝缘层上的栅极层及所述引线；
    形成在所述栅极层及所述引线上的第二绝缘层，所述第二绝缘层开设有与所述第一过孔对应的第五过孔，部分所述引线与所述第五过孔的位置相对应；
    与所述半导体层电性连接的漏极及源极，所述漏极及所述源极形成在所述第二绝缘层上。
  4. 根据权利要求1所述的显示模组，其特征在于，多个所述导线区块呈阵列分布在所述像素定义层、所述发光层、及所述引线上。
  5. 根据权利要求1所述的显示模组，其特征在于，所述导电线的材料包括镁、镁银合金、镁镱合金中的任意一种。
  6. 一种电子装置，其特征在于，所述电子装置包括：
    权利要求1-5任意一项所述的显示模组；
    电流计，所述电流计能够通过所述引线与所述导电性连接，并用于检测流经所述导电线的电流；
    处理器，所述处理器用于根据所述导电线的长度、所述导电线的泊松比、所述导电线的电阻率、所述电流、及所述电源线提供的电压计算每个所述导电线的形变量；及
    存储器，所述存储器保存有所述导电线的多个形变量值及与多个所述形变量值对应的多个曲率半径值，所述处理器根据每个所述导电线的形变量及所述存储器保存的多个所述曲率半径值确定所述导电线的曲率半径。
  7. 根据权利要求6所述的电子装置，其特征在于，所述电流计的数量为多个，所述导电线的数量为多条，多条所述导电线对应多个所述电流计，每个所述电流计用于检测流经对应的所述导电线的电流。
  8. 根据权利要求6所述的电子装置，其特征在于，所述显示模组从开始显示当前帧画面到开始显示下一帧画面之间包括画面显示时间和曲率检测时间；所述处理器还用于：
    在所述画面显示时间内，控制所述电流计与所述引线断开连接、并给所述导电线施加有显示驱动信号以驱动所述显示模组显示图像画面；及
    在所述曲率检测时间内，控制所述电流计与所述引线导通以使所述电流计检测所述导电线的电流。
  9. 根据权利要求6所述的电子装置，其特征在于，所述显示模组还包括触控检测电路，所述触控检测电路能够通过所述引线与所述导电线连接并用于检测与用户触控对应的触控 信号，所述显示模组从开始显示当前帧画面到开始显示下一帧画面之间包括画面显示时间、曲率检测时间、和触控检测时间；所述处理器还用于：
    在所述画面显示时间内，控制所述电流计与所述引线断开连接、控制所述触控检测电路与所述引线断开连接、并给所述导电线施加有显示驱动信号以驱动所述显示模组显示图像画面；
    在所述曲率检测时间内，控制所述电流计与所述引线导通以使所述电流计检测所述导电线的电流；及
    在所述触控检测时间内，控制所述触控检测电路与所述引线导通以使所述触控检测电路检测所述导电线产生的触控信号。
  10. 根据权利要求8或9所述的显示模组，其特征在于，所述显示模组从开始显示当前帧画面到开始显示下一帧画面之间的时间小于或等于20毫秒。
  11. 一种有机发光二极管显示模组的制作方法，其特征在于，所述制作方法包括：
    提供一个基体，所述基体上形成有引线及电源线；
    在所述基体上形成平坦层，所述平坦层开设有第一过孔及第二过孔，部分所述引线与所述第一过孔的位置相对应；
    在所述平坦层上及所述第二过孔内形成阳极层；
    在所述平坦层及所述阳极层上形成像素定义层，所述像素定义层形成有第三过孔及第四过孔，部分所述阳极层与所述第三过孔的位置相对应，所述第四过孔与所述第一过孔连通；
    在所述第三过孔内并在所述阳极层上形成发光层；
    在所述像素定义层、所述发光层、及所述引线上形成阴极层，所述阴极层包括间隔设置的多个导线区块，每个所述导线区块内设置有弯折的导电线，每个所述导电线的一端与所述引线连接，另一端与所述电源线连接。
  12. 根据权利要求11所述的显示模组的制作方法，其特征在于，所述在所述像素定义层、所述发光层、及所述引线上形成阴极层的步骤包括：
    利用精细金属掩模工艺在所述像素定义层、所述发光层、及所述引线上制作初始阴极层；
    切割所述初始阴极层以得到所述阴极层。
  13. 根据权利要求11所述的显示模组的制作方法，其特征在于，所述在所述像素定义层、所述发光层、及所述引线上形成阴极层的步骤包括：
    在所述像素定义层、所述发光层、及所述引线上蒸镀初始阴极层；
    切割所述初始阴极层以得到所述阴极层。
  14. 根据权利要求11所述的显示模组的制作方法，其特征在于，所述制作方法还包括：
    利用薄膜封装技术在所述阴极层上设置制作封装层以得到所述显示模组。
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EP3712946A1 (en) 2020-09-23
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