WO2019092840A1 - 電子モジュール - Google Patents

電子モジュール Download PDF

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Publication number
WO2019092840A1
WO2019092840A1 PCT/JP2017/040507 JP2017040507W WO2019092840A1 WO 2019092840 A1 WO2019092840 A1 WO 2019092840A1 JP 2017040507 W JP2017040507 W JP 2017040507W WO 2019092840 A1 WO2019092840 A1 WO 2019092840A1
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WO
WIPO (PCT)
Prior art keywords
back surface
exposed
surface exposed
connector
conductor
Prior art date
Application number
PCT/JP2017/040507
Other languages
English (en)
French (fr)
Inventor
悦宏 神山
Original Assignee
新電元工業株式会社
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Filing date
Publication date
Application filed by 新電元工業株式会社 filed Critical 新電元工業株式会社
Priority to PCT/JP2017/040507 priority Critical patent/WO2019092840A1/ja
Priority to CN201780096411.7A priority patent/CN111295751B/zh
Priority to JP2018522160A priority patent/JP6510146B1/ja
Priority to US16/757,713 priority patent/US11309274B2/en
Priority to NL2021880A priority patent/NL2021880B1/en
Publication of WO2019092840A1 publication Critical patent/WO2019092840A1/ja

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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8434Bonding interfaces of the connector
    • H01L2224/84345Shape, e.g. interlocking features
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • H01L23/49555Cross section geometry characterised by bent parts the bent parts being the outer leads
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/183Connection portion, e.g. seal
    • H01L2924/18301Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Definitions

  • the present invention relates to an electronic module having a back surface exposed portion in which a back surface is exposed from a sealing portion.
  • Japanese Patent No. 5067679 discloses an electronic module having a power supply terminal, an output terminal and a ground terminal. In such an electronic module, it is desirable to increase the heat radiation efficiency from the electronic element. For this reason, it is also conceivable to expose the back surface of the conductor having the terminal portion from the sealing portion such as mold resin.
  • the present invention provides an electronic module capable of improving the reliability by suppressing the failure of the connection of the second connector.
  • the electronic module according to the invention is A sealing portion, A back surface exposed conductor having a back surface exposed portion where the back surface is exposed; With the back surface non-exposed conductor where the back surface is not exposed, An electronic element provided in the sealing portion and provided on the front surface of the back exposed conductor; A first connector for electrically connecting the electronic device to the backside exposed conductor; A second connector for electrically connecting the electronic device to the back surface unexposed conductor; Equipped with The thickness of the first connector may be thicker than the thickness of the second connector.
  • the thickness of the first connector may be thinner than the thicknesses of the back exposed conductor and the back unexposed conductor.
  • the thickness of the first connector may be not less than 1.2 times and not more than 1.5 times the thickness of the second connector.
  • the first connector has a first connection proximal end and a first connection tip, A first bore may be provided in each of the first connection proximal end and the first connection distal end.
  • the second connector has a second connection proximal end and a second connection tip,
  • the width of the second connection base end may be larger than the width of the second connection tip.
  • a second hole may be provided in the second connection base end, and a hole may not be provided in the second connection tip.
  • the rear surface exposed conductor has a terminal portion protruding outward from the side surface of the sealing portion, and a connecting portion provided between the rear surface exposed portion and the terminal portion, the rear surface not being exposed,
  • the thickness of the connection portion may be thinner than the thickness of the back surface exposed portion and the thickness of the terminal portion.
  • the electronic module according to any one of the concepts 1 to 7 of the invention is It further comprises a fastening member insertion part provided at the periphery of the sealing part and for inserting a fastening member,
  • the back surface exposed conductor includes a peripheral back surface exposed conductor, and an inner back surface exposed conductor provided at a position farther from the fastening member insertion portion than the peripheral back surface exposed conductor.
  • the area of the backside exposed portion of the peripheral backside exposed conductor may be smaller than the area of the backside exposed portion of the inner backside exposed conductor.
  • the thickness of the first connector for electrically connecting the electronic element to the back surface exposed conductor is thicker than the thickness of the second connector for electrically connecting the electronic element to the back surface non-exposed conductor
  • FIG. 1 (a) is a side view for explaining the thickness of a first connector which can be used in the first embodiment of the present invention
  • FIG. 1 (b) is a first view of the present invention. It is a side view for demonstrating the thickness of the 2nd connector which can be used by embodiment.
  • FIG. 2 is a plan view not showing the sealing portion of the electronic module according to the first embodiment of the present invention.
  • FIG. 3 is a plan view of the electronic module according to the first embodiment of the present invention.
  • FIG. 4 is a plan view of the first connector and the second connector which can be used in the first embodiment of the present invention.
  • FIG. 5 is a perspective view for explaining the relationship among the second terminal portion, the fourth terminal portion, the fifth terminal portion and the like which can be used in the first embodiment of the present invention.
  • FIG. 6 is a perspective view for explaining the relationship between the first terminal portion, the third terminal portion and the like that can be used in the first embodiment of the present invention.
  • FIG. 7 is a circuit diagram of an electronic module according to an embodiment of the present invention.
  • FIG. 8 is a bottom view of the electronic module according to the first embodiment of the present invention.
  • FIG.9 (a) is the side view which showed the relationship of the 1st connector which can be used by the 1st Embodiment of this invention, an electronic device, and a back surface exposed part
  • FIG.9 (b) is It is the side view which showed the relationship between the 2nd connector and non-exposure part which can be used in the 1st Embodiment of this invention, an electronic device, and a back surface exposed part.
  • FIG. 10 is a side view showing an aspect in which the electronic module according to the embodiment of the present invention is mounted on a heat dissipation sheet.
  • FIG. 11 (a) is an enlarged plan view of a second connector that can be used in the first embodiment of the present invention
  • FIG. 11 (b) is used in the first embodiment of the present invention FIG.
  • FIG. 6 is an enlarged side view of a second connector that can be mounted, as viewed from the arrow A in FIG. 2;
  • FIG. 12 is a plan view not showing the sealing portion of the electronic module according to the second embodiment of the present invention.
  • FIG. 13 is a plan view of the electronic module according to the second embodiment of the present invention, showing the sealing portion as translucent.
  • FIG. 14 (a) is a side view of a first back side exposed conductor that can be used in the electronic module according to the third embodiment of the present invention, and FIG. 14 (b) is a third embodiment of the present invention.
  • Fig. 14 (c) is a side view of a second backside exposed conductor that can be used in the electronic module according to the embodiment, and Fig.
  • FIG. 14 (c) is a side of the third backside exposed conductor that can be used in the electronic module according to the third embodiment of the present invention. Is a plan view.
  • FIG. 15 is a plan view not showing the sealing portion of the electronic module according to the fourth embodiment of the present invention.
  • FIG. 16 (a) is a perspective view of a second connector that can be used in the embodiment of the present invention as viewed from the second connection tip side, and FIG. 16 (b) is an embodiment of the present invention It is the figure which looked at the 2nd connector which can be used from the bottom side.
  • a sealing portion 90 (see FIG. 3) and exposed rear surface terminal portions 11, 21 and 31 protruding outward from the side surface of the sealing portion 90.
  • Back surface exposed conductors 10, 20, and 30 having back surface exposed portions 12, 22, and 32 (see FIG. 8), and a back surface non-exposed terminal portion 41 projecting outward from the side surface of the sealing portion 90.
  • 51, and the back surface non-exposed conductors 40 and 50 not exposed on the back surface, and conductive adhesive 190 such as solder provided on the front surface of the back surface exposed conductors 10, 20 and 30 provided in the sealing portion 90. It may have a plurality of electronic elements 15 and 25 provided via (see FIG.
  • first direction a direction including a direction from the back surface side to the front surface side of the sealing portion 90 of the electronic module
  • first direction a direction in a plane with the first direction as a normal
  • in-plane direction The in-plane direction including the second direction and the third direction in FIG. 2
  • the first connector 60 of the present embodiment electrically connects the back exposed conductors 10, 20, 30 to the electronic elements 15, 25, and the second connector 70 connects the back unexposed conductors 40, 50 to the electronic element 15. , 25 are electrically connected.
  • the first connector 60 is made of a conductive adhesive, which includes the front surface of the back surface exposed conductors 20 and 30 and the source electrode provided on the front surface of the first electronic element 15 or the second electronic element 25.
  • the second connector 70 is connected via a 190, and a gate electrode or the like provided on the front surface of the back surface non-exposed conductor 40, 50 and the front surface of the first electronic element 15 or the second electronic element 25. May be connected via the conductive adhesive 190.
  • the present invention is not limited to this, and the connectors 60 and 70 may connect the two back surface exposed conductors 10, 20 and 30 or two back surface non-exposed conductors 40 and 50, for example, the first connector 60 may connect two back surface exposed conductors 10, 20, 30 with each other, and the second connector 70 may connect two back surface unexposed conductors 40, 50 with each other.
  • the thickness T1 (FIG. 1A) of the first connector 60 for electrically connecting the electronic elements 15 and 25 to the back exposed conductors 10, 20 and 30 corresponds to the back unexposed conductors 40 of the electronic elements 15 and 25. , 50, may be thicker than the thickness T2 (see FIG. 1B) of the second connector 70 for electrical connection.
  • the thickness T1 of the first connector 60 may be thinner than the thicknesses of the back surface exposed conductors 10, 20, 30 and the back surface unexposed conductors 40, 50.
  • the thickness T1 of the first connector 60 may be not less than 1.2 times and not more than 1.5 times the thickness T2 of the second connector 70.
  • the first connector 60 has a first connection base end 61 and a first connection tip 62 connected to the electronic elements 15 and 25 via the conductive adhesive 190,
  • a first hole 66 may be provided in each of the first connection proximal end 61 and the first connection distal end 62.
  • the width of the first connection proximal end 61 and the width of the first connection tip 62 may be substantially the same.
  • substantially the same means that the difference between the two is within 5% of the larger value, and, for example, the width of the first connection base 61 and the width of the first connection tip 62 Of the widths, assuming that a large value is W1 and a small value is W0, it means that W1-W0 ⁇ 0.05 ⁇ W1.
  • the second connector 70 has a second connection base end 71 and a second connection tip 72, and the width of the second connection base 71 is larger than that of the second connection tip 72. It may be As shown in FIG. 11 (a), the second connector 70 has a second connection base end 71, and the second connection base end 71 is provided with a second hole 76, and a second connection tip The second hole (hole) 76 may not be provided in the hole 72. As shown in FIG. 11B, the second connection tip portion 72 may have a back surface side protruding portion 72a protruding to the back surface side (see also FIG. 16).
  • the back surface exposed conductors 10, 20, 30 may have internal bends 13, 23, 33 bent in the sealing portion 90.
  • the back surface non-exposed conductors 40, 50 may not have an internal bend.
  • the back surface exposed conductors 10, 20, 30 are provided between the back surface exposed terminal portions 11, 21, 31 and the back surface exposed portions 12, 22, 32, 32, and the back surface exposed portions 12, 22, 32. It may have internal bending parts 13, 23, 33 bent to the back side exposure side terminal parts 11, 21, and 31 side (front side).
  • the back surface non-exposed conductors 40 and 50 may be located on the front side of the back surface exposed portions 12, 22 and 32.
  • the back surface non-exposed conductors 40, 50 may have non-exposed portions 42, 52 enclosed in the sealing portion 90.
  • the electronic elements 15 and 25 are semiconductor elements, such as MOSFET, for example, and an electronic module may be a semiconductor module, for example.
  • the back surface exposed portions 12, 22 and 32 and the back surface exposed side terminal portions 11, 21 and 31 are integrated, and the non-exposed portions 42 and 52 and the back surface non-exposed side terminal portions 41 and 51 are integrated.
  • the present invention is not limited to this, and the back surface exposed portions 12, 22 and 32 and the back surface exposed side terminal portions 11, 21 and 31 are separated and bonded to each other.
  • the non-exposed portions 42, 52 and the back non-exposed side terminal portions 41, 51 may be separated and bonded to each other.
  • the back surface exposed conductors 10, 20, 30 may have a first back surface exposed conductor 10, a second back surface exposed conductor 20, and a third back surface exposed conductor 30.
  • the first back surface exposed conductor 10 has a first terminal portion 11 and a first back surface exposed portion 12, and a first inner bent portion 13 provided between the first terminal portion 11 and the first back surface exposed portion 12.
  • the second back surface exposed conductor 20 has a second terminal portion 21 and a second back surface exposed portion 22, and a second inner bent portion 23 provided between the second terminal portion 21 and the second back surface exposed portion 22.
  • the third back surface exposed conductor 30 has a third terminal portion 31 and a third back surface exposed portion 32, and a third inner bending portion 33 provided between the third terminal portion 31 and the third back surface exposed portion 32. May be
  • the back non-exposed side terminal portions 41 and 51 may have the fourth back non-exposed conductor 40 and the fifth back non-exposed conductor 50.
  • the fourth back surface non-exposed conductor 40 may have a fourth terminal portion 41 and a fourth non-exposed portion 42.
  • the fifth back surface non-exposed conductor 50 may have a fifth terminal portion 51 and a fifth non-exposed portion 52.
  • the electronic elements 15 and 25 are configured by combining the first electronic element 15 placed on the first back surface exposed part 12 and the second electronic element 25 placed on the second back surface exposed part 22. You may have.
  • the second terminal portion 21 and the back non-exposed side terminal portions 41 and 51 may protrude outward from one side surface (the lower surface of FIG. 3) in the sealing portion 90.
  • a plurality of second back surface exposed conductors 20 may be provided.
  • the back surface non-exposed side terminal portions 41 and 51 may be provided between at least a pair of second back surface exposed portions 22, and a fourth terminal portion 41 and a fifth terminal portion 51 are provided between the pair of second terminal portions 21. It may be provided one by one.
  • a fourth non-exposed portion 42 integrated with the fourth terminal portion 41 is provided between the pair of second back surface exposed portions 22, and a fourth integrated portion integrated with the fifth terminal portion 51.
  • a fifth non-exposed portion 52 is provided on one side (the lower side in FIG. 2) of the second back surface exposed portion 22.
  • Each of the rear surface non-exposed side terminal portions 41 and 51 may be connected to the electronic elements 15 and 25.
  • the fifth terminal portion 51 is connected to the second electronic element 25 by the second connector 70 and is used to control the second electronic element 25, and the fourth terminal portion 41 is The second connector 70 is connected to the one electronic device 15 and is used to control the first electronic device 15.
  • the electronic elements 15 and 25 may not be placed on the third rear surface exposed portion 32.
  • the first terminal portion 11 and the third terminal portion 31 may protrude outward from the other side surface (upper surface of FIG. 3) in the sealing portion 90.
  • the first terminal portions 11 and the third terminal portions 31 may be alternately arranged.
  • the back surface exposed conductors 10, 20, 30 and the back surface unexposed conductors 40, 50 may be made of, for example, copper, copper alloy or the like, and may be tin-plated or nickel-plated on the entire surface or in part. An epoxy resin or the like may be used as the sealing portion 90.
  • a power electronic module may be used as the electronic module.
  • a MOSFET may be used as the first electronic element 15 and the second electronic element 25.
  • the circuit diagram of the electronic module according to the present embodiment is, for example, as shown in FIG.
  • the first electronic element 15 and the second electronic element 25 are MOSFETs, and in FIG. 2, the drain of the MOSFET which is the first electronic element 15 is located on the first back surface exposed portion 12 side and the source is The drain of the MOSFET which is the second electronic element 25 is located on the second back surface exposed portion 22 side, and the source is exposed on the second back surface. It is located on the opposite side (front side) to the part 22.
  • the first back surface exposed conductor 10, the second back surface exposed conductor 20, and the third back surface exposed portion 30 may be connected to each other.
  • the first back surface exposed portion 12 and the second back surface exposed portion 22 may be connected by the first connector 60 or a wire (not shown).
  • the second back surface exposed portion 22 and the third back surface exposed portion 30 may be connected by the first connector 60 or a wire (not shown).
  • a copper clip can be used as the connectors 60 and 70
  • an aluminum wire can be used as the wire. The amount of current flowing can be increased by using the thick connectors 60 and 70.
  • the first rear surface exposed portion 12, the second rear surface exposed portion 22, and the third rear surface exposed portion 32 are placed on the housing 200 via a heat dissipation sheet 210, a heat dissipating adhesive agent, etc. as shown in FIG. May be
  • each of the first terminal portion 11, the second terminal portion 21, the third terminal portion 31, the fourth terminal portion 41 and the fifth terminal portion 51 may be bent to the front side. .
  • the electronic module of the present embodiment may be a three-phase bridge circuit.
  • One of the three output terminals may be connected to the U-phase coil, another one may be connected to the V-phase coil, and the remaining one may be connected to the W-phase coil.
  • the drain of the MOSFET which is the first electronic element 15 is connected to the power supply line side
  • the source is connected to the drain of the MOSFET which is the second electronic element 25
  • the source of this MOSFET is ground It may be connected to
  • the connection point between the first electronic element 15 and the second electronic element 25 may be connected to the U-phase coil, the V-phase coil or the W-phase coil of the motor.
  • connection surface between the non-exposed portions 42, 52 and the second connector 70 (including the aspect in which contact is made via the conductive adhesive 190) and The position in the height direction of the connection surface of the back surface exposed portion 12, 22, 32 and the first connector 60 (including the aspect in which the contact is made via the conductive adhesive 190) is different. More specifically, in the embodiment shown in FIG.
  • the height position of the connection surface of the second connection base end 71 with the fourth non-exposure portion 42 and the fifth non-exposure portion 52 of the second connection base end 71 The height position of the connection surface with the height position of the connection surface with the second rear surface exposed portion 22 of the first connection base end portion 61 and the connection with the third rear surface exposed portion 32 of the first connection base end portion 61 It is higher than the height position of the surface.
  • a fastening member insertion portion 170 for inserting a fastening member such as a screw for fixing the electronic module to the heat sink or the housing 200 is provided at the peripheral edge of the sealing portion 90. It may be done.
  • the thickness T1 of the first connector 60 for electrically connecting the electronic elements 15 and 25 to the back surface exposed conductors 10, 20 and 30 corresponds to the electronic elements 15 and 25 as the back surface unexposed conductors 40
  • a pressing member such as a pressing pin is used.
  • the first connectors 60 can prevent the back surface exposed portions 12, 22 and 32 from rising. Therefore, it is possible to prevent the resin from coming around to the back surface side of the back surface exposed portions 12, 22 and 32, and it is possible to prevent the appearance defect and the generation of burrs.
  • the thickness T1 of the first connector 60 is smaller than 1.2 times the thickness T2 of the second connector 70, the pressing force by the first connector 60 on the back surface exposed portions 12, 22, 32 may be reduced. is there.
  • the thickness T1 of the first connector 60 is larger than 1.5 times the thickness T2 of the second connector 70, the weight of the first connector 60 becomes too heavy, and the back side of the first connector 60
  • the thickness of the conductive adhesive 190, such as solder, placed on the substrate can not be sufficiently maintained, and as a result, the reliability may be lowered. Therefore, it is useful that the thickness T1 of the first connector 60 is not less than 1.2 times and not more than 1.5 times the thickness T2 of the second connector 70.
  • the weight of the first connector 60 is An excessive weight can be prevented, and in turn, the thickness of the conductive adhesive 190 such as solder disposed on the back surface side of the first connector 60 can be sufficiently maintained.
  • the first connection proximal end 61 and the first connection distal end 62 It is advantageous in that it can be visually confirmed whether or not a conductive adhesive 190 such as a solder is adhered to the back surface of each.
  • the width of the second connection base end 71 is larger than the width of the second connection tip 72, the size in the in-plane direction of the second connector 70 is obtained. Is beneficial in that it can be In the case where the second connection base end 71 is provided with the second hole 76, is a conductive adhesive 190 such as solder adhered to the back surface of the second connection base end 71? Is useful in that it can be confirmed visually.
  • the width of the second connection tip 72 is smaller than the width of the second connection base 71, the second hole 76 may not be provided in the second connection tip 72.
  • the width of the second connection tip 72 is narrow, it is possible to visually confirm whether or not the conductive adhesive 190 such as solder is adhered to the second connection tip 72 even without providing the second hole 76. It is.
  • the first connectors 60 are provided corresponding to the respective back surface exposed portions 12, 22 and 32, and when the sealing resin is poured, the respective back surface exposed portions 12, 22 and 32 are pressing pins or the like.
  • the aspect pressed by the pressing member it is possible to prevent the floating of the portions not pressed by the connectors 60 and 70 while pressing the back surface exposed portions 12, 22 and 32. Therefore, it is possible to prevent the resin from coming around to the back surface side of the back surface exposed portions 12, 22 and 32, and it is possible to prevent the appearance defect and the generation of burrs.
  • pressing holes or pressing marks 110, 120, 130 may be provided (see FIG. 3).
  • the pressing hole is a hole provided on the front surface of the sealing portion 90.
  • the pressing marks 110, 120, 130 are, for example, all of which are sealed with a sealing resin after pressing the back surface exposed conductors 10, 20, 30 with a pressing pin. Even if the whole is sealed with the sealing resin as described above, in general, a boundary is formed between the original sealing portion and the sealing resin embedded later, and the region divided by the boundary is It becomes pressing marks 110, 120 and 130 (see FIG. 3).
  • the heat radiation effect can be expected when adopting the aspect in which the back surfaces of the back surface exposed portions 12, 22, 32 on which the electronic elements 15, 25 are mounted are exposed (see FIGS. 2 and 8). ).
  • the non-exposed portions 42 and 52 are sealed in the sealing portion 90, the possibility that the back surface non-exposed conductors 40 and 50 may come off the sealing portion 90 can be reduced.
  • the appearance defect does not occur in the non-exposed portions 42 and 52 due to the burr of the sealing portion 90.
  • the conductor surface is exposed at the peripheral edge portion of the back surface of the sealing portion 90, there is a possibility that the current may leak from an unexpected place.
  • the conductor surface can be prevented from being exposed at the peripheral portion of the back surface of the sealing portion 90, and as a result, it is unexpected This is advantageous in that it can reduce the possibility of the current leaking out from the point of (1) and improve the reliability.
  • the positions in the height direction of the back surface exposed side terminal portions 11, 21, 31 and the back surface non exposed side terminal portions 41, 51 correspond to each other.
  • the distance between the back surface exposed portions 12, 22, 32 and the non-exposed portions 42, 52 can be separated, and thus the distance between the electronic elements 15, 25 and the non-exposed portions 42, 52 can be separated, It is possible to prevent an adverse effect on the current flowing through the rear surface non-exposed side terminal portions 41 and 51 due to the heat generation from the electronic elements 15 and 25.
  • the size of the heat dissipation sheet 95 (see FIG. 10) can be reduced, and the manufacturing cost can also be reduced.
  • the second back surface exposed portion 22 on which the second electronic element 25 is mounted and the non-exposed portions 42 and 52 on which the electronic elements 15 and 25 are not mounted are on one side (the side on the side of When the aspect positioned on the lower side is adopted, it is advantageous in that heat generated from the second electronic element 25 can be efficiently dissipated from the second back surface exposed portion 22 on the one side surface of the back surface.
  • the second electronic element 25 is placed.
  • the two rear surface exposed portions 22 and the non-exposed portions 42 and 52 in which the electronic elements 15 and 25 are not disposed can be arranged in a well-balanced manner. For this reason, the heat generated from the second electronic element 25 can be efficiently dissipated through the first back surface exposed portion 12.
  • the fourth non-exposed portion 42 is provided between the pair of second back surface exposed portions 22 in the longitudinal direction of the sealing portion 90, and the fifth non-exposed portion 52 is one side of the second back surface exposed portion 22 (FIG.
  • the fourth non-exposed portion 42 and the fifth non-exposed portion 52 can be provided while making the size of the second back surface exposed portion 22 as large as possible. It is beneficial in point.
  • the first back surface exposed portion 12 on which the first electronic element 15 is mounted, and the third back surface exposed portion 32 on which the electronic elements 15 and 25 are not mounted are on the other side (the center in the short side direction When the aspect positioned on the other side, the upper side in FIG. 2) is adopted, the heat generated from the first electronic element 15 is efficiently dissipated through the first back surface exposed portion 12 on the other side of the back surface It is useful in the point which can be done.
  • the first terminal portion 11 and the third terminal portion 31 are alternately arranged
  • the first terminal portion 11 which is easily susceptible to the heat generation from the first electronic element 15, the electronic element 15,
  • the third terminal portion 31 which is less susceptible to the effect of heat generation from 25 can be arranged in a well-balanced manner. For this reason, the heat generated from the first electronic element 15 can be efficiently dissipated through the first terminal portion 11.
  • the first back surface exposed portion 12 and the third back surface exposed portion 32 are alternately arranged, the first back surface exposed portion 12 on which the first electronic element 15 is mounted, the electronic element 15, It is possible to arrange in a well-balanced manner with the third rear surface exposed portion 32 where 25 is not arranged. Therefore, the heat generated from the first electronic element 15 can be efficiently dissipated from the first back surface exposed portion 12.
  • each of the first back surface exposed portion 12, the second back surface exposed portion 22, and the third back surface exposed portion is separately adopted, it is affected by high frequency and the like (noise and the like) in other terminal portions. It can be difficult.
  • the influence of high frequency (noise, etc.) may be a problem, so in the three-phase bridge circuit, the first back surface exposed portion 12, the second back surface exposed portion 22, and the third back surface exposed portion It is very useful to adopt an aspect in which each of the
  • heat can be dissipated uniformly by arranging the plurality of electronic elements 15 and 25 evenly. Also, by arranging the plurality of electronic elements 15 and 25 evenly in this manner, the electronic elements 15 and 25 can be mounted quickly, and productivity can be improved.
  • the "equal" in the present embodiment means that the distances between the plurality of first electronic elements 15 have the same value, and the distances between the plurality of second electronic elements 25 have the same value, and the longitudinal direction of the electronic module (see FIG.
  • the plurality of second electronic elements 25 are disposed on one side (the lower side in FIG. 2) than the center line extending in the left and right direction of 2) and the plurality of first electronic elements on the other side (the upper side in FIG.
  • first electronic device 15 means that the first electronic device 15 and the second electronic device 25 are arranged in a nested manner.
  • a plurality of (three in the embodiment of FIG. 2) second electronic elements 25 at equal intervals in the left and right direction below the longitudinal center line of the electronic module in FIG. 2 and a plurality of (three in the embodiment of FIG. 2) first electronic elements 15 are arranged at equal intervals in the left and right direction above the longitudinal center line in the left and right direction.
  • the two-electron device 25 is disposed in a nested state.
  • a wire may be used instead of the first connector 60 and / or the second connector 70.
  • the connectors 60 and 70 When the connectors 60 and 70 such as clips are used, the connectors 60 and 70 need to be prepared in advance, but the connectors 60 to be prepared by arranging the plurality of electronic elements 15 and 25 equally. 70 types can be reduced.
  • the length of the first connector 60 that connects the vertical surface and the second back surface exposed portion 22 can be approximately the same length. For this reason, it is useful in the point which can be made into one type of 1st connection element 60 which connects the electronic devices 15 and 25 and back surface exposure part 12,22, 32, for example.
  • the first connectors 60 connecting the electronic elements 15 and 25 and the back surface exposed portions 12, 22 and 32 into one type in this way, the amount of current flowing through each first connector 60 is approximately the same. It is also beneficial in that it can be a value.
  • a fourth non-exposed portion 42 is provided between the pair of second back surface exposed portions 22, and a fifth non-exposed portion 52 is provided on one side of the second back surface exposed portion 22.
  • the longitudinal surface and the length of the second connector 70 can be approximately the same length. For this reason, it is useful in the point which can be made into one type of 2nd connection element 70 which connects the non-exposed parts 42 and 52 and the electronic devices 15 and 25, for example.
  • the second connector 70 connecting the non-exposed portions 42 and 52 and the electronic elements 15 and 25 into one type in this way if the electronic elements 15 and 25 are the same, the same current can be used for the electrons. It is useful in that the elements 15 and 25 can be controlled.
  • the front surface of the first electronic element 15 is connected to the second back surface exposed portion 22, and the front surface of the second electronic element 25 is connected to the third back surface exposed portion 32.
  • the first terminal portion 11 can be used as an input terminal
  • the second terminal portion 21 can be used as an output terminal
  • the third terminal portion 31 can be used as a ground terminal. Therefore, the current input from one side (upper side in FIG. 2) of the electronic module in the lateral direction can flow to the other side (lower side in FIG. 2) in the lateral direction of the electronic module, and the current is U-turned. do not do. Therefore, the wiring length can be suppressed, and as a result, the impedance and the inductance can be reduced.
  • the electronic module can be miniaturized, and the cost can be reduced.
  • a groove 150 may be provided on the front surface of the back surface exposed portion 12, 22, 32 of the back surface exposed conductor 10, 20, 30.
  • the groove 150 may be provided in each of the back surface exposed conductors 10, 20, 30 as shown in FIG. 12, or may be provided in only a part of the back surface exposed conductors 10, 20, 30.
  • the central portions of the pressing holes or pressing marks 110, 120, 130 are connected to the grooves 150 with the connectors 60, 70 or the electronic elements 15, 25. It may be provided on the opposite side of
  • the groove 150 in the present embodiment does not penetrate the back surface exposed portions 12, 22 and 32, and the recess formed in the back surface exposed portions 12, 22 and 32 is the groove 150.
  • the present invention is not limited to such an aspect, and the groove 150 may penetrate the back surface exposed portions 12, 22, 32.
  • the entire pressing holes or pressing marks 110, 120, 130 , 70 or the opposite side of the electronic elements 15, 25 are provided on the opposite side of the grooves 150, in the longitudinal direction of the sealing part 90 in the in-plane direction (the third direction in FIG. 13). Further, with respect to all the grooves 150, in the longitudinal direction of the sealing portion 90 in the in-plane direction, the entire pressing holes or pressing marks 110, 120, 130 connect the grooves 60 with the connectors 60, 70 or the electronic elements 15, 25. It may be provided on the opposite side of
  • the grooves 150 in the longitudinal direction of the sealing part 90 in the in-plane direction (the third direction in FIG. 13), only a part of the pressing holes or pressing marks 110, 120, 130 is connected to the grooves 150 It may be provided on the opposite side of the element 60, 70 or the electronic element 15, 25. Further, with respect to all the grooves 150, in the longitudinal direction of the sealing portion 90 in the in-plane direction, only a part of the pressing holes or the pressing marks 110, 120, 130 are the connectors 60, 70 or the electronic elements 15 with respect to the grooves 150. , 25 may be provided on the opposite side.
  • a plurality of types of grooves 150 may be mixed, and in a part of the plurality of back surface exposed conductors 10, 20, 30, in the longitudinal direction of the sealing portion 90 in the in-plane direction, the pressing holes or pressing marks 110, 120. , 130 are provided on the opposite side of the connectors 60, 70 or the electronic elements 15, 25 with respect to the groove 150, and in the longitudinal direction of the sealing portion 90 in the in-plane direction in part or all of the remaining part. Only part of the pressing holes or pressing marks 110, 120, 130 may be provided on the opposite side of the connectors 60, 70 or the electronic elements 15, 25 with respect to the groove 150.
  • a portion of the first pressing mark 110 is opposite to the first electronic element 15 provided in the first back surface exposed portion 12 with respect to the groove 150 provided in the first back surface exposed portion 12.
  • the entire second pressing mark 120 is provided on the opposite side of the second electronic element 25 provided in the second back surface exposed portion 22 with respect to the groove 150 provided in the second back surface exposed portion 22.
  • the third pressing mark 130 is partially provided on the opposite side of the first connector 60 provided in the third rear surface exposed portion 32 with respect to the groove 150 provided in the third rear surface exposed portion 32. It has become.
  • the grooves 150 may not be provided on the back surface non-exposed conductors 40 and 50.
  • the invention is not limited to such an aspect, and the grooves 150 may be provided on the back surface non-exposed conductors 40 and 50.
  • the central portion of the pressing hole or pressing mark 110, 120, 130 is provided on the opposite side of the connector 60, 70 or the electronic element 15, 25 with respect to the groove 150
  • the exposed portions 12, 22 and 32 on the opposite side to the groove 150 of the portion pressed by the pressing member are bent by bending the portion pressed by the pressing member such as the pressing pin to a certain extent. It can prevent rising. Therefore, it is possible to prevent the resin from coming around to the back surface side of the back surface exposed portions 12, 22 and 32, and it is possible to prevent the appearance defect and the generation of burrs.
  • the entire pressing holes or pressing marks 110, 120, 130 are provided on the opposite side of the connectors 60, 70 or the electronic elements 15, 25 with respect to the groove 150.
  • the portion pressed by the pressing member such as the pressing pin can be bent more reliably, and the back surface exposed portion 12, 22, 32 on the opposite side to the groove 150 of the portion pressed by the pressing member Can be more reliably prevented from rising.
  • the portion pressed by the pressing member such as the pressing pin can be bent to a certain extent, and the back surface exposed portions 12, 22 and 32 float up on the opposite side to the groove 150 of the portion pressed by the pressing member. Can be prevented to a certain extent.
  • the pressing hole or the pressing between the groove 150 and the rear surface exposed side terminal portion 11, 21, 31 among the rear surface exposing portions 12, 22, 32 Even when adopting the mode in which the marks 110, 120, 130 are positioned, it is possible to prevent the size in the in-plane direction from becoming large without providing a large space in the in-plane direction for pressing with the pressing pin. Is beneficial.
  • the design aspect can be appropriately changed. Is beneficial.
  • the present invention is not limited to this, and the characteristic configuration of the aspect of the first embodiment is not adopted, and the feature of the aspect of the present embodiment Configuration may be adopted.
  • the thickness T1 of the electronic element 15 and the first connector 60 may not be larger than the thickness T2 of the second connector 70.
  • the back surface exposed conductors 10, 20 and 30 are provided between the back surface exposed portions 12, 22 and 32 and the back surface exposed side terminal portions 11, 21 and 31, respectively.
  • the connecting portions 16, 26, 36 are not exposed. More specifically, connecting portions 16, 26 and 36 to which the back surface is not exposed are provided between the internal bending portions 13 to 33 and the back surface exposed portions 12 to 32.
  • the thickness of the connecting portions 16, 26, 36 is smaller than the thickness of the back surface exposed portions 12, 22, 32 and the thickness of the back surface exposed side terminal portions 11, 21, 31.
  • the thicknesses of the back surface exposed portions 12, 22, 32 and the thicknesses of the back surface exposed side terminal portions 11, 21, 31 become substantially the same, and the thicknesses of the connecting portions 16, 26, 36 become the back surface exposed portions 12, 22, 32.
  • This thickness is 0.7 to 0.9 times the thickness of the rear surface exposed side terminal portions 11, 21 and 31.
  • connection parts 16, 26, 36 By making the thickness of the connection parts 16, 26, 36 thinner than the thickness of the back surface exposed parts 12, 22, 32 and the thickness of the back surface exposed side terminal parts 11, 21, 31, the back surface exposed parts 12, 22, 32 and the back surface It is possible to prevent the formation of an unexpected exposed surface between the exposed side terminal portions 11, 21, and 31. That is, the thin connecting portions 16, 26, 36 are not provided as in the present embodiment, and the back surface exposed portions 12, 22, 32 having the same thickness and the back surface exposed side terminal portions 11, 21, 31 are continuous. When connected in a connected manner, a portion not sealed with the sealing resin may occur like a void at the boundary between the back surface exposed portion 12, 22 and 32 and the back surface exposed side terminal portion 11, 21 and 31. .
  • the connecting portions 16, 26, 36 located at the boundary between the back surface exposed portions 12, 22, 32 and the terminal portion are exposed at the back surface, resulting in appearance defect. Also, the commercial value is lowered or not accepted as a product. Therefore, by providing the connecting portions 16, 26, 36 as in the present embodiment, the sealing resin is sealed at the boundary between the back surface exposed portions 12, 22, 32 and the back surface exposed side terminal portions 11, 21, 31. It is useful to prevent the occurrence of unstopped parts.
  • the widths of the connecting portions 16, 26, 36 may be substantially the same as the widths of the rear surface exposed side terminal portions 11, 21, 31. That is, although the connecting portions 16, 26, 36 are thinner than the back surface exposed terminal portions 11, 21, 31 only, their widths are substantially the same as the back surface exposed terminal portions 11, 21, 31. May be When such an aspect is adopted, it is advantageous in that the appearance from the front side or the back side can be improved.
  • the back surface exposed conductors 10, 20, and 30 have a peripheral back surface exposed conductor and an inner back surface exposed conductor provided at a position farther from the fastening member insertion portion 170 than the peripheral back surface exposed conductor.
  • the area of the backside exposed portion of the peripheral backside exposed conductor is smaller than the area of the backside exposed portion of the inner backside exposed conductor.
  • the members described in each of the above embodiments will be described with the same reference numerals.
  • the back surface exposed conductors 10, 20, 30 are pressed against the cooling body such as the heat sink or the casing 200 (see FIG. 10).
  • the cooling efficiency will be high.
  • the peripheral rear surface exposed conductor close to the fastening member insertion portion 170 is more strongly pressed against the cooling body than the inner rear surface exposed conductor, and thus the cooling efficiency is higher.
  • the area of the back surface exposed portion 12a, 22a, 32a of the peripheral back surface exposed conductor 10a, 20a, 30a is the area of the back surface exposed portion 12b, 22b, 32b of the inner back surface exposed conductor 10b, 20b, 30b.
  • the back surface exposed portions 12a, 22a, 32a of the peripheral back surface exposed conductors 10a, 20a, 30a have inclined portions 19, 29, 39, and by providing the inclined portions 19, 29, 39, the back surface exposed portion 12, The area of 22 and 32 may become small.
  • the embodiment in which the inclined portions 19, 29, 39 are provided as described above is advantageous in that the processing is easy even if the area of the back surface exposed portions 12, 22, 32 is reduced.
  • a pair of fastening member insertion portions 170 is provided.
  • the back surface exposure of the peripheral back surface exposed conductors 10a and 30a on one side is compared with the area of the back surface exposed portions 12b, 22b and 32b of the inner back surface exposed conductors 10b, 20b and 30b.
  • the reduction amount of the portions 12a and 32a may be larger than the reduction amount of the rear surface exposed portion 22a of the peripheral surface rear surface exposed conductor 20a on the other side (right side in FIG. 15).
  • the reduction amount of the back surface exposed portions 22a, 32a of the peripheral surface back exposed conductors 20a, 30a may be increased.
  • Employing such an aspect is advantageous in that the size in the in-plane direction can be made smaller.
  • first back surface exposed conductor 11 first terminal portion (back surface exposed side terminal portion) 12 1st back side exposed part (back side exposed part) 15 First Electron Device (Electronic Device) 16 connecting part 20 second back exposed conductor 21 second terminal (back exposed side terminal) 22 second back surface exposed part (back surface exposed part) 25 Second Electronic Device (Electronic Device) 26 connecting portion 30 third rear surface exposed conductor 31 third terminal portion (rear surface exposed side terminal portion) 32 Third back surface exposed area (back surface exposed area) 36 Connecting part 40 first back surface unexposed conductor (back surface unexposed conductor) 50 2nd backside unexposed conductor (backside unexposed conductor) 60 first connector 61 first connection base end 62 first connection tip 66 first hole 70 second connector 71 second connection base 72 second connection tip 76 second hole 90 sealing part

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Abstract

電子モジュールは、封止部90と、裏面が露出する裏面露出部12,22,32を有する裏面露出導体10,20,30と、裏面が露出しない裏面非露出導体40,50と、前記封止部90内に設けられ、前記裏面露出導体40,50のおもて面に設けられた電子素子15,25と、前記電子素子15,25を前記裏面露出導体10,20,30に電気的に接続するための第一接続子60と、前記電子素子15,25を前記裏面非露出導体40,50に電気的に接続するための第二接続子70と、を有している。前記第一接続子60の厚みT1は前記第二接続子70の厚みT2よりも厚くなっている。

Description

電子モジュール
 本発明は、封止部から裏面が露出した裏面露出部を有する電子モジュールに関する。
 従来から、自動車等の乗り物に用いられるインバータ回路やリレー回路に使用される電子モジュールが知られている。特許第5067679号では、電源端子、出力端子及びグランド端子を有する電子モジュールが開示されている。このような電子モジュールでは電子素子からの放熱効率を高めることが望ましい。このため、端子部を有する導体の裏面をモールド樹脂等の封止部から露出させることも考えられる。
 導体の裏面を露出させる場合、樹脂封止する際に導体の裏面側に樹脂が回り込んでしまう可能性がある。このように裏面に樹脂が回り込んでしまうと、外観不良となったりバリが発生したりすることになり、製品としては問題となる。
 このような点に鑑み、本発明は、第二接続子の接続の不良を抑制して、信頼性を向上することができる電子モジュールを提供する。
[概念1]
 本発明による電子モジュールは、
 封止部と、
 裏面が露出する裏面露出部を有する裏面露出導体と、
 裏面が露出しない裏面非露出導体と、
 前記封止部内に設けられ、前記裏面露出導体のおもて面に設けられた電子素子と、
 前記電子素子を前記裏面露出導体に電気的に接続するための第一接続子と、
 前記電子素子を前記裏面非露出導体に電気的に接続するための第二接続子と、
 を備え、
 前記第一接続子の厚みが前記第二接続子の厚みよりも厚くなってもよい。
[概念2]
 本発明の概念1による電子モジュールにおいて、
 前記裏面露出導体及び前記裏面非露出導体の厚みよりも第一接続子の厚みは薄くなってもよい。
[概念3]
 本発明の概念1又は2による電子モジュールにおいて、
 前記第一接続子の厚みは前記第二接続子の厚みの1.2倍以上1.5倍以下となってもよい。
[概念4]
 本発明の概念1乃至3のいずれか1つによる電子モジュールにおいて、
 前記第一接続子は第一接続基端部及び第一接続先端部を有し、
 前記第一接続基端部及び前記第一接続先端部の各々には第一穴部が設けられてもよい。
[概念5]
 本発明の概念1乃至4のいずれか1つによる電子モジュールにおいて、
 前記第二接続子は第二接続基端部及び第二接続先端部を有し、
 前記第二接続基端部の幅は前記第二接続先端部の幅よりも大きくてもよい。
[概念6]
 本発明の概念5による電子モジュールにおいて、
 前記第二接続基端部に第二穴部が設けられ、第二接続先端部に穴部が設けられていなくてもよい。
[概念7]
 本発明の概念1乃至6のいずれか1つによる電子モジュールにおいて、
 前記裏面露出導体は、前記封止部の側面から外方に突出する端子部と、前記裏面露出部と前記端子部との間に設けられ、裏面が露出しない連結部を有し、
 前記連結部の厚みは、前記裏面露出部の厚み及び前記端子部の厚みよりも薄くなっていてもよい。
[概念8]
 本発明の概念1乃至7のいずれか1つによる電子モジュールは、
 前記封止部の周縁部に設けられ、締結部材を挿入するための締結部材挿入部をさらに備え、
 前記裏面露出導体が、周縁裏面露出導体と、前記周縁裏面露出導体よりも前記締結部材挿入部から離れた位置に設けられた内方裏面露出導体とを有し、
 周縁裏面露出導体の裏面露出部の面積が、内方裏面露出導体の裏面露出部の面積よりも小さくなってもよい。
[概念9]
 本発明の概念8による電子モジュールにおいて、
 一対の締結部材挿入部が設けられ、
 前記内方裏面露出導体の前記裏面露出部の面積と比較した、一方側における周縁裏面露出導体の裏面露出部の減少量は、他方側における周縁裏面露出導体の裏面露出部の減少量よりも大きくてもよい。
 本発明で、電子素子を裏面露出導体に電気的に接続するための第一接続子の厚みが、電子素子を裏面非露出導体に電気的に接続するための第二接続子の厚みよりも厚くなっている態様を採用した場合には、封止樹脂を流し込む際に押圧ピン等の押圧部材によって裏面露出部が押圧された際に、第一接続子によって裏面露出部が浮き上がることを防止できる。このため、裏面露出部の裏面側に樹脂が回り込むことを防止でき、ひいては、外観不良やバリの発生を防止できる。
図1(a)は、本発明の第1の実施の形態で用いられうる第一接続子の厚みを説明するための側方図であり、図1(b)は、本発明の第1の実施の形態で用いられうる第二接続子の厚みを説明するための側方図である。 図2は、本発明の第1の実施の形態による電子モジュールの封止部を示していない平面図である。 図3は、本発明の第1の実施の形態による電子モジュールの平面図である。 図4は、本発明の第1の実施の形態で用いられうる第一接続子及び第二接続子の平面図である。 図5は、本発明の第1の実施の形態で用いられうる第二端子部、第四端子部及び第五端子部等の関係を説明するための斜視図である。 図6は、本発明の第1の実施の形態で用いられうる第一端子部及び第三端子部等の関係を説明するための斜視図である。 図7は、本発明の実施の形態による電子モジュールにおける回路図である。 図8は、本発明の第1の実施の形態による電子モジュールの底面図である。 図9(a)は、本発明の第1の実施の形態で用いられうる第一接続子と電子素子及び裏面露出部との関係を示した側方図であり、図9(b)は、本発明の第1の実施の形態で用いられうる第二接続子と非露出部、電子素子及び裏面露出部との関係を示した側方図である。 図10は、本発明の実施の形態による電子モジュールを放熱シート上に載置した態様を示した側方図である。 図11(a)は、本発明の第1の実施の形態で用いられうる第二接続子を拡大した平面図であり、図11(b)は、本発明の第1の実施の形態で用いられうる第二接続子を拡大した側方図であって、図2の矢印Aから見た側方図である。 図12は、本発明の第2の実施の形態による電子モジュールの封止部を示していない平面図である。 図13は、本発明の第2の実施の形態による電子モジュールの平面図であり、封止部を半透明で示した図である。 図14(a)は、本発明の第3の実施の形態による電子モジュールで用いられうる第一裏面露出導体の側方図であり、図14(b)は、本発明の第3の実施の形態による電子モジュールで用いられうる第二裏面露出導体の側方図であり、図14(c)は、本発明の第3の実施の形態による電子モジュールで用いられうる第三裏面露出導体の側方図である。 図15は、本発明の第4の実施の形態による電子モジュールの封止部を示していない平面図である。 図16(a)は、本発明の実施の形態で用いられうる第二接続子を第二接続先端部側から見た斜視図であり、図16(b)は、本発明の実施の形態で用いられうる第二接続子を底面側から見た図である。
第1の実施の形態
《構成》
 図2に示すように、本実施の形態の電子モジュールは、封止部90(図3参照)と、封止部90の側面から外方に突出する裏面露出側端子部11,21,31と、裏面が露出する裏面露出部12,22,32(図8参照)とを有する裏面露出導体10,20,30と、封止部90の側面から外方に突出する裏面非露出側端子部41,51を有し、裏面が露出しない裏面非露出導体40,50と、封止部90内に設けられ、裏面露出導体10,20,30のおもて面にはんだ等の導電性接着剤190(図1参照)を介して設けられた複数の電子素子15,25と、第一接続子60及び第二接続子70を有する接続子60,70と、を有してもよい。本実施の形態において、電子モジュールの封止部90の裏面側からおもて面側に向かう方向を含む方向を「第一方向」と呼び、第一方向を法線とする平面内の方向(図2の第二方向及び第三方向を含む面内方向)を「面内方向」と呼ぶ。
 本実施の形態の第一接続子60は裏面露出導体10,20,30と電子素子15,25とを電気的に接続し、第二接続子70は裏面非露出導体40,50と電子素子15,25とを電気的に接続するようになっている。一例として、第一接続子60は裏面露出導体20,30のおもて面と第一電子素子15又は第二電子素子25のおもて面に設けられたソース電極等とを導電性接着剤190を介して接続し、第二接続子70は裏面非露出導体40,50のおもて面と第一電子素子15又は第二電子素子25のおもて面に設けられたゲート電極等とを導電性接着剤190を介して接続してもよい。但し、これに限られることはなく、接続子60,70は2つの裏面露出導体10,20,30同士又は2つの裏面非露出導体40,50同士を接続してもよく、例えば第一接続子60が2つの裏面露出導体10,20,30同士を接続し、第二接続子70が2つの裏面非露出導体40,50同士を接続してもよい。
 電子素子15,25を裏面露出導体10,20,30に電気的に接続するための第一接続子60の厚みT1(図1(a))は、電子素子15,25を裏面非露出導体40,50に電気的に接続するための第二接続子70の厚みT2(図1(b)参照)よりも厚くなってもよい。また、裏面露出導体10,20,30及び裏面非露出導体40,50の厚みよりも第一接続子60の厚みT1は薄くなってもよい。
 第一接続子60の厚みT1は第二接続子70の厚みT2の1.2倍以上1.5倍以下となってもよい。
 図4に示すように、第一接続子60は、第一接続基端部61と、電子素子15,25に導電性接着剤190を介して接続される第一接続先端部62を有し、第一接続基端部61及び第一接続先端部62の各々に第一穴部66が設けられてもよい。第一接続基端部61の幅と第一接続先端部62の幅は略同一となってもよい。本実施の形態において「略同一」とは、両者の差が大きい方の値の5%以内にあることを意味し、例えば、第一接続基端部61の幅と第一接続先端部62の幅の内、大きな値をW1とし小さな値をW0としたときに、W1-W0≦0.05×W1となることを意味している。
 図4に示すように、第二接続子70は第二接続基端部71及び第二接続先端部72を有し、第二接続基端部71の幅は第二接続先端部72よりも大きくなってもよい。図11(a)に示すように、第二接続子70は第二接続基端部71を有し、第二接続基端部71には第二穴部76が設けられ、第二接続先端部72には第二穴部(穴部)76が設けられなくてもよい。図11(b)に示すように、第二接続先端部72は、裏面側に突出した裏面側突出部72aを有してもよい(図16も参照)。
 図5及び図6に示すように、裏面露出導体10,20,30は封止部90内で曲がった内部屈曲部13,23,33を有してもよい。他方、裏面非露出導体40,50は内部屈曲部を有さなくてもよい。より具体的には、裏面露出導体10,20,30は、裏面露出側端子部11,21,31と裏面露出部12,22,32との間に設けられ、裏面露出部12,22,32から裏面露出側端子部11,21,31側(おもて面側)に曲がった内部屈曲部13,23,33を有してもよい。
 裏面非露出導体40,50は裏面露出部12,22,32よりもおもて面側に位置してもよい。
 裏面非露出導体40,50は、封止部90内に封入された非露出部42,52を有してもよい。
 電子素子15,25は例えばMOSFET等の半導体素子であり、電子モジュールは例えば半導体モジュールであってもよい。本実施の形態では、裏面露出部12,22,32と裏面露出側端子部11,21,31とが一体になり、非露出部42,52と裏面非露出側端子部41,51とが一体になっている態様を用いて説明するが、これに限られることはなく、裏面露出部12,22,32と裏面露出側端子部11,21,31とが別体になり、互いに接着されてもよく、また非露出部42,52と裏面非露出側端子部41,51とが別体になり、互いに接着されてもよい。
 裏面露出導体10,20,30は、第一裏面露出導体10、第二裏面露出導体20及び第三裏面露出導体30を有してもよい。第一裏面露出導体10は、第一端子部11及び第一裏面露出部12と、第一端子部11及び第一裏面露出部12の間に設けられた第一内部屈曲部13とを有してもよい。第二裏面露出導体20は、第二端子部21及び第二裏面露出部22と、第二端子部21及び第二裏面露出部22の間に設けられた第二内部屈曲部23とを有してもよい。第三裏面露出導体30は、第三端子部31及び第三裏面露出部32と、第三端子部31及び第三裏面露出部32の間に設けられた第三内部屈曲部33とを有してもよい。
 裏面非露出側端子部41,51は、第四裏面非露出導体40及び第五裏面非露出導体50を有してもよい。第四裏面非露出導体40は、第四端子部41及び第四非露出部42を有してもよい。第五裏面非露出導体50は、第五端子部51及び第五非露出部52を有してもよい。
 図2に示すように、電子素子15,25は、第一裏面露出部12に載置された第一電子素子15と、第二裏面露出部22に載置された第二電子素子25とを有してもよい。図3に示すように、第二端子部21及び裏面非露出側端子部41,51は、封止部90における一側面(図3の下側の面)から外方へ突出してもよい。
 図2に示すように、第二裏面露出導体20は複数設けられてもよい。少なくとも一対の第二裏面露出部22の間に裏面非露出側端子部41,51が設けられてもよく、一対の第二端子部21の間に第四端子部41及び第五端子部51が一つずつ設けられてもよい。図2に示す態様では、一対の第二裏面露出部22の間に、第四端子部41と一体になった第四非露出部42が設けられ、第五端子部51と一体になった第五非露出部52が、第二裏面露出部22の一側面側(図2の下側)に設けられている。裏面非露出側端子部41,51の各々は電子素子15,25に接続されてもよい。図2に示す態様では、第五端子部51は第二電子素子25に第二接続子70で接続されており、第二電子素子25を制御するために用いられ、第四端子部41は第一電子素子15に第二接続子70で接続されており、第一電子素子15を制御するために用いられる。
 図2に示すように、第三裏面露出部32には、電子素子15,25が載置されなくてもよい。図3に示すように、第一端子部11及び第三端子部31は、封止部90における他側面(図3の上側の面)から外方へ突出してもよい。第一端子部11及び第三端子部31は交互に配置されてもよい。
 裏面露出導体10,20,30及び裏面非露出導体40,50は、例えば、銅、銅合金等からなり、全面又は部分的にスズめっき処理やニッケルめっき処理等が施されていてもよい。封止部90としてはエポキシ樹脂等を用いてもよい。
 電子モジュールとしては、例えばパワー電子モジュールを用いてもよい。第一電子素子15及び第二電子素子25としては、例えばMOSFETを用いてもよい。本実施の形態による電子モジュールの回路図は例えば図7に示すようになっている。図7に示す態様では第一電子素子15及び第二電子素子25がMOSFETであり、図2において、第一電子素子15であるMOSFETのドレインが第一裏面露出部12側に位置し、ソースが第一裏面露出部12と反対側(おもて面側)に位置し、また、第二電子素子25であるMOSFETのドレインが第二裏面露出部22側に位置し、ソースが第二裏面露出部22と反対側(おもて面側)に位置する。
 第一裏面露出導体10、第二裏面露出導体20及び第三裏面露出部30は互いに接続されてもよい。一例としては、第一裏面露出部12と第二裏面露出部22が、第一接続子60又はワイヤ(図示せず)によって接続されてもよい。また、第二裏面露出部22と第三裏面露出部30が、第一接続子60又はワイヤ(図示せず)によって接続されてもよい。なお、接続子60,70としては例えば銅クリップを用いることができ、ワイヤとしては例えばアルミワイヤを用いることができる。なお、幅の太い接続子60,70を用いることで流れる電流量を上げることができる。
 第一裏面露出部12、第二裏面露出部22及び第三裏面露出部32は、図10に示すように、放熱シート210、放熱性の接着剤等を介して筐体200上に載置されてもよい。
 図3に示すように、第一端子部11、第二端子部21、第三端子部31、第四端子部41及び第五端子部51の各々がおもて面側に屈曲されてもよい。
 本実施の形態の電子モジュールは3相ブリッジ回路となっていてもよい。3つある出力端子のうちのいずれかがU相コイルに接続され、別の1つがV相コイルに接続され、残りの1つがW相コイルに接続されてもよい。
 より具体的には、図7において、第一電子素子15であるMOSFETのドレインが電源ライン側に接続され、ソースが第二電子素子25であるMOSFETのドレインに接続され、このMOSFETのソースはグランドに接続されてもよい。そして、第一電子素子15と第二電子素子25との接続点は、モータのU相コイル、V相コイル又はW相コイルに接続されてもよい。
 内部屈曲部13,23,33が設けられている場合には、非露出部42,52と第二接続子70との接続面(導電性接着剤190を介して接触する態様も含む。)と、裏面露出部12,22,32と第一接続子60との接続面(導電性接着剤190を介して接触する態様も含む。)は、高さ方向の位置が異なることになる。より具体的には、図9に示す態様では、第二接続基端部71の第四非露出部42との接続面の高さ位置及び第二接続基端部71の第五非露出部52との接続面の高さ位置は、第一接続基端部61の第二裏面露出部22との接続面の高さ位置及び第一接続基端部61の第三裏面露出部32との接続面の高さ位置よりも高くなっている。
 図3及び図8に示すように、封止部90の周縁部に、電子モジュールをヒートシンクや筐体200等に固定するためのネジ等の締結部材を挿入するための締結部材挿入部170が設けられてもよい。
《作用・効果》
 次に、上述した構成からなる本実施の形態による作用・効果のうち、まだ説明していないものについて説明する。なお、「作用・効果」で説明するあらゆる態様を、上記構成で採用することができる。
 本実施の形態において、電子素子15,25を裏面露出導体10,20,30に電気的に接続するための第一接続子60の厚みT1が、電子素子15,25を裏面非露出導体40,50に電気的に接続するための第二接続子70の厚みT2よりも厚くなっている態様を採用した場合には(図1参照)、封止樹脂を流し込む際に押圧ピン等の押圧部材によって裏面露出部12,22,32が押圧された際に、第一接続子60によって裏面露出部12,22,32が浮き上がることを防止できる。このため、裏面露出部12,22,32の裏面側に樹脂が回り込むことを防止でき、ひいては、外観不良やバリの発生を防止できる。
 第一接続子60の厚みT1が第二接続子70の厚みT2の1.2倍より小さいと、裏面露出部12,22,32に対する第一接続子60による押圧力が小さくなってしまうことがある。他方、第一接続子60の厚みT1が第二接続子70の厚みT2の1.5倍よりも大きいと、第一接続子60の重さが重くなりすぎ、第一接続子60の裏面側に配置されるはんだ等の導電性接着剤190の厚みを十分に保てず、結果として、信頼性が下がってしまうことがある。このため、第一接続子60の厚みT1が第二接続子70の厚みT2の1.2倍以上1.5倍以下となっていることは有益である。
 裏面露出導体10,20,30及び裏面非露出導体40,50の厚みよりも第一接続子60の厚みT1が薄くなっている態様を採用した場合には、第一接続子60の重さが重くなりすぎることを防止でき、ひいては、第一接続子60の裏面側に配置されるはんだ等の導電性接着剤190の厚みを十分に保つことができる。
 第一接続基端部61及び第一接続先端部62の各々に第一穴部66が設けられている態様を採用した場合には、第一接続基端部61及び第一接続先端部62の各々の裏面に、はんだ等の導電性接着剤190が接着しているかを目視で確認できる点で有益である。
 図11(a)に示すように、第二接続基端部71の幅が第二接続先端部72の幅よりも大きい態様を採用した場合には、第二接続子70の面内方向における大きさを小さくできる点で有益である。第二接続基端部71に第二穴部76が設けられている態様を採用した場合には、第二接続基端部71の裏面に、はんだ等の導電性接着剤190が接着しているかを目視で確認できる点で有益である。他方、第二接続先端部72の幅が第二接続基端部71の幅よりも狭い態様を採用した場合は、第二接続先端部72に第二穴部76が設けられなくてもよい。第二接続先端部72の幅が狭い場合には、第二穴部76を設けなくても第二接続先端部72にはんだ等の導電性接着剤190が接着しているかを目視で確認できるためである。
 本実施の形態において、第一接続子60が各裏面露出部12,22,32に対応して設けられ、かつ、封止樹脂を流し込む際に各裏面露出部12,22,32が押圧ピン等の押圧部材によって押圧される態様を採用した場合には、裏面露出部12,22,32を押圧しつつ、かつ接続子60,70によって押圧されていない箇所が浮き上がってしまうことを防止できる。このため、裏面露出部12,22,32の裏面側に樹脂が回り込むことを防止でき、ひいては、外観不良やバリの発生を防止できる。
 封止部90のおもて面には、押圧孔又は押圧痕110,120,130が設けられてもよい(図3参照)。押圧孔は封止部90におもて面に設けられた孔であり、例えば、裏面露出導体10,20,30を押圧ピンで押圧した後で、その一部が封止部90で封入されたものである。押圧痕110,120,130は、例えば、裏面露出導体10,20,30を押圧ピンで押圧した後で、その全部が封止樹脂で封止されたものである。このように全部を封止樹脂で封入したとしても、一般には、元々の封止部と後々に埋め込まれた封止樹脂との間に境界線が形成され、当該境界線によって区切られた領域が押圧痕110,120,130になる(図3参照)。このような押圧孔及び押圧痕110,120,130によって、各裏面露出導体10,20,30が押圧ピン等の押圧部材によって押圧されたかどうかを判断できる。図3に示す態様では、第一裏面露出導体10に対する第一押圧痕110、第二裏面露出導体20に対する第二押圧痕120及び第三裏面露出導体30に対する第三押圧痕130が示されている。
 本実施の形態において、電子素子15,25が載置される裏面露出部12,22,32の裏面が露出している態様を採用した場合には放熱効果を期待できる(図2及び図8参照)。また、他方、非露出部42,52が封止部90内に封入されている態様を採用した場合には、裏面非露出導体40,50が封止部90から抜け出てしまう可能性を低減できる。この場合には、非露出部42,52が裏面から露出していないので、封止部90のバリが原因となって非露出部42,52に関して外観不良が生じることもない。一般的には、幅が細い場合には樹脂で封入する際に押さえることが難しく、封止部90に起因するバリが発生しやすいが、外部に露出しない非露出部42,52を採用することはバリが生じない点でも有益である。
 図5及び図6に示すような内部屈曲部13,23,33を有する態様を採用した場合には、図8に示すように、裏面露出導体10,20,30の封止部90における周縁部が封入されることになるので、裏面露出導体10,20,30が封止部90から抜け出てしまうことをより確実に防止できる。また、この内部屈曲部13,23,33を採用しつつ封止部90の裏面が平坦形状となっている態様を採用した場合には、封止部90の裏面に突出部等を設けることなく封止部90の裏面の周縁部において導体面が露出することを防止できる。このため、突出部に対応させてヒートシンクや筐体200等を加工する必要がない点でも有益である。
 なお、封止部90の裏面の周縁部において導体面が露出している場合には、予想外の箇所から電流が漏れ出てしまう可能性がある。これに対して、本実施の形態のような内部屈曲部13,23,33を採用することで、封止部90の裏面の周縁部において導体面が露出しないようにでき、その結果、予想外の箇所から電流が漏れ出てしまう可能性を低減でき、信頼性を高めることができる点で有益である。また、このような内部屈曲部13,23,33を採用することで、裏面露出側端子部11,21,31と裏面非露出側端子部41,51の高さ方向の位置を対応させつつ、裏面露出部12,22,32と非露出部42,52との間の距離を離すことができ、ひいては電子素子15,25と非露出部42,52との間の距離を離すことができ、電子素子15,25からの発熱で裏面非露出側端子部41,51を流れる電流に対して悪影響が出るのを防止できる。
 また、封止部90の裏面の周縁部において導体面が露出しないようにすることで、放熱シート95(図10参照)の大きさを小さくすることができ、製造コストを下げることもできる。
 図2に示すように、裏面が露出した第一裏面露出部12に第一電子素子15が載置される態様を採用した場合には、第一電子素子15から発生する熱を効率よく放熱することができる。また、同様に、裏面が露出した第二裏面露出部22に第二電子素子25が載置される態様を採用した場合には、第二電子素子25から発生する熱を効率よく放熱することができる。
 第二電子素子25が載置される第二裏面露出部22と電子素子15,25が載置されない非露出部42,52が一側面側(短手方向の中心より一側面側、図2の下側)に位置づけられる態様を採用した場合には、裏面の一側面側において、第二電子素子25から発生する熱を第二裏面露出部22から効率よく放熱できる点で有益である。
 図2に示すように、封止部90の長手方向において、第二端子部21の間に第四端子部41及び第五端子部51が設けられている態様を採用した場合には、第二電子素子25からの発熱の効果を受けやすい第二端子部21と、電子素子15,25からの発熱の効果を受けにくい第四端子部41及び第五端子部51とをバランスよく配置することができる。このため、第二電子素子25から発生する熱を第二端子部21を介して効率よく放熱できる。
 封止部90の長手方向において、一対の第二裏面露出部22の間に非露出部42,52が設けられている態様を採用した場合には、第二電子素子25が載置された第二裏面露出部22と、電子素子15,25が配置されていない非露出部42,52とをバランスよく配置することができる。このため、第二電子素子25から発生する熱を第一裏面露出部12を介して効率よく放熱できる。
 封止部90の長手方向において一対の第二裏面露出部22の間に第四非露出部42が設けられ、第五非露出部52が第二裏面露出部22の一側面側(図2の下側)に設けられている態様を採用した場合には、第二裏面露出部22の大きさを極力大きなものとしながら、第四非露出部42及び第五非露出部52を設けることができる点で有益である。
 図2に示すように、第一電子素子15が載置される第一裏面露出部12と、電子素子15,25が載置されない第三裏面露出部32が他側面側(短手方向の中心より他側面側、図2の上側)に位置づけられる態様を採用した場合には、裏面の他側面側において、第一電子素子15から発生する熱を第一裏面露出部12を介して効率よく放熱できる点で有益である。
 第一端子部11と第三端子部31が交互に配置されている態様を採用した場合には、第一電子素子15からの発熱の効果を受けやすい第一端子部11と、電子素子15,25からの発熱の効果を受けにくい第三端子部31とをバランスよく配置することができる。このため、第一電子素子15から発生する熱を第一端子部11を介して効率よく放熱できる。
 第一裏面露出部12と第三裏面露出部32が交互に配置されている態様を採用した場合には、第一電子素子15が載置された第一裏面露出部12と、電子素子15,25が配置されていない第三裏面露出部32とをバランスよく配置することができる。このため、第一電子素子15から発生する熱を第一裏面露出部12から効率よく放熱できる。
 第一裏面露出部12、第二裏面露出部22及び第三裏面露出部の各々が別体になった態様を採用した場合には、他の端子部における高周波等(ノイズ等)の影響を受けにくくすることができる。特に3相ブリッジ回路においては、高周波等(ノイズ等)の影響が問題となることがあるので、3相ブリッジ回路では、第一裏面露出部12、第二裏面露出部22及び第三裏面露出部の各々が別体になった態様を採用することは非常に有益である。
 図2に示すように、複数の電子素子15,25を均等に配列することで均一に放熱させることができる。また、このように複数の電子素子15,25を均等に配列することで、電子素子15,25の実装を迅速に行うことができ、生産性を高めることができる。本実施の形態の「均等」とは、複数の第一電子素子15の間の距離が同じ値となり、複数の第二電子素子25の間の距離が同じ値となり、電子モジュールの長手方向(図2の左右方向)に延びた中心線よりも一側面側(図2の下方側)に複数の第二電子素子25が配置され他側面側(図2の上方側)に複数の第一電子素子15が配置され、かつ、第一電子素子15と第二電子素子25とが入れ子状に配置されていることを意味している。一例としては、図2に示すように、電子モジュールの長手方向の中心線よりも図2の下側において左右方向で均等な間隔で複数(図2の態様では3つ)の第二電子素子25が配置され、長手方向の中心線よりも図2の上側において左右方向で均等な間隔で複数(図2の態様では3つ)の第一電子素子15が配置され、第一電子素子15と第二電子素子25とが入れ子状態に配置されている。なお、第一接続子60及び/又は第二接続子70の代わりにワイヤを用いることもできる。
 クリップ等の接続子60,70を用いた場合には、予め接続子60,70を準備する必要があるが、複数の電子素子15,25を均等に配列することで、準備する接続子60,70の種類を減らすことができる。一例として、図2に示す態様によれば、第二電子素子25のおもて面と第三裏面露出部32とを接続する第一接続子60の長さと、第一電子素子15のおもて面と第二裏面露出部22とを接続する第一接続子60の長さとを概ね同じ長さにすることができる。このため、電子素子15,25と裏面露出部12,22,32とを接続する第一接続子60を例えば一種類にすることができる点で有益である。また、このように電子素子15,25と裏面露出部12,22,32とを接続する第一接続子60を一種類にすることで、各第一接続子60に流れる電流の量を概ね同じ値にすることができる点でも有益である。
 また、図2に示すように、一対の第二裏面露出部22の間に第四非露出部42を設け、第五非露出部52を第二裏面露出部22の一側面側に設ける態様を採用した場合には、第四非露出部42と第一電子素子15のおもて面とを接続する第二接続子70の長さと、第五非露出部52と第二電子素子25のおもて面とを第二接続子70の長さとを概ね同じ長さにすることができる。このため、非露出部42,52と電子素子15,25とを接続する第二接続子70を例えば一種類にすることができる点で有益である。また、このように非露出部42,52と電子素子15,25とを接続する第二接続子70を一種類にすることで、電子素子15,25が同じであれば、同じ電流で当該電子素子15,25を制御できる点で有益である。
 一例として、図2に示すように、第一電子素子15のおもて面を第二裏面露出部22に接続し、第二電子素子25のおもて面を第三裏面露出部32に接続することで、第一端子部11を入力端子として用い、第二端子部21を出力端子とし、第三端子部31をグランド端子として用いることができる。このため、電子モジュールの短手方向の一方側(図2の上側)から入力された電流が電子モジュールの短手方向の他方側(図2の下側)に流れることができ、電流がUターンしない。このため、配線長を抑えることができ、その結果、インピーダンス及びインダクタンスを低減できる。また、電子モジュールを小型化することもできるし、低コスト化も可能となる。
第2の実施の形態
 次に、本発明の第2の実施の形態について説明する。
 図12に示すように、裏面露出導体10,20,30の裏面露出部12,22,32のおもて面には溝150が設けられてもよい。溝150は図12に示すように裏面露出導体10,20,30の各々に設けられてもよいし、裏面露出導体10,20,30の一部にだけ設けられてもよい。図13に示すように、面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の中心部が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられてもよい。本実施の形態の溝150は裏面露出部12,22,32を貫通せず、裏面露出部12,22,32に形成された凹部が溝150となっている。但し、このような態様に限られることはなく、溝150が裏面露出部12,22,32を貫通してもよい。
 少なくとも一部の溝150に関して、面内方向の封止部90の長手方向(図13の第三方向)において、押圧孔又は押圧痕110,120,130の全体が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられてもよい。また、全ての溝150に関して、面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の全体が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられてもよい。
 少なくとも一部の溝150に関して、面内方向の封止部90の長手方向(図13の第三方向)において、押圧孔又は押圧痕110,120,130の一部だけが溝150に対して接続子60,70又は電子素子15,25の反対側に設けられてもよい。また、全ての溝150に関して、面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の一部だけが溝150に対して接続子60,70又は電子素子15,25の反対側に設けられてもよい。
 複数種類の溝150が混在してもよく、複数の裏面露出導体10,20,30のうちの一部において、面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の全体が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられ、かつ、残部の一部又は全部において、面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の一部だけが溝150に対して接続子60,70又は電子素子15,25の反対側に設けられてもよい。
 図13に示す態様では、第一押圧痕110はその一部が、第一裏面露出部12に設けられた溝150に対して第一裏面露出部12に設けられた第一電子素子15の反対側に設けられ、第二押圧痕120はその全部が、第二裏面露出部22に設けられた溝150に対して第二裏面露出部22に設けられた第二電子素子25の反対側に設けられ、第三押圧痕130はその一部が、第三裏面露出部32に設けられた溝150に対して第三裏面露出部32に設けられた第一接続子60の反対側に設けられる態様となっている。
 図13に示すように、裏面非露出導体40,50には溝150が設けられなくてもよい。但し、このような態様に限られることはなく、裏面非露出導体40,50に溝150が設けられてもよい。
 面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の中心部が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられている態様を採用した場合には、押圧ピン等の押圧部材によって押圧される箇所を一定程度撓ませることで、押圧部材で押される箇所の溝150に対する反対側で裏面露出部12,22,32が浮き上がってしまうことを防止できる。このため、裏面露出部12,22,32の裏面側に樹脂が回り込むことを防止でき、ひいては、外観不良やバリの発生を防止できる。
 面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の全体が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられている態様を採用した場合には、押圧ピン等の押圧部材によって押圧される箇所をより確実に撓ませることができ、押圧部材で押される箇所の溝150に対する反対側で裏面露出部12,22,32が浮き上がってしまうことをより確実に防止できる。
 面内方向の封止部90の長手方向において、押圧孔又は押圧痕110,120,130の一部だけが溝150に対して接続子60,70又は電子素子15,25の反対側に設けられる態様を採用した場合でも、押圧ピン等の押圧部材によって押圧される箇所を一定程度撓ませることができ、押圧部材で押される箇所の溝150に対する反対側で裏面露出部12,22,32が浮き上がってしまうことを一定程度防止できる。また、このように押圧孔又は押圧痕110,120,130の一部だけが溝150に対して接続子60,70又は電子素子15,25の反対側に設けられる態様を採用した場合には、押圧ピンで押圧するための面内方向のスペースを大きく設ける必要がないことから、面内方向での大きさが大きくなることを防止できる点で有益である。
 面内方向の封止部90の短手方向(第二方向)において、裏面露出部12,22,32のうち溝150と裏面露出側端子部11,21,31との間に押圧孔又は押圧痕110,120,130が位置付けられる態様を採用した場合にも、押圧ピンで押圧するための面内方向のスペースを大きく設けることなく、面内方向での大きさが大きくなることを防止できる点で有益である。
 複数種類の溝150が混在し、押圧孔又は押圧痕110,120,130の全体が溝150に対して接続子60,70又は電子素子15,25の反対側に設けられる態様と、押圧孔又は押圧痕110,120,130の一部だけが溝150に対して接続子60,70又は電子素子15,25の反対側に設けられる態様とが混在する場合には、設計態様を適宜変更できる点で有益である。
 上記では、第1の実施の形態を前提として記載したが、これに限られることはなく、第1の実施の形態の態様の特徴的な構成を採用せず、本実施の形態の態様の特徴的な構成だけを採用してもよい。例えば、第1の実施の形態とは異なり、電子素子15,第一接続子60の厚みT1が、第二接続子70の厚みT2よりも厚くなっていなくてもよい。
第3の実施の形態
 次に、本発明の第3の実施の形態について説明する。
 本実施の形態では、図14に示すように、裏面露出導体10,20,30が、裏面露出部12,22,32と裏面露出側端子部11,21,31との間に設けられ、裏面が露出しない連結部16,26,36を有している。より具体的には、内部屈曲部13,23,33と裏面露出部12,22,32との間に、裏面が露出しない連結部16,26,36が設けられている。そして、連結部16,26,36の厚みが、裏面露出部12,22,32の厚み及び裏面露出側端子部11,21,31の厚みよりも薄くなっている態様となっている。一例として、裏面露出部12,22,32の厚み及び裏面露出側端子部11,21,31の厚みが略同一となり、連結部16,26,36の厚みが、裏面露出部12,22,32の厚み及び裏面露出側端子部11,21,31の厚みの0.7~0.9倍になっている。上記各実施の形態で採用したあらゆる構成を本実施の形態でも採用することができる。上記各実施の形態で説明した部材に対しては同じ符号を付して説明する。
 連結部16,26,36の厚みを裏面露出部12,22,32の厚み及び裏面露出側端子部11,21,31の厚みよりも薄くすることで、裏面露出部12,22,32と裏面露出側端子部11,21,31との間で予定しない露出面が形成されることを防止できる。つまり、本実施の形態のように厚みの薄い連結部16,26,36が設けられず、同じ厚みからなる裏面露出部12,22,32と裏面露出側端子部11,21,31とが連続的に連結される場合には、裏面露出部12,22,32と裏面露出側端子部11,21,31との境界においてボイドのように封止樹脂で封止されない部分が発生することがある。このように封止樹脂で封止されない部分が発生すると、裏面露出部12,22,32と端子部との境界に位置する連結部16,26,36が裏面で露出してしまい、外観不良となり、商品的価値が下がったり商品として受け入れられなかったりすることにもなる。このため、本実施の形態のような連結部16,26,36を設けることで、裏面露出部12,22,32と裏面露出側端子部11,21,31との境界において封止樹脂で封止されない部分が発生することを防止することは有益である。
 連結部16,26,36の幅は裏面露出側端子部11,21,31の幅と略同一であってもよい。つまり、連結部16,26,36は、裏面露出側端子部11,21,31と比較して厚みだけが薄くなるが、その幅が裏面露出側端子部11,21,31と略同一となってもよい。このような態様を採用した場合には、おもて面側又は裏面側からの見た目を良くすることができる点で有益である。
 上記では、各実施の形態を前提として記載したが、これに限られることはなく、各実施の形態の態様の特徴的な構成を採用せず、本実施の形態の態様の特徴的な構成だけを採用してもよい。
第4の実施の形態
 次に、本発明の第4の実施の形態について説明する。
 裏面露出導体10,20,30は、周縁裏面露出導体と、周縁裏面露出導体よりも締結部材挿入部170から離れた位置に設けられた内方裏面露出導体とを有している。周縁裏面露出導体の裏面露出部の面積は、内方裏面露出導体の裏面露出部の面積よりも小さくなっている。図15に示す態様では、図15の左側端部に位置する第二裏面露出導体20a及び第三裏面露出導体30aと、図15の右側端部に位置する第一裏面露出導体10aが周縁裏面露出導体となり、これら以外の裏面露出導体10,20,30が内方裏面露出導体10b,20b,30bとなる。上記各実施の形態で採用したあらゆる構成を本実施の形態でも採用することができる。上記各実施の形態で説明した部材に対しては同じ符号を付して説明する。
 締結部材挿入部170(図3参照)に締結部材が挿入されて締め付けられると、裏面露出導体10,20,30がヒートシンクや筐体200(図10参照)等の冷却体に押し付けられることになり、冷却効率が高くなる。締結部材挿入部170に近い周縁裏面露出導体では、内方裏面露出導体と比較して冷却体に強く押し付けられることになることから冷却効率がより高くなる。本実施の形態のように、周縁裏面露出導体10a,20a,30aの裏面露出部12a,22a,32aの面積を内方裏面露出導体10b,20b,30bの裏面露出部12b,22b,32bの面積よりも小さくすることで、各電子素子15,25に対する冷却効率を同程度としたり、面内方向の大きさを小さくしたりすることができる点で有益である。
 周縁裏面露出導体10a,20a,30aの裏面露出部12a,22a,32aは傾斜部19,29,39を有しており、当該傾斜部19,29,39が設けられることで裏面露出部12,22,32の面積が小さくなってもよい。このように傾斜部19,29,39を設ける態様を採用した場合には、裏面露出部12,22,32の面積を小さくするにしても、その加工が容易である点で有益である。
 本実施の形態では一対の締結部材挿入部170が設けられている。本実施の形態において、内方裏面露出導体10b,20b,30bの裏面露出部12b,22b,32bの面積と比較した、一方側(図15では左側)における周縁裏面露出導体10a,30aの裏面露出部12a,32aの減少量は、他方側(図15では右側)における周縁裏面露出導体20aの裏面露出部22aの減少量よりも大きくなってもよい。特に、幅の太い端子、図15に示す態様では第一端子部11及び第三端子部31の両方が設けられている側では幅の細い端子、図15に示す態様では第四端子部41及び第五端子部51が設けられている側と比較して端子による放熱も期待できることから、周縁裏面露出導体20a,30aの裏面露出部22a,32aの減少量を大きくしてもよい。このような態様を採用することで、面内方向の大きさをより小さくできる点で有益である。
 上記では、各実施の形態を前提として記載したが、これに限られることはなく、各実施の形態の態様の特徴的な構成を採用せず、本実施の形態の態様の特徴的な構成だけを採用してもよい。
 上述した各実施の形態の記載及び図面の開示は、請求の範囲に記載された発明を説明するための一例に過ぎず、上述した各実施の形態の記載又は図面の開示によって請求の範囲に記載された発明が限定されることはない。また、出願当初の請求項の記載はあくまでも一例であり、明細書、図面等の記載に基づき、請求項の記載を適宜変更することもできる。
10    第一裏面露出導体
11    第一端子部(裏面露出側端子部)
12    第一裏面露出部(裏面露出部)
15    第一電子素子(電子素子)
16    連結部
20    第二裏面露出導体
21    第二端子部(裏面露出側端子部)
22    第二裏面露出部(裏面露出部)
25    第二電子素子(電子素子)
26    連結部
30    第三裏面露出導体
31    第三端子部(裏面露出側端子部)
32    第三裏面露出部(裏面露出部)
36    連結部
40    第一裏面非露出導体(裏面非露出導体)
50    第二裏面非露出導体(裏面非露出導体)
60    第一接続子
61    第一接続基端部
62    第一接続先端部
66    第一穴部
70    第二接続子
71    第二接続基端部
72    第二接続先端部
76    第二穴部
90    封止部
 

Claims (9)

  1.  封止部と、
     裏面が露出する裏面露出部を有する裏面露出導体と、
     裏面が露出しない裏面非露出導体と、
     前記封止部内に設けられ、前記裏面露出導体のおもて面に設けられた電子素子と、
     前記電子素子を前記裏面露出導体に電気的に接続するための第一接続子と、
     前記電子素子を前記裏面非露出導体に電気的に接続するための第二接続子と、
     を備え、
     前記第一接続子の厚みは前記第二接続子の厚みよりも厚くなっていることを特徴とする電子モジュール。
  2.  前記裏面露出導体及び前記裏面非露出導体の厚みよりも第一接続子の厚みは薄くなっていることを特徴とする請求項1に記載の電子モジュール。
  3.  前記第一接続子の厚みは前記第二接続子の厚みの1.2倍以上1.5倍以下となっていることを特徴とする請求項1に記載の電子モジュール。
  4.  前記第一接続子は第一接続基端部及び第一接続先端部を有し、
     前記第一接続基端部及び前記第一接続先端部の各々には第一穴部が設けられていることを特徴とする請求項1に記載の電子モジュール。
  5.  前記第二接続子は第二接続基端部及び第二接続先端部を有し、
     前記第二接続基端部の幅は前記第二接続先端部の幅よりも大きいことを特徴とする請求項1に記載の電子モジュール。
  6.  前記第二接続基端部に第二穴部が設けられ、第二接続先端部に穴部が設けられていないことを特徴とする請求項5に記載の電子モジュール。
  7.  前記裏面露出導体は、前記封止部の側面から外方に突出する端子部と、前記裏面露出部と前記端子部との間に設けられ、裏面が露出しない連結部を有し、
     前記連結部の厚みは、前記裏面露出部の厚み及び前記端子部の厚みよりも薄くなっていることを特徴とする請求項1に記載の電子モジュール。
  8.  前記封止部の周縁部に設けられ、締結部材を挿入するための締結部材挿入部をさらに備え、
     前記裏面露出導体は、周縁裏面露出導体と、前記周縁裏面露出導体よりも前記締結部材挿入部から離れた位置に設けられた内方裏面露出導体とを有し、
     周縁裏面露出導体の裏面露出部の面積は、内方裏面露出導体の裏面露出部の面積よりも小さくなっていることを特徴とする請求項1に記載の電子モジュール。
  9.  一対の締結部材挿入部が設けられ、
     前記内方裏面露出導体の前記裏面露出部の面積と比較した、一方側における周縁裏面露出導体の裏面露出部の減少量は、他方側における周縁裏面露出導体の裏面露出部の減少量よりも大きいことを特徴とする請求項8に記載の電子モジュール。
     
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000243889A (ja) * 1999-02-22 2000-09-08 Sony Corp 半導体装置用リードフレームの形状加工装置及び形状加工方法並びに半導体装置用リードフレーム
US20070145573A1 (en) * 2005-11-30 2007-06-28 Ralf Otremba Semiconductor Device And Method For Producing The Same
JP2007335538A (ja) * 2006-06-13 2007-12-27 Sanken Electric Co Ltd 半導体装置の製法
JP2010267789A (ja) * 2009-05-14 2010-11-25 Renesas Electronics Corp 半導体装置
JP2011250491A (ja) * 2010-05-21 2011-12-08 Denso Corp 半導体モジュール、および、それを用いた駆動装置
JP2013197365A (ja) * 2012-03-21 2013-09-30 Toshiba Corp 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070057368A1 (en) * 2005-09-13 2007-03-15 Yueh-Se Ho Semiconductor package having plate interconnections
EP2674973B1 (en) * 2011-02-09 2019-12-11 Mitsubishi Electric Corporation Power semiconductor module
CN104025292B (zh) * 2011-12-22 2018-03-09 松下知识产权经营株式会社 半导体封装、其制造方法及模具、半导体封装的输入输出端子
JP2015144217A (ja) 2014-01-31 2015-08-06 株式会社東芝 コネクタフレーム及び半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000243889A (ja) * 1999-02-22 2000-09-08 Sony Corp 半導体装置用リードフレームの形状加工装置及び形状加工方法並びに半導体装置用リードフレーム
US20070145573A1 (en) * 2005-11-30 2007-06-28 Ralf Otremba Semiconductor Device And Method For Producing The Same
JP2007335538A (ja) * 2006-06-13 2007-12-27 Sanken Electric Co Ltd 半導体装置の製法
JP2010267789A (ja) * 2009-05-14 2010-11-25 Renesas Electronics Corp 半導体装置
JP2011250491A (ja) * 2010-05-21 2011-12-08 Denso Corp 半導体モジュール、および、それを用いた駆動装置
JP2013197365A (ja) * 2012-03-21 2013-09-30 Toshiba Corp 半導体装置

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