WO2019082239A1 - Dispositif d'égalisation et procédé d'égalisation - Google Patents

Dispositif d'égalisation et procédé d'égalisation

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Publication number
WO2019082239A1
WO2019082239A1 PCT/JP2017/038173 JP2017038173W WO2019082239A1 WO 2019082239 A1 WO2019082239 A1 WO 2019082239A1 JP 2017038173 W JP2017038173 W JP 2017038173W WO 2019082239 A1 WO2019082239 A1 WO 2019082239A1
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unit
symbol
output
neural network
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PCT/JP2017/038173
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English (en)
Japanese (ja)
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怜典 松本
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三菱電機株式会社
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Priority to PCT/JP2017/038173 priority Critical patent/WO2019082239A1/fr
Publication of WO2019082239A1 publication Critical patent/WO2019082239A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/04—Control of transmission; Equalising
    • H04B3/06—Control of transmission; Equalising by the transmitted signal

Definitions

  • the present invention relates to an equalizer and equalization method for equalizing non-linear distortion.
  • LAN local area network
  • LAN local area network
  • PAM pulse amplitude modulation
  • the signal equalizer compensates for distortion of the data signal generated in the optical transceiver and the communication path (optical transmission path).
  • a feed forward equalizer hereinafter referred to as FFE
  • FFE feed forward equalizer
  • a signal equalizer having a simple configuration a feed forward equalizer having a simple configuration.
  • FFE can not cope with non-linear distortion such as modulation instability, square wave detection distortion, and gain saturation that occurs in an optical transmitter / receiver that employs the PAM method.
  • non-linear distortion generated in an optical transmitter-receiver and an optical transmission path can be equalized by performing non-linear conversion in neuron elements constituting an intermediate layer.
  • Non-Patent Document 1 describes a non-linear equalizer in which the equalization accuracy of non-linear distortion with respect to PAM is improved by inputting a plurality of symbols in a digital quadrature modulation signal in block units and performing signal processing. It is done.
  • this non-linear equalizer in an optical communication device, high reception sensitivity that can not be obtained with FFE can be achieved without adding an optical amplifier and without adding an expensive and broadband electric amplifier with excellent linearity. it can.
  • the neural network of the nonlinear equalizer described in Non-Patent Document 1 performs signal processing by inputting a plurality of consecutive symbols in time series in block units, depending on the number of outputs, the neuron element of the input layer The number may be significantly less than the output layer.
  • the non-linear equalizer since the cross entropy is increased, the convergence accuracy of the local error is deteriorated in the updating of the connection weight using the error back propagation method.
  • the non-linear equalizer has a problem that the effect of reducing non-linear distortion is small.
  • the present invention solves the above-mentioned problems, and it is an object of the present invention to obtain an equalizer and an equalization method capable of enhancing the equalization accuracy of non-linear distortion.
  • the equalizer includes a neural network input unit, a neural network unit, a determination unit, a demodulation unit, and a connection weight update unit.
  • the neural network input unit inputs a signal including a plurality of consecutive symbols in time series, and outputs a surplus symbol not continuous in time series together with a target symbol continuous in time series included in the signal.
  • the neural network unit comprises an input layer, an intermediate layer and an output layer, the number of neuron elements in the input layer is larger than that in the output layer, the intermediate layer is one or more stages, and the output is from the neural network input unit
  • the likelihood of the target symbol is calculated by non-linear transformation of the multiplication sum of the selected symbol and the connection weight between the neuron elements.
  • the determination unit determines the likelihood of the symbol to be demodulated among the likelihoods output from the neural network unit.
  • the demodulation unit demodulates the symbol based on the likelihood determined by the determination unit.
  • the connection weight updating unit updates the connection weight in the neural network unit based on the symbols demodulated by the demodulation unit.
  • the neural network unit in which the number of neuron elements in the input layer is larger than that in the output layer inputs the surplus symbols not consecutive in time series together with the target symbol continuous in time series and Calculate the degree.
  • FIG. 2 is a block diagram showing an example of configuration of a neural network input unit in the first embodiment.
  • FIG. 2 is a block diagram showing a configuration example of a neural network unit in Embodiment 1. It is a figure which shows the internal structural example of the input layer of FIG. 3, an intermediate
  • 5 is a flowchart showing an equalization method according to Embodiment 1; It is a graph which shows the relationship between the reception average optical power of the received light received by the optical communication device, and a bit error rate.
  • FIG. 8 is a block diagram showing another configuration example of the neural network input unit in the first embodiment.
  • FIG. 8A is a block diagram showing a hardware configuration for realizing the function of the equalizer according to the first embodiment.
  • FIG. 8B is a diagram showing a hardware configuration that executes software for realizing the function of the equalization device according to the first embodiment.
  • FIG. 1 is a block diagram showing an example of the configuration of an equalization apparatus 1000 according to Embodiment 1 of the present invention.
  • the equalizer 1000 is mounted on, for example, an optical communication device.
  • Equalization apparatus 1000 includes an optical communication apparatus equipped with equalization apparatus 1000, an optical communication apparatus with which communication is performed with the optical communication apparatus, and non-linear distortion generated in each of the signal transmission paths between the two optical communication apparatuses.
  • the equalizer 1000 includes a photoelectric conversion unit 100, a received signal adjustment unit 200, a linear equalization unit 300, a neural network input unit 400, a neural network unit 500, a determination unit 600, a demodulation unit 700, and a connection weight update unit 800.
  • the photoelectric conversion unit 100 includes a photoelectric conversion element for converting an optical signal received from the above-mentioned optical communication device of the communication partner into an electric signal.
  • the optical signal is a signal of multi-level amplitude modulation format, and is composed of a plurality of time series continuous symbols. Each of the plurality of symbols is identified by an index number for each symbol, and the index number corresponds to the time series of symbols.
  • the photoelectric conversion unit 100 may include an oscillator that oscillates local oscillation light.
  • the photoelectric conversion unit 100 converts an analog electrical signal detected in the reception system of the optical communication device into a digital electrical signal (hereinafter referred to as a digital signal).
  • the converted digital signal is output from the photoelectric conversion unit 100 to the reception signal adjustment unit 200.
  • the reception signal adjustment unit 200 adjusts the delay of the electric signal output from the photoelectric conversion unit 100.
  • the received signal adjustment unit 200 changes the sampling rate of the digital signal output from the photoelectric conversion unit 100 using electrical processing.
  • the received signal adjustment unit 200 may perform processing such as restoration of the carrier frequency or phase.
  • the digital signal whose delay has been adjusted by the received signal adjustment unit 200 is output to the linear equalization unit 300.
  • the linear equalization unit 300 receives the digital signal output from the reception signal adjustment unit 200, and equalizes linear distortion of symbols included in the digital signal.
  • the linear distortion of a symbol is a linear distortion such as band limitation that occurs in an optical communication device of a communication counterpart, a photoelectric conversion element included in the photoelectric conversion unit 100, or a transmission line.
  • the digital signal from which linear distortion has been removed by the linear equalization unit 300 is output to the neural network input unit 400.
  • the neural network input unit 400 receives the digital signal from the linear equalization unit 300, and adjusts the timing and the number of symbols for inputting a plurality of symbols contained in the digital signal to the neural network unit 500. For example, the neural network input unit 400 outputs surplus symbols to the neural network unit 500 together with target symbols continuous in time series included in the digital signal.
  • the neural network unit 500 includes an input layer, an intermediate layer, and an output layer.
  • the number of neuron elements in the input layer is larger than that in the output layer, and the intermediate layer is one or more.
  • the neural network unit 500 inputs the block of the target symbol and the block of the surplus symbol in parallel from the neural network input unit 400.
  • the neural network unit 500 non-linearly transforms the multiplication sum of the input symbol and the connection weight between the neuron elements to calculate the likelihood of the target symbol.
  • the determination unit 600 determines the likelihood of the symbol to be demodulated among the likelihoods output from the neural network unit 500. For example, the determination unit 600 sets the likelihood with the greatest likelihood as the likelihood of a symbol to be demodulated. Since the posterior probability of obtaining the class of symbols corresponds to the likelihood of the symbol, the largest posterior probability is selected among the posterior probabilities output from the output layer of the neural network unit 500.
  • Demodulation section 700 demodulates the symbol based on the likelihood determined by determination section 600 to be the likelihood of the symbol to be demodulated. For example, the demodulation unit 700 restores the target symbol based on the posterior probability selected by the determination unit 600.
  • connection weight update unit 800 updates the connection weight in the neural network unit 500 based on the symbols demodulated by the demodulation unit 700. For example, the connection weight update unit 800 updates the connection weight between neuron elements in the neural network unit 500 using an error back propagation method.
  • the photoelectric conversion unit 100, the reception signal adjustment unit 200, and the linear equalization unit 300 may be included in an apparatus different from the equalization apparatus 1000.
  • the optical communication device on which the equalization device 1000 is mounted may include the photoelectric conversion unit 100, the reception signal adjustment unit 200, and the linear equalization unit 300.
  • the equalizer 1000 receives the digital signal from the linear equalizer 300 included in the optical communication device. That is, the equalizer 1000 only needs to include the neural network input unit 400, the neural network unit 500, the determination unit 600, the demodulation unit 700, and the connection weight update unit 800, and the photoelectric conversion unit 100, the reception signal adjustment unit 200, The linear equalizer 300 may not be provided.
  • FIG. 2 is a block diagram showing a configuration example of the neural network input unit 400.
  • the neural network input unit 400 includes a sliding window 401 and a serial / parallel converter 402.
  • the sliding window 401 receives the symbol 1, the symbol 2,..., The symbol L from the linear equalization unit 300, slides the window, and sequentially outputs the symbols of the window size.
  • the window size is the size of a block which is an output unit. In FIG. 2, the window size is “2”, ie, the size of two symbols, and the block includes two symbols.
  • FIG. 2 illustrates that time passes from the right to the left of the paper on the input side of the sliding window 401, and time passes from the left to the right on the paper at the output of the serial / parallel conversion unit 402. . That is, symbols are input to the sliding window 401 in the order of symbol 1, symbol 2, ..., symbol L. First, symbol 1, symbol 2, symbol 3, and symbol 4 are output from serial / parallel converter 402, and symbol 3, symbol 4, symbol 5, and symbol 6 are output at the next timing. At timing, symbol 5, symbol 6, symbol 7, symbol 8 are output.
  • a block is a group of a plurality of symbols specified by each of consecutive index numbers corresponding to a time series of symbols. That is, in the block output by the sliding window 401, the arrangement of symbols continuous in time series is maintained.
  • the sliding window 401 sequentially outputs the symbols of each block in series to the serial / parallel converter 402.
  • the serial / parallel converter 402 converts the output format of the symbols in the block into parallel output. In parallel output, a plurality of symbols in a block are output at the same timing.
  • the serial / parallel conversion unit 402 includes an output system 403A, an output system 403B, an output system 404A, and an output system 404B.
  • the output system 404A and the output system 404B are first output systems that output a target symbol among a plurality of symbols in a block output at the same timing.
  • the first output system is provided, for example, by the logarithm of the number of neuron elements in the output layer 503 with the modulation multilevel number at the bottom, and outputs a series of a plurality of target symbols continuous in time series.
  • the output system 403A and the output system 403B are second output systems that output surplus symbols among a plurality of symbols in the block output at the same timing.
  • the second output system is provided by a number obtained by subtracting the number of first output systems from the number of neuron elements in the output layer 503, and outputs a series of randomly arranged redundant symbols.
  • the window size is “2”, and the serial / parallel converter 402 sequentially outputs symbols for two blocks. From the sliding window 401, serial / parallel converter 402 performs block 1 including symbol 1 and symbol 2, block 2 including symbol 3 and symbol 4, block 3 including symbol 5 and symbol 6, symbol 7 and symbol 8 The blocks 4 to be included are sequentially input.
  • symbol 1 and symbol 2 in block 1 symbol 1 is output from output system 403A
  • symbol 2 is output from output system 404A
  • symbol 3 in block 2 is output from output system 404B
  • symbol 4 Are output from the output system 403B.
  • the neural network unit 500 receives symbol 1 and symbol 4 which are surplus symbols and symbol 2 and symbol 3 which are target symbols continuous in time series.
  • symbol 3 in block 2 is output from output system 403A
  • symbol 4 is output from output system 404A
  • symbol 5 in block 3 is output from output system 404B
  • symbol 6 is output from output system 403B. Ru.
  • the neural network unit 500 receives the symbols 3 and 6 which are surplus symbols and the symbols 4 and 5 which are target symbols continuous in time series.
  • symbol 5 in block 3 is output from output system 403A
  • symbol 6 is output from output system 404A
  • symbol 7 in block 4 is output from output system 404B
  • symbol 8 is output from output system 403B Be done.
  • the neural network unit 500 receives the symbols 5 and 8 which are surplus symbols and the symbols 6 and 7 which are target symbols continuous in time series.
  • the serial / parallel converter 402 outputs a plurality of symbols continuing in time series in parallel in block units.
  • the symbols output from the output system 403A, the output system 403B, the output system 404A, and the output system 404B are input to the neural network unit 500 at the same timing.
  • FIG. 3 is a block diagram showing a configuration example of the neural network unit 500.
  • the neural network unit 500 includes an input layer 501, an intermediate layer 502, and an output layer 503.
  • the middle layer 502 is configured in M stages.
  • the M stage is one stage or a plurality of stages.
  • FIG. 4 is a diagram showing an example of an internal configuration of the input layer 501, the intermediate layer 502 and the output layer 503 of FIG.
  • Each of the input layer 501, the intermediate layer 502, and the output layer 503 includes at least one or more neuron elements 511.
  • the neuron element 511 includes a multiplier 512 that multiplies an input signal with a connection weight with a previous-stage neuron element, and a non-linear conversion unit 513 that performs non-linear conversion on the multiplication sum of the input signal and the connection weight.
  • the number of inputs of each of the neuron element 1, the neuron element 2,..., The neuron element p is o, and the number of outputs of this layer is p Shall be
  • the non-linear conversion unit 513 of the neuron element 1 calculates the sum of the multiplication values calculated by the multiplier 512, and performs non-linear conversion with the non-linear function f (x) on the multiplication sum.
  • the following equation (1) is an example of the output value y j .
  • Examples of the non-linear function f (x) include a step function, a sigmoid function, and a ramp function.
  • the outputs of the n neuron elements 511 in the output layer 503 correspond to the n outputs of the neural network unit 500. From the output of the neural network unit 500, the posterior probability corresponding to the class C n of the target symbol is output.
  • the output of the k-th neuron element in the output layer 503 and the output k, the coupling load vector between the neuron elements and the preceding neuron element and w k, a plurality of symbols input to the k-th neuron element the symbol group is the ⁇ k.
  • the correct answer class is C 1
  • the wrong answer class is C 2 .
  • k, ⁇ ) that the target symbol ⁇ is the correct answer class C 1 at the output k can be calculated, for example, according to the following equation (2).
  • the neural network unit 500 outputs n posterior probabilities for the correct answer.
  • k, ⁇ ) corresponds to the likelihood that the target symbol ⁇ is the correct answer class C 1 at the output k.
  • the determination unit 600 determines the posterior probability corresponding to the symbol to be demodulated from the n posterior probabilities calculated by the neural network unit 500. For example, the determination unit 600 determines the largest posterior probability S hat among n posterior probabilities according to the following equation (3).
  • Demodulation section 700 demodulates the target symbol based on posterior probability S hat determined by determination section 600.
  • the determination unit 600 obtains symbols ( ⁇ 3, ⁇ 1, 1, 3) corresponding to the posterior probability.
  • Demodulation section 700 converts the symbol (-3, -1, 1, 3) obtained from determination section 600 into (00, 01, 11, 10).
  • symbols (1 + j, 1 + j, -1-j, 1 ⁇ j) are obtained from the determination unit 600.
  • the demodulation unit 700 converts the symbols (1 + j, 1 + j, -1-j, 1-j) into (11, 01, 00, 10).
  • the connection weight in the neural network unit 500 is fixed, the series of processes described above are repeatedly performed.
  • the connection load update unit 800 updates the connection load.
  • connection load update unit 800 uses the likelihood function represented by the following equation (4) for updating the connection load.
  • Equation (4) q k is the probability that the symbol group ⁇ k is a correct answer class C 1 .
  • the connection load update unit 800 calculates a connection load that minimizes e (w) shown in the above equation (5). For example, an error back propagation method based on least squares can be used to calculate the coupling weight that minimizes e (w). As described above, by using the non-linear function shown in the above equation (1), non-linear distortion occurring in the optical communication device and the transmission path of the communication partner can be canceled out.
  • the dimension of the symbol group ⁇ k can be increased, and the probability q k can also be increased.
  • the probability q k is increased, the minimum value of e (w) shown in the above equation (5) is further reduced, and as a result, the convergence accuracy of the local error can be enhanced in the update of the coupling load.
  • the equalization accuracy of nonlinear distortion is improved more than the nonlinear equalizer described in Non-Patent Document 1.
  • FIG. 5 is a flowchart showing the equalization method according to the first embodiment. It is assumed that the processing by the photoelectric conversion unit 100, the reception signal adjustment unit 200, and the linear equalization unit 300 is performed before the series of processing shown in FIG.
  • the neural network input unit 400 receives from the linear equalization unit 300 a digital signal including a plurality of symbols continuous in time series, performs the processing shown in FIG. 2, and is included in the digital signal. Output extra symbols along with the symbols.
  • the neural network unit 500 receives the target symbol and the surplus symbol output from the neural network input unit 400, non-linearly converts the multiplication sum of these symbols and the connection weight, and calculates the likelihood of the target symbol (Step ST2).
  • the likelihood of the target symbol is the posterior probability obtained from the above equation (2) and the above equation (3).
  • the determination unit 600 determines the likelihood of the symbol to be demodulated among the likelihoods output from the neural network unit 500 (step ST3). For example, the determination unit 600 determines the largest posterior probability among the posterior probabilities output from the neural network unit 500 according to the above equation (3).
  • connection load update unit 800 updates the connection load in the neural network unit 500 based on the symbols demodulated by the demodulation unit 700 (Ste ST6). For example, the connection load update unit 800 calculates, as an update value, the connection load with which e (w) shown in the above equation (5) is minimized.
  • FIG. 6 is a graph showing the relationship between the bit error rate and the received average light power of the received light received by the four types of optical communication devices.
  • the relationship shown in FIG. 6 is the result obtained by transmitting an optical signal for 20 km in a single mode fiber, with the modulation method of the optical signal being four-value amplitude modulation and the bit rate being 53.1 Gbit / s.
  • Each of the four types of optical communication devices includes a photodetector and an analog / digital converter (hereinafter referred to as an A / D converter).
  • the received light signal is detected by the light detector and converted to an electrical signal, and the electric signal converted from the received light signal is converted to a digital signal by an A / D converter.
  • the digital signal is sampled by the digital sampling oscilloscope at a sampling rate of 80 GSa / s and accumulated as serial data.
  • the relationship shown in FIG. 6 is the result of off-line analysis on a computer of the equalization ability of nonlinear distortion in each of the four types of optical communication devices using the stored serial data.
  • the four types of optical communication devices are an optical communication device A, an optical communication device B, an optical communication device C, and an optical communication device D.
  • the optical communication device A does not include the linear equalization unit 300, the neural network input unit 400, the neural network unit 500, the determination unit 600, and the connection weight update unit 800 among the components shown in FIG. Do not equalize both and non-linear distortion.
  • the relationship indicated by the symbol a in FIG. 6 is the relationship between the average received optical power (dBm) in the optical communication device A and the bit error rate (hereinafter referred to as BER).
  • the optical communication device B does not include the neural network input unit 400, the neural network unit 500, the determination unit 600, and the connection load update unit 800, and equalizes linear distortion. Do not equalize nonlinear distortion.
  • the relationship indicated by symbol b in FIG. 6 is the relationship between the average received optical power in the optical communication device B and the BER.
  • the optical communication device C does not include the neural network input unit 400, and equalizes both linear distortion and non-linear distortion.
  • a neural network unit in which the number of neuron elements in the input layer is 3, the number of neuron elements in the output layer is 64, and the number of intermediate layers is one, is used. That is, the optical communication device C corresponds to a communication device provided with the non-linear distortion equalizer described in Non-Patent Document 1.
  • the relationship indicated by symbol c in FIG. 6 is the relationship between the average received optical power in the optical communication device C and the BER.
  • the optical communication device D is an optical communication device provided with the equalizer 1000 shown in FIG.
  • the neural network input unit 400 sets the number of target symbols as 3 symbols and the number of surplus symbols as 72 symbols.
  • the number of neuron elements in the input layer 501 is 75
  • the number of neuron elements in the output layer 503 is 64
  • the intermediate layer 502 is one stage.
  • the relationship indicated by symbol d in FIG. 6 is the relationship between the average received optical power in the optical communication device D and the BER.
  • the optical communication device D provided with the equalizer 1000 has a reception sensitivity of ⁇ 13.7 (dBm) at a point of BER of 2.0 ⁇ 10 ⁇ 4 .
  • the reception sensitivity obtained by the optical communication device B is improved by 1.0 (dBm)
  • the reception sensitivity obtained by the optical communication device C is improved by 0.65 (dBm). .
  • the equalizer 1000 may not necessarily include the linear equalizer 300.
  • the neural network unit 500 may equalize both linear distortion and non-linear distortion occurring in the optical communication device and the transmission line.
  • the neural network unit 500 since the amount of calculation in the middle layer of the neural network unit 500 increases, the structure of the middle layer becomes complicated. Therefore, the neural network unit 500 removes non-linear distortion after the linear equalization unit 300 removes linear distortion. This makes it possible to simplify the configuration of the middle layer.
  • the neural network unit 500 has one intermediate layer.
  • the reception sensitivity obtained by the optical communication device D is improved by 1.0 (dBm) with respect to the reception sensitivity obtained by the optical communication device B that removes only linear distortion. .
  • FIG. 7 is a block diagram showing a configuration of neural network input unit 400A.
  • Neural network input unit 400A is a modification of neural network input unit 400. Referring to FIG. As shown in FIG. 7, the neural network input unit 400A includes a random signal generator 405A, a random signal generator 405B, and a serial / parallel converter 406.
  • Each of the random signal generation unit 405A and the random signal generation unit 405B generates and outputs a random symbol as a surplus symbol regardless of the time-sequential symbols input to the serial / parallel conversion unit 406.
  • a random symbol is a symbol sequence in which symbols are randomly arranged.
  • serial / parallel conversion unit 406 When the serial / parallel conversion unit 406 receives a plurality of consecutive symbols in time series from the linear equalization unit 300, the serial / parallel conversion unit 406 converts the output format of the symbols into parallel output in block units. In parallel output, a plurality of symbols in a block are output at the same timing.
  • the serial / parallel converter 406 includes an output system 408A and an output system 408B.
  • the random signal generator 405A includes an output system 407A.
  • the random signal generation unit 405B includes an output system 407B.
  • the output system 408A and the output system 408B are first output systems that output target symbols continuous in time series.
  • the first output system is provided, for example, by the logarithm of the number of neuron elements in the output layer 503 with the modulation multilevel number at the bottom, and outputs a series of a plurality of target symbols continuous in time series.
  • the output system 407A and the output system 407B are second output systems that output the random symbols generated by the random signal generation units 405A and 405B.
  • the second output system is provided by a number obtained by subtracting the number of first output systems from the number of neuron elements in the output layer 503, and outputs a series of randomly arranged redundant symbols.
  • time elapses from the right to the left of the paper on the input side of the serial / parallel converter 406, and the output sides of the random signal generator 405A, the random signal generator 405B, and the serial / parallel converter 406 are as follows. It is stated that time passes from the left side to the right side of the paper. That is, the serial / parallel converter 406 receives symbols in the order of symbol 1, symbol 2,..., Symbol 6. First, the symbol A is output from the random signal generator 405A, the symbol 1 and the symbol 2 are output from the serial / parallel converter 406, and the symbol D is output from the random signal generator 405B. At the next timing, symbol B, symbol 3, symbol 4, and symbol E are output, and at the next timing, symbol C, symbol 5, symbol 6, and symbol F are output.
  • the block size is “2”, and the serial / parallel converter 406 sequentially outputs one block of symbols. That is, when serial / parallel converter 406 serially inputs symbol 1, symbol 2, symbol 3, symbol 4, symbol 5, and symbol 6 from linear equalizer 300, it outputs in parallel every two symbols.
  • symbol 1 is output from the output channel 408A
  • symbol 2 is output from the output channel 408B
  • symbol A generated by the random signal generator 405A is output from the output channel 407A
  • the random signal generator 405B is generated.
  • the symbol D is output from the output system 407B.
  • the neural network unit 500 receives the symbol A and the symbol D which are surplus symbols, and the symbols 1 and 2 which are the target symbols continuous in time series.
  • symbol 3 is output from output system 408A
  • symbol 4 is output from output system 408B
  • symbol B generated by random signal generator 405A is output from output system 407A
  • random signal generator 405B generates The output symbol 407 is output from the output system 407B.
  • the neural network unit 500 receives the symbols C and F, which are surplus symbols, and the symbols 5 and 6, which are object symbols continuous in time series.
  • serial / parallel converter 406 outputs a plurality of symbols continuing in time series in parallel in block units.
  • the symbols output from each of the output system 407A, the output system 407B, the output system 408A, and the output system 408B are input to the neural network unit 500 at the same timing.
  • FIGS. 2 and 7 show neural network input units in which a plurality of first output systems are arranged side by side, and a second output system is arranged on both sides of the array of first output systems.
  • the equalizer 1000 is not limited to this arrangement. The arrangement order of the first output system and the second output system may be random.
  • FIG. 8A is a block diagram showing a hardware configuration for realizing the function of the equalizer 1000.
  • a photoelectric converter 901 is a device that converts an input optical signal into an electric signal, and corresponds to the photoelectric conversion unit 100 in FIG.
  • the photoelectric converter 901 may include an oscillator that oscillates local oscillation light.
  • FIG. 8B is a diagram showing a hardware configuration for executing software for realizing the function of the equalization device 1000.
  • a photoelectric converter 1001 is a device that converts an input optical signal into an electric signal, and corresponds to the photoelectric conversion unit 100 in FIG.
  • the photoelectric converter 1001 may include an oscillator that oscillates local oscillation light.
  • the photoelectric conversion unit 100, the received signal adjustment unit 200, the linear equalization unit 300, the neural network input unit 400 or 400A, the neural network unit 500, the determination unit 600, the demodulation unit 700, and the connection weight update unit 800 in the equalization device 1000 Each function is realized by a processing circuit. That is, the equalization device 1000 includes processing circuits for executing the respective processing of the flowchart shown in FIG.
  • the processing circuit may be dedicated hardware or may be a central processing unit (CPU) that executes a program stored in a memory.
  • the processing circuit 902 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an application specific integrated circuit (ASIC), an FPGA (FPGA) Field-Programmable Gate Array) or a combination thereof is applicable.
  • ASIC application specific integrated circuit
  • FPGA Field-Programmable Gate Array
  • connection load update unit 800 When the processing circuit is the processor 1002 shown in FIG. 8B, the photoelectric conversion unit 100, the reception signal adjustment unit 200, the linear equalization unit 300, the neural network input unit 400 or 400A, the neural network unit 500, the determination unit 600, the demodulation unit 700.
  • the respective functions of the connection load update unit 800 are realized by software, firmware or a combination of software and firmware. Software or firmware is described as a program and stored in the memory 1003.
  • the processor 1002 reads out and executes the program stored in the memory 1003 to thereby execute the photoelectric conversion unit 100, the reception signal adjustment unit 200, the linear equalization unit 300, the neural network input unit 400 or 400A, the neural network unit 500, The respective functions of unit 600, demodulation unit 700 and coupling load update unit 800 are realized. That is, the equalizing apparatus 1000 includes a memory 1003 for storing a program which is executed by the processor 1002 and each of the series of processes shown in FIG. 5 is consequently executed. These programs include the procedures of the photoelectric conversion unit 100, the received signal adjustment unit 200, the linear equalization unit 300, the neural network input unit 400 or 400A, the neural network unit 500, the determination unit 600, the demodulation unit 700, and the connection weight update unit 800. Or the method is to cause a computer to execute.
  • the memory 1003 is, for example, a nonvolatile or volatile semiconductor memory such as a random access memory (RAM), a read only memory (ROM), a flash memory, an erasable programmable read only memory (EPROM), or an EEPROM (electrically-EPROM).
  • RAM random access memory
  • ROM read only memory
  • EPROM erasable programmable read only memory
  • EEPROM electrically-EPROM
  • a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD, etc. correspond.
  • Partial functions of respective functions of photoelectric conversion unit 100, received signal adjustment unit 200, linear equalization unit 300, neural network input unit 400 or 400A, neural network unit 500, determination unit 600, demodulation unit 700, and connection weight update unit 800 May be realized by dedicated hardware, and some may be realized by software or firmware.
  • the functions of the photoelectric conversion unit 100, the reception signal adjustment unit 200, the linear equalization unit 300, the neural network input unit 400 or 400A, and the neural network unit 500 are realized by the processing circuit 902 as dedicated hardware.
  • the determination unit 600, the demodulation unit 700, and the connection load update unit 800 may realize the function by the processor 1002 executing a program stored in the memory 1003.
  • the processing circuit can realize each of the above functions by hardware, software, firmware, or a combination thereof.
  • the neural network unit 500 having the number of neuron elements in the input layer 501 larger than that in the output layer 503 inputs surplus symbols as well as target symbols continuous in time series. Then, the likelihood of the target symbol is calculated. Further, the neural network input unit 400 is provided by the number of log of the number of neuron elements in the output layer 503 with the modulation multilevel number at the bottom, and outputs from the output system that outputs the target symbol and the number of neuron elements in the output layer 503 The system is provided with a surplus output system which is provided by the number obtained by subtracting the number of systems, and which outputs a surplus symbol.
  • the surplus output system outputs random symbols as surplus symbols. Even with this configuration, since the convergence accuracy of the local error is high in updating the coupling weight using the error back propagation method, the equalization accuracy of the non-linear distortion of the equalizer 1000 can be enhanced.
  • the equalizer according to the present invention can improve the equalization accuracy of non-linear distortion, and can therefore be used for an optical communication device that transmits and receives multilevel optical information.
  • DESCRIPTION OF SYMBOLS 100 photoelectric conversion part, 200 received signal adjustment part, 300 linear equalization part, 400, 400A neural network input part, 401 sliding window, 402, 406 serial / parallel conversion part, 403A, 403B, 404A, 404B, 407A, 407B, 408A, 408B output system, 405A, 405B random signal generation unit, 500 neural network unit, 501 input layer, 502 intermediate layer, 503 output layer, 511 neuron element, 512 multiplier, 513 nonlinear conversion unit, 600 determination unit, 700 demodulation Part, 800 Coupling load update part, 901, 1001 photoelectric converter, 902 processing circuit, 1000 equalizer, 1002 processor, 1003 memory.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optical Communication System (AREA)

Abstract

Selon la présente invention, une unité de réseau neuronal (500), qui présente une relation dans laquelle le nombre d'éléments neuronaux d'une couche d'entrée (501) est supérieur à celui d'une couche de sortie (503), reçoit un symbole excédentaire et un symbole cible à partir d'une unité d'entrée de réseau neuronal (400) et calcule la probabilité du symbole cible.
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* Cited by examiner, † Cited by third party
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CN112036543A (zh) * 2020-07-16 2020-12-04 北京大学 神经网络均衡与线性均衡相结合的时域均衡器及均衡方法
US20220239510A1 (en) * 2021-01-25 2022-07-28 Marvell Asia Pte Ltd Ethernet physical layer transceiver with non-linear neural network equalizers

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112036543A (zh) * 2020-07-16 2020-12-04 北京大学 神经网络均衡与线性均衡相结合的时域均衡器及均衡方法
CN112036543B (zh) * 2020-07-16 2022-05-03 北京大学 神经网络均衡与线性均衡相结合的时域均衡器及均衡方法
US20220239510A1 (en) * 2021-01-25 2022-07-28 Marvell Asia Pte Ltd Ethernet physical layer transceiver with non-linear neural network equalizers

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