WO2019065656A1 - Through-electrode substrate and semiconductor device using through-electrode substrate - Google Patents

Through-electrode substrate and semiconductor device using through-electrode substrate Download PDF

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Publication number
WO2019065656A1
WO2019065656A1 PCT/JP2018/035524 JP2018035524W WO2019065656A1 WO 2019065656 A1 WO2019065656 A1 WO 2019065656A1 JP 2018035524 W JP2018035524 W JP 2018035524W WO 2019065656 A1 WO2019065656 A1 WO 2019065656A1
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WO
WIPO (PCT)
Prior art keywords
electrode
wiring
substrate
glass substrate
hole
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Application number
PCT/JP2018/035524
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French (fr)
Japanese (ja)
Inventor
進 中澤
恵大 笹生
直大 高橋
宏樹 古庄
敦子 千吉良
祐治 成田
Original Assignee
大日本印刷株式会社
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Publication date
Application filed by 大日本印刷株式会社 filed Critical 大日本印刷株式会社
Priority to JP2019545145A priority Critical patent/JP7180605B2/en
Publication of WO2019065656A1 publication Critical patent/WO2019065656A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present disclosure relates to a through electrode substrate.
  • the present invention relates to a through electrode substrate having a crosslinked wiring which bridges the through electrode and the wiring on the substrate.
  • a through electrode board in which a through electrode penetrating through the wiring board is formed is used.
  • the base material is an organic substrate made of an organic substance
  • it is formed on the substrate by performing electroless copper plating to form a wiring in the through hole and obtain conduction. It is possible to obtain conduction between the formed wiring and the through electrode formed in the through hole.
  • Patent Document 1 discloses a printed wiring board having a via hole in which a bottomed hole is formed in a substrate whose base material is glass epoxy and a conductive layer is formed in the bottomed hole.
  • the substrate is a substrate made of an inorganic material such as glass, silicon, or ceramic
  • an adhesion layer is formed in advance. Need to form.
  • copper plating is only formed in the part in which the adhesion layer was formed.
  • the wiring on the substrate and the through electrode in the through hole are connected by electroless copper plating, the wiring and the through electrode are connected through the insulating adhesion layer, which causes a problem in electrical reliability. .
  • An object of the present invention is to provide a through electrode substrate and a method of manufacturing the same.
  • a through electrode substrate is provided on a substrate made of an inorganic material, a first wiring provided on the substrate, and the substrate at a position separated from the first wiring. It has a penetration hole, the penetration electrode provided in the inner wall of the penetration hole, and the 2nd wiring which connects the 1st wiring and the penetration electrode.
  • the penetration electrode substrate concerning one embodiment of this indication may further have an adhesion layer provided between the substrate and the penetration electrode.
  • the second wiring may further be in contact with the adhesion layer.
  • the adhesion layer may include an organic resin material.
  • a through electrode substrate includes: an insulating layer provided on the first wiring, the second wiring, and the through electrode; and a third wiring provided on the insulating layer.
  • the semiconductor device may further include a fourth wiring in contact with the insulating layer, the third wiring, and the through electrode.
  • the insulating layer is made of an organic resin material, and the through electrode is provided on the inner wall of the through hole and an opening provided in the insulating layer.
  • the through electrode is provided inside a first through electrode provided on the inner wall of the through hole and the opening provided in the insulating layer. It may include two through electrodes.
  • the aspect ratio of the through hole may be 3 or more.
  • a conduction between the through electrode and the wiring on the substrate is ensured, and a through electrode substrate with improved electrical reliability and a method of manufacturing the same are provided. can do.
  • FIG. 1 is a cross-sectional view of a semiconductor device using a through electrode substrate according to an embodiment of the present disclosure.
  • FIG. 2A is a top view of a through electrode substrate according to an embodiment of the present disclosure.
  • FIG. 2B is a cross-sectional view taken along the cutting line shown in FIG. It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication.
  • FIG. 7 is a cross-sectional view of a through electrode substrate according to another embodiment of the present disclosure. It is a top view of the penetration electrode substrate shown in FIG.
  • FIG. 9A is a top view of a through electrode substrate according to an embodiment of the present disclosure.
  • FIG. 9B is a cross-sectional view taken along the section line shown in FIG. It is a sectional view of a penetration electrode substrate concerning one embodiment of this indication. It is a top view of the penetration electrode substrate concerning one embodiment of this indication.
  • overlap between a certain structure and another structure means that at least a part of the structures overlap in a plan view of these structures. In other words, one of these structures is located above or below the other, and these structures at least partially overlap each other when viewed from the top or the bottom. .
  • FIG. 1 is a top view showing an example of a semiconductor device 1000 having a through electrode substrate 100 which is an embodiment of the present disclosure.
  • the semiconductor device 1000 includes a printed circuit board 200, a through electrode substrate 100, an integrated circuit 300, bumps 122, and a wiring layer 120.
  • a plurality of integrated circuits 300 may be provided on the wiring layer 120, and the plurality of integrated circuits 300 may be electrically connected to each other through the wiring layer 120.
  • Each integrated circuit 300 is electrically connected to the through electrode substrate 100 via a conductor such as the wiring layer 120 and the bumps 122.
  • the through electrode substrate 100 is electrically connected to the printed circuit board 200 through a through electrode 108 described later.
  • FIG. 1 shows an example in which one integrated circuit 300 electrically connected to the wiring layer 120 is mounted on the through electrode substrate 100
  • the number of terminals of the integrated circuit 300 may be four, five or more, or less than four. Further, the number of integrated circuits 300 mounted on the through electrode substrate 100 may be plural or one. Furthermore, in the integrated circuit 300 mounted on the through electrode substrate 100, a plurality of integrated circuits having different numbers of terminals may be mounted. It can be selected as appropriate depending on the application of the semiconductor device 1000.
  • FIG. 1 shows an example in which the through electrode substrate 100 is mounted on the printed circuit board 200, the present invention is not limited to this example.
  • the through electrode substrate 100 may be mounted, for example, on a glass substrate or on a flexible material such as an FPC. It can be selected as appropriate depending on the application of the semiconductor device.
  • FIG. 2 illustrates an example of a through electrode substrate according to an embodiment of the present disclosure.
  • FIG. 2A is a top view of a through electrode substrate according to an embodiment of the present disclosure.
  • FIG. 2B is a cross-sectional view taken along the cutting line shown in FIG.
  • FIG. 2 shows a partial top view and a partial cross-sectional view of through electrode substrate 100 shown in FIG.
  • the through electrode substrate 100 includes a first surface 102 a, a second surface 102 b, a glass substrate 102 having a through hole 10 penetrating the first surface 102 a and the second surface 102 b, and a through electrode provided on the inner wall of the through hole 10. It has 108.
  • a multilayer wiring layer such as the wiring layer 120 shown in FIG. 1 may be provided on the first surface 102a.
  • the first wiring 104 shown in FIG. 2 constitutes a part of the wiring layer 120 shown in FIG.
  • the wiring layer 120 and the bumps 122 are electrically connected to the through electrodes 108.
  • the through electrode 108 is electrically connected to the bump 122.
  • the integrated circuit 300 is electrically connected to the wiring layer 120 through the bumps 122.
  • the through electrode substrate 100 is electrically connected to the printed circuit board 200 through the bumps 122.
  • the first surface 102 a and the second surface 102 b are in a relationship of top and bottom or front and back with respect to the through electrode substrate 100.
  • the through electrode substrate 100 is formed on the glass substrate 102, the through holes 10 penetrating the first surface 102 a to the second surface 102 b of the glass substrate 102, and the first surface 102 a of the glass substrate 102.
  • the adhesion layer 106 provided on the inner wall of the through hole 10 and the penetration electrode 108 formed on the adhesion layer 106, and the penetration is made on the first surface 102a of the glass substrate 102.
  • a second wire 110 electrically connecting the electrode 108 and the first wire 104 is provided.
  • a glass substrate 102 made of a glass material as a substrate is shown, but the present disclosure is not limited to this, and a silicon substrate made of a material containing silicon, a material containing alumina A ceramic substrate made of the above may be used.
  • the glass substrate 102 has a first surface 102 a and a second surface 102 b as two main surfaces, and the first wiring 104 is formed on at least the first surface 102 a.
  • the first wiring 104 may form, for example, a thin film transistor (TFT).
  • the first wiring 104 is formed only on the first surface 102a, but the present disclosure is not limited thereto, and both surfaces of the first surface 102a and the second surface 102b of the glass substrate 102 are formed. Wiring may be formed on the The material of the first wiring 104 may be, for example, copper.
  • the plate thickness of the glass substrate 102 may be, for example, about 200 ⁇ m to 900 ⁇ m.
  • the adhesion layer 106 and the penetration electrode 108 formed on the adhesion layer 106 are formed on the side wall in the through hole 10 of the glass substrate 102.
  • the adhesion layer 106 functions as a base for forming the material of the through electrode 108 on the glass substrate 102 by electroless plating.
  • the adhesion layer 106 may be formed of a material containing an organic resin.
  • the material containing the organic resin constituting the adhesion layer 106 may be, for example, an epoxy resin, an acrylic resin, a polyimide resin, a urethane resin or the like.
  • the through electrode 108 is formed on a portion of the surface of the glass substrate 102 where the adhesion layer 106 is formed. Since the through electrode 108 is formed to obtain conduction between the upper and lower sides of the glass substrate 102, the through electrode 108 is formed to cover all the side walls in the through hole 10 of the glass substrate 102, and a hollow circle is formed along the inner wall of the through hole 10. It is formed in a columnar shape.
  • the hollow portion of the through electrode 108 may be referred to as a through hole 130.
  • the through electrode 108 is electrically connected to the upper and lower wirings, the land 108-1 (from the diameter of the through hole) is formed on the peripheral portion of the through hole 130 on the first surface 102a to the second surface 102b of the glass substrate 102. May also have a large "land" portion).
  • the material of the through electrode 108 may be, for example, copper or nickel.
  • the through holes 10 and the through holes 130 may be concentric circles having the same central axis.
  • the hole diameter of the through hole 10 may be, for example, about 40 ⁇ m to 140 ⁇ m, and the hole diameter of the through hole 130 may be, for example, about 30 ⁇ m to 135 ⁇ m.
  • the hole diameter of the through hole 10 is larger than the hole diameter of the through hole 130.
  • the inside of the through hole 130 may be filled with the same plating as the through electrode 108, or may be filled with an organic resin or a metal different from the through electrode 108. It is also good.
  • the second wiring 110 On the first surface 102 a of the glass substrate 102, a second wiring 110 in contact with the glass substrate 102, the first wiring 104, and the through electrode 108 is formed.
  • the second wiring 110 has a function as a bridge wiring which electrically connects the first wiring 104 and the land 108-1 on the first surface 102a of the through electrode 108.
  • the material of the second wiring 110 may be any material having conductivity, such as copper, nickel, or tin.
  • the second wire 110 may be a single layer as shown in FIG. 2, but the present disclosure is not limited thereto.
  • the material of the second wiring 110 is copper
  • an adhesion layer made of a metal film of low resistance such as Ti is interposed between the copper and the glass substrate 102. It may be a multilayer structure including one or more layers.
  • FIG. 10 is a cross-sectional view of a through electrode substrate according to an embodiment of the present disclosure.
  • the second wiring 110 ′ shown in FIG. 10 includes an adhesion layer 110-1 formed of a metal film of low resistance such as Ti formed on the glass substrate 102, and a conductor such as copper formed on the adhesion layer 110-1. It has a two-layer structure in which a second wiring portion 110-2 made of a material having elasticity is laminated. According to the configuration shown in FIG. 10, the adhesion between the second wiring portion 110-2 of the second wiring 110 'and the glass substrate 102 can be improved. Further, although not shown, the adhesion layer 110-1 of the second wiring 110 'shown in FIG. 10 may have a multilayer structure made of two or more low resistance metal films.
  • the second wiring 110 is a wiring which can bridge and electrically connect the first wiring 104 and the through electrode 108 which are formed separately on one main surface of the glass substrate 102. It may be
  • the second wiring 110 may be wire bonding that electrically connects the first wiring 104 and the through electrode 108, and solder that electrically connects the first wiring 104 and the through electrode 108. It may be.
  • the material of the second wiring 110 may be, for example, a metal oxide such as nickel, gold, tin, copper, aluminum, titanium, chromium, or ITO.
  • FIG. 11 is a top view of a through electrode substrate according to an embodiment of the present disclosure. As shown in FIG. 11, only one second wiring 110 may be connected to one through electrode 108 and electrically connected to the first wiring 104.
  • the first wiring 104, the second wiring 110, and the through electrode 108 are formed of a conductive material.
  • a conductive material For example, gold, silver, copper, platinum, nickel, rhodium, ruthenium, or iridium can be used.
  • the first wire 104, the second wire 110, and the through electrode 108 may use the same material, or may use different materials in combination. Characteristic impedance matching can be improved by forming the first wiring 104, the second wiring 110, and the through electrode 108 using the same material.
  • the through electrode 108 and the first wire 104 are electrically connected by the second wire 110, the conduction between the through electrode 108 and the first wire 104 on the glass substrate 102 is ensured. Electrical reliability is improved.
  • FIG. 9 is a view showing a modification of the through electrode substrate according to the embodiment of the present disclosure shown in FIG.
  • FIG. 9A is a top view of a through electrode substrate according to an embodiment of the present disclosure.
  • FIG. 9B is a cross-sectional view taken along the section line shown in FIG.
  • the through electrode 108 may have a wiring portion 108-2 extending from the land 108-1 formed on the first surface 102a.
  • the second wire 110 may be directly connected to the wire portion 108-2 extending from the land 108-1 formed on the first surface 102a of the through electrode 108.
  • Method 1 of manufacturing wiring board A method of manufacturing the through electrode substrate 100 according to the first embodiment of the present disclosure shown in FIG. 2 will be described with reference to FIGS. 2 to 6.
  • FIGS. 3 to 6 the same components as those in FIGS. 1 to 2 will be described with the same reference numerals.
  • the first wiring 104 is formed on the glass substrate 102 (see FIG. 3).
  • the first wiring 104 may constitute an element such as a TFT.
  • the first wiring 104 is formed on the first surface 102 a of the glass substrate 102 in FIG. 3, the present invention is not limited to this, and the first wiring is not only limited to the first surface 102 a but also to the second surface 102 b. 104 may be formed.
  • a through hole 10 penetrating the first surface 102a and the second surface 102b is formed in the glass substrate 102 having the first wiring 104 formed on one side or both sides (see FIG. 4).
  • the position where the through hole 10 is formed in the glass substrate 102 is a portion where the first wiring 104 is not formed.
  • the through hole 10 is formed at a position separated from the first wiring 104.
  • the shape of the through hole 10 may be a cylindrical shape in which the upper and lower hole diameters are substantially constant.
  • the method of forming the through holes 10 in the glass substrate 102 may be any method.
  • the adhesion layer 106 is formed on the inner wall of the through hole 10 formed in the glass substrate 102 and the peripheral portion of the through hole on the first surface 102 a and the second surface 102 b (see FIG. 5).
  • the adhesion layer 106 may be formed by a method such as spin coating, dip coating, spray coating, or the like.
  • the adhesion layer 106 functions as an adhesion layer for forming a through electrode material thereafter.
  • the adhesion layer 106 may be formed of a material containing an organic resin.
  • the through electrode 108 is formed on a portion of the surface of the glass substrate 102 where the adhesion layer 106 is formed (see FIG. 6).
  • the through electrode 108 is formed on the adhesion layer 106 formed on the surface of the glass substrate 102.
  • the through electrode 108 is formed by coating copper or nickel using an electroless plating method.
  • the wiring portion 108-2 extending from the land 108-1 formed on the first surface 102a of the through electrode 108 is also penetrated It may be formed at the same time as the electrode 108 in the above process.
  • the through electrode 108 including the land 108-1 and the wiring portion 108-2 extending from the land 108-1 is formed on the surface of the glass substrate 102 where the adhesion layer 106 is formed (FIG. 9). See).
  • the through electrode 108 is formed on the adhesion layer 106 formed on the surface of the glass substrate 102.
  • the through electrode 108 is formed by coating copper or nickel using an electroless plating method.
  • the adhesion layer 106 as the adhesion layer or the reducing agent, it is possible to form a through electrode material in the through holes 10 formed on the glass substrate 102 by the electroless plating method or the like.
  • a through electrode material such as copper in the through holes 10 formed on the glass substrate 102 without forming the adhesion layer 106 by a sputtering method.
  • the aspect ratio of the through holes in the glass substrate is low (for example, if the plate thickness is small or the hole diameter is large), even if a method of forming an electrode material such as copper in the through holes by sputtering is used. It is possible to form through electrodes.
  • the aspect ratio is a value of plate thickness / hole diameter, and the relationship between the plate thickness of the glass substrate 102 and the hole diameter of the through hole of the glass substrate 102 is expressed by the aspect ratio of the through hole of the glass substrate. For example, when the plate thickness is large or the hole diameter is small, the aspect ratio is high, and when the plate thickness is small or the hole diameter is large, the aspect ratio is small.
  • the sputtering method is sufficient for the electrode material to reach the inside of the through holes far from the main surface of the glass substrate. Since film formation can not be performed, a blank portion (void or soot) in which the electrode material is not formed is likely to be generated inside the through hole, and there is a problem in electrical reliability.
  • the aspect ratio of the through holes of the glass substrate is 3 or more, in the sputtering method, voids or soot are easily generated in the through holes, and a problem occurs in the electrical reliability.
  • the present disclosure even if the aspect ratio of the through hole 10 formed in the glass substrate 102 is high by using the adhesion layer 106 as the adhesion layer or reducing agent, the penetration hole 10 is penetrated by the electroless plating method or the like.
  • the electrode material can be sufficiently deposited. Therefore, the present disclosure is advantageous in that the electrical reliability can be further improved, particularly in a wiring substrate in a high density arrangement in which the aspect ratio of the through holes 10 formed in the glass substrate 102 is 3 or more.
  • the first wiring 104 and the glass substrate 102 are connected.
  • a second wiring 110 is formed in contact with the through electrode 108 (see FIG. 2).
  • the second wiring 110 is a wiring formed to be in contact with the first surface 102 a of the glass substrate by sputtering or the like, but the present disclosure is not limited to this.
  • the adhesion layer 106 needs to be formed on the glass substrate 102 as an adhesion layer. Further, by forming the through electrode 108 only via the adhesion layer 106, it is not possible to obtain conduction between the through electrode 108 and a wiring layer such as the first wiring 104 formed in advance on the glass substrate 102. Therefore, in the present disclosure, in order to obtain conduction between a wiring layer such as the first wiring 104 formed in advance on the glass substrate 102 and the through electrode 108 formed via the adhesion layer 106, 2 wiring 110 is provided.
  • the second wiring 110 electrically connects the first wiring 104 and the through electrode 108 which are formed apart on one main surface of the glass substrate 102 as the bridge wiring, the through electrode 108 and the first wiring 104 are separated. Electrical connection with the first wiring 104 can be secured, and a through electrode substrate with improved electrical reliability can be provided.
  • the second wiring 110 may be a wiring formed to be in contact with the first surface 102 a of the glass substrate by a sputtering method or the like.
  • the second wiring 110 is disposed so as to be in direct contact with (not isolated from) one main surface of the glass substrate 102, and is directly in contact with the same surface.
  • the adhesion layer 106 intervenes between the glass substrate 102 and the glass substrate 102).
  • the first wiring 104 in direct contact with the first surface 102 a of the glass substrate and the land 108-1 on the first surface 102 a of the through electrode 108 are on the first surface 102 a of the glass substrate It is electrically connected by the 2nd wiring 110 which touches directly.
  • the first wiring 104 in direct contact with the first surface 102a of the glass substrate and the land 108-1 of the through electrode 108 are in direct contact with the first surface 102a of the glass substrate. Since the second wiring 110 is electrically connected, the wiring density in the layer directly in contact with the first surface 102 a of the glass substrate on which the first wiring 104 and the land 108-1 of the through electrode 108 are formed is It can be enhanced. As described above, if the wiring density in the layer directly in contact with the first surface 102 a of the glass substrate is increased, the wiring formation to other layers becomes easier, and the design freedom of the wiring is increased.
  • the wiring length of the second wiring 110 can be shortened. Therefore, the resistance is low and current can flow stably.
  • the second wiring 110 is in direct contact with the same surface as the first wiring 104 and the land 108-1 of the through electrode 108, the height of the wiring layer can be reduced. Furthermore, when another wiring is stacked on the wiring layer via the insulating layer, the flatness of the lower wiring layer can be secured.
  • first wiring 104, the land 108-1 of the through electrode 108, and the second wiring 110 are formed with the first surface 102a of the same glass substrate as a base, the thermal expansion of the first surface 102a of the glass substrate Since the stress due to the stress uniformly applies to each of the first wiring 104, the through electrode 108, and the second wiring 110, distortion and disconnection of the wiring are less likely to occur, and connection reliability is enhanced.
  • a through electrode substrate 100 ′ shown in FIG. 7 includes a glass substrate 102 constituting the through electrode substrate 100 shown in FIG. 2, a first through electrode 108 a, a first wire 104, and a second wire 110.
  • the through electrode substrate 100 ′ shown in FIG. 7 further has an insulating layer 112, and on the insulating layer 112, a third wiring 114 that constitutes a wiring layer above the first wiring 104.
  • the insulating layer 112 has an opening 20 on the first through electrode 108 a, and the second through electrode 108 b is formed on the inner wall of the opening 20.
  • the second through electrode 108 b and the third wiring 114 are configured to be bridged by the fourth wiring 116 on the insulating layer 112.
  • the insulating layer 112 is provided so as to cover the first wiring 104, the second wiring 110, and the first through electrode 108 on the first surface 102 a of the glass substrate 102.
  • the insulating layer 112 is an insulating layer formed of an organic resin material, and is an interlayer insulating layer for laminating another wiring layer formed of the third wiring layer 114 on the wiring layer formed of the first wiring 104. It functions as a membrane.
  • the insulating layer 112 has an opening 20 at a position overlapping the through hole 10 in which the first through electrode 108 a is formed, and the second through electrode 108 b is formed on the inner wall of the opening 20 of the insulating layer 112. There is.
  • the second through electrode 108b is formed in the opening 20 of the insulating layer 112 made of an organic resin material, and therefore, unlike the first through electrode 108a, it is not necessary to interpose an adhesion layer. Therefore, the second through electrode 108 b can be formed directly on the surface of the insulating layer 112 by a method such as electroless copper plating.
  • the second through electrode 108 b electrically connects the third wire 114 formed in the upper layer to the first through electrode 108 a, and the third wire 114 and the second wire 114 formed on the first surface 102 a of the glass substrate 102. It functions to obtain upper and lower conduction with other interconnections and the like formed on the surface 102b.
  • the second through electrode 108 b and the third wire are formed at spaced positions on the insulating layer 112, and the fourth wire 116 bridges the second through electrode 108 b and the third wire on the insulating layer 112. Electrically connect in the same layer.
  • the wiring layer including the first wiring 104 and the wiring layer including the third wiring are stacked on the first surface 102 a of the glass substrate 102.
  • the first through electrode 108a and the first wiring 104 in direct contact with the first surface 102a of the glass substrate 102 are bridged in the same layer by the second wiring 110 in direct contact with the first surface 102a of the glass substrate 102.
  • the second through electrode 108b in direct contact with the upper surface of the insulating layer 112 and the third wiring 114 are bridged in the same layer by the fourth wiring 116 in direct contact with the upper surface of the insulating layer 112.
  • the other configuration is the same as that of the through electrode substrate 100 shown in FIGS. 1 and 2.
  • two layers of the wiring layer including the first wiring 104 and the wiring layer including the third wiring are stacked on the first surface 102 a of the glass substrate 102, but the present disclosure is limited thereto Instead, three or more wiring layers may be stacked.
  • the through electrode substrate 100 ′ includes a third through electrode 108 c which vertically conducts the third wiring 114 and another wiring or the like formed on the second surface 102 b of the glass substrate 102. You may provide further.
  • an insulating layer 112 may be formed between the third through electrode 108 c and the glass substrate 102.
  • the insulating layer 112 may be formed by a method in which an insulating liquid resist film is coated on the surface of the glass substrate 102 using a roller coater.
  • the insulating layer 112 may be formed using a dip coater or a spray coater.
  • FIG. 8 is a top view of the through electrode substrate shown in FIG.
  • the wiring and the through electrode on the uppermost surface are indicated by a solid line
  • the wiring and the through electrode positioned in the lower layer are indicated by a broken line as a transparent view.
  • the plurality of first through electrodes 108 a are connected to one another by the wiring layer including the first wiring 104
  • the second through electrode 108 b is a third wiring that is the upper layer of the first wiring 104. It is connected to the third through electrode 108 c which is another through electrode by the wiring layer including 114.
  • the fourth wire 116 bridges and connects the third wire 114 and the second through electrode 108 b which are separately formed on the insulating layer 112 in the same layer, the second through electrode 108 b and the second through electrode 108 b are separated. Electrical connection with the three wires 114 is ensured, and a through electrode substrate 100 'with improved electrical reliability can be provided.
  • the second through electrode 108b forms a land 108b-1 at the periphery of the through hole 130b which is a hollow portion, and this land electrically connects the other wiring and the through electrode.
  • the first through electrode 108a and the third through electrode 108c may also have lands at the peripheral edge of the through hole, as with the second through electrode 108b.
  • the wiring density can be further improved by laminating the wiring layers while securing the electrical reliability.

Abstract

This through-electrode substrate comprises: a substrate constituted by an inorganic material; first wiring disposed on the substrate; a through-hole disposed on the substrate at a position apart from the first wiring; a through-electrode disposed on the inner wall of the through-hole; and second wiring connecting the first wiring and the through-electrode. According to the present disclosure, electrical continuity between the through-electrode and the wiring on the substrate is ensured in a high aspect ratio through-electrode substrate using a glass substrate, and a through-electrode substrate with improved electrical reliability and a method for producing the same can be provided.

Description

貫通電極基板及び貫通電極基板を用いた半導体装置Semiconductor device using through electrode substrate and through electrode substrate
本開示は、貫通電極基板に関する。特に、貫通電極と基板上の配線とを架橋する架橋配線を有する貫通電極基板に関する。 The present disclosure relates to a through electrode substrate. In particular, the present invention relates to a through electrode substrate having a crosslinked wiring which bridges the through electrode and the wiring on the substrate.
近年、スマートフォンやノートパソコンなどの電子機器の小型化や高速化に伴い、電子機器を構成する半導体部品や、半導体部品が搭載される配線基板に関しても、高密度化、高速化が進められている。 In recent years, with miniaturization and speeding up of electronic devices such as smartphones and notebook computers, higher density and higher speed are being promoted also for semiconductor parts constituting electronic devices and wiring boards on which semiconductor parts are mounted. .
複数の配線基板が積層される多層配線基板において、上下の配線を接続するために、配線基板を貫通する貫通電極が形成された貫通電極基板が用いられる。このような貫通電極を形成する方法として、基材が有機物である有機基板の場合は、貫通孔内に配線を形成して導通を得るために無電解銅めっきを行うことにより、基板上に形成された配線と貫通孔内に形成された貫通電極との導通を得ることが可能である。 In a multilayer wiring board in which a plurality of wiring boards are stacked, in order to connect upper and lower wirings, a through electrode board in which a through electrode penetrating through the wiring board is formed is used. As a method of forming such a through electrode, in the case where the base material is an organic substrate made of an organic substance, it is formed on the substrate by performing electroless copper plating to form a wiring in the through hole and obtain conduction. It is possible to obtain conduction between the formed wiring and the through electrode formed in the through hole.
特許文献1には、基材がガラスエポキシである基板に有底の孔を形成し、有底の孔内に導電層が形成されたビアホールを有するプリント配線基板が開示されている。 Patent Document 1 discloses a printed wiring board having a via hole in which a bottomed hole is formed in a substrate whose base material is glass epoxy and a conductive layer is formed in the bottomed hole.
特開2008―205070号公報JP 2008-205070 A
しかし、基材がガラス、シリコン、又はセラミックなどの無機材料からなる基板の場合、貫通孔の内壁を一様に粗化することが難しく、無電解銅めっきを形成するためには、予め密着層を形成する必要がある。また、密着層を形成して無電解銅めっきを行う場合、密着層が形成された部分にしか銅めっきが形成されない。この場合、基板上の配線と貫通孔内の貫通電極とを無電解銅めっきで接続すると、絶縁性の密着層を介して配線と貫通電極とが接続するため、電気的信頼性に問題がある。 However, in the case where the substrate is a substrate made of an inorganic material such as glass, silicon, or ceramic, it is difficult to uniformly roughen the inner wall of the through hole, and in order to form electroless copper plating, an adhesion layer is formed in advance. Need to form. Moreover, when forming an adhesion layer and performing electroless copper plating, copper plating is only formed in the part in which the adhesion layer was formed. In this case, when the wiring on the substrate and the through electrode in the through hole are connected by electroless copper plating, the wiring and the through electrode are connected through the insulating adhesion layer, which causes a problem in electrical reliability. .
上記問題に鑑み、本開示は、ガラス等の無機材料からなる基板を用いた高アスペクト比の貫通電極基板において、貫通電極と基板上の配線との導通が確保され、電気的信頼性が向上した貫通電極基板及びその製造方法を提供することを目的の一つとする。 In view of the above problems, according to the present disclosure, in a high aspect ratio through electrode substrate using a substrate made of an inorganic material such as glass, conduction between the through electrode and the wiring on the substrate is ensured, and the electrical reliability is improved. An object of the present invention is to provide a through electrode substrate and a method of manufacturing the same.
本開示の一実施形態に係る貫通電極基板は、無機材料で構成された基板と、前記基板の上に設けられた第1配線と、前記第1配線と離隔した位置において前記基板に設けられた貫通孔と、前記貫通孔の内壁に設けられた貫通電極と、前記第1配線及び前記貫通電極を接続する第2配線と、を有する。 A through electrode substrate according to an embodiment of the present disclosure is provided on a substrate made of an inorganic material, a first wiring provided on the substrate, and the substrate at a position separated from the first wiring. It has a penetration hole, the penetration electrode provided in the inner wall of the penetration hole, and the 2nd wiring which connects the 1st wiring and the penetration electrode.
本開示の一実施形態に係る貫通電極基板は、前記基板と前記貫通電極との間に設けられた密着層をさらに有してもよい。 The penetration electrode substrate concerning one embodiment of this indication may further have an adhesion layer provided between the substrate and the penetration electrode.
本開示の一実施形態に係る貫通電極基板において、前記第2配線は、さらに前記密着層に接するものでもよい。 In the through electrode substrate according to an embodiment of the present disclosure, the second wiring may further be in contact with the adhesion layer.
本開示の一実施形態に係る貫通電極基板において、前記密着層は、有機樹脂材料を含むものでもよい。 In the through electrode substrate according to the embodiment of the present disclosure, the adhesion layer may include an organic resin material.
本開示の一実施形態に係る貫通電極基板は、前記第1配線、前記第2配線及び前記貫通電極の上に設けられた絶縁層と、前記絶縁層の上に設けられた第3配線と、前記絶縁層、前記第3配線及び前記貫通電極に接する第4配線と、をさらに有するものでもよい。 A through electrode substrate according to an embodiment of the present disclosure includes: an insulating layer provided on the first wiring, the second wiring, and the through electrode; and a third wiring provided on the insulating layer. The semiconductor device may further include a fourth wiring in contact with the insulating layer, the third wiring, and the through electrode.
本開示の一実施形態に係る貫通電極基板において、前記絶縁層は、有機樹脂材料で構成され、前記貫通電極は、前記貫通孔の内壁及び前記絶縁層に設けられた開口部の内側に設けられてもよい。 In the through electrode substrate according to an embodiment of the present disclosure, the insulating layer is made of an organic resin material, and the through electrode is provided on the inner wall of the through hole and an opening provided in the insulating layer. May be
本開示の一実施形態に係る貫通電極基板において、前記貫通電極は、前記貫通孔の内壁に設けられた第1貫通電極と、前記絶縁層に設けられた前記開口部の内側に設けられた第2貫通電極とを含むものでもよい。 In the through electrode substrate according to an embodiment of the present disclosure, the through electrode is provided inside a first through electrode provided on the inner wall of the through hole and the opening provided in the insulating layer. It may include two through electrodes.
本開示の一実施形態に係る貫通電極基板は、前記貫通孔のアスペクト比が3以上であってもよい。 In the through electrode substrate according to the embodiment of the present disclosure, the aspect ratio of the through hole may be 3 or more.
本開示によれば、ガラス基板を用いた高アスペクト比の貫通電極基板において、貫通電極と基板上の配線との導通が確保され、電気的信頼性が向上した貫通電極基板及びその製造方法を提供することができる。 According to the present disclosure, in a through electrode substrate with a high aspect ratio using a glass substrate, a conduction between the through electrode and the wiring on the substrate is ensured, and a through electrode substrate with improved electrical reliability and a method of manufacturing the same are provided. can do.
本開示の一実施形態に係る貫通電極基板を用いる半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device using a through electrode substrate according to an embodiment of the present disclosure. 図2(A)は、本開示の一実施形態に係る貫通電極基板の上面図である。図2(B)は、図2(A)に示す切断線における断面図である。FIG. 2A is a top view of a through electrode substrate according to an embodiment of the present disclosure. FIG. 2B is a cross-sectional view taken along the cutting line shown in FIG. 本開示の一実施形態に係る貫通電極基板の製造方法を説明する断面図である。It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. 本開示の一実施形態に係る貫通電極基板の製造方法を説明する断面図である。It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. 本開示の一実施形態に係る貫通電極基板の製造方法を説明する断面図である。It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. 本開示の一実施形態に係る貫通電極基板の製造方法を説明する断面図である。It is a sectional view explaining a manufacturing method of a penetration electrode substrate concerning one embodiment of this indication. 本開示の他の一実施形態に係る貫通電極基板の断面図である。FIG. 7 is a cross-sectional view of a through electrode substrate according to another embodiment of the present disclosure. 図7に示す貫通電極基板の上面図である。It is a top view of the penetration electrode substrate shown in FIG. 図9(A)は、本開示の一実施形態に係る貫通電極基板の上面図である。図9(B)は、図9(A)に示す切断線における断面図である。FIG. 9A is a top view of a through electrode substrate according to an embodiment of the present disclosure. FIG. 9B is a cross-sectional view taken along the section line shown in FIG. 本開示の一実施形態に係る貫通電極基板の断面図である。It is a sectional view of a penetration electrode substrate concerning one embodiment of this indication. 本開示の一実施形態に係る貫通電極基板の上面図である。It is a top view of the penetration electrode substrate concerning one embodiment of this indication.
以下、本開示の各実施形態について、図面等を参照しながら説明する。但し、本開示は、その要旨を逸脱しない範囲において、様々な態様で実施することができ、以下に例示する実施形態の記載内容に限定して解釈されるものではない。 Hereinafter, each embodiment of the present disclosure will be described with reference to the drawings and the like. However, the present disclosure can be implemented in various aspects without departing from the scope of the present disclosure, and is not construed as being limited to the description contents of the embodiments illustrated below.
図面は、説明をより明確にするため、実際の態様に比べ、各部の幅、厚さ、形状等が模式的に表される場合があるが、あくまで一例であって、本開示の解釈を限定するものではない。本明細書及び各図面において、既出の図に関して説明したものと同様の機能を備える要素には、同一の符号を付して、重複する説明を省くことがある。 Although the drawings may schematically represent the width, thickness, shape, etc. of each portion in comparison with the actual embodiment in order to make the description clearer, this is merely an example, and the interpretation of the present disclosure is limited. It is not something to do. In the present specification and the drawings, elements having the same functions as those described with reference to the existing drawings may be denoted by the same reference numerals and redundant description may be omitted.
本明細書及び請求の範囲において、ある構造体の上に他の構造体を配置する態様を表現するにあたり、単に「上に」と表記する場合、特に断りの無い限りは、ある構造体に接するように直上に他の構造体を配置する場合と、ある構造体の上方に、さらに別の構造体を介して他の構造体を配置する場合との両方を含むものとする。また、本明細書及び請求の範囲において、「U」及びその矢印は断面において上又は上方を表し、「D」及びその矢印は断面において下又は下方を表すものとする。 In the present specification and claims, when expressing an aspect in which another structure is disposed on a certain structure, when it is simply described as “on”, unless otherwise specified, it refers to a certain structure. As described above, it includes both the case where another structure is arranged immediately above and the case where another structure is arranged above another structure via another structure. Also, in the present specification and claims, “U” and its arrow represent upper or upper in the cross section, and “D” and its arrow represent lower or lower in the cross section.
本明細書及び請求の範囲において、ある構造体と他の構造体とが「重なる」という表現は、これらの構造体の平面視において、少なくとも一部が重なることを意味する。換言すると、これらの構造体のいずれか一方が他方の上、あるいは下に位置し、かつ、これらの構造体を上面から、あるいは下面から見た場合に、互いに少なくとも一部が重なることを意味する。 In the present specification and claims, the expression "overlap" between a certain structure and another structure means that at least a part of the structures overlap in a plan view of these structures. In other words, one of these structures is located above or below the other, and these structures at least partially overlap each other when viewed from the top or the bottom. .
本開示の第1実施形態に係る貫通電極基板100の構成及び貫通電極基板100の製造方法について、図1から図6を参照して説明する。 The configuration of the through electrode substrate 100 and the method of manufacturing the through electrode substrate 100 according to the first embodiment of the present disclosure will be described with reference to FIGS. 1 to 6.
[半導体装置の構造]
図1に、本開示の実施形態の一つである貫通電極基板100を有する半導体装置1000の一例を表す上面図を示す。半導体装置1000は、プリント基板200、貫通電極基板100、集積回路300、バンプ122、及び配線層120を有する。
[Structure of semiconductor device]
FIG. 1 is a top view showing an example of a semiconductor device 1000 having a through electrode substrate 100 which is an embodiment of the present disclosure. The semiconductor device 1000 includes a printed circuit board 200, a through electrode substrate 100, an integrated circuit 300, bumps 122, and a wiring layer 120.
集積回路300は配線層120の上に複数設けられていてもよく、複数の集積回路300は、配線層120を介して互いに電気的に接続されてもよい。また、各集積回路300は、配線層120及びバンプ122等の導電体を介して、貫通電極基板100と電気的に接続されている。貫通電極基板100は、後述する貫通電極108を介してプリント基板200と電気的に接続されている。 A plurality of integrated circuits 300 may be provided on the wiring layer 120, and the plurality of integrated circuits 300 may be electrically connected to each other through the wiring layer 120. Each integrated circuit 300 is electrically connected to the through electrode substrate 100 via a conductor such as the wiring layer 120 and the bumps 122. The through electrode substrate 100 is electrically connected to the printed circuit board 200 through a through electrode 108 described later.
図1では、配線層120に電気的に接続される集積回路300が、1つ、貫通電極基板100に実装される例を示すが、ここで示す例に限定されない。集積回路300の端子の数は4個でもよいし、5個以上でもよく、また、4個未満でもよい。また、貫通電極基板100に実装される集積回路300の個数は、複数であってもよいし、1個でもよい。さらに、貫通電極基板100に実装される集積回路300は、端子数が異なる集積回路が複数個実装されてもよい。半導体装置1000の用途によって、適宜、選択することができる。なお、図1では、プリント基板200上に貫通電極基板100が実装される例を示すが、この例に限定されない。貫通電極基板100が実装されるのは、例えば、ガラス基板上でもよいし、FPCのようなフレキシブルな素材の上でもよい。半導体装置の用途によって、適宜、選択することができる。 Although FIG. 1 shows an example in which one integrated circuit 300 electrically connected to the wiring layer 120 is mounted on the through electrode substrate 100, the present invention is not limited to the example shown here. The number of terminals of the integrated circuit 300 may be four, five or more, or less than four. Further, the number of integrated circuits 300 mounted on the through electrode substrate 100 may be plural or one. Furthermore, in the integrated circuit 300 mounted on the through electrode substrate 100, a plurality of integrated circuits having different numbers of terminals may be mounted. It can be selected as appropriate depending on the application of the semiconductor device 1000. Although FIG. 1 shows an example in which the through electrode substrate 100 is mounted on the printed circuit board 200, the present invention is not limited to this example. The through electrode substrate 100 may be mounted, for example, on a glass substrate or on a flexible material such as an FPC. It can be selected as appropriate depending on the application of the semiconductor device.
[配線基板の構造1]
図2に、本開示の一実施形態に係る貫通電極基板の一例を示す。図2(A)は本開示の一実施形態に係る貫通電極基板の上面図である。図2(B)は、図2(A)に示す切断線における断面図である。
[Structure 1 of wiring board]
FIG. 2 illustrates an example of a through electrode substrate according to an embodiment of the present disclosure. FIG. 2A is a top view of a through electrode substrate according to an embodiment of the present disclosure. FIG. 2B is a cross-sectional view taken along the cutting line shown in FIG.
図2に、図1に示した貫通電極基板100の部分上面図と部分断面図を示す。貫通電極基板100は、第1面102a、第2面102b、第1面102aと第2面102bとを貫通する貫通孔10を有するガラス基板102、及び、貫通孔10の内壁に設けられる貫通電極108を有する。また、図2では一部省略されているが、第1面102a上には、図1に示す配線層120のような多層配線層が設けられてもよい。図2に示す第1配線104は、図1に示す配線層120の一部を構成するものである。 FIG. 2 shows a partial top view and a partial cross-sectional view of through electrode substrate 100 shown in FIG. The through electrode substrate 100 includes a first surface 102 a, a second surface 102 b, a glass substrate 102 having a through hole 10 penetrating the first surface 102 a and the second surface 102 b, and a through electrode provided on the inner wall of the through hole 10. It has 108. Further, although partially omitted in FIG. 2, a multilayer wiring layer such as the wiring layer 120 shown in FIG. 1 may be provided on the first surface 102a. The first wiring 104 shown in FIG. 2 constitutes a part of the wiring layer 120 shown in FIG.
配線層120及びバンプ122は貫通電極108と電気的に接続されている。貫通電極108はバンプ122と電気的に接続されている。集積回路300は、バンプ122を介して、配線層120と電気的に接続されている。貫通電極基板100は、バンプ122を介して、プリント基板200と電気的に接続されている。なお、第1面102aと第2面102bとは、貫通電極基板100に対して、上と下、又は、表と裏の関係になっている。 The wiring layer 120 and the bumps 122 are electrically connected to the through electrodes 108. The through electrode 108 is electrically connected to the bump 122. The integrated circuit 300 is electrically connected to the wiring layer 120 through the bumps 122. The through electrode substrate 100 is electrically connected to the printed circuit board 200 through the bumps 122. The first surface 102 a and the second surface 102 b are in a relationship of top and bottom or front and back with respect to the through electrode substrate 100.
図2に示すように、貫通電極基板100は、ガラス基板102と、ガラス基板102の第1面102aから第2面102bを貫通する貫通孔10と、ガラス基板102の第1面102a上に形成された第1配線104と、貫通孔10の内壁に設けられた密着層106及び密着層106上に形成された貫通電極108とを有し、ガラス基板102の第1面102a上には、貫通電極108と第1配線104とを電気的に接続する第2配線110を有する。 As shown in FIG. 2, the through electrode substrate 100 is formed on the glass substrate 102, the through holes 10 penetrating the first surface 102 a to the second surface 102 b of the glass substrate 102, and the first surface 102 a of the glass substrate 102. And the adhesion layer 106 provided on the inner wall of the through hole 10 and the penetration electrode 108 formed on the adhesion layer 106, and the penetration is made on the first surface 102a of the glass substrate 102. A second wire 110 electrically connecting the electrode 108 and the first wire 104 is provided.
本実施例では、基板としてガラス材料で構成されたガラス基板102を用いる例を示すが、本開示はこれに限定されるものではなく、シリコンを含む材料で構成されたシリコン基板、アルミナを含む材料で構成されたセラミック基板を用いてもよい。 In this embodiment, an example using a glass substrate 102 made of a glass material as a substrate is shown, but the present disclosure is not limited to this, and a silicon substrate made of a material containing silicon, a material containing alumina A ceramic substrate made of the above may be used.
ガラス基板102は、2つの主面として第1面102a及び第2面102bを有し、少なくとも第1面102a上に第1配線104が形成されている。第1配線104は、例えばTFT(thin film transistor、薄膜トランジスタ)を構成するものでもよい。 The glass substrate 102 has a first surface 102 a and a second surface 102 b as two main surfaces, and the first wiring 104 is formed on at least the first surface 102 a. The first wiring 104 may form, for example, a thin film transistor (TFT).
本実施例では、第1配線104は第1面102a上にのみ形成されているが、本開示はこれに限定されるものではなく、ガラス基板102の第1面102a及び第2面102bの両面に配線が形成されていてもよい。第1配線104の材料は、例えば銅などであってもよい。 In the present embodiment, the first wiring 104 is formed only on the first surface 102a, but the present disclosure is not limited thereto, and both surfaces of the first surface 102a and the second surface 102b of the glass substrate 102 are formed. Wiring may be formed on the The material of the first wiring 104 may be, for example, copper.
ガラス基板102の板厚は、例えば200μm~900μm程度であってもよい。 The plate thickness of the glass substrate 102 may be, for example, about 200 μm to 900 μm.
ガラス基板102の貫通孔10内の側壁には、密着層106及び密着層106の上に形成された貫通電極108が形成されている。密着層106は、ガラス基板102上に貫通電極108の材料を無電解めっきにより形成するための下地として機能する。密着層106は、有機樹脂を含む材料で形成されてもよい。密着層106を構成する有機樹脂を含む材料は、例えば、エポキシ樹脂、アクリル樹脂、ポリイミド樹脂、ウレタン樹脂などであってもよい。密着層106を形成することにより、ガラス表面よりも触媒吸着性に優れる官能基を導入することができ、密着性の良好な銅やニッケルなどの無電解めっきを成膜することができる。 The adhesion layer 106 and the penetration electrode 108 formed on the adhesion layer 106 are formed on the side wall in the through hole 10 of the glass substrate 102. The adhesion layer 106 functions as a base for forming the material of the through electrode 108 on the glass substrate 102 by electroless plating. The adhesion layer 106 may be formed of a material containing an organic resin. The material containing the organic resin constituting the adhesion layer 106 may be, for example, an epoxy resin, an acrylic resin, a polyimide resin, a urethane resin or the like. By forming the adhesion layer 106, it is possible to introduce a functional group which is more excellent in catalyst adsorption than the glass surface, and to form a film of electroless plating of copper, nickel or the like having good adhesiveness.
貫通電極108は、ガラス基板102の表面のうち密着層106が形成された部分に形成される。貫通電極108は、ガラス基板102の上下の導通を得るために形成されるため、ガラス基板102の貫通孔10内の側壁をすべて覆うように形成され、貫通孔10の内壁に沿って中空の円柱状に形成される。貫通電極108の中空部分をスルーホール130という場合がある。また、貫通電極108は、上下の配線と電気的に接続するため、ガラス基板102の第1面102aないし第2面102b上のスルーホール130の周縁部に、ランド108-1(スルーホール径よりも大きな「受け(ランド)」部分)を有してもよい。貫通電極108の材料は、例えば銅やニッケルであってもよい。 The through electrode 108 is formed on a portion of the surface of the glass substrate 102 where the adhesion layer 106 is formed. Since the through electrode 108 is formed to obtain conduction between the upper and lower sides of the glass substrate 102, the through electrode 108 is formed to cover all the side walls in the through hole 10 of the glass substrate 102, and a hollow circle is formed along the inner wall of the through hole 10. It is formed in a columnar shape. The hollow portion of the through electrode 108 may be referred to as a through hole 130. Further, since the through electrode 108 is electrically connected to the upper and lower wirings, the land 108-1 (from the diameter of the through hole) is formed on the peripheral portion of the through hole 130 on the first surface 102a to the second surface 102b of the glass substrate 102. May also have a large "land" portion). The material of the through electrode 108 may be, for example, copper or nickel.
図2に示すように、貫通孔10及びスルーホール130は、同じ中心軸を有する同心円であってもよい。貫通孔10の孔径は、例えば40μm~140μm程度であってもよく、スルーホール130の孔径は、例えば30μm~135μm程度であってもよい。図2に示す配線基板では、貫通孔10の孔径は、スルーホール130の孔径よりも大きくなる。 As shown in FIG. 2, the through holes 10 and the through holes 130 may be concentric circles having the same central axis. The hole diameter of the through hole 10 may be, for example, about 40 μm to 140 μm, and the hole diameter of the through hole 130 may be, for example, about 30 μm to 135 μm. In the wiring substrate shown in FIG. 2, the hole diameter of the through hole 10 is larger than the hole diameter of the through hole 130.
図2には中空のスルーホール130を示すが、スルーホール130の内部は貫通電極108と同じめっきで充填されていてもよく、また有機樹脂や貫通電極108とは別の金属で充填されていてもよい。 Although the hollow through hole 130 is shown in FIG. 2, the inside of the through hole 130 may be filled with the same plating as the through electrode 108, or may be filled with an organic resin or a metal different from the through electrode 108. It is also good.
ガラス基板102の第1面102a上には、ガラス基板102と第1配線104と貫通電極108に接する第2配線110が形成されている。第2配線110は、第1配線104と貫通電極108の第1面102a上のランド108-1とを電気的に接続する架橋配線としての機能を有する。第2配線110の材料は、銅やニッケル、スズなど導電性を有する材料であればどのような材料であってもよい。 On the first surface 102 a of the glass substrate 102, a second wiring 110 in contact with the glass substrate 102, the first wiring 104, and the through electrode 108 is formed. The second wiring 110 has a function as a bridge wiring which electrically connects the first wiring 104 and the land 108-1 on the first surface 102a of the through electrode 108. The material of the second wiring 110 may be any material having conductivity, such as copper, nickel, or tin.
第2配線110は、図2に示すように単層でもよいが、本開示はこれに限定されるものではない。例えば、第2配線110の材料が銅である場合、銅とガラス基板102との密着性を向上させるために、銅とガラス基板102との間にTiなど低抵抗の金属膜からなる密着層を1層以上含む多層構造であってもよい。 The second wire 110 may be a single layer as shown in FIG. 2, but the present disclosure is not limited thereto. For example, when the material of the second wiring 110 is copper, in order to improve the adhesion between copper and the glass substrate 102, an adhesion layer made of a metal film of low resistance such as Ti is interposed between the copper and the glass substrate 102. It may be a multilayer structure including one or more layers.
図10は、本開示の一実施形態に係る貫通電極基板の断面図である。図10に示す第2配線110´は、ガラス基板102の上に形成されるTiなど低抵抗の金属膜からなる密着層110-1と、密着層110-1の上に形成される銅など導電性を有する材料からなる第2配線部分110-2とが積層された2層構造を有する。図10に示す構成によれば、第2配線110´の第2配線部分110-2とガラス基板102との密着性を向上させることができる。また、図示しないが、図10に示す第2配線110´の密着層110-1は、2層以上の低抵抗の金属膜からなる多層構造であってもよい。 FIG. 10 is a cross-sectional view of a through electrode substrate according to an embodiment of the present disclosure. The second wiring 110 ′ shown in FIG. 10 includes an adhesion layer 110-1 formed of a metal film of low resistance such as Ti formed on the glass substrate 102, and a conductor such as copper formed on the adhesion layer 110-1. It has a two-layer structure in which a second wiring portion 110-2 made of a material having elasticity is laminated. According to the configuration shown in FIG. 10, the adhesion between the second wiring portion 110-2 of the second wiring 110 'and the glass substrate 102 can be improved. Further, although not shown, the adhesion layer 110-1 of the second wiring 110 'shown in FIG. 10 may have a multilayer structure made of two or more low resistance metal films.
また、第2配線110は、ガラス基板102の一主面上に離間して形成された第1配線104と貫通電極108とを架橋して電気的に接続することのできる配線であればどのようなものであってもよい。例えば、第2配線110は、第1配線104と貫通電極108とを電気的に接続するワイヤーボンディングであってもよく、また、第1配線104と貫通電極108とを電気的に接続するはんだであってもよい。第2配線110の材料は、例えばニッケル、金、スズ、銅、アルミ、チタン、クロム、ITOなどの金属酸化物などであってもよい。 Also, as long as the second wiring 110 is a wiring which can bridge and electrically connect the first wiring 104 and the through electrode 108 which are formed separately on one main surface of the glass substrate 102. It may be For example, the second wiring 110 may be wire bonding that electrically connects the first wiring 104 and the through electrode 108, and solder that electrically connects the first wiring 104 and the through electrode 108. It may be. The material of the second wiring 110 may be, for example, a metal oxide such as nickel, gold, tin, copper, aluminum, titanium, chromium, or ITO.
図2に示すように、一つの貫通電極108に対して複数の第2配線110が異なる方向に引き出されるように接続されてもよい。しかし、本開示はこれに限定されるものではない。図11は、本開示の一実施形態に係る貫通電極基板の上面図である。図11に示すように、一つの貫通電極108に対して一つの第2配線110のみが接続されて第1配線104に電気的に接続されてもよい。 As shown in FIG. 2, a plurality of second wires 110 may be connected to one through electrode 108 so as to be drawn out in different directions. However, the present disclosure is not limited to this. FIG. 11 is a top view of a through electrode substrate according to an embodiment of the present disclosure. As shown in FIG. 11, only one second wiring 110 may be connected to one through electrode 108 and electrically connected to the first wiring 104.
第1配線104、第2配線110、及び貫通電極108は、導電性を有する材料で形成される。例えば、金、銀、銅、白金、ニッケル、ロジウム、ルテニウム、又はイリジウム等を使用することができる。第1配線104、第2配線110、及び貫通電極108は同一の材料を使用してもよいし、異なる材料を組み合わせて使用してもよい。第1配線104、第2配線110、及び貫通電極108を、同一の材料で形成することにより、特性インピーダンス整合を向上させることができる。 The first wiring 104, the second wiring 110, and the through electrode 108 are formed of a conductive material. For example, gold, silver, copper, platinum, nickel, rhodium, ruthenium, or iridium can be used. The first wire 104, the second wire 110, and the through electrode 108 may use the same material, or may use different materials in combination. Characteristic impedance matching can be improved by forming the first wiring 104, the second wiring 110, and the through electrode 108 using the same material.
本実施形態では、貫通電極108と第1配線104とが、第2配線110によって電気的に接続されているため、貫通電極108とガラス基板102上の第1配線104との導通が確保され、電気的信頼性が向上する。 In the present embodiment, since the through electrode 108 and the first wire 104 are electrically connected by the second wire 110, the conduction between the through electrode 108 and the first wire 104 on the glass substrate 102 is ensured. Electrical reliability is improved.
[配線基板の構造1の変形例]
図2に示す例では、第2配線110は、貫通電極108の第1面102a上のランド108-1に直接接続されているが、本開示はこれに限定されるものではない。図9は、図2に示す本開示の一実施形態に係る貫通電極基板の変形例を示す図である。図9(A)は本開示の一実施形態に係る貫通電極基板の上面図である。図9(B)は、図9(A)に示す切断線における断面図である。
[Modification of Structure 1 of Wiring Board]
In the example shown in FIG. 2, the second wiring 110 is directly connected to the land 108-1 on the first surface 102a of the through electrode 108, but the present disclosure is not limited to this. FIG. 9 is a view showing a modification of the through electrode substrate according to the embodiment of the present disclosure shown in FIG. FIG. 9A is a top view of a through electrode substrate according to an embodiment of the present disclosure. FIG. 9B is a cross-sectional view taken along the section line shown in FIG.
図9に示すように、貫通電極108は、第1面102a上に形成されたランド108-1から延長する配線部分108-2を有してもよい。この場合、第2配線110は、貫通電極108の第1面102a上に形成されたランド108-1から延長する配線部分108-2に直接接続されてもよい。 As shown in FIG. 9, the through electrode 108 may have a wiring portion 108-2 extending from the land 108-1 formed on the first surface 102a. In this case, the second wire 110 may be directly connected to the wire portion 108-2 extending from the land 108-1 formed on the first surface 102a of the through electrode 108.
[配線基板の製造方法1]
図2に示す本開示の第1実施形態に係る貫通電極基板100の製造方法について、図2から図6を参照して説明する。なお、図3から図6において、図1から図2と同じ構成については、同一の符号を付して説明する。
[Method 1 of manufacturing wiring board]
A method of manufacturing the through electrode substrate 100 according to the first embodiment of the present disclosure shown in FIG. 2 will be described with reference to FIGS. 2 to 6. In FIGS. 3 to 6, the same components as those in FIGS. 1 to 2 will be described with the same reference numerals.
はじめに、ガラス基板102上に、第1配線104を形成する(図3を参照)。第1配線104は、TFTなどの素子を構成するものであってもよい。図3ではガラス基板102の第1面102a上に第1配線104が形成されているが、これに限定されるものではなく、第1面102aのみならず、第2面102bにも第1配線104が形成されてもよい。 First, the first wiring 104 is formed on the glass substrate 102 (see FIG. 3). The first wiring 104 may constitute an element such as a TFT. Although the first wiring 104 is formed on the first surface 102 a of the glass substrate 102 in FIG. 3, the present invention is not limited to this, and the first wiring is not only limited to the first surface 102 a but also to the second surface 102 b. 104 may be formed.
次に、片面又は両面に第1配線104が形成されたガラス基板102に、第1面102aと第2面102bとを貫通する貫通孔10を形成する(図4を参照)。ガラス基板102に貫通孔10が形成される位置は、第1配線104が形成されていない部分である。貫通孔10は、第1配線104と離隔した位置に形成される。貫通孔10の形状は、上下の孔径がほぼ一定である円筒状であってもよい。 Next, a through hole 10 penetrating the first surface 102a and the second surface 102b is formed in the glass substrate 102 having the first wiring 104 formed on one side or both sides (see FIG. 4). The position where the through hole 10 is formed in the glass substrate 102 is a portion where the first wiring 104 is not formed. The through hole 10 is formed at a position separated from the first wiring 104. The shape of the through hole 10 may be a cylindrical shape in which the upper and lower hole diameters are substantially constant.
ガラス基板102に貫通孔10を形成する方法は、任意の方法でよい。 The method of forming the through holes 10 in the glass substrate 102 may be any method.
次に、ガラス基板102に形成された貫通孔10の内壁及び第1面102a、第2面102b上の貫通孔の周縁部に、密着層106を形成する(図5を参照)。密着層106は、たとえばスピンコーティング、ディップコーティング、スプレーコーティング等の方法によって形成されてもよい。密着層106は、その後に貫通電極材料を成膜するための密着層として機能する。密着層106は、有機樹脂を含む材料で形成されてもよい。 Next, the adhesion layer 106 is formed on the inner wall of the through hole 10 formed in the glass substrate 102 and the peripheral portion of the through hole on the first surface 102 a and the second surface 102 b (see FIG. 5). The adhesion layer 106 may be formed by a method such as spin coating, dip coating, spray coating, or the like. The adhesion layer 106 functions as an adhesion layer for forming a through electrode material thereafter. The adhesion layer 106 may be formed of a material containing an organic resin.
次に、ガラス基板102の表面のうち密着層106が形成された部分に貫通電極108を形成する(図6を参照)。貫通電極108は、ガラス基板102の表面に形成された密着層106の上に形成される。貫通電極108は、無電解めっき法を使用して銅またはニッケルなどを被膜して形成される。 Next, the through electrode 108 is formed on a portion of the surface of the glass substrate 102 where the adhesion layer 106 is formed (see FIG. 6). The through electrode 108 is formed on the adhesion layer 106 formed on the surface of the glass substrate 102. The through electrode 108 is formed by coating copper or nickel using an electroless plating method.
ここで、図9に示す配線基板の構造1の変形例を製造する場合には、貫通電極108の第1面102a上に形成されたランド108-1から延長する配線部分108-2も、貫通電極108と同時に上記工程にて形成されてもよい。具体的には、ガラス基板102の表面のうち密着層106が形成された部分に、ランド108-1及びランド108-1から延長する配線部分108-2を含む貫通電極108を形成する(図9を参照)。貫通電極108は、ガラス基板102の表面に形成された密着層106の上に形成される。貫通電極108は、無電解めっき法を使用して銅またはニッケルなどを被膜して形成される。 Here, in the case of manufacturing the modified example of the structure 1 of the wiring substrate shown in FIG. 9, the wiring portion 108-2 extending from the land 108-1 formed on the first surface 102a of the through electrode 108 is also penetrated It may be formed at the same time as the electrode 108 in the above process. Specifically, the through electrode 108 including the land 108-1 and the wiring portion 108-2 extending from the land 108-1 is formed on the surface of the glass substrate 102 where the adhesion layer 106 is formed (FIG. 9). See). The through electrode 108 is formed on the adhesion layer 106 formed on the surface of the glass substrate 102. The through electrode 108 is formed by coating copper or nickel using an electroless plating method.
本開示では、密着層106を密着層、又は還元剤として使用することにより、ガラス基板102上に形成された貫通孔10内に無電解めっき法等により貫通電極材料を成膜することができる。 In the present disclosure, by using the adhesion layer 106 as the adhesion layer or the reducing agent, it is possible to form a through electrode material in the through holes 10 formed on the glass substrate 102 by the electroless plating method or the like.
本開示と異なり、密着層106を形成せず、ガラス基板102上に形成された貫通孔10内に、スパッタ法により銅などの貫通電極材料を成膜する方法もある。 Unlike the present disclosure, there is also a method of forming a through electrode material such as copper in the through holes 10 formed on the glass substrate 102 without forming the adhesion layer 106 by a sputtering method.
ガラス基板の貫通孔のアスペクト比が低い場合(例えば、板厚が小さい場合や孔径が大きい場合)であれば、スパッタ法により貫通孔内に銅などの電極材料を成膜する方法を用いる場合でも、貫通電極を形成することは可能である。 If the aspect ratio of the through holes in the glass substrate is low (for example, if the plate thickness is small or the hole diameter is large), even if a method of forming an electrode material such as copper in the through holes by sputtering is used. It is possible to form through electrodes.
アスペクト比とは、板厚/孔径の値であり、ガラス基板102の板厚とガラス基板102の貫通孔の孔径との関係は、ガラス基板の貫通孔のアスペクト比で表現される。例えば板厚が大きい場合や孔径が小さい場合はアスペクト比が高くなり、板厚が小さい場合や孔径が大きい場合はアスペクト比が小さくなる。 The aspect ratio is a value of plate thickness / hole diameter, and the relationship between the plate thickness of the glass substrate 102 and the hole diameter of the through hole of the glass substrate 102 is expressed by the aspect ratio of the through hole of the glass substrate. For example, when the plate thickness is large or the hole diameter is small, the aspect ratio is high, and when the plate thickness is small or the hole diameter is large, the aspect ratio is small.
しかし、ガラス基板の貫通孔のアスペクト比が高い場合(例えば、板厚が大きい場合や孔径が小さい場合)は、スパッタ法ではガラス基板の主面から遠い貫通孔の内部にまで十分に電極材料を成膜することができないため、貫通孔の内部に電極材料が形成されていない空白部分(ボイドや鬆(す))が発生しやすくなり、電気的信頼性に問題がある。例えば、ガラス基板の貫通孔のアスペクト比が3以上である場合には、スパッタ法では貫通孔内にボイドや鬆(す)が発生しやすく、電気的信頼性に問題が生じる。 However, when the aspect ratio of the through holes in the glass substrate is high (for example, when the plate thickness is large or the hole diameter is small), the sputtering method is sufficient for the electrode material to reach the inside of the through holes far from the main surface of the glass substrate. Since film formation can not be performed, a blank portion (void or soot) in which the electrode material is not formed is likely to be generated inside the through hole, and there is a problem in electrical reliability. For example, when the aspect ratio of the through holes of the glass substrate is 3 or more, in the sputtering method, voids or soot are easily generated in the through holes, and a problem occurs in the electrical reliability.
本開示では、密着層106を密着層、又は還元剤として使用することにより、ガラス基板102に形成される貫通孔10のアスペクト比が高い場合でも、無電解めっき法等により貫通孔10内に貫通電極材料を十分に成膜することができる。したがって、本開示は、特にガラス基板102に形成される貫通孔10のアスペクト比が3以上である高密度配置の配線基板において、電気的信頼性をより向上させることができる点で有益である。 In the present disclosure, even if the aspect ratio of the through hole 10 formed in the glass substrate 102 is high by using the adhesion layer 106 as the adhesion layer or reducing agent, the penetration hole 10 is penetrated by the electroless plating method or the like. The electrode material can be sufficiently deposited. Therefore, the present disclosure is advantageous in that the electrical reliability can be further improved, particularly in a wiring substrate in a high density arrangement in which the aspect ratio of the through holes 10 formed in the glass substrate 102 is 3 or more.
次に、ガラス基板102上に形成された第1配線104と、第1配線104から離間した位置に形成された貫通電極108とを電気的に接続するため、第1配線104とガラス基板102と貫通電極108とに接する第2配線110を形成する(図2を参照)。図2では、第2配線110は、スパッタ法などによってガラス基板の第1面102aに接するように形成された配線であるが、本開示はこれに限定されるものではない。 Next, in order to electrically connect the first wiring 104 formed on the glass substrate 102 and the through electrode 108 formed at a position separated from the first wiring 104, the first wiring 104 and the glass substrate 102 are connected. A second wiring 110 is formed in contact with the through electrode 108 (see FIG. 2). In FIG. 2, the second wiring 110 is a wiring formed to be in contact with the first surface 102 a of the glass substrate by sputtering or the like, but the present disclosure is not limited to this.
上述したように、ガラス基板102に無電解銅めっきを行って貫通電極108を形成するためには、ガラス基板102に密着層106を密着層として形成する必要がある。また、密着層106を介して貫通電極108を形成するだけでは、ガラス基板102上に予め形成されている第1配線104などの配線層と貫通電極108との導通を得ることができない。そこで、本開示は、ガラス基板102上に予め形成されている第1配線104などの配線層と、密着層106を介して形成された貫通電極108との導通を得るために、架橋配線として第2配線110を備える。 As described above, in order to form the through electrode 108 by performing electroless copper plating on the glass substrate 102, the adhesion layer 106 needs to be formed on the glass substrate 102 as an adhesion layer. Further, by forming the through electrode 108 only via the adhesion layer 106, it is not possible to obtain conduction between the through electrode 108 and a wiring layer such as the first wiring 104 formed in advance on the glass substrate 102. Therefore, in the present disclosure, in order to obtain conduction between a wiring layer such as the first wiring 104 formed in advance on the glass substrate 102 and the through electrode 108 formed via the adhesion layer 106, 2 wiring 110 is provided.
本開示では、ガラス基板102の一主面上に離間して形成された第1配線104と貫通電極108とを、第2配線110が架橋配線として電気的に接続するため、貫通電極108と第1配線104との導通が確保され、電気的信頼性の向上した貫通電極基板を提供することができる。 In the present disclosure, since the second wiring 110 electrically connects the first wiring 104 and the through electrode 108 which are formed apart on one main surface of the glass substrate 102 as the bridge wiring, the through electrode 108 and the first wiring 104 are separated. Electrical connection with the first wiring 104 can be secured, and a through electrode substrate with improved electrical reliability can be provided.
また、図2に示すように、第2配線110は、スパッタ法などによってガラス基板の第1面102aに接するように形成された配線であってもよい。この場合、第2配線110は、ガラス基板102の一主面に直接接する(絶縁分離されていない)ように配置され、同じ面に直接接する第1配線104と貫通電極108(ただし貫通電極108とガラス基板102との間には密着層106が介在している。)とを架橋する。具体的には、図2において、ガラス基板の第1面102aに直接接する第1配線104と、貫通電極108の第1面102a上のランド108-1とは、ガラス基板の第1面102aに直接接する第2配線110によって電気的に接続されている。 Further, as shown in FIG. 2, the second wiring 110 may be a wiring formed to be in contact with the first surface 102 a of the glass substrate by a sputtering method or the like. In this case, the second wiring 110 is disposed so as to be in direct contact with (not isolated from) one main surface of the glass substrate 102, and is directly in contact with the same surface. The adhesion layer 106 intervenes between the glass substrate 102 and the glass substrate 102). Specifically, in FIG. 2, the first wiring 104 in direct contact with the first surface 102 a of the glass substrate and the land 108-1 on the first surface 102 a of the through electrode 108 are on the first surface 102 a of the glass substrate It is electrically connected by the 2nd wiring 110 which touches directly.
図2に示す第2配線110の構造によれば、ガラス基板の第1面102aに直接接する第1配線104と貫通電極108のランド108-1とが、ガラス基板の第1面102aに直接接する第2配線110によって電気的に接続されているため、第1配線104や貫通電極108のランド108-1等が形成されているガラス基板の第1面102aに直接接する層内での配線密度を高めることができる。このようにガラス基板の第1面102aに直接接する層内の配線密度が高まれば、その分、他の層への配線形成が容易になり、配線のデザイン自由度が高くなる。 According to the structure of the second wiring 110 shown in FIG. 2, the first wiring 104 in direct contact with the first surface 102a of the glass substrate and the land 108-1 of the through electrode 108 are in direct contact with the first surface 102a of the glass substrate. Since the second wiring 110 is electrically connected, the wiring density in the layer directly in contact with the first surface 102 a of the glass substrate on which the first wiring 104 and the land 108-1 of the through electrode 108 are formed is It can be enhanced. As described above, if the wiring density in the layer directly in contact with the first surface 102 a of the glass substrate is increased, the wiring formation to other layers becomes easier, and the design freedom of the wiring is increased.
また、第1配線104と貫通電極108のランド108-1とが、ガラス基板の第1面102aに直接接する同じ層内で接続されるため、第2配線110の配線長を短くすることができるので、抵抗が低く安定的に電流を流すことができる。また、第2配線110が、第1配線104や貫通電極108のランド108-1と同じ面に直接接するため、配線層を低背化することができる。さらに、当該配線層の上に絶縁層を介して他の配線を積層する場合、下層配線層の平坦性を確保することができる。 Further, since the first wiring 104 and the land 108-1 of the through electrode 108 are connected in the same layer in direct contact with the first surface 102a of the glass substrate, the wiring length of the second wiring 110 can be shortened. Therefore, the resistance is low and current can flow stably. In addition, since the second wiring 110 is in direct contact with the same surface as the first wiring 104 and the land 108-1 of the through electrode 108, the height of the wiring layer can be reduced. Furthermore, when another wiring is stacked on the wiring layer via the insulating layer, the flatness of the lower wiring layer can be secured.
また、第1配線104、貫通電極108のランド108-1、及び第2配線110が、同じガラス基板の第1面102aを下地として形成されているため、ガラス基板の第1面102aの熱膨張による応力が、第1配線104、貫通電極108、及び第2配線110のそれぞれに均一にかかるため、配線の歪み・断線が発生しにくく、接続信頼性が高くなる。 In addition, since the first wiring 104, the land 108-1 of the through electrode 108, and the second wiring 110 are formed with the first surface 102a of the same glass substrate as a base, the thermal expansion of the first surface 102a of the glass substrate Since the stress due to the stress uniformly applies to each of the first wiring 104, the through electrode 108, and the second wiring 110, distortion and disconnection of the wiring are less likely to occur, and connection reliability is enhanced.
[配線基板の構造2]
配線基板の構成2として、図7及び図8を参照して、本開示の他の一実施形態に係る貫通電極基板について説明する。なお、図1及び図2と同じ構成については、同一の符号を付して説明する。
[Structure 2 of wiring board]
As a second configuration of the wiring substrate, a through electrode substrate according to another embodiment of the present disclosure will be described with reference to FIGS. 7 and 8. In addition, about the same structure as FIG.1 and FIG.2, the same code | symbol is attached | subjected and demonstrated.
図7に示す貫通電極基板100´は、図2に示す貫通電極基板100を構成するガラス基板102、第1貫通電極108a、第1配線104、及び第2配線110を含む。図7に示す貫通電極基板100´は、さらに絶縁層112を有し、絶縁層112上には、第1配線104の上層の配線層を構成する第3配線114を有する。絶縁層112は、第1貫通電極108a上に開口部20を有し、開口部20の内壁には第2貫通電極108bが形成される。第2貫通電極108bと第3配線114とは、絶縁層112上の第4配線116によって架橋される構成を有する。 A through electrode substrate 100 ′ shown in FIG. 7 includes a glass substrate 102 constituting the through electrode substrate 100 shown in FIG. 2, a first through electrode 108 a, a first wire 104, and a second wire 110. The through electrode substrate 100 ′ shown in FIG. 7 further has an insulating layer 112, and on the insulating layer 112, a third wiring 114 that constitutes a wiring layer above the first wiring 104. The insulating layer 112 has an opening 20 on the first through electrode 108 a, and the second through electrode 108 b is formed on the inner wall of the opening 20. The second through electrode 108 b and the third wiring 114 are configured to be bridged by the fourth wiring 116 on the insulating layer 112.
絶縁層112は、ガラス基板102の第1面102a上の第1配線104、第2配線110、第1貫通電極108の上を被覆するように設けられている。絶縁層112は、有機樹脂材料で構成された絶縁層であり、第1配線104で構成される配線層上に、第3配線層114で構成される別の配線層を積層するための層間絶縁膜として機能する。 The insulating layer 112 is provided so as to cover the first wiring 104, the second wiring 110, and the first through electrode 108 on the first surface 102 a of the glass substrate 102. The insulating layer 112 is an insulating layer formed of an organic resin material, and is an interlayer insulating layer for laminating another wiring layer formed of the third wiring layer 114 on the wiring layer formed of the first wiring 104. It functions as a membrane.
絶縁層112は、第1貫通電極108aが形成された貫通孔10と重畳する位置に開口部20を有し、絶縁層112の開口部20の内壁には、第2貫通電極108bが形成されている。 The insulating layer 112 has an opening 20 at a position overlapping the through hole 10 in which the first through electrode 108 a is formed, and the second through electrode 108 b is formed on the inner wall of the opening 20 of the insulating layer 112. There is.
第2貫通電極108bは、有機樹脂材料で構成された絶縁層112の開口部20に形成されるため、第1貫通電極108aと異なり、密着層を介在させる必要がない。したがって、第2貫通電極108bは、絶縁層112の表面に無電解銅めっきなどの方法により直接形成することができる。 The second through electrode 108b is formed in the opening 20 of the insulating layer 112 made of an organic resin material, and therefore, unlike the first through electrode 108a, it is not necessary to interpose an adhesion layer. Therefore, the second through electrode 108 b can be formed directly on the surface of the insulating layer 112 by a method such as electroless copper plating.
第2貫通電極108bは、上層に形成される第3配線114と第1貫通電極108aとを電気的に接続し、ガラス基板102の第1面102a上に形成される第3配線114と第2面102b上に形成される他の配線等との間で上下の導通を得るために機能する。 The second through electrode 108 b electrically connects the third wire 114 formed in the upper layer to the first through electrode 108 a, and the third wire 114 and the second wire 114 formed on the first surface 102 a of the glass substrate 102. It functions to obtain upper and lower conduction with other interconnections and the like formed on the surface 102b.
第2貫通電極108bと第3配線とは、絶縁層112上の離間した位置に形成されており、第4配線116は、絶縁層112上で第2貫通電極108bと第3配線とを架橋して同一層で電気的に接続する。 The second through electrode 108 b and the third wire are formed at spaced positions on the insulating layer 112, and the fourth wire 116 bridges the second through electrode 108 b and the third wire on the insulating layer 112. Electrically connect in the same layer.
図7に示す貫通電極基板100´では、ガラス基板102の第1面102a上に、第1配線104を含む配線層と第3配線を含む配線層とが積層されており、第1配線104を含む配線層において、ガラス基板102の第1面102aに直接接する第1貫通電極108aと第1配線104とが、ガラス基板102の第1面102aに直接接する第2配線110によって同一層で架橋される構成を有する。さらに、第3配線114を含む配線層において、絶縁層112の上面に直接接する第2貫通電極108bと第3配線114とが、絶縁層112の上面に直接接する第4配線116によって同一層で架橋される構成を有する。その他の構成は図1及び図2に示す貫通電極基板100と同様である。 In the through electrode substrate 100 ′ shown in FIG. 7, the wiring layer including the first wiring 104 and the wiring layer including the third wiring are stacked on the first surface 102 a of the glass substrate 102. In the included wiring layer, the first through electrode 108a and the first wiring 104 in direct contact with the first surface 102a of the glass substrate 102 are bridged in the same layer by the second wiring 110 in direct contact with the first surface 102a of the glass substrate 102. Configuration. Furthermore, in the wiring layer including the third wiring 114, the second through electrode 108b in direct contact with the upper surface of the insulating layer 112 and the third wiring 114 are bridged in the same layer by the fourth wiring 116 in direct contact with the upper surface of the insulating layer 112. Configuration. The other configuration is the same as that of the through electrode substrate 100 shown in FIGS. 1 and 2.
図7では、ガラス基板102の第1面102a上に、第1配線104を含む配線層と第3配線を含む配線層の2層が積層されているが、本開示はこれに限定されるものではなく、3層以上の配線層が積層されてもよい。 In FIG. 7, two layers of the wiring layer including the first wiring 104 and the wiring layer including the third wiring are stacked on the first surface 102 a of the glass substrate 102, but the present disclosure is limited thereto Instead, three or more wiring layers may be stacked.
また、図7に示すように、貫通電極基板100´は、第3配線114とガラス基板102の第2面102b上に形成された他の配線等とを上下に導通する第3貫通電極108cをさらに備えてもよい。図7に示すように、第3貫通電極108cとガラス基板102との間には、絶縁層112が形成されていてもよい。絶縁層112の製造方法としては、例えば、ガラス基板102の表面にローラーコーターを用いて絶縁性の液状レジストフィルムをガラス基板102の表面に塗工する方法により絶縁層112を形成してもよい。その他、ディップコーターやスプレーコーターを用いて絶縁層112を形成してもよい。 In addition, as shown in FIG. 7, the through electrode substrate 100 ′ includes a third through electrode 108 c which vertically conducts the third wiring 114 and another wiring or the like formed on the second surface 102 b of the glass substrate 102. You may provide further. As shown in FIG. 7, an insulating layer 112 may be formed between the third through electrode 108 c and the glass substrate 102. As a method of manufacturing the insulating layer 112, for example, the insulating layer 112 may be formed by a method in which an insulating liquid resist film is coated on the surface of the glass substrate 102 using a roller coater. In addition, the insulating layer 112 may be formed using a dip coater or a spray coater.
図8は、図7に示す貫通電極基板の上面図である。図8において、最上面の配線や貫通電極を実線で示し、下層に位置する配線や貫通電極は透過図として破線で示した。図7及び図8に示すように、複数の第1貫通電極108aは第1配線104を含む配線層で互いに接続されており、第2貫通電極108bは第1配線104の上層である第3配線114を含む配線層で他の貫通電極である第3貫通電極108cと接続されている。 FIG. 8 is a top view of the through electrode substrate shown in FIG. In FIG. 8, the wiring and the through electrode on the uppermost surface are indicated by a solid line, and the wiring and the through electrode positioned in the lower layer are indicated by a broken line as a transparent view. As shown in FIGS. 7 and 8, the plurality of first through electrodes 108 a are connected to one another by the wiring layer including the first wiring 104, and the second through electrode 108 b is a third wiring that is the upper layer of the first wiring 104. It is connected to the third through electrode 108 c which is another through electrode by the wiring layer including 114.
本開示では、第4配線116が、絶縁層112上に離間して形成された第3配線114と第2貫通電極108bとを同一層で架橋して接続するため、第2貫通電極108bと第3配線114との導通が確保され、電気的信頼性の向上した貫通電極基板100´を提供することができる。 In the present disclosure, since the fourth wire 116 bridges and connects the third wire 114 and the second through electrode 108 b which are separately formed on the insulating layer 112 in the same layer, the second through electrode 108 b and the second through electrode 108 b are separated. Electrical connection with the three wires 114 is ensured, and a through electrode substrate 100 'with improved electrical reliability can be provided.
図7及び図8に示すように、第2貫通電極108bは、中空部分であるスルーホール130bの周縁部にランド108b-1を形成しており、このランドが他の配線と貫通電極とを電気的に接続する接続部分として機能する。また、第1貫通電極108a及び第3貫通電極108cも、第2貫通電極108bと同様にスルーホールの周縁部にランドを有していてもよい。 As shown in FIGS. 7 and 8, the second through electrode 108b forms a land 108b-1 at the periphery of the through hole 130b which is a hollow portion, and this land electrically connects the other wiring and the through electrode. Function as a connection part that connects Also, the first through electrode 108a and the third through electrode 108c may also have lands at the peripheral edge of the through hole, as with the second through electrode 108b.
図7及び図8に示す複数の配線層を有する貫通電極基板100´によれば、電気的信頼性を確保しつつ、配線層を積層することで、より配線密度を向上させることができる。 According to the through electrode substrate 100 'having a plurality of wiring layers shown in FIG. 7 and FIG. 8, the wiring density can be further improved by laminating the wiring layers while securing the electrical reliability.
本開示の実施形態として上述した各実施形態は、相互に矛盾しない限りにおいて、適宜組み合わせて実施することができる。また、各実施形態を基にして、当業者が適宜構成要素の追加、削除もしくは設計変更を行ったものも、本開示の要旨を備えている限り、本開示の範囲に含まれる。 The embodiments described above as the embodiments of the present disclosure can be implemented in combination as appropriate as long as they do not contradict each other. In addition, those to which a person skilled in the art appropriately adds, deletes, or changes the design of components based on each embodiment are also included in the scope of the present disclosure as long as they include the gist of the present disclosure.
また、上述した各実施形態によりもたらされる作用効果とは異なる他の作用効果であっても、本明細書の記載から明らかなもの、又は、当業者において容易に予測し得るものについては、当然に本開示によりもたらされるものと理解される。 In addition, even if other functions and effects different from the functions and effects provided by the above-described embodiments are apparent from the description of the present specification or those that can be easily predicted by those skilled in the art, it is natural. It is understood that the present disclosure results.
100、100´:貫通電極基板、102:ガラス基板、102a:第1面、102b:第2面、104:第1配線、10:貫通孔、108、108a、108b:貫通電極、110:第2配線、106:密着層、112:絶縁層、114:第3配線、116:第4配線、20:開口部 100, 100 ': through electrode substrate, 102: glass substrate, 102a: first surface, 102b: second surface, 104: first wiring, 10: through hole, 108, 108a, 108b: through electrode, 110: second Wiring, 106: adhesion layer, 112: insulating layer, 114: third wiring, 116: fourth wiring, 20: opening

Claims (9)

  1.  無機材料で構成された基板と、
     前記基板の上に設けられた第1配線と、
     前記第1配線と離隔した位置において前記基板に設けられた貫通孔と、
     前記貫通孔の内壁に設けられた貫通電極と、
     前記第1配線及び前記貫通電極を接続する第2配線と、
     を有する、貫通電極基板。
    A substrate made of an inorganic material,
    A first wire provided on the substrate;
    A through hole provided in the substrate at a position separated from the first wiring;
    A through electrode provided on the inner wall of the through hole;
    A second wire connecting the first wire and the through electrode;
    Through electrode substrate.
  2.  前記基板と前記貫通電極との間に設けられた密着層をさらに有する、請求項1に記載の貫通電極基板。 The penetration electrode substrate according to claim 1, further comprising an adhesion layer provided between the substrate and the penetration electrode.
  3.  前記第2配線は、さらに前記密着層に接する、請求項2に記載の貫通電極基板。 The through electrode substrate according to claim 2, wherein the second wiring further contacts the adhesion layer.
  4.  前記密着層は、有機樹脂材料を含む、請求項2に記載の貫通電極基板。 The through electrode substrate according to claim 2, wherein the adhesion layer contains an organic resin material.
  5.  前記第1配線、前記第2配線及び前記貫通電極の上に設けられた絶縁層と、
     前記絶縁層の上に設けられた第3配線と、
     前記絶縁層、前記第3配線及び前記貫通電極に接する第4配線と、をさらに有する、請求項1から請求項4のいずれか1項に記載の貫通電極基板。
    An insulating layer provided on the first wiring, the second wiring, and the through electrode;
    A third wire provided on the insulating layer;
    The penetration electrode substrate according to any one of claims 1 to 4, further comprising: a fourth interconnection in contact with the insulating layer, the third interconnection, and the penetration electrode.
  6.  前記絶縁層は、有機樹脂材料で構成され、
     前記貫通電極は、前記貫通孔の内壁及び前記絶縁層に設けられた開口部の内側に設けられる、請求項5に記載の貫通電極基板。
    The insulating layer is made of an organic resin material,
    The through electrode substrate according to claim 5, wherein the through electrode is provided on an inner wall of the through hole and an opening provided in the insulating layer.
  7.  前記貫通電極は、前記貫通孔の内壁に設けられた第1貫通電極と、前記絶縁層に設けられた前記開口部の内側に設けられた第2貫通電極とを含む、請求項6に記載の貫通電極基板。 The said penetration electrode is a 1st penetration electrode provided in the inner wall of the said penetration hole, and the 2nd penetration electrode provided in the inside of the said opening provided in the said insulating layer. Through electrode substrate.
  8.  前記貫通孔のアスペクト比が3以上である、請求項1から請求項4のいずれか1項に記載の貫通電極基板。 The through electrode substrate according to any one of claims 1 to 4, wherein an aspect ratio of the through hole is 3 or more.
  9.  請求項1から請求項4のいずれか1項に記載の貫通電極基板を用いた半導体装置。 The semiconductor device using the penetration electrode substrate according to any one of claims 1 to 4.
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