TW201924505A - Through-electrode substrate and semiconductor device using through-electrode substrate - Google Patents

Through-electrode substrate and semiconductor device using through-electrode substrate Download PDF

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Publication number
TW201924505A
TW201924505A TW107133985A TW107133985A TW201924505A TW 201924505 A TW201924505 A TW 201924505A TW 107133985 A TW107133985 A TW 107133985A TW 107133985 A TW107133985 A TW 107133985A TW 201924505 A TW201924505 A TW 201924505A
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Prior art keywords
wiring
electrode
substrate
glass substrate
hole
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TW107133985A
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Chinese (zh)
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TWI782100B (en
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中澤進
笹生恵大
高橋直大
古庄宏樹
千吉良敦子
成田祐治
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日商大日本印刷股份有限公司
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Photovoltaic Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

This through-electrode substrate comprises: a substrate constituted by an inorganic material; first wiring disposed on the substrate; a through-hole disposed on the substrate at a position apart from the first wiring; a through-electrode disposed on the inner wall of the through-hole; and second wiring connecting the first wiring and the through-electrode. According to the present disclosure, electrical continuity between the through-electrode and the wiring on the substrate is ensured in a high aspect ratio through-electrode substrate using a glass substrate, and a through-electrode substrate with improved electrical reliability and a method for producing the same can be provided.

Description

貫通電極基板及使用有貫通電極基板之半導體裝置Through electrode substrate and semiconductor device using through electrode substrate

本發明係關於一種貫通電極基板。尤其是關於一種具有將貫通電極與基板上之配線交聯之交聯配線的貫通電極基板。The present invention relates to a through electrode substrate. In particular, the present invention relates to a through electrode substrate having a crosslinked wiring that crosslinks a through electrode and a wiring on a substrate.

近年來,隨著智慧型手機或筆記型電腦等電子機器之小型化或高速化,關於構成電子機器之半導體零件或裝載半導體零件之配線基板,亦不斷高密度化、高速化。In recent years, with the miniaturization and high speed of electronic devices such as smart phones and notebook computers, the wiring boards that constitute semiconductor devices or semiconductor components that are used for electronic devices have been increasing in density and speed.

於積層複數個配線基板之多層配線基板中,為了連接上下之配線,而使用形成有貫通配線基板之貫通電極的貫通電極基板。作為形成此種貫通電極之方法,當基材為有機物之有機基板的情形時,為了於貫通孔內形成配線得到導通,藉由進行無電鍍銅,而可得到形成於基板上之配線與形成於貫通孔內之貫通電極的導通。In the multilayer wiring board in which a plurality of wiring boards are laminated, a through electrode substrate on which a through electrode penetrating the wiring board is formed is used in order to connect the upper and lower wirings. In the case of forming such a through electrode, when the substrate is an organic substrate of an organic material, in order to form a wiring in the through hole, the wiring formed on the substrate can be obtained by performing electroless copper plating. The through electrode in the through hole is electrically connected.

於專利文獻1,揭示一種印刷配線基板,該印刷配線基板具有通孔(via hole),該通孔係於基板形成有底部之孔,然後於有底部之孔內形成導電層而成,其中該基材為玻璃環氧樹脂(glass epoxy)。
[先前技術文獻]
[專利文獻]
Patent Document 1 discloses a printed wiring board having a via hole formed in a hole in which a bottom portion is formed in a substrate, and then a conductive layer is formed in a hole having a bottom portion, wherein the conductive layer is formed The substrate is a glass epoxy.
[Previous Technical Literature]
[Patent Literature]

專利文獻1:日本特開2008-205070號公報Patent Document 1: Japanese Laid-Open Patent Publication No. 2008-205070

[發明所欲解決之課題][Problems to be solved by the invention]

然而,當基材為由玻璃、矽或陶瓷等無機材料構成之基板的情形時,難以將貫通孔之內壁作同樣地粗糙化,而為了形成無電鍍銅,必須預先形成密接層。又,當形成密接層後進行無電鍍銅之情形時,鍍銅僅會形成於形成有密接層之部分。於此情形時,若以無電鍍銅來連接基板上之配線與貫通孔內之貫通電極,則由於配線與貫通電極會透過絕緣性密接層連接,故電可靠性會有問題。However, when the substrate is a substrate made of an inorganic material such as glass, tantalum or ceramic, it is difficult to roughen the inner wall of the through hole, and in order to form the electroless copper, it is necessary to form an adhesion layer in advance. Further, when electroless copper is formed after forming the adhesion layer, copper plating is formed only in the portion where the adhesion layer is formed. In this case, when the wiring on the substrate and the through electrode in the through hole are connected by electroless copper plating, since the wiring and the through electrode are connected through the insulating adhesive layer, electrical reliability may be problematic.

鑑於上述問題,本發明的目的之一為提供一種貫通電極基板及其製造方法,該貫通電極基板為使用由玻璃等無機材料構成之基板的高長寬比(aspect ratio)之貫通電極基板,可確保貫通電極與基板上之配線的導通,電可靠性獲得提升。
[用以解決課題之手段]
In view of the above problems, an object of the present invention is to provide a through electrode substrate which is a through electrode substrate having a high aspect ratio of a substrate made of an inorganic material such as glass, and a method for manufacturing the same, which can ensure the penetration. The electrical conductivity is improved by the conduction of the electrodes to the wiring on the substrate.
[Means to solve the problem]

本發明之一實施形態的貫通電極基板具有:
由無機材料構成之基板;
設置於前述基板上之第1配線;
於與前述第1配線分離之位置,設置於前述基板之貫通孔;
設置於前述貫通孔之內壁的貫通電極;及
連接前述第1配線及前述貫通電極之第2配線。
A through electrode substrate according to an embodiment of the present invention has:
a substrate composed of an inorganic material;
a first wiring provided on the substrate;
a through hole formed in the substrate at a position separated from the first wiring;
a through electrode provided on an inner wall of the through hole; and a second wire connecting the first wire and the through electrode.

本發明之一實施形態的貫通電極基板,亦可進一步具有設置於前述基板與前述貫通電極之間的密接層。The through electrode substrate according to the embodiment of the present invention may further include an adhesion layer provided between the substrate and the through electrode.

於本發明之一實施形態的貫通電極基板中,前述第2配線亦可進一步與前述密接層接觸。In the through electrode substrate according to the embodiment of the present invention, the second wiring may be further in contact with the adhesion layer.

於本發明之一實施形態的貫通電極基板中,前述密接層亦可含有有機樹脂材料。In the through electrode substrate according to the embodiment of the present invention, the adhesion layer may contain an organic resin material.

本發明之一實施形態的貫通電極基板,亦可進一步具有:
設置於前述第1配線、前述第2配線及前述貫通電極上之絕緣層;
設置於前述絕緣層上之第3配線;及
與前述絕緣層、前述第3配線及前述貫通電極接觸之第4配線。
The through electrode substrate according to the embodiment of the present invention may further include:
An insulating layer provided on the first wiring, the second wiring, and the through electrode;
a third wiring provided on the insulating layer; and a fourth wiring in contact with the insulating layer, the third wiring, and the through electrode.

於本發明之一實施形態的貫通電極基板中,前述絕緣層亦可由有機樹脂材料構成,前述貫通電極可設置於前述貫通孔之內壁及設於前述絕緣層之開口部的內側。In the through electrode substrate according to the embodiment of the present invention, the insulating layer may be made of an organic resin material, and the through electrode may be provided on an inner wall of the through hole and inside an opening of the insulating layer.

於本發明之一實施形態的貫通電極基板中,前述貫通電極亦可含有:
設置於前述貫通孔之內壁的第1貫通電極;及
設置於設在前述絕緣層之前述開口部之內側的第2貫通電極。
In the through electrode substrate according to the embodiment of the present invention, the through electrode may further include:
a first through electrode provided on an inner wall of the through hole; and a second through electrode provided inside the opening of the insulating layer.

本發明之一實施形態的貫通電極基板其前述貫通孔之長寬比亦可為3以上。
[發明之效果]
In the through electrode substrate according to the embodiment of the present invention, the through hole may have an aspect ratio of 3 or more.
[Effects of the Invention]

若根據本發明,則可提供一種貫通電極基板及其製造方法,該貫通電極基板為使用玻璃基板之高長寬比的貫通電極基板,可確保貫通電極與基板上之配線的導通,電可靠性獲得提升。According to the present invention, it is possible to provide a through electrode substrate which is a through electrode substrate using a high aspect ratio of a glass substrate, and which can ensure conduction between the through electrode and the wiring on the substrate, and improve electrical reliability. .

以下,一邊參照圖式等,一邊說明本發明之各實施形態。惟,本發明於不脫離其要旨之範圍內,可用各種各樣之態樣加以實施,並不限定於以下例示之實施形態的記載內容作解釋。Hereinafter, each embodiment of the present invention will be described with reference to the drawings and the like. However, the present invention can be implemented in various forms without departing from the spirit and scope of the invention, and is not limited to the description of the embodiments exemplified below.

圖式有時會為了使說明更加明確,而相較於實際之態樣,示意地表示各部分之寬度、厚度、形狀等,但其僅為一例示,並不限定本發明之解釋。於本說明書及各圖式中,對於具備與已揭示之圖所說明者相同功能的元件,有時會賦予相同符號,並省略重複之說明。The drawings sometimes show the width, thickness, shape, and the like of the respective portions in order to clarify the description, but the present invention is merely illustrative and does not limit the explanation of the present invention. In the specification and the drawings, the same reference numerals will be given to the elements having the same functions as those described in the drawings, and the description thereof will be omitted.

於本說明書及申請專利範圍中,當表現將另外之構造體配置於某構造體上的態樣時,在僅記述為「於...上」之情形時,只要沒有特別說明,係包含「以與某構造體接觸之方式將另外之構造體配置於正上方的情形」與「進一步透過不同之構造體將另外之構造體配置於某構造體上方的情形」此兩種情形。又,於本說明書及申請專利範圍中,「U」及其箭頭在剖面中表示上或上方,而「D」及其箭頭則在剖面中表示下或下方。In the case of the present specification and the patent application, when a structure in which another structure is disposed on a certain structure is described as being "on", unless otherwise specified, "including" There are two cases where the other structure is placed directly above the structure, and the case where the other structure is placed above the structure by the different structures. Further, in the specification and the patent application, "U" and its arrows indicate upper or upper in the cross section, and "D" and its arrows indicate lower or lower in the cross section.

於本說明書及申請專利範圍中,某構造體與另外之構造體「重疊」此一表現,意指於俯視此等之構造體時,至少一部分重疊。換言之,意指當此等構造體中之任一者位於另一者之上或者之下,且從上面或者下面觀看此等構造體的情形時,彼此至少一部分重疊。In the context of the present specification and the patent application, the expression "overlap" of a structure with another structure means that at least a part of the structure overlaps when looking down on the structures. In other words, it means that when any one of these structures is above or below the other and views of such structures from above or below, at least a portion overlaps each other.

關於本發明第1實施形態之貫通電極基板100的構成及貫通電極基板100的製造方法,參照圖1至圖6加以說明。The configuration of the through electrode substrate 100 and the method of manufacturing the through electrode substrate 100 according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 6 .

[半導體裝置之構造]
將表示半導體裝置1000之一例的俯視圖揭示於圖1,該半導體裝置1000具有為本發明實施形態之一的貫通電極基板100。半導體裝置1000具有印刷基板200、貫通電極基板100、積體電路300、凸塊122及配線層120。
[Configuration of Semiconductor Device]
A plan view showing an example of a semiconductor device 1000 is disclosed in FIG. 1. The semiconductor device 1000 has a through electrode substrate 100 which is one embodiment of the present invention. The semiconductor device 1000 includes a printed circuit board 200, a through electrode substrate 100, an integrated circuit 300, bumps 122, and a wiring layer 120.

積體電路300亦可設置複數個於配線層120上,複數個積體電路300亦可透過配線層120彼此電連接。又,各積體電路300透過配線層120及凸塊122等導電體與貫通電極基板100電連接。貫通電極基板100透過後述之貫通電極108與印刷基板200電連接。The integrated circuit 300 may be provided in plural numbers on the wiring layer 120, and the plurality of integrated circuits 300 may be electrically connected to each other through the wiring layer 120. Further, each integrated circuit 300 is electrically connected to the through electrode substrate 100 through a conductor such as the wiring layer 120 and the bump 122. The through electrode substrate 100 is electrically connected to the printed circuit board 200 through a through electrode 108 which will be described later.

於圖1,雖然揭示1個與配線層120電連接之積體電路300構裝於貫通電極基板100之例,但並不限定於此處所示之例。積體電路300之端子數可為4個,亦可為5個以上,又,亦可未達4個。又,構裝於貫通電極基板100之積體電路300的個數,可為複數個,亦可為1個。並且,構裝於貫通電極基板100之積體電路300,亦可構裝複數個端子數不同之積體電路。可根據半導體裝置1000之用途,適當加以選擇。另,於圖1,雖然揭示貫通電極基板100構裝於印刷基板200上之例示,但並不限定於此例示。構裝貫通電極基板100者,例如可在玻璃基板上,亦可在如FPC之類的撓性素材上。可根據半導體裝置之用途,適當加以選擇。FIG. 1 shows an example in which one integrated circuit 300 electrically connected to the wiring layer 120 is mounted on the through electrode substrate 100, but is not limited to the example shown here. The number of terminals of the integrated circuit 300 may be four, or may be five or more, or may be less than four. Further, the number of the integrated circuits 300 that are formed in the through electrode substrate 100 may be plural or one. Further, the integrated circuit 300 that is formed in the through-electrode substrate 100 may be configured with a plurality of integrated circuits having different numbers of terminals. It can be appropriately selected depending on the use of the semiconductor device 1000. 1 shows an example in which the through electrode substrate 100 is mounted on the printed circuit board 200, but the invention is not limited thereto. The through-electrode substrate 100 may be formed, for example, on a glass substrate or on a flexible material such as an FPC. It can be appropriately selected depending on the use of the semiconductor device.

[配線基板之構造1]
將本發明一實施形態之貫通電極基板的一例表示於圖2。圖2(A)為本發明一實施形態之貫通電極基板的俯視圖。圖2(B)則為圖2(A)所示之剖線的剖面圖。
[Configuration of wiring board 1]
An example of a through electrode substrate according to an embodiment of the present invention is shown in Fig. 2 . Fig. 2 (A) is a plan view showing a through electrode substrate according to an embodiment of the present invention. Fig. 2(B) is a cross-sectional view taken along the line of Fig. 2(A).

將圖1所示之貫通電極基板100之部分俯視圖與部分剖面圖表示於圖2。貫通電極基板100具有玻璃基板102及設置於貫通孔10之內壁的貫通電極108,該玻璃基板102具有第1面102a、第2面102b、貫通第1面102a與第2面102b之貫通孔10。又,於圖2中,雖然省略一部分,但是於第1面102a上,亦可設置如圖1所示之配線層120之類的多層配線層。圖2所示之第1配線104為構成圖1所示之配線層120的一部分者。A partial plan view and a partial cross-sectional view of the through electrode substrate 100 shown in Fig. 1 are shown in Fig. 2 . The through electrode substrate 100 includes a glass substrate 102 and a through electrode 108 provided on the inner wall of the through hole 10, and the glass substrate 102 has a first surface 102a, a second surface 102b, and a through hole penetrating the first surface 102a and the second surface 102b. 10. Further, in FIG. 2, a part of the wiring layer 120 as shown in FIG. 1 may be provided on the first surface 102a. The first wiring 104 shown in FIG. 2 is a part of the wiring layer 120 shown in FIG.

配線層120及凸塊122與貫通電極108電連接。貫通電極108則與凸塊122電連接。積體電路300透過凸塊122與配線層120電連接。貫通電極基板100透過凸塊122與印刷基板200電連接。另,第1面102a與第2面102b相對於貫通電極基板100,為上與下,或表面與背面之關係。The wiring layer 120 and the bump 122 are electrically connected to the through electrode 108. The through electrode 108 is electrically connected to the bump 122. The integrated circuit 300 is electrically connected to the wiring layer 120 through the bumps 122. The through electrode substrate 100 is electrically connected to the printed circuit board 200 through the bump 122. Further, the first surface 102a and the second surface 102b are in the relationship of the upper surface and the lower surface, or the surface and the back surface with respect to the through electrode substrate 100.

如圖2所示,貫通電極基板100具有「玻璃基板102」、「從玻璃基板102之第1面102a貫通第2面102b的貫通孔10」、「形成於玻璃基板102之第1面102a上的第1配線104」與「設置於貫通孔10之內壁的密接層106及形成於密接層106上之貫通電極108」,於玻璃基板102之第1面102a上,具有電連接貫通電極108與第1配線104之第2配線110。As shown in FIG. 2, the through electrode substrate 100 has a "glass substrate 102", a "through hole 10 that penetrates the second surface 102b from the first surface 102a of the glass substrate 102", and "formed on the first surface 102a of the glass substrate 102. The first wiring 104" and the "adhesion layer 106 provided on the inner wall of the through hole 10 and the through electrode 108 formed on the adhesion layer 106" are electrically connected to the through electrode 108 on the first surface 102a of the glass substrate 102. The second wiring 110 is connected to the first wiring 104.

於本實施例,雖然揭示使用以玻璃材料構成之玻璃基板102作為基板的例子,但是本發明並不限定於此,亦可使用以含有矽之材料構成的矽基板、以含有氧化鋁之材料構成的陶瓷基板。In the present embodiment, an example in which a glass substrate 102 made of a glass material is used as a substrate is disclosed. However, the present invention is not limited thereto, and a tantalum substrate made of a material containing tantalum may be used, and a material containing alumina may be used. Ceramic substrate.

玻璃基板102具有第1面102a及第2面102b作為2個主面,於至少第1面102a上形成有第1配線104。第1配線104例如可為構成TFT(thin film transistor,薄膜電晶體)者。The glass substrate 102 has the first surface 102a and the second surface 102b as two main surfaces, and the first wiring 104 is formed on at least the first surface 102a. The first wiring 104 may be, for example, a TFT (thin film transistor).

於本實施例中,第1配線104雖然僅形成於第1面102a上,但是本發明並不限定於此,亦可於玻璃基板102之第1面102a及第2面102b的兩面形成有配線。第1配線104之材料例如可為銅等。In the present embodiment, the first wiring 104 is formed only on the first surface 102a. However, the present invention is not limited thereto, and wiring may be formed on both surfaces of the first surface 102a and the second surface 102b of the glass substrate 102. . The material of the first wiring 104 can be, for example, copper or the like.

玻璃基板102之板厚,例如可為200μm~900μm左右。The thickness of the glass substrate 102 can be, for example, about 200 μm to 900 μm.

於玻璃基板102之貫通孔10內的側壁,形成有「密接層106」及「形成於密接層106上之貫通電極108」。密接層106係作為用以藉由無電電鍍將貫通電極108之材料形成於玻璃基板102上的基底發揮功能。密接層106可用含有有機樹脂之材料形成。構成密接層106之含有有機樹脂的材料,例如可為環氧樹脂、丙烯酸樹脂、聚醯亞胺樹脂、胺酯樹脂(urethane resin)等。藉由形成密接層106,相較於玻璃表面,可更加導入觸媒吸附性優異之官能基,可成膜密接性良好之銅或鎳等無電電鍍。The "adhesion layer 106" and the "through electrode 108 formed on the adhesion layer 106" are formed on the side wall of the through hole 10 of the glass substrate 102. The adhesion layer 106 functions as a substrate for forming a material of the through electrode 108 on the glass substrate 102 by electroless plating. The adhesion layer 106 may be formed of a material containing an organic resin. The material containing the organic resin constituting the adhesion layer 106 may be, for example, an epoxy resin, an acrylic resin, a polyimide resin, an urethane resin, or the like. By forming the adhesion layer 106, a functional group having excellent catalyst adsorption property can be further introduced compared to the surface of the glass, and electroless plating such as copper or nickel which is excellent in adhesion can be formed.

貫通電極108形成於玻璃基板102之表面中形成有密接層106之部分。貫通電極108由於係為了得到玻璃基板102上下之導通而形成,故形成為覆蓋玻璃基板102之貫通孔10內的側壁全部,沿著貫通孔10之內壁形成為中空之圓柱狀。有時將貫通電極108之中空部分稱為穿孔(through hole)130。又,貫通電極108為了與上下之配線電連接,亦可於玻璃基板102之第1面102a或第2面102b上之穿孔130的周緣部具有連接盤(land)108-1(較穿孔直徑大之「承受(連接盤)部分)。貫通電極108之材料例如可為銅或鎳。The through electrode 108 is formed on a portion of the surface of the glass substrate 102 where the adhesion layer 106 is formed. Since the through electrode 108 is formed to obtain the conduction of the glass substrate 102 up and down, it is formed so as to cover all the side walls in the through hole 10 of the glass substrate 102, and is formed in a hollow cylindrical shape along the inner wall of the through hole 10. The hollow portion of the through electrode 108 is sometimes referred to as a through hole 130. Further, the through electrode 108 may have a land 108-1 (larger than the perforation diameter) on the peripheral edge portion of the perforation 130 on the first surface 102a or the second surface 102b of the glass substrate 102 in order to be electrically connected to the upper and lower wirings. The "bearing (connecting disk) portion). The material of the through electrode 108 may be, for example, copper or nickel.

如圖2所示,貫通孔10及穿孔130可為具有相同中心軸之同心圓。貫通孔10之孔徑例如可為40μm~140μm左右,穿孔130之孔徑例如可為30μm~135μm左右。於圖2所示之配線基板,貫通孔10之孔徑大於穿孔130之孔徑。As shown in FIG. 2, the through hole 10 and the through hole 130 may be concentric circles having the same central axis. The diameter of the through hole 10 may be, for example, about 40 μm to 140 μm, and the diameter of the through hole 130 may be, for example, about 30 μm to 135 μm. In the wiring substrate shown in FIG. 2, the diameter of the through hole 10 is larger than the diameter of the through hole 130.

雖然於圖2揭示中空之穿孔130,但是穿孔130之內部亦可經用與貫通電極108相同之鍍覆填充,又,亦可經用有機樹脂或與貫通電極108不同之金屬填充。Although the hollow perforation 130 is disclosed in FIG. 2, the inside of the perforation 130 may be filled with the same plating as the through electrode 108, or may be filled with an organic resin or a metal different from the through electrode 108.

於玻璃基板102之第1面102a上,形成有和玻璃基板102與第1配線104與貫通電極108接觸之第2配線110。第2配線110具有作為交聯配線之功能,該交聯配線係將第1配線104與貫通電極108於第1面102a上之連接盤108-1電連接。第2配線110之材料若為銅或鎳、錫等具有導電性之材料,則可為任何材料。On the first surface 102a of the glass substrate 102, a second wiring 110 that is in contact with the glass substrate 102 and the first wiring 104 and the through electrode 108 is formed. The second wiring 110 has a function as a cross-linked wiring that electrically connects the first wiring 104 and the through electrode 108 to the land 108-1 on the first surface 102a. The material of the second wiring 110 may be any material if it is a material having conductivity such as copper, nickel or tin.

第2配線110如圖2所示,可為單層,但是本發明並不限定於此。例如,當第2配線110之材料為銅的情形時,亦可為下述之多層構造:為了提升銅與玻璃基板102之密接性,而於銅與玻璃基板102之間含有1層以上由Ti等低電阻之金屬膜構成的密接層。As shown in FIG. 2, the second wiring 110 may be a single layer, but the present invention is not limited thereto. For example, when the material of the second wiring 110 is copper, it may have a multilayer structure in which one layer or more of Ti is contained between the copper and the glass substrate 102 in order to improve the adhesion between the copper and the glass substrate 102. An adhesion layer composed of a low-resistance metal film.

圖10為本發明一實施形態之貫通電極基板的剖面圖。圖10所示之第2配線110'具有2層構造,該2層構造係形成於玻璃基板102上由Ti等低電阻之金屬模構成的密接層110-1與形成於密接層110-1上由銅等具有導電性之材料構成的第2配線部分110-2積層而成。若根據圖10所示之構成,則可提升第2配線110'之第2配線部分110-2與玻璃基板102的密接性。又,雖然未圖示,但圖10所示之第2配線110'之密接層110-1亦可為2層以上由低電阻金屬膜構成之多層構造。Fig. 10 is a cross-sectional view showing a through electrode substrate according to an embodiment of the present invention. The second wiring 110' shown in FIG. 10 has a two-layer structure formed on the glass substrate 102 with an adhesion layer 110-1 made of a low-resistance metal mold such as Ti and formed on the adhesion layer 110-1. The second wiring portion 110-2 made of a conductive material such as copper is laminated. According to the configuration shown in FIG. 10, the adhesion between the second wiring portion 110-2 of the second wiring 110' and the glass substrate 102 can be improved. Further, although not shown, the adhesion layer 110-1 of the second wiring 110' shown in FIG. 10 may have a multilayer structure of two or more layers of a low-resistance metal film.

又,第2配線110若為可將分開形成於玻璃基板102之一主面上的第1配線104與貫通電極108交聯加以電連接的配線,則何者皆可。例如,第2配線110可為將第1配線104與貫通電極108電連接之打線(wire bonding),又,亦可為將第1配線104與貫通電極108電連接之焊料。第2配線110之材料,例如可為鎳、金、錫、銅、鋁、鈦、鉻、ITO等金屬氧化物等。In addition, the second wiring 110 may be a wiring that can be electrically connected to the first wiring 104 and the through electrode 108 which are formed separately on one main surface of the glass substrate 102, and may be electrically connected. For example, the second wiring 110 may be a wire bonding that electrically connects the first wiring 104 and the through electrode 108 , or may be a solder that electrically connects the first wiring 104 and the through electrode 108 . The material of the second wiring 110 may be, for example, a metal oxide such as nickel, gold, tin, copper, aluminum, titanium, chromium or ITO.

如圖2所示,對一個貫通電極108,可以拉出於不同方向之方式連接複數條第2配線110。然而,本發明並不限定於此。圖11為本發明之一實施形態的貫通電極基板俯視圖。如圖11所示,亦可僅對一個貫通電極108連接一條第2配線110而電連接於第1配線104。As shown in FIG. 2, a plurality of second wirings 110 can be connected to one through electrode 108 so as to be pulled in different directions. However, the invention is not limited thereto. Figure 11 is a plan view of a through electrode substrate according to an embodiment of the present invention. As shown in FIG. 11 , only one second wiring 110 may be connected to one through electrode 108 and electrically connected to the first wiring 104 .

第1配線104、第2配線110及貫通電極108係以具有導電性之材料形成。例如,可使用金、銀、銅、鉑、鎳、銠、釕或銥等。第1配線104、第2配線110及葉通電極108亦可使用相同材料,亦可組合不同材料來使用。藉由以相同材料來形成第1配線104、第2配線110及貫通電極108,可提升特性阻抗匹配。The first wiring 104, the second wiring 110, and the through electrode 108 are formed of a material having conductivity. For example, gold, silver, copper, platinum, nickel, rhodium, ruthenium or iridium may be used. The first wiring 104, the second wiring 110, and the blade-passing electrode 108 may be made of the same material or may be used in combination with different materials. By forming the first wiring 104, the second wiring 110, and the through electrode 108 with the same material, the characteristic impedance matching can be improved.

於本實施形態中,由於貫通電極108與第1配線104係藉由第2配線110電連接,故可確保貫通電極108與玻璃基板102上之第1配線104的導通,提升電可靠性。In the present embodiment, since the through electrode 108 and the first wiring 104 are electrically connected by the second wiring 110, conduction between the through electrode 108 and the first wiring 104 on the glass substrate 102 can be ensured, and electrical reliability can be improved.

[配線基板之構造1的變形例]
於圖2所示之例中,第2配線110雖然直接連接於貫通電極108之第1面102a上的連接盤108-1,但本發明並不限定於此。圖9為表示圖2所示之本發明一實施形態之貫通電極基板的變形例之圖。圖9(A)為本發明一實施形態之貫通電極基板的俯視圖。圖9(B)為圖9(A)所示之剖線的剖面圖。
[Modification of Structure 1 of Wiring Substrate]
In the example shown in FIG. 2, the second wiring 110 is directly connected to the land 108-1 on the first surface 102a of the through electrode 108, but the present invention is not limited thereto. Fig. 9 is a view showing a modification of the through electrode substrate according to the embodiment of the present invention shown in Fig. 2; Fig. 9 (A) is a plan view showing a through electrode substrate according to an embodiment of the present invention. Fig. 9(B) is a cross-sectional view taken along the line indicated by Fig. 9(A).

如圖9所示,貫通電極108亦可具有從形成於第1面102a上之連接盤108-1延長的配線部分108-2。於此情形時,第2配線110亦可直接連接於從形成於貫通電極108之第1面102a上之連接盤108-1延長的配線部分108-2。As shown in FIG. 9, the through electrode 108 may have a wiring portion 108-2 extended from the land 108-1 formed on the first surface 102a. In this case, the second wiring 110 may be directly connected to the wiring portion 108-2 extended from the land 108-1 formed on the first surface 102a of the through electrode 108.

[配線基板之製造方法1]
關於圖2所示之本發明第1實施形態之貫通電極基板100的製造方法,參照圖2至圖6加以說明。另,於圖3至圖6中,對於與圖1至圖2相同之構成,賦予相同符號來說明。
[Manufacturing Method 1 of Wiring Substrate]
A method of manufacturing the through electrode substrate 100 according to the first embodiment of the present invention shown in FIG. 2 will be described with reference to FIGS. 2 to 6 . In addition, in FIGS. 3 to 6, the same configurations as those in FIGS. 1 to 2 are denoted by the same reference numerals.

首先,於玻璃基板102上,形成第1配線104(參照圖3)。第1配線104可為構成TFT等元件者。於圖3中,雖然於玻璃基板102之第1面102a上形成有第1配線104,但是並不限定於此,不僅第1面102a,亦可於第2面102b形成第1配線104。First, the first wiring 104 (see FIG. 3) is formed on the glass substrate 102. The first wiring 104 may be an element constituting a TFT or the like. In FIG. 3, the first wiring 104 is formed on the first surface 102a of the glass substrate 102. However, the first wiring 104 is not limited thereto, and the first wiring 104 may be formed not only on the first surface 102a but also on the second surface 102b.

接著,於單面或兩面形成有第1配線104之玻璃基板102,形成貫通第1面102a與第2面102b之貫通孔10(參照圖4)。貫通孔10形成於玻璃基板102之位置,為未形成有第1配線104之部分。貫通孔10形成於與第1配線104分離之位置。貫通孔10之形狀可為上下之孔徑大致一定的圓筒狀。Next, the glass substrate 102 of the first wiring 104 is formed on one surface or both surfaces, and a through hole 10 penetrating the first surface 102a and the second surface 102b is formed (see FIG. 4). The through hole 10 is formed at a position of the glass substrate 102 and is a portion where the first wiring 104 is not formed. The through hole 10 is formed at a position separated from the first wiring 104. The shape of the through hole 10 may be a cylindrical shape in which the upper and lower apertures are substantially constant.

於玻璃基板102形成貫通孔10之方法,可為任意之方法。The method of forming the through hole 10 in the glass substrate 102 can be any method.

接著,在形成於玻璃基板102之貫通孔10的內壁及第1面102a、第2面102b上之貫通孔的周緣部,形成密接層106(參照圖5)。密接層106例如可藉由旋塗、浸塗、噴霧塗布(spray coating)等方法形成。密接層106係於之後作為用以使貫通電極材料成膜的密接層發揮功能。密接層106可用含有有機樹脂之材料形成。Next, an adhesion layer 106 is formed on the inner wall of the through hole 10 of the glass substrate 102, and the peripheral edge portion of the through hole on the first surface 102a and the second surface 102b (see FIG. 5). The adhesion layer 106 can be formed, for example, by spin coating, dip coating, spray coating, or the like. The adhesion layer 106 functions as an adhesion layer for forming a film through the electrode material. The adhesion layer 106 may be formed of a material containing an organic resin.

接著,於玻璃基板102之表面中形成有密接層106之部分,形成貫通電極108(參照圖6)。貫通電極108形成於形成在玻璃基板102表面之密接層106上。貫通電極108係使用無電電鍍法使銅或鎳等形成為被膜而成。Next, a portion of the surface of the glass substrate 102 in which the adhesion layer 106 is formed is formed to form a through electrode 108 (see FIG. 6). The through electrode 108 is formed on the adhesion layer 106 formed on the surface of the glass substrate 102. The through electrode 108 is formed by forming copper, nickel, or the like into a film by electroless plating.

此處,當製造圖9所示之配線基板之構造1的變形例之情形時,從貫通電極108形成於第1面102a上之連接盤108-1延長的配線部分108-2,亦可與貫通電極108同時在上述步驟形成。具體而言,係於玻璃基板102之表面中形成有密接層106的部分,形成包含連接盤108-1及從連接盤108-1延長之配線部分108-2的貫通電極108(參照圖9)。貫通電極108係形成於形成在玻璃基板102表面之密接層106上。貫通電極108係使用無電電鍍法使銅或鎳等形成為被膜而成。Here, when a modification of the structure 1 of the wiring board shown in FIG. 9 is manufactured, the wiring portion 108-2 extended from the land 108-1 formed on the first surface 102a by the through electrode 108 may be The through electrode 108 is simultaneously formed in the above steps. Specifically, a portion where the adhesion layer 106 is formed on the surface of the glass substrate 102 is formed, and a through electrode 108 including the land 108-1 and the wiring portion 108-2 extended from the land 108-1 is formed (refer to FIG. 9). . The through electrode 108 is formed on the adhesion layer 106 formed on the surface of the glass substrate 102. The through electrode 108 is formed by forming copper, nickel, or the like into a film by electroless plating.

於本發明中,藉由將密接層106使用作為密接層或還原劑,而可用無電電鍍法等將貫通電極材料成膜於形成在玻璃基板102上之貫通孔10內。In the present invention, by using the adhesion layer 106 as an adhesion layer or a reducing agent, the through electrode material can be formed into the through hole 10 formed in the glass substrate 102 by electroless plating or the like.

亦有與本發明不同之方法,亦即,不形成密接層106,藉由濺鍍法將銅等貫通電極材料成膜在形成於玻璃基板102上之貫通孔10內。There is also a method different from the present invention, that is, the adhesion layer 106 is not formed, and a through electrode material such as copper is formed into the through hole 10 formed in the glass substrate 102 by sputtering.

若為玻璃基板之貫通孔之長寬比低的情形時(例如,板厚薄的情形或孔徑大的情形),則即使是使用藉由濺鍍法將銅等電極材料成膜於貫通孔內之方法的情形,亦能夠形成貫通電極。When the aspect ratio of the through hole of the glass substrate is low (for example, when the thickness is thin or the aperture is large), an electrode material such as copper is formed in the through hole by sputtering. In the case of the method, a through electrode can also be formed.

所謂長寬比,係指板厚/孔徑之值,「玻璃基板102之板厚」與「玻璃基板102之貫通孔之孔徑」的關係,係以玻璃基板之貫通孔的長寬比來表現。例如當板厚厚之情形時或孔徑小之情形時,長寬比會變高,而當板厚薄之情形時或孔徑大之情形時,長寬比則會變小。The aspect ratio refers to the value of the thickness/aperture, and the relationship between the "thickness of the glass substrate 102" and the "aperture of the through hole of the glass substrate 102" is expressed by the aspect ratio of the through hole of the glass substrate. For example, when the thickness of the plate is thick or the aperture is small, the aspect ratio becomes high, and when the thickness of the plate is thin or the aperture is large, the aspect ratio becomes small.

然而,當玻璃基板之貫通孔之長寬比高的情形時(例如,板厚厚之情形或孔徑小之情形),由於以濺鍍法無法充分將電極材料成膜至遠離玻璃基板主面之貫通孔的內部,故會變得容易發生貫通孔內部未形成有電極材料之空白部分(空孔(void)或空心洞),而在電可靠性具有問題。例如,當玻璃基板之貫通孔之長寬比為3以上的情形時,使用濺鍍法的話,則容易於貫通孔內發生空孔或空心洞,而在電可靠性上產生問題。However, when the aspect ratio of the through-hole of the glass substrate is high (for example, when the thickness of the plate is thick or the aperture is small), the electrode material cannot be sufficiently formed by sputtering to be away from the main surface of the glass substrate. Since the inside of the through hole is formed, a blank portion (void or hollow hole) in which the electrode material is not formed inside the through hole is likely to occur, and there is a problem in electrical reliability. For example, when the aspect ratio of the through hole of the glass substrate is 3 or more, when the sputtering method is used, voids or hollow holes are likely to occur in the through hole, which causes a problem in electrical reliability.

於本發明中,藉由將密接層106使用作為密接層或還原劑,即使是形成於玻璃基板102之貫通孔10之長寬比高的情形時,亦可藉由無電電鍍法等充分地將貫通電極材料成膜於貫通孔10內。因此,本發明尤其是對於形成在玻璃基板102之貫通孔10之長寬比為3以上的高密度配置之配線基板,可更加提升電可靠性,於此點上是有用的。In the present invention, when the adhesion layer 106 is used as the adhesion layer or the reducing agent, even when the aspect ratio of the through hole 10 formed in the glass substrate 102 is high, the electroless plating method or the like can be sufficiently performed. The through electrode material is formed in the through hole 10 . Therefore, the present invention is particularly useful for a wiring board having a high-density arrangement in which the aspect ratio of the through-holes 10 of the glass substrate 102 is 3 or more, which can further improve electrical reliability.

接著,為了將形成於玻璃基板102上之第1配線104與形成於和第1配線104分離之位置的貫通電極108電連接,而形成與第1配線104與玻璃基板102與貫通電極108接觸之第2配線110(參照圖2)。於圖2中,第2配線110雖是藉由濺鍍法等形成為與玻璃基板之第1面102a接觸的配線,但本發明並不限定於此。Next, in order to electrically connect the first wiring 104 formed on the glass substrate 102 and the through electrode 108 formed at a position separated from the first wiring 104, the first wiring 104 and the glass substrate 102 are in contact with the through electrode 108. The second wiring 110 (see FIG. 2). In FIG. 2, the second wiring 110 is formed to be in contact with the first surface 102a of the glass substrate by a sputtering method or the like, but the present invention is not limited thereto.

如上述,為了對玻璃基板102進行無電鍍銅形成貫通電極108,而必須將密接層106作為密接層形成於玻璃基板102。又,若僅是透過密接層106形成貫通電極108,則會無法得到預先形成於玻璃基板102上之第1配線104等配線層與貫通電極108的導通。因此,本發明為了得到預先形成於玻璃基板102上之第1配線104等配線層與透過密接層106形成之貫通電極108的導通,而具備第2配線110作為交聯配線。As described above, in order to form the through electrode 108 by electroless copper plating on the glass substrate 102, it is necessary to form the adhesion layer 106 as an adhesion layer on the glass substrate 102. In addition, when the through electrode 108 is formed only through the adhesion layer 106, conduction between the wiring layer such as the first wiring 104 and the through electrode 108 which are formed in advance on the glass substrate 102 cannot be obtained. Therefore, in order to obtain the conduction between the wiring layer such as the first wiring 104 formed on the glass substrate 102 and the through electrode 108 formed in the transmission adhesion layer 106, the second wiring 110 is provided as the crosslinked wiring.

於本發明中,由於第2配線110以交聯配線之形態電連接分離形成於玻璃基板102之一主面上的第1配線104與貫通電極108,故可確保貫通電極108與第1配線104之導通,能夠提供一種電可靠性經提升之貫通電極基板。In the present invention, since the second wiring 110 is electrically connected to the first wiring 104 and the through electrode 108 which are formed on one main surface of the glass substrate 102 in the form of a crosslinked wiring, the through electrode 108 and the first wiring 104 can be secured. The conduction can provide a through-electrode substrate with improved electrical reliability.

又,如圖2所示,第2配線110亦可為藉由濺鍍法等形成為與玻璃基板之第1面102a接觸的配線。於此情形時,第2配線110配置成直接接觸於玻璃基板102之一主面(未絕緣分離),將直接接觸於同一面之第1配線104與貫通電極108(惟,於貫通電極108與玻璃基板102之間隔著密接層106。)交聯。具體而言,於圖2中,直接接觸於玻璃基板之第1面102a的第1配線104與貫通電極108於第1面102a上之連接盤108-1,係藉由直接接觸於玻璃基板之第1面102a的第2配線110電連接。Moreover, as shown in FIG. 2, the second wiring 110 may be a wiring which is formed in contact with the first surface 102a of the glass substrate by a sputtering method or the like. In this case, the second wiring 110 is disposed so as to be in direct contact with one main surface of the glass substrate 102 (uninsulated and separated), and directly contacts the first wiring 104 and the through electrode 108 on the same surface (except for the through electrode 108 and The glass substrate 102 is cross-linked by the adhesion layer 106. Specifically, in FIG. 2, the first wiring 104 directly contacting the first surface 102a of the glass substrate and the lands 108-1 of the penetration electrode 108 on the first surface 102a are directly contacted with the glass substrate. The second wiring 110 of the first surface 102a is electrically connected.

若根據圖2所示之第2配線110的構造,則由於直接接觸於玻璃基板之第1面102a的第1配線104與貫通電極108之連接盤108-1藉由直接接觸於玻璃基板之第1面102a的第2配線110電連接,故可提高與形成有第1配線104或貫通電極108之連接盤108-1等的玻璃基板第1面102a直接接觸之層內的配線密度。以此方式若與玻璃基板第1面102a直接接觸之層內的配線密度提高,則相應地對其他層形成配線會變得容易,配線之設計自由度會變高。According to the structure of the second wiring 110 shown in FIG. 2, the first wiring 104 directly contacting the first surface 102a of the glass substrate and the lands 108-1 of the through electrode 108 are directly in contact with the glass substrate. Since the second wiring 110 of the one surface 102a is electrically connected, the wiring density in the layer directly contacting the glass substrate first surface 102a such as the lands 108-1 on which the first wiring 104 or the through electrode 108 is formed can be increased. In this manner, when the wiring density in the layer directly in contact with the glass substrate first surface 102a is increased, it becomes easy to form wiring for other layers, and the degree of freedom in designing wiring becomes high.

又,第1配線104與貫通電極108之連接盤108-1由於在與玻璃基板第1面102a直接接觸之相同層內連接,故可縮短第2配線110之配線長度,因此,電阻低,可穩定地通電。又,第2配線110由於直接接觸於與第1配線104或貫通電極108之連接盤108-1相同之面,故可使配線層低背化。並且,當透過絕緣層將其他之配線積層於該配線層上的情形時,可確保下層配線層之平坦性。Further, since the first wiring 104 and the lands 108-1 of the through electrodes 108 are connected in the same layer that is in direct contact with the first surface 102a of the glass substrate, the wiring length of the second wiring 110 can be shortened, so that the electric resistance is low. Stable power up. Further, since the second wiring 110 is in direct contact with the surface of the first wiring 104 or the connection pad 108-1 of the through electrode 108, the wiring layer can be made lower in profile. Further, when another wiring is laminated on the wiring layer through the insulating layer, the flatness of the lower wiring layer can be ensured.

又,第1配線104、貫通電極108之連接盤108-1及第2配線110皆是以相同之玻璃基板的第1面102a作為基底而形成,故由玻璃基板第1面102a之熱膨脹所產生之應力由於會均勻地作用在第1配線104、貫通電極108及第2配線110各者,因此,不易發生配線之扭曲、斷線,連接可靠性變高。Further, since the first wiring 104 and the lands 108-1 and the second wiring 110 of the through electrode 108 are formed by using the first surface 102a of the same glass substrate as a base, the thermal expansion of the first surface 102a of the glass substrate is generated. Since the stress acts uniformly on each of the first wiring 104, the through electrode 108, and the second wiring 110, the wiring is less likely to be twisted or broken, and the connection reliability is increased.

[配線基板之構造2]
作為配線基板之構成2,參照圖7及圖8,說明本發明另一實施形態之貫通電極基板。另,對於與圖1及圖2相同之構成,賦予相同符號加以說明。
[Configuration of wiring board 2]
As a configuration 2 of the wiring board, a through electrode substrate according to another embodiment of the present invention will be described with reference to FIGS. 7 and 8. The same components as those in FIGS. 1 and 2 are denoted by the same reference numerals.

圖7所示之貫通電極基板100',含有構成圖2所示之貫通電極基板100的玻璃基板102、第1貫通電極108a、第1配線104及第2配線110。圖7所示之貫通電極基板100'進一步具有絕緣層112,於絕緣層112上,具有構成第1配線104上層之配線層的第3配線114。絕緣層112於第1貫通電極108a上具有開口部20,於開口部20之內壁形成第2貫通電極108b。第2貫通電極108b與第3配線114具有藉由絕緣層112上之第4配線116交聯的構成。The through electrode substrate 100' shown in FIG. 7 includes the glass substrate 102, the first through electrode 108a, the first wiring 104, and the second wiring 110 which constitute the through electrode substrate 100 shown in FIG. The through electrode substrate 100' shown in FIG. 7 further includes an insulating layer 112, and the insulating layer 112 has a third wiring 114 constituting a wiring layer of the upper layer of the first wiring 104. The insulating layer 112 has an opening 20 in the first through electrode 108a, and a second through electrode 108b is formed on the inner wall of the opening 20. The second through electrode 108b and the third wiring 114 have a configuration in which the fourth wiring 116 on the insulating layer 112 is crosslinked.

絕緣層112設置成被覆玻璃基板102之第1面102a上的第1配線104、第2配線110、第1貫通電極108之上。絕緣層112為由有機樹脂材料構成之絕緣層,係作為用以將由第3配線層114構成之另外的配線層積層於由第1配線104構成之配線層上的層間絕緣膜發揮功能。The insulating layer 112 is provided to cover the first wiring 104, the second wiring 110, and the first through electrode 108 on the first surface 102a of the glass substrate 102. The insulating layer 112 is an insulating layer made of an organic resin material, and functions as an interlayer insulating film for laminating another wiring formed of the third wiring layer 114 on the wiring layer formed of the first wiring 104.

絕緣層112於與形成有第1貫通電極108a之貫通孔10重畳的位置具有開口部20,於絕緣層112之開口部20的內壁,形成有第2貫通電極108b。The insulating layer 112 has an opening 20 at a position overlapping the through hole 10 in which the first through electrode 108a is formed, and a second through electrode 108b is formed on the inner wall of the opening 20 of the insulating layer 112.

第2貫通電極108b由於形成在以有機樹脂材料構成之絕緣層112的開口部20,故與第1貫通電極108a不同,而無需使密接層居於其間。因此,第2貫通電極108b可藉由無電鍍銅等方法直接形成於絕緣層112之表面。Since the second through electrode 108b is formed in the opening 20 of the insulating layer 112 made of an organic resin material, it is different from the first through electrode 108a, and it is not necessary to have the adhesive layer interposed therebetween. Therefore, the second through electrode 108b can be directly formed on the surface of the insulating layer 112 by a method such as electroless copper plating.

第2貫通電極108b將形成於上層之第3配線114與第1貫通電極108a電連接,係用以在形成於玻璃基板102第1面102a上之第3配線114與形成在第2面102b上之其他配線等之間得到上下之導通。The second through electrode 108b electrically connects the third wiring 114 formed on the upper layer and the first through electrode 108a, and is formed on the second surface 114 formed on the first surface 102a of the glass substrate 102 and on the second surface 102b. The other wirings and the like are connected to each other.

第2貫通電極108b與第3配線形成於絕緣層112上之分離的位置,第4配線116於絕緣層112上將第2貫通電極108b與第3配線交聯而於該層電連接。The second through electrode 108b and the third wiring are formed at a position separated from each other on the insulating layer 112, and the fourth wiring 116 crosslinks the second through electrode 108b and the third wiring on the insulating layer 112, and is electrically connected to the layer.

於圖7所示之貫通電極基板100',具有下述構成:於玻璃基板102之第1面102a上,積層有含有第1配線104之配線層與含有第3配線之配線層,於含有第1配線104之配線層中,與玻璃基板102第1面102a直接接觸之第1貫通電極108a與第1配線104藉由與玻璃基板102第1面102a直接接觸之第2配線110在該層交聯。並且,於含有第3配線114之配線層中具有下述構成:與絕緣層112之上面直接接觸的第2貫通電極108b與第3配線114藉由與絕緣層112之上面直接接觸的第4配線116在該層交聯。其他之構成則與圖1及圖2所示之貫通電極基板100相同。The through electrode substrate 100' shown in FIG. 7 has a configuration in which a wiring layer including the first wiring 104 and a wiring layer including the third wiring are laminated on the first surface 102a of the glass substrate 102. In the wiring layer of the wiring 104, the first through electrode 108a that is in direct contact with the first surface 102a of the glass substrate 102 and the first wiring 104 are in contact with the second wiring 110 that is in direct contact with the first surface 102a of the glass substrate 102. Union. Further, the wiring layer including the third wiring 114 has a configuration in which the second through electrode 108b that is in direct contact with the upper surface of the insulating layer 112 and the third wiring 114 are in direct contact with the upper surface of the insulating layer 112. 116 crosslinks at this layer. The other configuration is the same as that of the through electrode substrate 100 shown in FIGS. 1 and 2 .

於圖7,雖然在玻璃基板102之第1面102a上,積層有含有第1配線104之配線層與含有第3配線之配線層此2層,但是本發明並不限定於此,亦可積層3層以上之配線層。In FIG. 7, the wiring layer including the first wiring 104 and the wiring layer including the third wiring are laminated on the first surface 102a of the glass substrate 102. However, the present invention is not limited thereto, and may be laminated. 3 or more wiring layers.

又,如圖7所示,貫通電極基板100'亦可進一步具備將第3配線114與形成於玻璃基板102第2面102b上之其他配線等上下導通的第3貫通電極108c。如圖7所示,於第3貫通電極108c與玻璃基板102之間,亦可形成有絕緣層112。作為絕緣層112之製造方法,例如可藉由使用輥塗機(roller coater)將絕緣性液狀阻劑膜(resist film)塗布於玻璃基板102表面之方法來形成絕緣層112。另外,亦可使用浸漬塗布機(dip coater)或噴霧塗佈機(spray coater)來形成絕緣層112。Further, as shown in FIG. 7 , the through electrode substrate 100 ′ may further include a third through electrode 108 c that electrically connects the third wiring 114 and other wirings formed on the second surface 102 b of the glass substrate 102 up and down. As shown in FIG. 7, an insulating layer 112 may be formed between the third through electrode 108c and the glass substrate 102. As a method of manufacturing the insulating layer 112, for example, the insulating layer 112 can be formed by applying an insulating liquid resist film to the surface of the glass substrate 102 using a roller coater. Alternatively, the insulating layer 112 may be formed using a dip coater or a spray coater.

圖8為圖7所示之貫通電極基板的俯視圖。於圖8中,係用實線表示最上面之配線或貫通電極,位於下層之配線或貫通電極則以透視圖之形態用虛線表示。如圖7及圖8所示,複數個第1貫通電極108a係於含有第1配線104之配線層彼此連接,第2貫通電極108b則於第1配線104之上層亦即含有第3配線114之配線層與為其他貫通電極之第3貫通電極108c連接。Fig. 8 is a plan view of the through electrode substrate shown in Fig. 7; In Fig. 8, the uppermost wiring or the through electrode is indicated by a solid line, and the wiring or the through electrode located at the lower layer is indicated by a broken line in a perspective view. As shown in FIG. 7 and FIG. 8 , the plurality of first through electrodes 108 a are connected to each other in the wiring layer including the first wiring 104 , and the second through electrodes 108 b are included in the upper layer of the first wiring 104 , that is, the third wiring 114 . The wiring layer is connected to the third through electrode 108c which is another through electrode.

於本發明中,由於第4配線116將分離形成於絕緣層112上之第3配線114與第2貫通電極108b在該層交聯連接,故可確保第2貫通電極108b與第3配線114之導通,可提供電可靠性經提升之貫通電極基板100'。In the fourth wiring 116, the third wiring 114 and the second through electrode 108b which are separated and formed on the insulating layer 112 are cross-linked in this layer, so that the second through electrode 108b and the third wiring 114 can be secured. Turning on, the through electrode substrate 100' having improved electrical reliability can be provided.

如圖7及圖8所示,第2貫通電線108b於中空部分之穿孔130b的周緣部形成有連接盤108b-1,此連接盤係作為將其他配線與貫通電極電連接之連接部分發揮功能。又,第1貫通電極108a及第3貫通電極108c亦可與第2貫通電極108b同樣地於穿孔之周緣部具有連接盤。As shown in FIG. 7 and FIG. 8, the second through-wire 108b has a lands 108b-1 formed on the peripheral portion of the through-hole 130b of the hollow portion, and this lands function as a connecting portion that electrically connects the other wires to the through electrodes. Further, the first through electrode 108a and the third through electrode 108c may have a land at the peripheral portion of the perforation similarly to the second through electrode 108b.

若根據圖7及圖8所示之具有複數層配線層的貫通電極基板100',則可確保電可靠性,且同時藉由積層配線層,而可更加提升配線密度。According to the through electrode substrate 100' having the plurality of wiring layers shown in FIGS. 7 and 8, electrical reliability can be ensured, and at the same time, the wiring density can be further increased by stacking the wiring layers.

上述作為本發明之實施形態的各實施形態,只要沒有互相矛盾,則可適當加以組合來實施。又,基於各實施形態,該行業者進行適當構成元件之追加、刪除或者設計變更而成者,只要具備有本發明之要旨,則包含於本發明之範圍內。The respective embodiments described above as the embodiments of the present invention can be implemented by being combined as appropriate without any contradiction. Further, in the respective embodiments, it is intended that the person skilled in the art adds, deletes, or changes the design of the appropriate constituent elements, and the scope of the present invention is included in the scope of the present invention.

又,即使為與藉由上述各實施形態所達成之作用效果不同的其他作用效果,但只要是從本說明書之記載可清楚得知者或該行業者可輕易預期者,當然亦理解為是藉由本發明所達成者。Further, even if it is a different effect from the effects achieved by the above-described respective embodiments, it can be understood as a borrowing as long as it is clearly known from the description of the specification or can be easily expected by the industry. The person achieved by the present invention.

10‧‧‧貫通孔 10‧‧‧through holes

20‧‧‧開口部 20‧‧‧ openings

100、100'‧‧‧貫通電極基板 100, 100'‧‧‧through electrode substrate

102‧‧‧玻璃基板 102‧‧‧ glass substrate

102a‧‧‧第1面 102a‧‧‧1st

102b‧‧‧第2面 102b‧‧‧2nd

104‧‧‧第1配線 104‧‧‧1st wiring

106、110-1‧‧‧密接層 106, 110-1‧‧ ‧ close layer

108、108a、108b‧‧‧貫通電極 108, 108a, 108b‧‧‧through electrodes

108c‧‧‧第3貫通電極 108c‧‧‧3rd through electrode

108-1、108b-1‧‧‧連接盤 108-1, 108b-1‧‧‧Connector

108-2‧‧‧配線部分 108-2‧‧‧Wiring section

110‧‧‧第2配線 110‧‧‧2nd wiring

110-2‧‧‧第2配線部分 110-2‧‧‧2nd wiring part

112‧‧‧絕緣層 112‧‧‧Insulation

114‧‧‧第3配線 114‧‧‧3rd wiring

116‧‧‧第4配線 116‧‧‧4th wiring

120‧‧‧配線層 120‧‧‧Wiring layer

122‧‧‧凸塊 122‧‧‧Bumps

130、130b‧‧‧穿孔 130, 130b‧‧‧ perforation

200‧‧‧印刷基板 200‧‧‧Printed substrate

300‧‧‧積體電路 300‧‧‧ integrated circuit

1000‧‧‧半導體裝置 1000‧‧‧Semiconductor device

圖1為使用本發明之一實施形態的貫通電極基板的半導體裝置之剖面圖。Fig. 1 is a cross-sectional view showing a semiconductor device using a through electrode substrate according to an embodiment of the present invention.

圖2:圖2(A)為本發明之一實施形態的貫通電極基板的俯視圖。圖2(B)為圖2(A)所示之剖線的剖面圖。 Fig. 2 is a plan view showing a through electrode substrate according to an embodiment of the present invention. Fig. 2(B) is a cross-sectional view taken along the line indicated by Fig. 2(A).

圖3為說明本發明之一實施形態的貫通電極基板製造方法的剖面圖。 Fig. 3 is a cross-sectional view showing a method of manufacturing a through electrode substrate according to an embodiment of the present invention.

圖4為說明本發明之一實施形態的貫通電極基板製造方法的剖面圖。 Fig. 4 is a cross-sectional view showing a method of manufacturing a through electrode substrate according to an embodiment of the present invention.

圖5為說明本發明之一實施形態的貫通電極基板製造方法的剖面圖。 Fig. 5 is a cross-sectional view showing a method of manufacturing a through electrode substrate according to an embodiment of the present invention.

圖6為說明本發明之一實施形態的貫通電極基板製造方法的剖面圖。 Fig. 6 is a cross-sectional view showing a method of manufacturing a through electrode substrate according to an embodiment of the present invention.

圖7為本發明另一實施形態的貫通電極基板之剖面圖。 Figure 7 is a cross-sectional view showing a through electrode substrate according to another embodiment of the present invention.

圖8為圖7所示之貫通電極基板的俯視圖。 Fig. 8 is a plan view of the through electrode substrate shown in Fig. 7;

圖9:圖9(A)為本發明之一實施形態的貫通電極基板的俯視圖。圖9(B)為圖9(A)所示之剖線的剖面圖。 Fig. 9 is a plan view showing a through electrode substrate according to an embodiment of the present invention. Fig. 9(B) is a cross-sectional view taken along the line indicated by Fig. 9(A).

圖10為本發明之一實施形態的貫通電極基板的剖面圖。 Figure 10 is a cross-sectional view showing a through electrode substrate according to an embodiment of the present invention.

圖11為本發明之一實施形態的貫通電極基板的俯視圖。 Fig. 11 is a plan view showing a through electrode substrate according to an embodiment of the present invention.

Claims (9)

一種貫通電極基板,具有: 由無機材料構成之基板; 設置於該基板上之第1配線; 於與該第1配線分離之位置,設置於該基板之貫通孔; 設置於該貫通孔之內壁的貫通電極;及 連接該第1配線及該貫通電極之第2配線。A through electrode substrate having: a substrate composed of an inorganic material; a first wiring provided on the substrate; a through hole provided in the substrate at a position separated from the first wiring; a through electrode disposed on an inner wall of the through hole; and The first wiring and the second wiring of the through electrode are connected. 如請求項1所述之貫通電極基板,其進一步具有設置於該基板與該貫通電極之間的密接層。The through electrode substrate according to claim 1, further comprising an adhesion layer provided between the substrate and the through electrode. 如請求項2所述之貫通電極基板,其中,該第2配線進一步與該密接層接觸。The through electrode substrate according to claim 2, wherein the second wiring is further in contact with the adhesion layer. 如請求項2所述之貫通電極基板,其中,該密接層含有有機樹脂材料。The through electrode substrate according to claim 2, wherein the adhesion layer contains an organic resin material. 如請求項1至4中任一項所述之貫通電極基板,其進一步具有: 設置於該第1配線、該第2配線及該貫通電極上之絕緣層; 設置於該絕緣層上之第3配線;及 與該絕緣層、該第3配線及該貫通電極接觸之第4配線。The through electrode substrate according to any one of claims 1 to 4, further comprising: An insulating layer provided on the first wiring, the second wiring, and the through electrode; a third wiring disposed on the insulating layer; and The fourth wiring that is in contact with the insulating layer, the third wiring, and the through electrode. 如請求項5所述之貫通電極基板,其中,該絕緣層由有機樹脂材料構成,該貫通電極設置於該貫通孔之內壁及設於該絕緣層之開口部的內側。The through electrode substrate according to claim 5, wherein the insulating layer is made of an organic resin material, and the through electrode is provided on an inner wall of the through hole and inside an opening of the insulating layer. 如請求項6所述之貫通電極基板,其中,該貫通電極含有: 設置於該貫通孔之內壁的第1貫通電極;及 設置於設在該絕緣層之該開口部之內側的第2貫通電極。The through electrode substrate according to claim 6, wherein the through electrode comprises: a first through electrode provided on an inner wall of the through hole; and The second through electrode is provided inside the opening of the insulating layer. 如請求項1至4中任一項所述之貫通電極基板,其中,該貫通孔之長寬比為3以上。The through electrode substrate according to any one of claims 1 to 4, wherein the through hole has an aspect ratio of 3 or more. 一種半導體裝置,使用有請求項1至4中任一項所述之貫通電極基板。A semiconductor device using the through electrode substrate according to any one of claims 1 to 4.
TW107133985A 2017-09-29 2018-09-27 Through-electrode substrate and semiconductor device using through-electrode substrate TWI782100B (en)

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