TW202301930A - Circuit board and method of manufacturing the same - Google Patents
Circuit board and method of manufacturing the same Download PDFInfo
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- TW202301930A TW202301930A TW110128610A TW110128610A TW202301930A TW 202301930 A TW202301930 A TW 202301930A TW 110128610 A TW110128610 A TW 110128610A TW 110128610 A TW110128610 A TW 110128610A TW 202301930 A TW202301930 A TW 202301930A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
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- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Diaphragms For Electromechanical Transducers (AREA)
Abstract
Description
本發明涉及一種電路板及其製造方法。The invention relates to a circuit board and a manufacturing method thereof.
在可攜式電子產品的市場趨勢下,應用於電子產品中的電路板亦朝著高密度及高精度集成方向發展。然,在將電子組件安裝於電路板上時,由於電路板平整性不佳,容易導致電子組件與電路板之間的電連接不穩固甚至存在電導通不良的情形。Under the market trend of portable electronic products, circuit boards used in electronic products are also developing towards high-density and high-precision integration. However, when the electronic components are mounted on the circuit board, due to poor flatness of the circuit board, the electrical connection between the electronic components and the circuit board is likely to be unstable or even have poor electrical conduction.
有鑑於此,有必要提供一種有利於提升平整度的電路板的製造方法。In view of this, it is necessary to provide a method for manufacturing a circuit board that is beneficial to improving flatness.
還有必須要提供一種有利於提升平整度的電路板。It is also necessary to provide a circuit board that is conducive to improving flatness.
一種電路板的製造方法,其包括以下步驟:A method for manufacturing a circuit board, comprising the steps of:
提供一雙面金屬基板,包括依次層疊設置的第一金屬箔、第一絕緣層及第二金屬箔;A double-sided metal substrate is provided, including a first metal foil, a first insulating layer and a second metal foil sequentially stacked;
在所述雙面金屬基板上形成至少二個間隔的階梯盲孔,其中,每一所述階梯盲孔包括沿上述層疊方向貫穿所述第一金屬箔的第一部分及沿上述層疊方向貫穿所述第一絕緣層的第二部分,所述第一部分與所述第二部分連通,且沿上述層疊方向的任意截面上,每一所述階梯盲孔中的所述第一部分的寬度上小於所述第二部分的寬度;At least two stepped blind holes at intervals are formed on the double-sided metal substrate, wherein each of the stepped blind holes includes a first portion penetrating through the first metal foil along the stacking direction and penetrating through the first metal foil along the stacking direction. The second part of the first insulating layer, the first part communicates with the second part, and on any cross-section along the stacking direction, the width of the first part in each of the stepped blind holes is smaller than the the width of the second part;
往每一所述階梯盲孔填充導電漿料,以對應每一所述階梯盲孔形成一導電塊,每一所述導電塊包括填充所述第一部分的第一導電部及填充所述第二部分的第二導電部;filling each of the step blind holes with conductive paste to form a conductive block corresponding to each of the step blind holes, and each of the conductive blocks includes a first conductive part filling the first part and a second conductive part filling the second part. part of the second conductive portion;
對設有所述第一導電部的所述第一金屬箔進行線路製作以對應形成第一線路層;performing wiring fabrication on the first metal foil provided with the first conductive portion to form a corresponding first wiring layer;
在所述第一線路層及從所述第一線路層露出的第一絕緣層及所述導電塊上設置第二絕緣層,並對所述第二絕緣層進行圖案化以對應每一所述導電塊形成一第一開口,所述第一開口環繞所述第一導電部開設以露出所述第一導電部及至少部分所述第二導電部;及A second insulating layer is disposed on the first wiring layer, the first insulating layer exposed from the first wiring layer, and the conductive block, and the second insulating layer is patterned to correspond to each of the The conductive block forms a first opening, the first opening opens around the first conductive part to expose the first conductive part and at least part of the second conductive part; and
對應每一所述第一開口形成一填充所述第一開口的導電柱,並在圖案化後的所述第二絕緣層上形成線路基板,且對所述第二銅箔進行線路製作以對應形成第二線路層,其中,所述導電柱電連接所述線路基板,所述第二線路層對應所述導電塊形成至少一第二開口。Corresponding to each of the first openings, a conductive post is formed to fill the first opening, and a circuit substrate is formed on the patterned second insulating layer, and a circuit is made on the second copper foil to correspond to A second circuit layer is formed, wherein the conductive column is electrically connected to the circuit substrate, and at least one second opening is formed in the second circuit layer corresponding to the conductive block.
一種電路板,包括層疊設置的第一線路基板及第二線路基板,所述第一線路基板包括沿上述層疊方向依次層疊的第一線路層、第一絕緣層及第二線路層,所述第一線路基板還包括從所述第一線路層的間隙及所述第二線路層的間隙中露出的至少二個間隔的導電塊,每一所述導電塊包括第一導電部及第二導電部;所述第二導電部內嵌於所述第一絕緣層,且所述第二導電部的沿所述層疊方向間隔的二表面分別與所述第一絕緣層沿所述層疊方向間隔的二側平齊;所述第一導電部自所述第二導電部背離所述第二線路層的表面凸伸,且沿上述層疊方向的任意截面上,所述第一導電部的寬度小於所述第二導電部的寬度;所述第二線路基板藉由一第二絕緣層與所述第一線路層、從所述第一線路層露出的第一絕緣層及導電塊結合;所述電路板還包括內嵌於所述第二絕緣層的至少二個間隔的導電柱,每一導電柱對應一所述導電塊設置,且所述第一導電部嵌入所述導電柱中,所述導電柱電連接所述導電塊與所述第二線路基板。A circuit board, comprising a stacked first circuit substrate and a second circuit substrate, the first circuit substrate includes a first circuit layer, a first insulating layer and a second circuit layer sequentially stacked along the stacking direction, the first A circuit substrate further includes at least two spaced conductive blocks exposed from the gap of the first circuit layer and the gap of the second circuit layer, each of the conductive blocks includes a first conductive part and a second conductive part ; the second conductive portion is embedded in the first insulating layer, and the two surfaces of the second conductive portion spaced along the stacking direction are respectively separated from the first insulating layer along the stacking direction. The sides are flush; the first conductive part protrudes from the surface of the second conductive part away from the second circuit layer, and on any cross-section along the stacking direction, the width of the first conductive part is smaller than the The width of the second conductive part; the second circuit substrate is combined with the first circuit layer, the first insulating layer and the conductive block exposed from the first circuit layer through a second insulating layer; the circuit board It also includes at least two spaced conductive posts embedded in the second insulating layer, each conductive post is provided corresponding to one of the conductive blocks, and the first conductive part is embedded in the conductive post, and the conductive post The conductive block is electrically connected to the second circuit substrate.
本申請的電路板及其製造方法中,由於每一所述導電塊中所述第二導電部背離所述第一線路層的一側與所述第一絕緣層背離所述第一線路層的一側平齊,提升了電路板的平整度,使得在後續電連接電子組件時有利於提升與電子組件電連接的穩固性及有效性。而所述第一導電部內嵌於所述導電柱中,有利於提高電路板中線路層之間電連接的穩固性。In the circuit board and its manufacturing method of the present application, since the side of the second conductive part in each of the conductive blocks away from the first circuit layer and the side of the first insulating layer away from the first circuit layer One side is flush, which improves the flatness of the circuit board, which is conducive to improving the stability and effectiveness of the electrical connection with the electronic components when the electronic components are subsequently electrically connected. The first conductive part is embedded in the conductive column, which is beneficial to improve the stability of the electrical connection between the circuit layers in the circuit board.
下面將結合本申請實施例中的圖式,對本申請實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例僅僅係本申請一部分實施例,而不係全部的實施例。The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them.
除非另有定義,本文所使用的所有的技術及科學術語與屬於本申請的技術領域的技術人員通常理解的含義相同。本文中在本申請的說明書中所使用的術語只係為了描述具體的實施例的目的,不係旨在於限制本申請。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the application. The terms used herein in the description of the application are for the purpose of describing specific embodiments only, and are not intended to limit the application.
下面結合圖式,對本申請的一些實施方式作詳細說明。在不衝突的情況下,下述的實施例及實施例中的特徵可相互組合。Some implementations of the present application will be described in detail below with reference to the drawings. In the case of no conflict, the following embodiments and features in the embodiments can be combined with each other.
請結合參閱圖1至圖10,本發明一實施方式的電路板的製造方法,其包括以下步驟:Please refer to FIG. 1 to FIG. 10 in conjunction with the manufacturing method of a circuit board according to an embodiment of the present invention, which includes the following steps:
步驟S1,請參閱圖1,提供一雙面金屬基板10,所述雙面金屬基板10包括依次層疊設置的第一金屬箔11、第一絕緣層13及第二金屬箔15。Step S1 , please refer to FIG. 1 , providing a double-
所述第一絕緣層13可包括但不僅限於聚醯亞胺膜(polyimide,PI)、液晶聚合物膜(liquid crystal polymer,LCP)、聚對苯二甲酸乙二醇酯膜(Polyethylene Terephthalate,PET)及聚萘二甲酸乙二醇酯膜(Polyethylene Naphthalate,PEN)中的至少一種。The first
所述第一金屬箔11及第二金屬箔15的材質可為但不僅限於銅、銀、鎳、金等金屬及其合金中的至少一種。The material of the
在本實施方式中,所述雙面金屬基板10可為一雙面覆銅板。In this embodiment, the double-
步驟S2,請參閱圖2,在所述雙面金屬基板10上形成至少二個階梯盲孔16,其中,每一所述階梯盲孔16包括沿上述層疊方向貫穿所述第一金屬箔11的第一部分161及沿上述層疊方向貫穿所述第一絕緣層13的第二部分163。所述第一部分161與所述第二部分163連通,且沿上述層疊方向的任意截面上,每一所述階梯盲孔16中的所述第一部分161的寬度上小於所述第二部分163的寬度。Step S2, please refer to FIG. 2, forming at least two stepped
優選的,沿上述層疊方向的任意截面上,每一所述階梯盲孔16的截面大致呈倒T形。更優選的,每一所述階梯盲孔16中的所述第一部分161的中心軸線與所述第二部分163的中心軸線可重合。Preferably, on any cross-section along the stacking direction, the cross-section of each stepped
具體的,所述階梯盲孔16可藉由但不僅限於以下方式形成:Specifically, the stepped
第一,請參閱圖3,對所述第一金屬箔11進行蝕刻,形成至少二個沿上述層疊方向貫穿所述第一金屬箔11的第一部分161。First, referring to FIG. 3 , the
第二,請參閱圖2,藉由每一所述第一部分161對所述第一絕緣層13進行蝕刻,形成沿上述層疊方向貫穿所述第一絕緣層13的第二部分163。其中,沿上述層疊方向的任意截面上,所述第一部分161的寬度上小於對應的所述第二部分163的寬度。Second, referring to FIG. 2 , the first
由於所述第一金屬箔11與所述第一絕緣層13的材質不同,故,選擇不同的蝕刻液即可分別形成所述第一部分161及所述第二部分163,且在形成所述第二部分163時不影響已形成的所述第一部分161。Since the materials of the
步驟S3,請參閱圖4,往每一所述階梯盲孔16填充導電漿料,以對應每一所述階梯盲孔16形成一導電塊20。其中,每一所述導電塊20包括填充所述第一部分161的第一導電部21及填充所述第二部分163的第二導電部23。每一所述導電塊20的形狀與相應的所述階梯盲孔16的形狀一致。Step S3 , please refer to FIG. 4 , filling each step
優選的,所述導電漿料可為銀漿。所述導電漿料可藉由但不僅限於印刷的方式填充於所述階梯盲孔16中。Preferably, the conductive paste can be silver paste. The conductive paste can be filled in the stepped
步驟S4,請參閱圖5,對設有所述第一導電部21的所述第一金屬箔11進行線路製作,使得所述第一金屬箔11對應形成第一線路層110。In step S4 , please refer to FIG. 5 , performing wiring fabrication on the
當所述第一線路層110中的線路與該導電塊20電連接時,由於所述導電塊20結構的特殊性,該線路可直接設置於該導電塊20的第二導電部21的表面實現電連接,無需形成孔環,繼而有利於節省佈線空間,提升佈線密度。在一些實施方式中,為了進一步地提高該線路與該導電塊20電連接的穩固性,該線路還可進一步地與所述第一導電部23接觸甚至環繞所述第一導電部23。When the circuit in the
步驟S5,請參閱圖6及圖7,在所述第一線路層110及從所述第一線路層110露出的第一絕緣層13及所述導電塊20上設置第二絕緣層30,並對所述第二絕緣層30進行圖案化以對應每一所述導電塊20形成一第一開口301。其中,所述第一開口301環繞所述第一導電部21開設以露出所述第一導電部21及部分所述第二導電部23。Step S5, please refer to FIG. 6 and FIG. 7, a second
在本實施方式中,優選的,沿所述層疊方向,所述第二絕緣層30的厚度可大於所述第一導電部21的高度。在一些實施方式中,沿所述層疊方向,所述第二絕緣層30的厚度亦可小於或等於所述第一導電部21的高度。In this embodiment, preferably, along the stacking direction, the thickness of the second
步驟S6,請參閱圖8,對應每一所述第一開口301形成一填充所述第一開口301的導電柱35,並在圖案化後的所述第二絕緣層30背離所述第一絕緣層13的一側形成線路基板50,且對所述第二金屬箔15進行線路製作以對應形成第二線路層150。其中,所述導電柱35電連接所述線路基板50,所述第二線路層150對應所述導電塊20形成至少一第二開口151。Step S6, please refer to FIG. 8 , corresponding to each of the
具體的,每一所述導電柱35朝向對應的所述第二導電部23的表面朝背離所述第二導電部23的方向凹陷形成凹槽350,對應的所述第一導電部21內嵌於所述凹槽350中。Specifically, the surface of each
至少一所述導電塊20從一所述第二開口151暴露。在本實施方式中,所述導電塊20為複數且間隔設置,複數所述導電塊20從一所述第二開口151暴露。每一所述導電塊20中所述第二導電部23背離所述第一導電部21的表面與所述第一絕緣層13背離所述第一線路層110的一側平齊。At least one of the
在本實施方式中,所述線路基板50可為一單層線路基板,其包括一線路層53。所述導電柱35電連接所述線路層53。在一些實施方式中,所述線路基板50還可為雙層線路基板或者多層線路層基板,即所述線路基板50包括間隔且層疊的至少二線路層。所述導電柱35電連接相鄰的所述線路層。In this embodiment, the
步驟S7,請參閱圖9,在所述線路基板50上覆蓋第一保護層61,在所述第二線路層150上覆蓋第二保護層63。其中,所述第二保護層63包括至少一開窗630,至少一所述導電塊20從一所述開窗630暴露。Step S7 , please refer to FIG. 9 , covering the
在本實施方式中,複數所述導電塊20從一所述開窗630暴露。In this embodiment, a plurality of the
步驟S8,請參閱圖10,在所述開窗630中安裝至少一電子組件70,每一所述電子組件70與至少二個所述導電塊20電連接。Step S8 , please refer to FIG. 10 , install at least one
具體的,每一所述電子組件70可包括至少二個間隔的連接墊71,每一連接墊71電連接一所述導電塊20中的所述第二導電部23背離所述第一導電部21的表面。Specifically, each of the
每一所述電子組件70與每一所述導電塊20之間可藉由但不僅限於異方性導電膠或錫膏(圖未示)等電連接並固定。Each of the
在一些實施方式中,上述步驟S8可省略。在一些實施方式中,上述步驟S7及步驟S8可省略。In some implementations, the above step S8 can be omitted. In some embodiments, the above steps S7 and S8 can be omitted.
請參閱圖11,本發明一實施方式的電路板100,包括層疊設置的第一線路基板10a及第二線路基板40。所述第一線路基板10a包括沿上述層疊方向依次層疊的第一線路層110、第一絕緣層13及第二線路層150。其中,所述第一線路基板10a還包括從所述第一線路層110的間隙及所述第二線路層150的間隙中露出的至少二個間隔的導電塊20,每一所述導電塊20包括第一導電部21及第二導電部23。其中,所述第二導電部23內嵌於所述第一絕緣層13,且所述第二導電部23的沿所述層疊方向間隔的二表面分別與所述第一絕緣層13沿所述層疊方向間隔的二側平齊。所述第一導電部21自所述第二導電部23背離所述第二線路層150的表面凸伸,且沿上述層疊方向的任意截面上,所述第一導電部21的寬度小於所述第二導電部23的寬度。所述第二線路基板40藉由一第二絕緣層30與所述第一線路層110、從所述第一線路層110露出的第一絕緣層13及導電塊20結合。所述電路板100還包括內嵌於所述第二絕緣層30的至少二個間隔的導電柱35,每一導電柱35對應一所述導電塊20設置,且所述第一導電部21嵌入所述導電柱35中。所述導電柱35電連接所述導電塊20與所述第二線路基板40。Please refer to FIG. 11 , a
在本實施方式中,沿所述層疊方向,所述第一導電部21的高度與所述第一線路層110的厚度可一致。In this embodiment, along the stacking direction, the height of the first
優選的,所述導電塊20可為銀塊。Preferably, the
優選的,沿所述層疊方向的任意截面上,每一所述導電塊20的截面大致呈倒T形。更優選的,每一所述導電塊20中的所述第一導電部21沿所述層疊方向的中心軸線與所述第二導電部23沿所述層疊方向的中心軸線可重合。Preferably, on any cross section along the stacking direction, the cross section of each
優選的,沿所述層疊方向,所述第二絕緣層30的厚度可大於所述第一導電部21的高度。在一些實施方式中,沿所述層疊方向,所述第二絕緣層30的厚度亦可小於或等於所述第一導電部21的高度。Preferably, along the stacking direction, the thickness of the second insulating
在一些實施方式中,所述電路板100還可包括第一保護層61及第二保護層63。所述第一保護層61覆蓋所述第二線路基板40,所述第二保護層63覆蓋所述第二線路層150,且所述第二保護層63包括至少一開窗630以露出所述導電塊20。In some implementations, the
在一些實施方式中,所述電路板100還可包括至少一安裝於所述開窗630中的電子組件70,每一電子組件70與所述導電塊20電連接。In some implementations, the
具體的,每一所述電子組件70可包括至少二個間隔的連接墊71,每一連接墊71電連接一所述導電塊20中的所述第二導電部23背離所述第一導電部21的表面。Specifically, each of the
每一所述電子組件70與每一所述導電塊20之間可藉由但不僅限於異方性導電膠或錫膏等電連接並固定。Each of the
本申請的電路板及其製造方法中,由於每一所述導電塊20中所述第二導電部23背離所述第一線路層110的一側與所述第一絕緣層13背離所述第一線路層110的一側平齊,提升了電路板的平整度,使得在後續電連接電子組件70時有利於提升與電子組件70電連接的穩固性及有效性。而所述第一導電部21內嵌於所述導電柱35中,有利於提高電路板中線路層之間電連接的穩固性。In the circuit board and its manufacturing method of the present application, since the side of the second
進一步地,所述導電塊20藉由銀漿形成,有利於降低所述導電塊20的接觸電阻,進而有利於保證電路板信號的完整性,同時銀漿形成的導電塊20無需進行表面處理,後續可直接電連接電子組件,有利於縮減製程工序及成本。Further, the
100:電路板 10:雙面金屬基板 11:第一金屬箔 13:第一絕緣層 15:第二金屬箔 16:階梯盲孔 161:第一部分 163:第二部分 20:導電塊 21:第一導電部 23:第二導電部 110:第一線路層 30:第二絕緣層 301:第一開口 35:導電柱 50:線路基板 150:第二線路層 151:第二開口 350:凹槽 53:線路層 61:第一保護層 63:第二保護層 630:開窗 70:電子組件 71:連接墊 10a:第一線路基板 40:第二線路基板 100: circuit board 10: Double-sided metal substrate 11: The first metal foil 13: The first insulating layer 15: Second metal foil 16: Ladder blind hole 161: Part 1 163: Part Two 20: Conductive block 21: The first conductive part 23: The second conductive part 110: The first line layer 30: Second insulating layer 301: first opening 35: Conductive column 50: circuit substrate 150: Second line layer 151: second opening 350: Groove 53: Line layer 61: The first protective layer 63:Second protective layer 630: open window 70: Electronic components 71: Connection pad 10a: the first circuit substrate 40: Second circuit substrate
圖1-圖10係本發明提供的一實施方式的電路板的製造方法。1-10 are the manufacturing method of the circuit board according to one embodiment of the present invention.
圖11為本發明提供的一實施方式的電路板。Fig. 11 is a circuit board according to an embodiment of the present invention.
無none
100:電路板 100: circuit board
13:第一絕緣層 13: The first insulating layer
20:導電塊 20: Conductive block
21:第一導電部 21: The first conductive part
23:第二導電部 23: The second conductive part
110:第一線路層 110: The first line layer
30:第二絕緣層 30: Second insulating layer
35:導電柱 35: Conductive column
150:第二線路層 150: Second line layer
61:第一保護層 61: The first protective layer
63:第二保護層 63:Second protective layer
630:開窗 630: open window
70:電子組件 70: Electronic components
71:連接墊 71: Connection pad
10a:第一線路基板 10a: the first circuit substrate
40:第二線路基板 40: Second circuit substrate
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