WO2019056935A1

WO2019056935A1 - Ft4222-based testing system and method for spi flash

Info

Publication number: WO2019056935A1
Application number: PCT/CN2018/103038
Authority: WO
Inventors: 黄欢; 施冠良
Original assignee: 南京扬贺扬微电子科技有限公司
Priority date: 2017-09-20
Filing date: 2018-08-29
Publication date: 2019-03-28
Also published as: CN107633867B; CN107633867A

Abstract

Provided are an FT4222-based testing system and method for an SPI flash. The testing method comprises: invoking an FT4222 chip device from debugging tools according to a testing statement inputted by a tester; configuring testing conditions for different parameters for an SPI NAND Flash module; and loading the testing statement to an FT4222 chip module to test the SPI NAND Flash module. The testing method can perform simple tests, such as reading, writing, purging and BurnIn (stability) tests, on an SPI NAND Flash. Moreover, a program code of testing software can be modified to accomplish particular test objectives.

Description

FT flash memory test system and method based on FT4222

Technical field

The invention relates to a SPI NAND Flash test method based on FT4222, belonging to the field of SPI NAND Flash test.

Background technique

The SPI NAND Flash test is usually connected by two FPGA boards. One is used as the Host and the other is used as the Device. During the test, different commands are executed by the Host to test whether the various functions of the Device are correct. This method has two drawbacks. One is that the bin file executed by the host is burned in the ROM, so the test process requires frequent burning, which is troublesome. Second, this kind of test can only measure the function and response of the SPI under normal conditions. Some special cases or test contents cannot be realized and are not flexible enough.

Therefore, using FT4222 to simulate the Host behavior, the instructions that need to be executed are edited in the text document. Only the content in the text document needs to be modified during the test, and then executed through the software program Load File. The commands can be combined and arbitrarily combined, and can be easily modified and improved. effectiveness.

The SPI protocol is a simple and convenient communication protocol that exists on all kinds of main control chips and is used to connect peripheral modules. At present, the memory chip is widely used and has a large demand. SPI NAND Flash has applications on various devices, and the stability of Flash requires a large number of test guarantees, and the test of SPI NAND Flash requires a large amount of data reading and writing for a long time, random blocks. Complex operations such as access, so a systematic approach is needed to test Flash.

Summary of the invention

In view of the above technical problems, the present invention aims to provide a SPI NAND Flash test method based on FT4222, which can test a simple SPI NAND Flash read, write, erase, BurnIn test, and also Some special test objectives are achieved by modifying the test software program code.

To achieve the above object, the present invention adopts the following technical solutions:

Based on the FT4222 SPI flash test system, the test system includes a processor module, an SPI NAND Flash module, an FT4222 chip module, and a communication connection between the modules.

The processor module and the FT4222 chip module are connected by USB.

The processor module is configured to generate a test instruction, and the test instruction is transmitted to the FT4222 chip module via USB, and the FT4222 chip module has a conversion function of the USB and SPI protocols, and converts the instruction to be tested into an SPI format and transmits the signal to the SPI. After the NAND Flash module runs the instruction, the result is transmitted back to the processor module through the FT4222 chip module, thereby judging the correctness of the instruction operation.

Based on the FT4222 SPI flash test method, the test method calls the FT4222 chip device in the debug tool according to the test statement input by the tester, configures the test condition for the SPI NAND Flash module with different parameters, and finally loads the test statement into the FT4222 chip. The module tests the SPI NAND Flash module.

Further, the method specifically includes the following steps:

Step 1: input the instruction required to be tested in the processor module;

Step 2: After the script file is input, open the calling debugging tool, obtain the chip device connected to the processor, select the FT4222 chip device; then set the parameters of the SPI NAND flash module and the conditions required for the test, and load the document to be tested. Into, test the SPI NAND Flash through the library function of the FT4222 chip module;

Step 3: Observe the correctness of the operation result of the waveform verification instruction through the logic analyzer.

The processor module is a PC.

The instruction for inputting the required test in the processor module is specifically: firstly creating a text document, inputting an instruction to be tested, and if it is a plurality of combinations, inputting a line, the format is a two-byte hexadecimal number, Separated by spaces, arranged in turn, and entered with a carriage return.

The logic analyzer acquires digital signals from an FPGA.

The invention has the following innovations:

The FT4222 is used to simulate the Host behavior, and the instructions that need to be executed are edited in the text document. Only the content in the text document needs to be modified during the test, and then executed through the software program Load File. The instructions can be combined and arbitrarily combined, and the modification is convenient and the efficiency is improved.

This test method can test simple SPI NAND Flash read, write, erase, BurnIn test, and also modify the test software program code to achieve some special test purposes, such as simulation H2Test, random block The reading and writing, various data pattern combinations and the read and write performance of the test flash, etc., and in the test can increase the test items as needed to achieve automated test functions.

DRAWINGS

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a system configuration diagram of a test method of the present invention.

Detailed ways

The present invention provides an SPI NAND Flash test system based on FT4222. As shown in FIG. 1, the test system includes a processor module, an SPI NAND Flash module, an FT4222 chip module, and a communication connection between the modules; The module is connected to the FT4222 chip module via USB.

Based on the above test system, the present invention provides a test method. According to the test statement input by the tester, the FT4222 chip device in the debug tool is called, and the test condition is configured for the SPI NAND Flash module with different parameters, and finally the test statement is loaded. The SPI NAND Flash module is tested by entering the FT4222 chip module.

Specifically, the method specifically includes the following steps:

Step 1: input the instructions to be tested in the processor module; combine multiple single instructions into a script for automated testing, reducing cumbersome manual operations, and the advantages of the script;

Step 2: After the script file is input, open the calling debugging tool, obtain the chip device connected to the processor, select the FT4222 chip device; then set the parameters of the SPI NAND flash module and the conditions required for the test, and load the document to be tested. Into, through the library function of FT4222 chip module to achieve SPI NAND Flash test work; (running in script mode, strong editability, easy to operate)

Step 3: According to the operation flow on the interface, the logic analyzer is used to observe the correctness of the operation result of the waveform verification instruction.

The logic analyzer collects digital signals from the FPGA, such as chip enable, command/address latch, read/write enable, data, etc., to verify the correctness of the command operation results.

The programmable circuit used in this embodiment uses the hardware description language to complete the design of the circuit and burn it to the FPGA for testing. The programmable circuit here is a conventional choice and is used for IC design verification. Here, it is used to test the SPI. Flash memory.

The processor module is a PC.

Detailed ways:

1) First create a text document, input the instructions you need to test, if it is a combination of multiple lines, the format is two bytes of hexadecimal numbers, separated by spaces, arranged in turn, input is returned by carriage return Wrap. Such as:

Write command 0x02+column addr+ data

Read command 0x03/0x3b/0x6b/0xeb/0xbb+column addr+length (two bytes hex)

0x13/0x10+block/page addr

Erase command 0xd8+block addr

2) After the script file is input, open the Debug Tool, click Scan button, open FT4222 device, and then set various flash parameters and conditions required for testing on the interface. After completing, click load file button to load the instruction file just created. Into, test the SPI NAND Flash by calling the library function of FT4222.

3) The running result is displayed in the blank area on the right side, and the correctness of the running result of the waveform check instruction can be observed by the logic analyzer.

This test method can test the read, write, erase, BurnIn test of the simple SPI NAND Flash, and also modify the test software program code, such as regularity of multiple single instructions, can be according to demand or According to the working characteristics of Flash, the example is described in the next sentence. The combination is used to achieve some special test purposes, such as analog H2Test, flash full block sequential write read test, random block read and write, address random change write read operation, various data pattern combinations, different data such as all 0 , all 1 and random numbers, as well as test flash read and write performance, flash write speed stability, etc., and in the test can increase the test items as needed to achieve automated test functions.

The above description is only a preferred embodiment of the present invention, and it should be noted that those skilled in the art can also make several improvements and retouchings without departing from the principles of the present invention. It should be considered as the scope of protection of the present invention.

Claims

The FT4222 based SPI flash test system is characterized in that the test system comprises a processor module, an SPI NAND Flash module, an FT4222 chip module, and a communication connection between the modules.
The FT4222-based SPI flash test system according to claim 1, wherein the processor module and the FT4222 chip module are connected by USB.
The FT4222-based SPI flash test system according to claim 2, wherein the processor module is configured to generate a test command, and the test command is transmitted to the FT4222 chip module via USB, and the FT4222 chip module has a USB and The conversion function of the SPI protocol converts the instruction to be tested into an SPI format and transmits it to the SPI NAND Flash module to execute the instruction, and then passes the result back to the processor module through the FT4222 chip module, thereby judging the correctness of the instruction operation. .
The FT4222-based SPI flash test method is characterized in that the test method calls the FT4222 chip device in the debug tool according to the test statement input by the tester, configures the test condition for the SPI NAND Flash module with different parameters, and finally the test sentence is loaded. The SPI NAND Flash module is tested by entering the FT4222 chip module.
The FT4222-based SPI flash memory testing method according to claim 4, wherein the method specifically comprises the following steps:

Step 1: input the instruction required to be tested in the processor module;

Step 2: After the script file is input, open the calling debugging tool, obtain the chip device connected to the processor, select the FT4222 chip device; then set the parameters of the SPI NAND flash module and the conditions required for the test, and load the document to be tested. Into, test the SPI NAND Flash through the library function of the FT4222 chip module;

Step 3: Observe the correctness of the operation result of the waveform verification instruction through the logic analyzer.
The FT4222-based SPI flash test method according to claim 5, wherein the processor module is a PC.
The FT4222-based SPI flash memory testing method according to claim 5, wherein the input of the instruction required to be tested in the processor module is specifically: first creating a text document, inputting an instruction to be tested, and if Multiple combinations need to be input in separate lines. The format is two-byte hexadecimal numbers, separated by spaces, arranged in turn, and entered with a carriage return.
The FT4222-based SPI flash test method according to claim 5, wherein the logic analyzer collects digital signals from the FPGA.