CN107633867B - SPI flash memory test system and method based on FT4222 - Google Patents

SPI flash memory test system and method based on FT4222 Download PDF

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Publication number
CN107633867B
CN107633867B CN201710853972.9A CN201710853972A CN107633867B CN 107633867 B CN107633867 B CN 107633867B CN 201710853972 A CN201710853972 A CN 201710853972A CN 107633867 B CN107633867 B CN 107633867B
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test
spi
module
instruction
testing
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CN107633867A (en
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黄欢
施冠良
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Heyangtek Cooperation Ltd
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Heyangtek Cooperation Ltd
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Abstract

The invention discloses an SPI Flash memory test system and method based on FT4222, the test method calls FT4222 chip equipment in a debugging tool according to test statements input by a tester, test conditions are configured for SPI NAND Flash modules with different parameters, and finally the test statements are loaded into the FT4222 chip module to test the SPI NAND Flash modules. The testing method can test the reading, writing, erasing and burning in test of the simple SPI NAND Flash, and can achieve some special testing purposes by modifying the program codes of the testing software.

Description

SPI flash memory test system and method based on FT4222
Technical Field
The invention relates to an SPI NAND Flash test method based on FT4222, and belongs to the field of SPI NAND Flash test.
Background
The SPI NAND Flash test is usually formed by connecting two FPGA boards, one is used as a Host end, the other is used as a Device end, and different instructions are executed through the Host end during the test to test whether various functions of the Device end are correct or not. The method has 2 disadvantages, firstly, because bin files executed by the Host end are burned in the ROM, the test process needs frequent burning, and is troublesome. Secondly, the test can only test the function and response of the SPI under normal conditions, and some special conditions or test contents cannot be realized, so that the test is not flexible enough.
Therefore, FT4222 is adopted to simulate the Host behavior, the instruction to be executed is edited in the text document, only the content in the text document needs to be modified during testing, and then the Load File is executed through a software program, so that the instruction can be combined and matched at will, the modification is convenient, and the efficiency is improved.
The SPI protocol is a simple and convenient communication protocol, which can exist on various main control chips for connecting peripheral modules. At present, the memory chip is widely applied and has a large demand, the SPI NAND Flash is applied to various devices, the stability of the Flash needs to be ensured by a large amount of tests, and the test of the SPI NAND Flash needs complex operations such as a large amount of data read-write for a long time, random block access and the like, so a systematic method is needed for testing the Flash.
Disclosure of Invention
In view of the above technical problems, the present invention aims to provide an SPI NAND Flash test method based on FT4222, which can test the simple read, write, erase, BurnIn test (stability test) of the SPI NAND Flash, and can achieve some special test purposes by modifying test software program codes.
In order to achieve the purpose, the invention adopts the following technical scheme:
the SPI Flash memory test system based on the FT4222 comprises a processor module, an SPI NAND Flash module, an FT4222 chip module and communication connection among the modules.
The processor module is connected with the FT4222 chip module through a USB.
The processor module is used for generating a test instruction, the test instruction is transmitted to the FT4222 chip module through the USB, the FT4222 chip module has a conversion function of the USB and the SPI protocols, the instruction to be tested is converted into an SPI form, the SPI form is transmitted to the SPI NAND Flash module to operate the instruction, and then the result is transmitted back to the processor module through the FT4222 chip module, so that the accuracy of instruction operation is judged.
The test method comprises the steps of calling FT4222 chip equipment in a debugging tool according to test statements input by a tester, configuring test conditions aiming at SPI NAND Flash modules with different parameters, and finally loading the test statements into the FT4222 chip module to test the SPI NAND Flash modules.
Further, the method specifically comprises the following steps:
step one, inputting an instruction to be tested in a processor module;
step two, after the script file is input, opening and calling a debugging tool, acquiring chip equipment connected with the processor, and selecting FT4222 chip equipment; then setting parameters of the SPI NAND Flash module and conditions required by testing, loading the instruction document to be tested, and realizing the testing work of the SPI NAND Flash through a library function of the FT4222 chip module;
and thirdly, observing the correctness of the running result of the waveform inspection instruction through a logic analyzer.
The processor module is a PC.
The step of inputting the instruction to be tested in the processor module specifically comprises the following steps: firstly, creating a text document, inputting an instruction required to be tested, if a plurality of combinations need to be input in rows, the format is two-byte hexadecimal numbers which are separated by spaces and are arranged in sequence, and after the input, returning and line changing are carried out.
The logic analyzer collects digital signals from the FPGA.
The invention has the following innovation:
FT4222 is adopted to simulate the Host behavior, instructions to be executed are edited in the text document, only the content in the text document needs to be modified during testing, then the instructions can be combined and matched at will through a software program Load File and executed, the modification is convenient, and the efficiency is improved.
The SPI protocol is a simple and convenient communication protocol, which can exist on various main control chips for connecting peripheral modules. At present, the memory chip is widely applied and has a large demand, the SPI NAND Flash is applied to various devices, the stability of the Flash needs to be ensured by a large amount of tests, and the test of the SPI NAND Flash needs complex operations such as a large amount of data read-write for a long time, random block access and the like, so a systematic method is needed for testing the Flash.
The Test method can Test the reading, writing, erasing and burning in Test of the simple SPI NAND Flash, and can achieve some special Test purposes such as simulating H2Test, reading and writing of random blocks, various data pattern combinations and testing the reading and writing efficiency of the Flash by modifying Test software program codes, and Test items can be added according to requirements in the Test to achieve an automatic Test function.
Drawings
FIG. 1 is a system configuration diagram of the test method of the present invention.
Detailed Description
The invention provides an SPI NAND Flash test system based on FT4222, as shown in FIG. 1, the test system comprises a processor module, an SPI NAND Flash module, an FT4222 chip module and communication connection among the modules; the processor module is connected with the FT4222 chip module through a USB.
The processor module is used for generating a test instruction, the test instruction is transmitted to the FT4222 chip module through the USB, the FT4222 chip module has a conversion function of the USB and the SPI protocols, the instruction to be tested is converted into an SPI form, the SPI form is transmitted to the SPI NAND Flash module to operate the instruction, and then the result is transmitted back to the processor module through the FT4222 chip module, so that the accuracy of instruction operation is judged.
Based on the test system, the invention provides a test method, the test method calls FT4222 chip equipment in a debugging tool according to test statements input by a tester, test conditions are configured for SPI NAND Flash modules with different parameters, and finally the test statements are loaded into the FT4222 chip module to test the SPI NAND Flash modules.
Specifically, the method specifically comprises the following steps:
step one, inputting an instruction to be tested in a processor module; a plurality of single instructions are combined and edited into a script for automatic testing, so that the complex manual operation and the advantages of the script are reduced;
step two, after the script file is input, opening and calling a debugging tool, acquiring chip equipment connected with the processor, and selecting FT4222 chip equipment; then setting parameters of the SPI NAND Flash module and conditions required by testing, loading the instruction document to be tested, and realizing the testing work of the SPI NAND Flash through a library function of the FT4222 chip module; (operating in script mode, strong editability and convenient operation)
And step three, testing according to the operation flow on the interface, and observing the correctness of the operation result of the waveform inspection instruction through a logic analyzer.
The logic analyzer checks the correctness of the instruction operation result from digital signals acquired from the FPGA, such as chip enable, command/address latch, read-write enable, data and other information.
The programmable circuit adopted by the embodiment completes the design of the circuit by using a hardware description language and burns the circuit on the FPGA for testing, wherein the programmable circuit is a conventional choice and is used for IC design verification, namely for testing the SPI flash memory.
The processor module is a PC.
The step of inputting the instruction to be tested in the processor module specifically comprises the following steps: firstly, creating a text document, inputting an instruction required to be tested, if a plurality of combinations need to be input in rows, the format is two-byte hexadecimal numbers which are separated by spaces and are arranged in sequence, and after the input, returning and line changing are carried out.
The specific implementation mode is as follows:
1) firstly, creating a text document, inputting an instruction required to be tested, if a plurality of combinations need to be input in rows, the format is two-byte hexadecimal numbers which are separated by spaces and are arranged in sequence, and after the input, returning and line changing are carried out. Such as:
write command 0x02+ column addr + data
Read command 0x03/0x3b/0x6b/0xeb/0xbb + column addr + length (two bytes hexadecimal)
0x13/0x10+block/page addr
Erase Command 0xd8+ Block addr
2) After the script file is input, the Debug Tool is opened, the Scan button and open FT4222device are clicked, various Flash parameters and conditions required by testing are set on an interface, the load file button is clicked after the completion, the instruction document which is just created is loaded, and the library function of the FT4222 is called through programming to realize the testing work of the SPI NAND Flash.
3) The running result is displayed in the right blank area, and the correctness of the running result of the waveform verification instruction can be observed by the logic analyzer.
The test method can test the reading, writing, erasing and burning in test of the simple SPI NAND Flash, and can modify the program code of the test software, for example, a plurality of single instructions are regular, and the test method can be described in the next sentence according to the requirement or the working characteristics of the Flash. The combination of the data patterns is combined to achieve some special Test purposes, such as simulating H2Test, flash full-block sequential write-read inspection, random block read-write, address random change write-read operation, various data pattern combinations, different data such as all 0, all 1, random numbers and the like, testing the read-write efficiency of the flash, the write-read speed stability of the flash and the like, and Test items can be added according to requirements in the Test to achieve an automatic Test function.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.

Claims (3)

1. The SPI flash memory testing method based on FT4222 is characterized by being based on the following testing system:
the test system comprises a processor module, an SPI NAND Flash module, an FT4222 chip module and communication connection among the modules;
the processor module is connected with the FT4222 chip module through a USB;
the processor module is used for generating a test instruction, the test instruction is transmitted to the FT4222 chip module through the USB, the FT4222 chip module has a conversion function of the USB and the SPI protocols, the instruction to be tested is converted into an SPI form, and after the SPI form is transmitted to the SPI NAND Flash module operation instruction, the result is transmitted back to the processor module through the FT4222 chip module, so that the instruction operation correctness is judged;
the testing method comprises the steps of calling FT4222 chip equipment in a debugging tool according to testing statements input by a tester, configuring testing conditions aiming at SPI NAND Flash modules with different parameters, and finally loading the testing statements into the FT4222 chip module to test the SPI NAND Flash modules;
the method specifically comprises the following steps:
step one, inputting an instruction to be tested in a processor module; the step of inputting the instruction to be tested in the processor module specifically comprises the following steps: firstly, creating a text document, inputting an instruction to be tested, if a plurality of combinations need to be input in rows, the format is two-byte hexadecimal numbers which are separated by spaces and are arranged in sequence, and after the input, returning and line changing are carried out;
step two, after the script file is input, opening and calling a debugging tool, acquiring chip equipment connected with the processor, and selecting FT4222 chip equipment; then setting parameters of the SPI NAND Flash module and conditions required by testing, loading statements to be tested, and realizing the testing work of the SPI NAND Flash through a library function of the FT4222 chip module;
and thirdly, observing the correctness of the running result of the waveform inspection instruction through a logic analyzer.
2. The FT 4222-based SPI flash test method of claim 1, wherein said processor module is a PC.
3. The FT 4222-based SPI flash testing method of claim 1, wherein said logic analyzer collects digital signals from an FPGA.
CN201710853972.9A 2017-09-20 2017-09-20 SPI flash memory test system and method based on FT4222 Active CN107633867B (en)

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PCT/CN2018/103038 WO2019056935A1 (en) 2017-09-20 2018-08-29 Ft4222-based testing system and method for spi flash

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CN107633867B (en) * 2017-09-20 2020-12-01 南京扬贺扬微电子科技有限公司 SPI flash memory test system and method based on FT4222
CN108733389A (en) * 2018-05-31 2018-11-02 深圳市德名利电子有限公司 A kind of Flash data analysis filter
CN111209604A (en) * 2018-11-22 2020-05-29 长鑫存储技术有限公司 Detection method and device of memory chip and terminal
RU199833U1 (en) * 2019-06-03 2020-09-22 Федеральное государственное бюджетное образовательное учреждение высшего образования "Петрозаводский государственный университет" Modular system for electrical and functional testing of FPGA-based NAND memory chips

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