WO2019054942A1 - Light-emitting device and method of forming the same - Google Patents

Light-emitting device and method of forming the same Download PDF

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Publication number
WO2019054942A1
WO2019054942A1 PCT/SG2018/050463 SG2018050463W WO2019054942A1 WO 2019054942 A1 WO2019054942 A1 WO 2019054942A1 SG 2018050463 W SG2018050463 W SG 2018050463W WO 2019054942 A1 WO2019054942 A1 WO 2019054942A1
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Prior art keywords
layer
light
semiconductor layer
emitting device
contact
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PCT/SG2018/050463
Other languages
French (fr)
Inventor
Xueliang ZHANG
Swee Tiam TAN
Hilmi Volkan Demir
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Nanyang Technological University
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Publication of WO2019054942A1 publication Critical patent/WO2019054942A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector

Definitions

  • Various aspects of this disclosure may relate to a light-emitting device. Various aspects of this disclosure may relate to a method of forming a light-emitting device.
  • Gallium nitride is important in research of light-emitting diodes, because GaN can be combined with indium to form a gallium nitride / indium gallium nitride (GaN/InGaN) semiconductor layer to emit light having the required color.
  • GaN gallium nitride
  • InGaN indium gallium nitride
  • mobile phone keypads, turn signal lamps, and camera flashes using such gallium nitride-based light-emitting diodes have been commercialized. More generally, the development of general lighting devices using light-emitting diodes has accelerated.
  • Light-emitting diodes are being implemented in a wide variety of products, such as the backlight units of TVs, the auto-light of vehicles, and general lighting luminaires. Light-emitting diodes are also gradually moving toward higher production amounts, with manufacturing processes having high outputs and high efficiency.
  • FIG. 1 shows a schematic of a conventional lateral light-emitting diode structure.
  • the diode includes a first conductivity-type semiconductor layer 10c, a multiple-quantum wells (MQWs) layer 10b, and a second conductivity-type semiconductor layer 10a sequentially formed on a substrate 11. Portions of the second conductivity-type semiconductor layer 10a and the multiple-quantum wells (MQWs) layer 10b are removed to expose a portion of the first conductivity-type semiconductor layer 10c.
  • An electrical conducting layer 20 is formed on the second conductivity-type semiconductor layer 10a.
  • a p-type electrode 31a and an n-type electrode 31b are formed on the electrical conducting layer 20 and the first conductivity-type semiconductor layer 10c respectively.
  • the n-type electrode 31b requires a sufficient large surface for processes such as wire bonding, a substantial portion of the multiple-quantum wells (MQWs) layer 10b has to be removed and the light extraction efficiency is therefore lowered.
  • the light-emitting device may include a first semiconductor layer of a first conductivity type.
  • the light-emitting device may also include a second semiconductor layer of a second conductivity type different from the first conductivity type.
  • the light-emitting device may further include an active layer between the first semiconductor layer and the second semiconductor layer.
  • the light-emitting device may include a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material.
  • the light-emitting device may further include an electrically conductive layer in contact with a second portion of the second semiconductor layer.
  • the light-emitting device may also include a first electrode in contact with the electrically conductive layer.
  • the light-emitting device may further include a second electrode in contact with the first semiconductor layer.
  • the current guide layer may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer.
  • the current guide layer may be configured to reflect at least a portion of light generated by the active layer.
  • Various embodiments may provide a method of forming a light-emitting device.
  • the method may include forming a first semiconductor layer of a first conductivity type.
  • the method may also include forming a second semiconductor layer of a second conductivity type different from the first conductivity type.
  • the method may further include forming an active layer between the first semiconductor layer and the second semiconductor layer.
  • the method may additionally include forming a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material.
  • the method may also include forming an electrically conductive layer in contact with a second portion of the second semiconductor layer.
  • the method may further include forming a first electrode in contact with the electrically conductive layer.
  • the method may also include forming a second electrode in contact with the first semiconductor layer.
  • the current guide layer may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer.
  • the current guide layer may be configured to reflect at least a portion of light generated by the active layer.
  • FIG. 1 shows a schematic of a conventional lateral light-emitting diode structure.
  • FIG. 2 is a general illustration of a light-emitting device according to various embodiments.
  • FIG. 3 is a general illustration of a light-emitting device according to various embodiments.
  • FIG. 4 is a general illustration of a method of forming a light-emitting device according to various embodiments.
  • FIG. 5 is a general illustration of a method of forming a light-emitting device according to various embodiments.
  • FIG. 6A shows a top view of a light-emitting diode according to various embodiments.
  • FIG. 6B shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line A-A' according to various embodiments.
  • FIG. 6C shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line B-B' according to various embodiments.
  • FIG. 6D is scanning electron microscopy (SEM) image illustrating the region of the second electrode 614 according to various embodiments.
  • FIG. 6E shows a magnified schematic of the region C of FIG. 6B according to various embodiments.
  • FIG. 6F shows a magnified schematic of the region C of FIG. 6B according to various other embodiments.
  • FIG. 7 is a plot of reflectance (in percent or %) as a function of wavelength (in nanometers or nm) showing the simulated reflectivity comparison of different wavelengths of light incident on a device with embedded dielectric layers and on a reference device.
  • FIG. 8 is a plot of reflectance (in percent or %) as a function of incident angle (in degrees or deg) showing the simulated reflectivity comparison of light (s-polarized and p-polarized) incident at different angles on a device with embedded dielectric layers and on a reference device.
  • Embodiments described in the context of one of the methods or devices are analogously valid for the other methods or devices. Similarly, embodiments described in the context of a method are analogously valid for a device, and vice versa.
  • the word “over” used with regards to a deposited material formed “over” a side or surface may be used herein to mean that the deposited material may be formed “directly on”, e.g. in direct contact with, the implied side or surface.
  • the word “over” used with regards to a deposited material formed “over” a side or surface may also be used herein to mean that the deposited material may be formed "indirectly on” the implied side or surface with one or more additional layers being arranged between the implied side or surface and the deposited material.
  • a first layer "over" a second layer may refer to the first layer directly on the second layer, or that the first layer and the second layer are separated by one or more intervening layers.
  • the device as described herein may be operable in various orientations, and thus it should be understood that the terms “top”, “topmost”, “bottom”, “bottommost” etc., when used in the following description are used for convenience and to aid understanding of relative positions or directions, and not intended to limit the orientation of the device.
  • Various embodiments may provide a structure design with embedded dielectric layers for flip chip structured light emitting diodes, which may improve the light efficiency and/or may reduce of risk of current leakage for the devices. Some non-limiting embodiments are as illustrated below.
  • FIG. 2 is a general illustration of a light-emitting device according to various embodiments.
  • the light-emitting device may include a first semiconductor layer 202 of a first conductivity type.
  • the light-emitting device may also include a second semiconductor layer 204 of a second conductivity type different from the first conductivity type.
  • the light-emitting device may further include an active layer 206 between the first semiconductor layer 202 and the second semiconductor layer 204.
  • the light-emitting device may include a current guide layer 208 having a first surface in contact with a first portion of the second semiconductor layer 204, the current guide layer 208 including a dielectric material.
  • the light-emitting device may further include an electrically conductive layer 210 in contact with a second portion of the second semiconductor layer 204.
  • the light-emitting device may also include a first electrode 212 in contact with the electrically conductive layer 210.
  • the light-emitting device may further include a second electrode 214 in contact with the first semiconductor layer 202.
  • the current guide layer 208 may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer 210.
  • the current guide layer 208 may be configured to reflect at least a portion of light generated by the active layer 206.
  • the light-emitting device may include a stacked arrangement including a first semiconductor layer 202, an active layer 206 on the first semiconductor layer 202, and a second semiconductor layer 204 on the active layer 206.
  • the light-emitting device may include additionally include an electrically conductive layer 210 over the second semiconductor layer 204.
  • the electrically conductive layer 210 may be directly on the second semiconductor layer 204, while at another portion of the second semiconductor layer 204, the electrically conductive layer 210 and the second semiconductor layer 204 may be separated by a current guide layer 208 including a dielectric material.
  • the light-emitting device may be or may include a light- emitting diode.
  • the active layer 206 may include a multiple-quantum wells (MQWs).
  • the current guide layer 208 may be referred to as a current guiding layer.
  • the p- and n-electrodes which are patterned on the bottom of the device, may usually absorb the light generated from the active region.
  • current distribution may be uneven due to the conductivity of the p- and n-electrodes layout, which may reduce the efficiency especially in the high current density regime.
  • Various embodiments may relate to structures with current guiding layer designs for flip-chip light emitting devices or diodes, which may address the abovementioned issues.
  • a current guiding layer may be made on the bottom of the device, which may reduce the current crowding effect under and around the p- and n-electrodes and reduce the efficiency drop in the flip-chip devices.
  • the current guiding layer may be or may include a reflective dielectric layer, which can reflect the light and prevent /reduce the light being absorbed by the p- and n-electrodes, hence improving the light extraction efficiency.
  • the electrically conductive layer 210 may be configured to allow at least a portion of light generated by the active layer 206 to pass through.
  • the electrically conductive layer 210 may be transparent or translucent to light. The light may have a wavelength from 400 nm to 700 nm.
  • the electrically conductive layer 210 may alternatively be referred to as an electrically conducting layer.
  • the electrically conductive layer 210 may include at least one element selected from a group consisting of zinc, indium, tin, gallium, and magnesium.
  • the electrically conductive layer 210 may include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide (ATO), indium zinc oxide (IZO), aluminum-doped zinc oxide (AZO), or zinc tin oxide (ZTO).
  • the electrically conductive layer 210 may have a thickness of any one value in a range from about 10 nm to about 300 nm.
  • the first electrode 212 may be vertically aligned to the current guide layer.
  • the first electrode 212 may be directly above the current guide layer 208.
  • a portion of the first electrode 212 may be above a portion of the current guide layer 208.
  • a portion of the electrically conductive layer 210 may be between (a portion of) the first electrode 212 and (a portion of) the current guide layer 208.
  • the current guide layer 208 may include one or more materials selected from a group consisting of silicon nitride, silicon oxide, and titanium oxide.
  • the first electrode 212 may include a pad portion and a finger portion extending from the pad portion.
  • the first electrode 212 may include a plurality of pad portions and a plurality of finger portions.
  • the finger portion may be elongated along its length.
  • the finger portion may have a width smaller than the pad portion.
  • the width of the finger portion may be substantially perpendicular to the length of the finger portion.
  • the width of the pad portion may be substantially parallel to the width of the finger portion.
  • the second electrode 214 may include a pad portion and a finger portion extending from the pad portion.
  • the second electrode 214 may include a plurality of pad portions and a plurality of finger portions.
  • the finger portion may be elongated along its length.
  • the finger portion may have a width smaller than the pad portion.
  • the width of the finger portion may be substantially perpendicular to the length of the finger portion.
  • the width of the pad portion may be substantially parallel to the width of the finger portion.
  • the light-emitting device may further include a sidewall protection structure.
  • the sidewall protection structure may be in contact with a side wall of the second semiconductor layer.
  • the sidewall protection structure may also be in contact with a side wall of the active layer.
  • the sidewall protection structure may be on the first semiconductor layer 202.
  • the sidewall protection structure may alternatively be referred to as a sidewall protection layer.
  • the sidewall protection structure may be a layer.
  • the sidewall protection structure may consist of a single layer.
  • the sidewall protection structure or layer may include a dielectric material.
  • the sidewall protection structure or layer may include a material selected from a group consisting of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.
  • the sidewall protection structure may include a first layer; and a second layer on the first layer.
  • the first layer (of the sidewall protection structure) may include a first dielectric material having a first refractive index and the second layer (of the sidewall protection structure) may include a second dielectric material having a second refractive index different from the first refractive index.
  • the first layer of the sidewall protection structure may be referred to as a first compound layer, and the second layer of the sidewall protection structure may be referred to as a second compound layer.
  • each of the first layer and the second layer of the sidewall protection structure may include a material selected from a group consisting of silicon oxide, titanium oxide, tantalum oxide, niobium oxide, aluminum oxide, silicon nitride, and silicon oxynitride.
  • each of the first layer and the second layer of the sidewall protection structure may have a thickness equal to an integral multiple of a quarter of a wavelength ( ⁇ /4) of the light generated by the active layer.
  • the sidewall protection structure may be an extension of the current guide layer 208.
  • the sidewall protection structure may be or may be part of the current guide layer 208.
  • the sidewall protection structure and the current guide layer 208 may be joined, i.e. the sidewall protection structure and the current guide layer 208 may form a continuous structure / layer.
  • the sidewall protection structure / current guide layer 208 may act as a passivation layer.
  • the sidewall protection structure may be formed to reduce or prevent current leakage, and/or protect the active layer / MQWs along the sidewall of the mesa. In various embodiments, the reliability of the device / diode may be improved.
  • the light-emitting device may also include a reflector over the first semiconductor layer 202, the second semiconductor layer 204, and the active layer 206.
  • the reflector may alternatively be referred to as a compound reflecting structure or layer.
  • the reflector may include a first dielectric layer; and a second dielectric layer in contact with the first dielectric layer.
  • the first dielectric layer of the reflector may be referred to as a first compound layer
  • the second dielectric layer of the reflector may be referred to as a second compound layer
  • the second dielectric layer (of the reflector) may include a first- sub-layer of a first refractive index, and a second sub-layer of a second refractive index different from the first refractive index.
  • the reflector may include a metal reflector layer, which may alternatively be referred to as a metal reflecting layer.
  • the metal reflector layer may include one or more metals selected from a group consisting of silver, aluminum, rhodium, nickel, titanium, tungsten, chromium, and copper.
  • the metal reflector layer may be in contact with the second dielectric layer.
  • the reflector may further include a passivation layer.
  • the passivation layer may be in contact with the metal reflector layer.
  • the passivation layer may be referred to as a third compound layer.
  • the reflector may include a first dielectric layer, a second dielectric layer on the first dielectric layer, a metal reflector layer on the second dielectric layer, and a passivation layer on the metal reflector layer.
  • the first electrode 212 may include a doped semiconductor material of a second conductivity type.
  • the second electrode 214 may include a doped semiconductor material of a first conductivity type.
  • the first semiconductor layer 202 may be doped with a n-type dopant, i.e. the first conductivity type may be n-type.
  • the second electrode 214 may also be doped with a n-type dopant.
  • the second semiconductor layer 204 may be doped with a p-type dopant, i.e. the second conductivity type may be p-type.
  • the first electrode 212 may also be doped with a p-type dopant.
  • the first semiconductor layer 202 may be doped with a p-type dopant, i.e. the first conductivity type may be p-type.
  • the second electrode 214 may also be doped with a p-type dopant.
  • the second semiconductor layer 204 may be doped with a n-type dopant, i.e. the second conductivity type may be n-type.
  • the first electrode 212 may also be doped with a n-type dopant.
  • Various embodiments may relate to current guiding layer designs for flip-chip light emitting devices or diodes.
  • the current guiding layer designs may be patterned on the bottom of the device, and the electrode may lead out according to the current guiding layer.
  • the current guiding layer may be made by of a reflective dielectric layer.
  • the current guiding layer may be made by combining SiN x , S1O2 and TiO x or two of them.
  • better optical properties such as higher efficiency, as compared to conventional light-emitting devices, may be achieved.
  • the p- and n-electrodes may be led out on the current guiding layer, and may be patterned according to the current guiding layer designs. Thus, the current spreading may be more uniform, and the efficiency drop may be reduced.
  • the current leakage may be suppressed, and the reliability can be improved.
  • the current guiding layer may be also a passivation layer, which may be formed to prevent current leakage and protect the MQWs from the side-wall of the mesa. Hence, the reliability of the flip-chip light emitting diodes may be enhanced.
  • the current guiding layer may be a reflective dielectric layer, on and around the p- and n-electrodes.
  • the distributed Bragg reflector may be made by combining SiNx, S1O2, and TiO x , or two or more of them.
  • the reflective dielectric layer may reflect the light even from the side-wall, and may prevent or reduce the light being absorbed by the p- and n- electrodes. Thus, the light extraction efficiency of the flip-chip light emitting diodes may be improved.
  • a wavelength of light emitted by the active layer of the device may have a reflectance of above 80%, or above 90%, or above 95%.
  • various embodiments may be used for a wide range of applications, such as low current applications like backlighting for mobile phones and computer screens, and high current applications like car headlights and street lamps.
  • FIG. 3 is a general illustration of a light-emitting device according to various embodiments.
  • the light-emitting device may include a first semiconductor layer 302 of a first conductivity type.
  • the light-emitting device may also include a second semiconductor layer 304 of a second conductivity type different from the first conductivity type.
  • the light-emitting device may further include an active layer 306 between the first semiconductor layer 302 and the second semiconductor layer 304.
  • the light-emitting device may also include a sidewall protection structure 308 in contact with a side wall of the second semiconductor layer.
  • the light-emitting device may further include a first electrode 312 in electrical connection with the second semiconductor layer 304.
  • the light-emitting device may further include a second electrode 314 in electrical connection with the first semiconductor layer 302.
  • the sidewall protection structure 308 may be in contact with a side wall of the second semiconductor layer 302.
  • the sidewall protection structure 308 may also be in contact with a side wall of the active layer 306.
  • the sidewall protection structure 308 may be on the first semiconductor layer 304.
  • the sidewall protection structure 308 may alternatively be referred to as a sidewall protection layer.
  • the sidewall protection structure 308 may be a layer. In other words, the sidewall protection structure 308 may consist of a single layer.
  • the sidewall protection structure 308 or layer may include a dielectric material.
  • the sidewall protection structure 308 or layer may include a material selected from a group consisting of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.
  • the sidewall protection structure 308 may include a first layer; and a second layer on the first layer.
  • the first layer may include a first dielectric material having a first refractive index and the second layer may include a second dielectric material having a second refractive index different from the first refractive index.
  • each of the first layer and the second layer of the sidewall protection structure 308 may include a material selected from a group consisting of silicon oxide, titanium oxide, tantalum oxide, niobium oxide, aluminum oxide, silicon nitride, and silicon oxynitride.
  • each of the first layer and the second layer of the sidewall protection structure 308 may have a thickness equal to an integral multiple of a quarter of a wavelength ( ⁇ /4) of the light generated by the active layer.
  • FIG. 4 is a general illustration of a method of forming a light-emitting device according to various embodiments.
  • the method may include, in 402, forming a first semiconductor layer of a first conductivity type.
  • the method may also include, in 404, forming a second semiconductor layer of a second conductivity type different from the first conductivity type.
  • the method may further include, in 406, forming an active layer between the first semiconductor layer and the second semiconductor layer.
  • the method may additionally include, in 408, forming a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material.
  • the method may also include, in 410, forming an electrically conductive layer in contact with a second portion of the second semiconductor layer.
  • the method may further include, in 412, forming a first electrode in contact with the electrically conductive layer.
  • the method may also include, in 414, forming a second electrode in contact with the first semiconductor layer.
  • the current guide layer may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer.
  • the current guide layer may be configured to reflect at least a portion of light generated by the active layer.
  • the method of forming a light-emitting device forming the first semiconductor layer, the active layer, and the second semiconductor layer.
  • the method may include forming an electrically conductive layer over the second semiconductor layer. At a portion of the second semiconductor layer, the electrically conductive layer may be directly on the second semiconductor layer, while at another portion of the second semiconductor layer, the electrically conductive layer and the second semiconductor layer may be separated by a current guide layer including a dielectric material.
  • step 404 may occur after step 406.
  • the stacked arrangement including the first semiconductor layer, the active layer, and the second semiconductor layer may be formed using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
  • MOCVD metal-organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the first semiconductor layer may be patterned using photolithography and etching.
  • the method may include forming a sidewall protection structure in contact with a side wall of the second semiconductor layer.
  • the method may include forming a reflector formed over the first semiconductor layer, the second semiconductor layer, and the active layer.
  • the reflector may be formed by one or more processes selected from plasma enhanced vapor deposition (PECVD), sputtering, electron beam deposition etc.
  • FIG. 5 is a general illustration of a method of forming a light-emitting device according to various embodiments.
  • the method may include, in 502, forming a first semiconductor layer of a first conductivity type.
  • the method may also include, in 504, forming a second semiconductor layer of a second conductivity type different from the first conductivity type.
  • the method may further include, in 506, forming an active layer between the first semiconductor layer and the second semiconductor layer.
  • the method may also include, in 508, forming a sidewall protection structure in contact with a side wall of the second semiconductor layer.
  • the method may also include, in 510, forming a first electrode in electrical connection with the second semiconductor layer.
  • the method may further include, in 512, forming a second electrode in electrical connection with the first semiconductor layer.
  • step 504 may occur after step 506.
  • FIG. 6A shows a top view of a light-emitting diode according to various embodiments.
  • FIG. 6B shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line A-A' according to various embodiments.
  • FIG. 6C shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line B-B' according to various embodiments.
  • the diode may be a flip chip structure light emitting diode with embedded dielectric structures or layers 608a-b.
  • the light-emitting diode may include an "epitaxial layer stack".
  • the "epitaxial layer stack” may include, for example, a first conductivity-type semiconductor layer 602 at the bottom of the stack, a second conductivity-type semiconductor layer 604 at the top of the stack, the layers 602, 604 separated by a multi-quantum well (MQW) active layer 606.
  • MQW multi-quantum well
  • the device or diode may be grown on a carrier 600 which may include, but may not be limited to sapphire (AI2O3), silicon (Si), silicon carbide (SiC), or gallium nitride (GaN).
  • a carrier 600 which may include, but may not be limited to sapphire (AI2O3), silicon (Si), silicon carbide (SiC), or gallium nitride (GaN).
  • the first conductivity-type semiconductor layer 602 may be formed of a semiconductor material doped with n-type impurities.
  • the first conductivity-type semiconductor layer 602 may be an n-type nitride semiconductor layer.
  • the second conductivity-type semiconductor layer 604 may be formed of a semiconductor material doped with p-type impurities.
  • the second conductivity-type semiconductor layer 604 may be a p-type nitride semiconductor layer.
  • the first conductivity-type semiconductor layer 602 and second conductivity-type semiconductor layer 604 may include but may not be limited to gallium nitride-based semiconductor materials such as InxAlvGai- ⁇ - ⁇ (0 ⁇ X, 0 ⁇ Y, X+Y ⁇ l), GaN, AlGaN, InGaN, and AlInGaN.
  • gallium nitride-based semiconductor materials such as InxAlvGai- ⁇ - ⁇ (0 ⁇ X, 0 ⁇ Y, X+Y ⁇ l), GaN, AlGaN, InGaN, and AlInGaN.
  • the multi-quantum well (MQW) active layer 606 may include a material having a smaller energy bandgap than the material included in the first conductivity-type semiconductor layer 602 and the material included in the second conductivity-type semiconductor layer 604.
  • the multi-quantum well (MQW) active layer 606 may include an InGaN-based compound semiconductor having a smaller energy bandgap than GaN.
  • the multi-quantum well (MQW) active layer 606 may have a multiple quantum well (MQW) structure, for example, an indium gallium nitride / gallium nitride (InGaN/GaN) structure.
  • the "epitaxial layer stack” may include multiple etched regions, in which portions of the second conductivity-type semiconductor layer 604 and the multi-quantum well (MQW) active layer 606 formed on or over the first conductivity-type semiconductor layer 602 are etched.
  • the first conductivity-type semiconductor layer 602 may be exposed by the etching.
  • These exposed portions may be arranged in a region (of the first conductivity-type semiconductor layer 602) different from a region where the first electrode 612 is arranged.
  • the multiple exposed portions or the etched region may be used for electrical connection with the second electrode 614.
  • the second electrode 614 may be arranged on the exposed regions of the first conductivity-type semiconductor layer 602.
  • the "epitaxial layer stack" may be formed using a metal-organic chemical vapor deposition (MOCVD) process, or a molecular beam epitaxy (MBE) process.
  • MOCVD metal-organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the exposed region of the first conductivity-type semiconductor layer 602 may be patterned to be at least be partially exposed using a photolithography process and an etching process.
  • An electrical conducting layer 610 may be formed on the second conductivity-type semiconductor layer 604.
  • the electrical conducting layer 610 may be in ohmic contact with the second conductivity-type semiconductor layer 604, and the electrical conducting layer 610 may be configured to laterally spread an electrical current to the second conductivity-type semiconductor layer 604.
  • the electrical conducting layer 610 may be transparent to the light emitted from the multi-quantum well (MQW) active layer 606.
  • the electrical conducting layer 610 may be a single layer or may include a plurality of sub-layers.
  • the layer or sub-layers of the electrical conducting layer 610 may include at least one element selected from the group consisting of zinc, indium, tin, gallium, and magnesium.
  • Examples of materials included in the electrical conducting layer may, for instance, be or include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide (ATO), indium zinc oxide (IZO), aluminum-doped zinc oxide (AZO), and zinc tin oxide (ZTO).
  • the electrical conducting layer 610 may be an ITO layer having a thickness selected from a range from about 10 nm to about 300 nm.
  • a dielectric structure or layer may be formed on the "epitaxial layer stack" surface side, the dielectric structure or layer including a current guiding layer 608a and a sidewall protection layer 608b.
  • the sidewall protection layer 608b may be formed to cover the sidewalls of the multiple exposed portions of the first conductivity-type semiconductor layer 602.
  • the sidewall protection layer 608b may be suitably configured in response to the shape of the exposed portions of the first conductivity-type semiconductor layer 602.
  • One portion of the sidewall protection layer 608b may be formed on the second conductivity-type semiconductor layer 604 and another portion of the sidewall protection layer 608b may be formed on the exposed portions of the first conductivity-type semiconductor layer 602.
  • the sidewall protection layer 608b may be configured to avoid or reduce the risk of current leakage, which may come from the pin hole and stress crack from the first compound layer 640a.
  • FIG. 6C shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line B-B' according to various embodiments.
  • a current guiding layer 608a may be formed on the second conductivity-type semiconductor layer 604, and may be suitably configured in response to the shape of the first electrode 612.
  • the first electrode 612 may show lower reflectivity index compared with the compound reflecting structure or layer 616. Light incident on the interface of the first electrode 612 may be absorbed to a certain extent (i.e. by a certain proportion) by the material of the first electrode 612.
  • the current guiding layer 608a may work to prevent or reduce the current to flow through the region underneath the first electrode 612, to reduce the probability for light reflection to the first electrode 612 region, and may improve the light extraction efficiency.
  • the first electrode 612 may be disposed on an upper surface of the electrical conducting layer 610 and may be connected to the second conductivity-type semiconductor layer 604, and the second electrode 614 may be disposed on an upper surface of the plurality of the mesa regions and may be connected to the first conductivity-type semiconductor layer 602.
  • the first electrode 612 and the second electrode 614 may be arranged on the "epitaxial layer stack" surface side, that is, the upper surface side which is the opposite side to the substrate.
  • the first electrode 612 may include, as illustrated in FIG. 6A, a plurality of pad portions 612a and a plurality of finger portions 612b.
  • a finger portion 612b of the plurality of finger portions 612b may extend from a pad portion 612a of the plurality of pad portions 612a, the finger portion 612b having a smaller width than the pad portion 612b.
  • the first electrode 612 may extend along the etched region.
  • a plurality of first electrodes 612 may be arranged at intervals to be uniformly distributed over the first conductivity-type semiconductor layer.
  • the second electrode 614 may include a plurality of pad portions 614a and a plurality of finger portions 614b.
  • a finger portion 614b of the plurality of finger portions 614b may extend from a pad portion 614a of the plurality of pad portions 614a, the finger portion 614b having a smaller width than the pad portion 614b.
  • the material for electrodes 612. 614 may selected from titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), silver (Ag), chromium (Cr), tungsten (W), platinum (Pt), titanium nitride (TiN), or a combination thereof.
  • the electrodes 612, 614 may include a reflective metal as the first layer, i.e. top layer. Aluminum or an alloy of aluminum may be selected for the reflective metal.
  • the first electrode 612 and the second electrode 614 may be formed as a multi-layer film with the lower layer or layers including Cr/Al, Ni/Al, Al alloy, or the like. Each layer may be of any suitable thickness.
  • FIG. 6D is scanning electron microscopy (SEM) image illustrating the region of the second electrode 614 according to various embodiments.
  • the electrodes 612, 614 may serve as electrically contact members as well as reflection members that reflect light.
  • a compound reflecting structure or layer 616 may be formed on the "epitaxial layer stack".
  • the compound reflecting structure or layer 616 may include side surfaces of the mesa regions so as to cover the multi-quantum well (MQW) active layer 606 exposed by the etched region.
  • the compound reflecting structure or layer 616 may include a first compound layer 616a, a second compound layer 616b, a metal reflecting layer 616c, and a third compound layer 616d.
  • the compound reflecting layer 616 may reflect light from the multi-quantum well (MQW) active layer 606.
  • the compound reflecting structure or layer 616 may be formed by plasma enhanced chemical vapor deposition (PECVD), sputtering, and electron beam deposition method, etc.
  • the first compound layer 616a may be a single layer film formed of a dielectric material such as silicon oxide (S1O2), silicon nitride (SiN x ), silicon oxynitride (SiON), titanium oxide (Ti0 2 ), aluminum oxide (AI2O3), titanium nitride (TiN), aluminum nitride (A1N), zirconium oxide (ZrCh) or the like.
  • the thickness of the first compound layer 616a may be of any value between about 0.01 ⁇ to 2 ⁇ .
  • the second compound layer 616b may be a multilayer film structure with different dielectric materials.
  • the multilayer film structure may include two dielectric materials with low and high refractive index respectively arranged in an alternating sequence.
  • the dielectric materials may include but are not limited to silicon oxide (S1O2), titanium oxide (TiO x ), tantalum oxide Ta205, niobium oxide (Nb20 5 ), aluminum oxide (AI2O3) or the like.
  • the multilayer film structure may be a Ti0 2 /Si0 2 structure with any number selected from one to twenty ( 1 -20) pairs of multilayers.
  • the thickness of the multilayer film structure may be an integral multiple of ⁇ /4 ( ⁇ as light wavelength emitted from the multi-quantum well (MQW) active layer 606 or the light wavelength excited from the phosphor in device package).
  • the thickness of the second compound layer 140b may be of any value from around 200 nm to around 3000 nm.
  • the metal reflecting layer 616c may include but may not be limited to a metal such silver (Ag), aluminum (Al), rhodium (Rh), nickel (Ni), titanium (Ti), tungsten (W), chromium (Cr), copper (Cu), or any combination thereof.
  • the thickness of the metal reflecting layer 616c may be of any value from around 80 nm to around 500 nm
  • a third compound layer 616d may be formed or deposited as a passivation layer for the compound reflecting structure or layer 616.
  • the material used for the third compound layer 616d may be insulative inorganics such as silicon oxide (SiOx) or silicon nitride oxide (SiON), silicon nitride (SiN x ), titanium oxide (TiO x ), aluminum oxide (AI2O3), magnesium oxide (MgO), hafnium oxide (HfO), or tantalum oxide (Ta 2 05), or organic materials such as polymers, resists such as NR-7 and SU-8, or the like.
  • the thickness of the third dielectric layer 616d may be of any value from around 100 nm to around 1000 nm.
  • the compound reflecting layer 616 may form exposed portions at multiple regions.
  • Pad portion 612a of the first electrode 612 may form on the exposed electrically conductive layer 610 (see FIG. 6C), and pad portion 614a of the second electrode 614 may be formed at the exposed portions of the semiconductor layer 602 (see FIG. 6B).
  • the exposed portions may refer to portions of the device not covered by the compound reflecting layer 616.
  • the exposed portions may be formed partly by etching to remove corresponding portions of the first compound layer 616a, the second compound layer 616b, and the third compound layer 616d.
  • a portion of the first electrode 612 i.e.
  • the finger portion 612b may at least be partially covered by the first compound layer 616a, the second compound layer 616b, and the third compound layer 616d (see FIG. 6C).
  • a portion of the second electrode 614 i.e. the finger portion 614b, may at least be partially covered by the first compound layer 616a, the second compound layer 616b, and the third compound layer 616d (see FIG. 6B).
  • a first solder pad 618 and a second solder pad 620 may be formed.
  • the first solder pad 618 may connect to the first electrode 612 through the etched regions of the compound reflecting layer 616 (see FIG. 6C), and the second solder pad 620 may connect to the second electrode 614 through the etched regions of the compound reflecting layer 616 (see FIG. 6B).
  • the compound layers 616a, 616b. 616c may electrically isolate electrode 612 from solder pad 620, and may electrically isolate electrode 614 from solder pad 618.
  • first solder pad 618 may be electrically connected to the second conductivity-type semiconductor layer 604 through the electrical conducting layer 610, and the second solder pad 620 may be electrically connected to the first conductivity-type semiconductor layer 602.
  • the material for the solder pads 618, 620 may include, but may not be limited to titanium (Ti), nickel (Ni), platinum (Pt), aluminum (Al), gold (Au), chromium (Cr), tungsten (W), copper (Cu), tin (Sn), titanium nitride (TiN), or any combination thereof.
  • the first solder pad 618 and the second solder pad 620 may include one material selected from a group consisting of nickel (Ni), gold (Au), copper (Cu), tin (Sn) and an alloy thereof.
  • FIG. 6E shows a magnified schematic of the region C of FIG. 6B according to various embodiments.
  • the sidewall protection layer 608b may be a single layer, formed of aluminum oxide (AI2O3), silicon oxide (S1O2), silicon nitride (SiN x ), silicon oxynitride (SiON), or the like.
  • One function of the sidewall protection layer 608b may be to improve light efficiency. In the regions without coverage of electrical conducting layer 610, light may penetrate from the upper surface of the "epitaxial layer stack" (like GaN) to the first compound layer 616a (like S1O2), and a large refractive index difference may reduce the light transmittance between the interface of GaN/Si02.
  • the sidewall protection layer 608b may help improve light extraction in these regions.
  • FIG. 6F shows a magnified schematic of the region C of FIG. 6B according to various other embodiments.
  • the dielectric layer sidewall protection structure or layer 608b may include multiple dielectric layers, which may include but may not be limited to two layers, i.e. the first compound layer 608b 1, and the second compound layer 608b2 on the first compound layer 608b 1.
  • the first compound layer 608b 1 and the second compound layer 608b2 may be formed of silicon oxide (S1O2), titanium oxide (TiO x ), tantalum oxide (Ta20 5 ), niobium oxide (Nb20 5 ), aluminum oxide (AI2O3), silicon nitride (SiN x ), silicon oxynitride (SiON) or the like.
  • the material included in the first compound layer 608bl and the material included in the second compound layer 608b 1 may have different refractive indexes.
  • the dielectric layer sidewall protection structure or layer 608b may have a thickness that is an integral multiple of ⁇ /4 ( ⁇ is the wavelength of the light emitted from the multi-quantum well (MQW) active layer 606).
  • FIG. 7 is a plot of reflectance (in percent or %) as a function of wavelength (in nanometers or nm) showing the simulated reflectivity comparison of different wavelengths of light incident on a device with embedded dielectric layers and on a reference device.
  • the line showing data related to the reflectance of light incident on the device with embedded dielectric layers is denoted as "Dielectric Layer Embedded”, while the line showing data related to the reflectance of light incident on the reference device is denoted as "Reference”.
  • FIG. 8 is a plot of reflectance (in percent or %) as a function of incident angle (in degrees or deg) showing the simulated reflectivity comparison of light (s-polarized and p-polarized) incident at different angles on a device with embedded dielectric layers and on a reference device.
  • the line showing data related to the reflectance of s-polarized light incident on the device with embedded dielectric layers is denoted "Dielectric Layer Embedded_S”
  • the line showing data related to the reflectance of p-polarized light incident on the device with embedded dielectric layers is denoted "Dielectric Layer Embedded_P”.
  • the line showing data related to the reflectance of s-polarized light incident on the reference device is denoted "Reference_S”
  • the line showing data related to the reflectance of p-polarized light incident on the reference device is denoted "Reference_P".
  • the average reflectivity is compared between a flip chip light emitting diode with dielectric layers embedded (i.e. device with dielectric layer embedded) and a flip chip light emitting diode without dielectric layers embedded (i.e. reference device).
  • the device with embedded Si0 2 /Ti02 dielectric layers shows higher reflectivity index at the desired wavelength of 455 nm, compared to the reference device without dielectric layers embedded.
  • the comparison in reflectivity of s- and p-polarized light is carried out between the flip chip light emitting diode with dielectric layers embedded (i.e. device with dielectric layer embedded) and the flip chip light emitting diode without dielectric layers embedded (reference device).
  • Various embodiments may be used as light sources, in displays, or other specific applications. Various embodiments may be used to manufacture light-emitting devices, e.g. semiconductor light-emitting diodes with flip chip structures. [00103] Various embodiments may relate to a light-emitting diode.
  • the diode may include an epitaxial layer stack including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer disposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer; a sidewall protection layer disposed along the edges of the epitaxial layer stack; a current guiding layer disposed on portions of the second conductivity-type semiconductor layer; an electrical conducting layer disposed on the second conductivity-type semiconductor layer and the current guiding layer; electrodes having the same conductivity-type as the second conductivity-type semiconductor layer disposed on portions of the electrical conducting layer The positions of the electrodes on the electrical conducting layer may correspond to the positions of the current guiding layer on the second conductivity-type semiconductor layer.
  • the sidewall protection layer may be a single dielectric layer. In various other embodiments, the sidewall protection layer may include multiple dielectric layers.

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Abstract

Various embodiments may provide a light-emitting device. The light-emitting device may include a first semiconductor layer of a first conductivity type. The light-emitting device may also include a second semiconductor layer of a second conductivity type different from the first conductivity type. The light-emitting device may further include an active layer between the first semiconductor layer and the second semiconductor layer. The light-emitting device may include a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material. The light-emitting device may further include an electrically conductive layer in contact with a second portion of the second semiconductor layer. The light-emitting device may also include a first electrode in contact with the electrically conductive layer. The light-emitting device may further include a second electrode in contact with the first semiconductor layer.

Description

LIGHT-EMITTING DEVICE AND METHOD OF FORMING THE SAME
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application claims the benefit of priority of Singapore application No. 10201707586T filed on September 15, 2017, the contents of it being hereby incorporated by reference in its entirety for all purposes.
TECHNICAL FIELD
[0002] Various aspects of this disclosure may relate to a light-emitting device. Various aspects of this disclosure may relate to a method of forming a light-emitting device.
BACKGROUND
[0003] Optoelectronic diodes, often referred to by the simplified designation light-emitting diodes, are well-known semiconductor devices that convert current to light. Gallium nitride (GaN) is important in research of light-emitting diodes, because GaN can be combined with indium to form a gallium nitride / indium gallium nitride (GaN/InGaN) semiconductor layer to emit light having the required color. In particular, mobile phone keypads, turn signal lamps, and camera flashes using such gallium nitride-based light-emitting diodes have been commercialized. More generally, the development of general lighting devices using light-emitting diodes has accelerated. Light-emitting diodes are being implemented in a wide variety of products, such as the backlight units of TVs, the auto-light of vehicles, and general lighting luminaires. Light-emitting diodes are also gradually moving toward higher production amounts, with manufacturing processes having high outputs and high efficiency.
[0004] FIG. 1 shows a schematic of a conventional lateral light-emitting diode structure. The diode includes a first conductivity-type semiconductor layer 10c, a multiple-quantum wells (MQWs) layer 10b, and a second conductivity-type semiconductor layer 10a sequentially formed on a substrate 11. Portions of the second conductivity-type semiconductor layer 10a and the multiple-quantum wells (MQWs) layer 10b are removed to expose a portion of the first conductivity-type semiconductor layer 10c. An electrical conducting layer 20 is formed on the second conductivity-type semiconductor layer 10a. A p-type electrode 31a and an n-type electrode 31b are formed on the electrical conducting layer 20 and the first conductivity-type semiconductor layer 10c respectively. As the n-type electrode 31b requires a sufficient large surface for processes such as wire bonding, a substantial portion of the multiple-quantum wells (MQWs) layer 10b has to be removed and the light extraction efficiency is therefore lowered.
SUMMARY
[0005] Various embodiments may provide a light-emitting device. The light-emitting device may include a first semiconductor layer of a first conductivity type. The light-emitting device may also include a second semiconductor layer of a second conductivity type different from the first conductivity type. The light-emitting device may further include an active layer between the first semiconductor layer and the second semiconductor layer. The light-emitting device may include a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material. The light-emitting device may further include an electrically conductive layer in contact with a second portion of the second semiconductor layer. The light-emitting device may also include a first electrode in contact with the electrically conductive layer. The light-emitting device may further include a second electrode in contact with the first semiconductor layer. The current guide layer may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer. The current guide layer may be configured to reflect at least a portion of light generated by the active layer.
[0006] Various embodiments may provide a method of forming a light-emitting device. The method may include forming a first semiconductor layer of a first conductivity type. The method may also include forming a second semiconductor layer of a second conductivity type different from the first conductivity type. The method may further include forming an active layer between the first semiconductor layer and the second semiconductor layer. The method may additionally include forming a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material. The method may also include forming an electrically conductive layer in contact with a second portion of the second semiconductor layer. The method may further include forming a first electrode in contact with the electrically conductive layer. The method may also include forming a second electrode in contact with the first semiconductor layer. The current guide layer may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer. The current guide layer may be configured to reflect at least a portion of light generated by the active layer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] The invention will be better understood with reference to the detailed description when considered in conjunction with the non-limiting examples and the accompanying drawings, in which:
FIG. 1 shows a schematic of a conventional lateral light-emitting diode structure.
FIG. 2 is a general illustration of a light-emitting device according to various embodiments.
FIG. 3 is a general illustration of a light-emitting device according to various embodiments.
FIG. 4 is a general illustration of a method of forming a light-emitting device according to various embodiments.
FIG. 5 is a general illustration of a method of forming a light-emitting device according to various embodiments.
FIG. 6A shows a top view of a light-emitting diode according to various embodiments.
FIG. 6B shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line A-A' according to various embodiments.
FIG. 6C shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line B-B' according to various embodiments.
FIG. 6D is scanning electron microscopy (SEM) image illustrating the region of the second electrode 614 according to various embodiments.
FIG. 6E shows a magnified schematic of the region C of FIG. 6B according to various embodiments.
FIG. 6F shows a magnified schematic of the region C of FIG. 6B according to various other embodiments. FIG. 7 is a plot of reflectance (in percent or %) as a function of wavelength (in nanometers or nm) showing the simulated reflectivity comparison of different wavelengths of light incident on a device with embedded dielectric layers and on a reference device.
FIG. 8 is a plot of reflectance (in percent or %) as a function of incident angle (in degrees or deg) showing the simulated reflectivity comparison of light (s-polarized and p-polarized) incident at different angles on a device with embedded dielectric layers and on a reference device.
DETAILED DESCRIPTION
[0008] The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. Other embodiments may be utilized and structural, and logical changes may be made without departing from the scope of the invention. The various embodiments are not necessarily mutually exclusive, as some embodiments can be combined with one or more other embodiments to form new embodiments.
[0009] Embodiments described in the context of one of the methods or devices are analogously valid for the other methods or devices. Similarly, embodiments described in the context of a method are analogously valid for a device, and vice versa.
[0010] Features that are described in the context of an embodiment may correspondingly be applicable to the same or similar features in the other embodiments. Features that are described in the context of an embodiment may correspondingly be applicable to the other embodiments, even if not explicitly described in these other embodiments. Furthermore, additions and/or combinations and/or alternatives as described for a feature in the context of an embodiment may correspondingly be applicable to the same or similar feature in the other embodiments.
[0011] The word "over" used with regards to a deposited material formed "over" a side or surface, may be used herein to mean that the deposited material may be formed "directly on", e.g. in direct contact with, the implied side or surface. The word "over" used with regards to a deposited material formed "over" a side or surface, may also be used herein to mean that the deposited material may be formed "indirectly on" the implied side or surface with one or more additional layers being arranged between the implied side or surface and the deposited material. In other words, a first layer "over" a second layer may refer to the first layer directly on the second layer, or that the first layer and the second layer are separated by one or more intervening layers.
[0012] The device as described herein may be operable in various orientations, and thus it should be understood that the terms "top", "topmost", "bottom", "bottommost" etc., when used in the following description are used for convenience and to aid understanding of relative positions or directions, and not intended to limit the orientation of the device.
[0013] In the context of various embodiments, the articles "a", "an" and "the" as used with regard to a feature or element include a reference to one or more of the features or elements.
[0014] In the context of various embodiments, the term "about" or "approximately" as applied to a numeric value encompasses the exact value and a reasonable variance.
[0015] As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
[0016] Various embodiments may provide a structure design with embedded dielectric layers for flip chip structured light emitting diodes, which may improve the light efficiency and/or may reduce of risk of current leakage for the devices. Some non-limiting embodiments are as illustrated below.
[0017] Various embodiments may provide a light-emitting device. The light-emitting device may be a light-emitting diode. FIG. 2 is a general illustration of a light-emitting device according to various embodiments. The light-emitting device may include a first semiconductor layer 202 of a first conductivity type. The light-emitting device may also include a second semiconductor layer 204 of a second conductivity type different from the first conductivity type. The light-emitting device may further include an active layer 206 between the first semiconductor layer 202 and the second semiconductor layer 204. The light-emitting device may include a current guide layer 208 having a first surface in contact with a first portion of the second semiconductor layer 204, the current guide layer 208 including a dielectric material. The light-emitting device may further include an electrically conductive layer 210 in contact with a second portion of the second semiconductor layer 204. The light-emitting device may also include a first electrode 212 in contact with the electrically conductive layer 210. The light-emitting device may further include a second electrode 214 in contact with the first semiconductor layer 202. The current guide layer 208 may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer 210. The current guide layer 208 may be configured to reflect at least a portion of light generated by the active layer 206.
[0018] In other words, the light-emitting device may include a stacked arrangement including a first semiconductor layer 202, an active layer 206 on the first semiconductor layer 202, and a second semiconductor layer 204 on the active layer 206. The light-emitting device may include additionally include an electrically conductive layer 210 over the second semiconductor layer 204. At a portion of the second semiconductor layer 204, the electrically conductive layer 210 may be directly on the second semiconductor layer 204, while at another portion of the second semiconductor layer 204, the electrically conductive layer 210 and the second semiconductor layer 204 may be separated by a current guide layer 208 including a dielectric material.
[0019] In various embodiments, the light-emitting device may be or may include a light- emitting diode. In various embodiments, the active layer 206 may include a multiple-quantum wells (MQWs).
[0020] The current guide layer 208 may be referred to as a current guiding layer.
[0021] For the previously designed flip-chip light emitting diodes, the p- and n-electrodes, which are patterned on the bottom of the device, may usually absorb the light generated from the active region. In addition, current distribution may be uneven due to the conductivity of the p- and n-electrodes layout, which may reduce the efficiency especially in the high current density regime. Various embodiments may relate to structures with current guiding layer designs for flip-chip light emitting devices or diodes, which may address the abovementioned issues.
[0022] In various embodiments, a current guiding layer may be made on the bottom of the device, which may reduce the current crowding effect under and around the p- and n-electrodes and reduce the efficiency drop in the flip-chip devices. In various embodiments, the current guiding layer may be or may include a reflective dielectric layer, which can reflect the light and prevent /reduce the light being absorbed by the p- and n-electrodes, hence improving the light extraction efficiency.
[0023] In various embodiments, the electrically conductive layer 210 may be configured to allow at least a portion of light generated by the active layer 206 to pass through. The electrically conductive layer 210 may be transparent or translucent to light. The light may have a wavelength from 400 nm to 700 nm. The electrically conductive layer 210 may alternatively be referred to as an electrically conducting layer.
[0024] In various embodiments, the electrically conductive layer 210 may include at least one element selected from a group consisting of zinc, indium, tin, gallium, and magnesium. For instance, the electrically conductive layer 210 may include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide (ATO), indium zinc oxide (IZO), aluminum-doped zinc oxide (AZO), or zinc tin oxide (ZTO).
[0025] In various embodiments, the electrically conductive layer 210 may have a thickness of any one value in a range from about 10 nm to about 300 nm.
[0026] In various embodiments, the first electrode 212 may be vertically aligned to the current guide layer. The first electrode 212 may be directly above the current guide layer 208. A portion of the first electrode 212 may be above a portion of the current guide layer 208. A portion of the electrically conductive layer 210 may be between (a portion of) the first electrode 212 and (a portion of) the current guide layer 208. In various embodiments, the current guide layer 208 may include one or more materials selected from a group consisting of silicon nitride, silicon oxide, and titanium oxide.
[0027] In various embodiments, the first electrode 212 may include a pad portion and a finger portion extending from the pad portion. The first electrode 212 may include a plurality of pad portions and a plurality of finger portions. The finger portion may be elongated along its length. The finger portion may have a width smaller than the pad portion. The width of the finger portion may be substantially perpendicular to the length of the finger portion. The width of the pad portion may be substantially parallel to the width of the finger portion.
[0028] In various embodiments, the second electrode 214 may include a pad portion and a finger portion extending from the pad portion. The second electrode 214 may include a plurality of pad portions and a plurality of finger portions. The finger portion may be elongated along its length. The finger portion may have a width smaller than the pad portion. The width of the finger portion may be substantially perpendicular to the length of the finger portion. The width of the pad portion may be substantially parallel to the width of the finger portion.
[0029] In various embodiments, the light-emitting device may further include a sidewall protection structure. The sidewall protection structure may be in contact with a side wall of the second semiconductor layer. The sidewall protection structure may also be in contact with a side wall of the active layer. The sidewall protection structure may be on the first semiconductor layer 202.
[0030] The sidewall protection structure may alternatively be referred to as a sidewall protection layer.
[0031] In various embodiments, the sidewall protection structure may be a layer. In other words, the sidewall protection structure may consist of a single layer. The sidewall protection structure or layer may include a dielectric material. The sidewall protection structure or layer may include a material selected from a group consisting of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.
[0032] In various other embodiments, the sidewall protection structure may include a first layer; and a second layer on the first layer. The first layer (of the sidewall protection structure) may include a first dielectric material having a first refractive index and the second layer (of the sidewall protection structure) may include a second dielectric material having a second refractive index different from the first refractive index. The first layer of the sidewall protection structure may be referred to as a first compound layer, and the second layer of the sidewall protection structure may be referred to as a second compound layer.
[0033] In various embodiments, each of the first layer and the second layer of the sidewall protection structure may include a material selected from a group consisting of silicon oxide, titanium oxide, tantalum oxide, niobium oxide, aluminum oxide, silicon nitride, and silicon oxynitride.
[0034] In various embodiments, each of the first layer and the second layer of the sidewall protection structure may have a thickness equal to an integral multiple of a quarter of a wavelength (λ/4) of the light generated by the active layer.
[0035] The sidewall protection structure may be an extension of the current guide layer 208. In other words, the sidewall protection structure may be or may be part of the current guide layer 208. In various embodiments, the sidewall protection structure and the current guide layer 208 may be joined, i.e. the sidewall protection structure and the current guide layer 208 may form a continuous structure / layer. [0036] In various embodiments, the sidewall protection structure / current guide layer 208 may act as a passivation layer. The sidewall protection structure may be formed to reduce or prevent current leakage, and/or protect the active layer / MQWs along the sidewall of the mesa. In various embodiments, the reliability of the device / diode may be improved.
[0037] In various embodiments, the light-emitting device may also include a reflector over the first semiconductor layer 202, the second semiconductor layer 204, and the active layer 206. The reflector may alternatively be referred to as a compound reflecting structure or layer.
[0038] The reflector may include a first dielectric layer; and a second dielectric layer in contact with the first dielectric layer. The first dielectric layer of the reflector may be referred to as a first compound layer, and the second dielectric layer of the reflector may be referred to as a second compound layer
[0039] In various embodiments, the second dielectric layer (of the reflector) may include a first- sub-layer of a first refractive index, and a second sub-layer of a second refractive index different from the first refractive index.
[0040] The reflector may include a metal reflector layer, which may alternatively be referred to as a metal reflecting layer. The metal reflector layer may include one or more metals selected from a group consisting of silver, aluminum, rhodium, nickel, titanium, tungsten, chromium, and copper. The metal reflector layer may be in contact with the second dielectric layer.
[0041] The reflector may further include a passivation layer. The passivation layer may be in contact with the metal reflector layer. The passivation layer may be referred to as a third compound layer.
[0042] In various embodiments, the reflector may include a first dielectric layer, a second dielectric layer on the first dielectric layer, a metal reflector layer on the second dielectric layer, and a passivation layer on the metal reflector layer.
[0043] In various embodiments, the first electrode 212 may include a doped semiconductor material of a second conductivity type. In various embodiments, the second electrode 214 may include a doped semiconductor material of a first conductivity type.
[0044] In various embodiments, the first semiconductor layer 202 may be doped with a n-type dopant, i.e. the first conductivity type may be n-type. The second electrode 214 may also be doped with a n-type dopant. Conversely, the second semiconductor layer 204 may be doped with a p-type dopant, i.e. the second conductivity type may be p-type. The first electrode 212 may also be doped with a p-type dopant.
[0045] In various other embodiments, the first semiconductor layer 202 may be doped with a p-type dopant, i.e. the first conductivity type may be p-type. The second electrode 214 may also be doped with a p-type dopant. Conversely, the second semiconductor layer 204 may be doped with a n-type dopant, i.e. the second conductivity type may be n-type. The first electrode 212 may also be doped with a n-type dopant.
[0046] Various embodiments may relate to current guiding layer designs for flip-chip light emitting devices or diodes. In each of these devices, the current guiding layer designs may be patterned on the bottom of the device, and the electrode may lead out according to the current guiding layer. The current guiding layer may be made by of a reflective dielectric layer. For example, the current guiding layer may be made by combining SiNx, S1O2 and TiOx or two of them.
[0047] In various embodiments, better optical properties, such as higher efficiency, as compared to conventional light-emitting devices, may be achieved. The p- and n-electrodes may be led out on the current guiding layer, and may be patterned according to the current guiding layer designs. Thus, the current spreading may be more uniform, and the efficiency drop may be reduced.
[0048] The current leakage may be suppressed, and the reliability can be improved. The current guiding layer may be also a passivation layer, which may be formed to prevent current leakage and protect the MQWs from the side-wall of the mesa. Hence, the reliability of the flip-chip light emitting diodes may be enhanced.
[0049] In various embodiments, the current guiding layer may be a reflective dielectric layer, on and around the p- and n-electrodes. The distributed Bragg reflector may be made by combining SiNx, S1O2, and TiOx, or two or more of them. The reflective dielectric layer may reflect the light even from the side-wall, and may prevent or reduce the light being absorbed by the p- and n- electrodes. Thus, the light extraction efficiency of the flip-chip light emitting diodes may be improved.
[0050] In various embodiments, a wavelength of light emitted by the active layer of the device, e.g. 455nm, may have a reflectance of above 80%, or above 90%, or above 95%. [0051] Further, as the current spreading is much better and the reliability is enhanced, various embodiments may be used for a wide range of applications, such as low current applications like backlighting for mobile phones and computer screens, and high current applications like car headlights and street lamps.
[0052] FIG. 3 is a general illustration of a light-emitting device according to various embodiments. The light-emitting device may include a first semiconductor layer 302 of a first conductivity type. The light-emitting device may also include a second semiconductor layer 304 of a second conductivity type different from the first conductivity type. The light-emitting device may further include an active layer 306 between the first semiconductor layer 302 and the second semiconductor layer 304. The light-emitting device may also include a sidewall protection structure 308 in contact with a side wall of the second semiconductor layer. The light-emitting device may further include a first electrode 312 in electrical connection with the second semiconductor layer 304. The light-emitting device may further include a second electrode 314 in electrical connection with the first semiconductor layer 302.
[0053] The sidewall protection structure 308 may be in contact with a side wall of the second semiconductor layer 302. The sidewall protection structure 308 may also be in contact with a side wall of the active layer 306. The sidewall protection structure 308 may be on the first semiconductor layer 304.
[0054] The sidewall protection structure 308 may alternatively be referred to as a sidewall protection layer.
[0055] In various embodiments, the sidewall protection structure 308 may be a layer. In other words, the sidewall protection structure 308 may consist of a single layer. The sidewall protection structure 308 or layer may include a dielectric material. The sidewall protection structure 308 or layer may include a material selected from a group consisting of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.
[0056] In various other embodiments, the sidewall protection structure 308 may include a first layer; and a second layer on the first layer. The first layer may include a first dielectric material having a first refractive index and the second layer may include a second dielectric material having a second refractive index different from the first refractive index. [0057] In various embodiments, each of the first layer and the second layer of the sidewall protection structure 308 may include a material selected from a group consisting of silicon oxide, titanium oxide, tantalum oxide, niobium oxide, aluminum oxide, silicon nitride, and silicon oxynitride.
[0058] In various embodiments, each of the first layer and the second layer of the sidewall protection structure 308 may have a thickness equal to an integral multiple of a quarter of a wavelength (λ/4) of the light generated by the active layer.
[0059] FIG. 4 is a general illustration of a method of forming a light-emitting device according to various embodiments. The method may include, in 402, forming a first semiconductor layer of a first conductivity type. The method may also include, in 404, forming a second semiconductor layer of a second conductivity type different from the first conductivity type. The method may further include, in 406, forming an active layer between the first semiconductor layer and the second semiconductor layer. The method may additionally include, in 408, forming a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer including a dielectric material. The method may also include, in 410, forming an electrically conductive layer in contact with a second portion of the second semiconductor layer. The method may further include, in 412, forming a first electrode in contact with the electrically conductive layer. The method may also include, in 414, forming a second electrode in contact with the first semiconductor layer. The current guide layer may have a second surface opposite the first surface, the second surface in contact with the electrically conductive layer. The current guide layer may be configured to reflect at least a portion of light generated by the active layer.
[0060] In other words, the method of forming a light-emitting device forming the first semiconductor layer, the active layer, and the second semiconductor layer. The method may include forming an electrically conductive layer over the second semiconductor layer. At a portion of the second semiconductor layer, the electrically conductive layer may be directly on the second semiconductor layer, while at another portion of the second semiconductor layer, the electrically conductive layer and the second semiconductor layer may be separated by a current guide layer including a dielectric material.
[0061] The steps illustrated in FIG. 4 may not be in sequence. For instance, step 404 may occur after step 406. [0062] The stacked arrangement including the first semiconductor layer, the active layer, and the second semiconductor layer may be formed using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
[0063] The first semiconductor layer may be patterned using photolithography and etching.
[0064] In various embodiments, the method may include forming a sidewall protection structure in contact with a side wall of the second semiconductor layer.
[0065] In various embodiments, the method may include forming a reflector formed over the first semiconductor layer, the second semiconductor layer, and the active layer. The reflector may be formed by one or more processes selected from plasma enhanced vapor deposition (PECVD), sputtering, electron beam deposition etc.
[0066] FIG. 5 is a general illustration of a method of forming a light-emitting device according to various embodiments. The method may include, in 502, forming a first semiconductor layer of a first conductivity type. The method may also include, in 504, forming a second semiconductor layer of a second conductivity type different from the first conductivity type. The method may further include, in 506, forming an active layer between the first semiconductor layer and the second semiconductor layer. The method may also include, in 508, forming a sidewall protection structure in contact with a side wall of the second semiconductor layer. The method may also include, in 510, forming a first electrode in electrical connection with the second semiconductor layer. The method may further include, in 512, forming a second electrode in electrical connection with the first semiconductor layer.
[0067] The steps illustrated in FIG. 5 may not be in sequence. For instance, step 504 may occur after step 506.
[0068] FIG. 6A shows a top view of a light-emitting diode according to various embodiments. FIG. 6B shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line A-A' according to various embodiments. FIG. 6C shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line B-B' according to various embodiments. The light-emitting diode. The diode may be a flip chip structure light emitting diode with embedded dielectric structures or layers 608a-b.
[0069] The light-emitting diode may include an "epitaxial layer stack". The "epitaxial layer stack" may include, for example, a first conductivity-type semiconductor layer 602 at the bottom of the stack, a second conductivity-type semiconductor layer 604 at the top of the stack, the layers 602, 604 separated by a multi-quantum well (MQW) active layer 606.
[0070] The device or diode may be grown on a carrier 600 which may include, but may not be limited to sapphire (AI2O3), silicon (Si), silicon carbide (SiC), or gallium nitride (GaN).
[0071] The first conductivity-type semiconductor layer 602 may be formed of a semiconductor material doped with n-type impurities. The first conductivity-type semiconductor layer 602 may be an n-type nitride semiconductor layer. The second conductivity-type semiconductor layer 604 may be formed of a semiconductor material doped with p-type impurities. The second conductivity-type semiconductor layer 604 may be a p-type nitride semiconductor layer.
[0072] The first conductivity-type semiconductor layer 602 and second conductivity-type semiconductor layer 604 may include but may not be limited to gallium nitride-based semiconductor materials such as InxAlvGai-χ-γΝ (0≤X, 0≤Y, X+Y≤l), GaN, AlGaN, InGaN, and AlInGaN.
[0073] The multi-quantum well (MQW) active layer 606 may include a material having a smaller energy bandgap than the material included in the first conductivity-type semiconductor layer 602 and the material included in the second conductivity-type semiconductor layer 604.
[0074] For example, when the first conductivity-type semiconductor layer 602 and the second conductivity-type semiconductor layer 604 include GaN-based compound semiconductors, the multi-quantum well (MQW) active layer 606 may include an InGaN-based compound semiconductor having a smaller energy bandgap than GaN. In addition, the multi-quantum well (MQW) active layer 606 may have a multiple quantum well (MQW) structure, for example, an indium gallium nitride / gallium nitride (InGaN/GaN) structure.
[0075] The "epitaxial layer stack" may include multiple etched regions, in which portions of the second conductivity-type semiconductor layer 604 and the multi-quantum well (MQW) active layer 606 formed on or over the first conductivity-type semiconductor layer 602 are etched. The first conductivity-type semiconductor layer 602 may be exposed by the etching.
[0076] These exposed portions may be arranged in a region (of the first conductivity-type semiconductor layer 602) different from a region where the first electrode 612 is arranged. The multiple exposed portions or the etched region may be used for electrical connection with the second electrode 614. In other words, the second electrode 614 may be arranged on the exposed regions of the first conductivity-type semiconductor layer 602. The "epitaxial layer stack" may be formed using a metal-organic chemical vapor deposition (MOCVD) process, or a molecular beam epitaxy (MBE) process.
[0077] The exposed region of the first conductivity-type semiconductor layer 602 may be patterned to be at least be partially exposed using a photolithography process and an etching process.
[0078] An electrical conducting layer 610 may be formed on the second conductivity-type semiconductor layer 604. The electrical conducting layer 610 may be in ohmic contact with the second conductivity-type semiconductor layer 604, and the electrical conducting layer 610 may be configured to laterally spread an electrical current to the second conductivity-type semiconductor layer 604.
[0079] The electrical conducting layer 610 may be transparent to the light emitted from the multi-quantum well (MQW) active layer 606. The electrical conducting layer 610 may be a single layer or may include a plurality of sub-layers. The layer or sub-layers of the electrical conducting layer 610 may include at least one element selected from the group consisting of zinc, indium, tin, gallium, and magnesium. Examples of materials included in the electrical conducting layer may, for instance, be or include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide (ATO), indium zinc oxide (IZO), aluminum-doped zinc oxide (AZO), and zinc tin oxide (ZTO). For instance, the electrical conducting layer 610 may be an ITO layer having a thickness selected from a range from about 10 nm to about 300 nm.
[0080] A dielectric structure or layer may be formed on the "epitaxial layer stack" surface side, the dielectric structure or layer including a current guiding layer 608a and a sidewall protection layer 608b. As shown in FIG. 6B, the sidewall protection layer 608b may be formed to cover the sidewalls of the multiple exposed portions of the first conductivity-type semiconductor layer 602. The sidewall protection layer 608b may be suitably configured in response to the shape of the exposed portions of the first conductivity-type semiconductor layer 602. One portion of the sidewall protection layer 608b may be formed on the second conductivity-type semiconductor layer 604 and another portion of the sidewall protection layer 608b may be formed on the exposed portions of the first conductivity-type semiconductor layer 602. The sidewall protection layer 608b may be configured to avoid or reduce the risk of current leakage, which may come from the pin hole and stress crack from the first compound layer 640a.
[0081] As highlighted above, FIG. 6C shows a cross-sectional side view of the light-emitting diode shown in FIG. 6A along the line B-B' according to various embodiments. A current guiding layer 608a may be formed on the second conductivity-type semiconductor layer 604, and may be suitably configured in response to the shape of the first electrode 612. The first electrode 612 may show lower reflectivity index compared with the compound reflecting structure or layer 616. Light incident on the interface of the first electrode 612 may be absorbed to a certain extent (i.e. by a certain proportion) by the material of the first electrode 612. The current guiding layer 608a may work to prevent or reduce the current to flow through the region underneath the first electrode 612, to reduce the probability for light reflection to the first electrode 612 region, and may improve the light extraction efficiency.
[0082] The first electrode 612 may be disposed on an upper surface of the electrical conducting layer 610 and may be connected to the second conductivity-type semiconductor layer 604, and the second electrode 614 may be disposed on an upper surface of the plurality of the mesa regions and may be connected to the first conductivity-type semiconductor layer 602. The first electrode 612 and the second electrode 614 may be arranged on the "epitaxial layer stack" surface side, that is, the upper surface side which is the opposite side to the substrate. There may be no particular limitation on the width, length, number and shape of the electrodes 612, 614, which may be suitably configured in response to the shape and property of the light emitting diodes.
[0083] The first electrode 612 may include, as illustrated in FIG. 6A, a plurality of pad portions 612a and a plurality of finger portions 612b. A finger portion 612b of the plurality of finger portions 612b may extend from a pad portion 612a of the plurality of pad portions 612a, the finger portion 612b having a smaller width than the pad portion 612b. The first electrode 612 may extend along the etched region. In addition, a plurality of first electrodes 612 may be arranged at intervals to be uniformly distributed over the first conductivity-type semiconductor layer.
[0084] Likewise, the second electrode 614 may include a plurality of pad portions 614a and a plurality of finger portions 614b. A finger portion 614b of the plurality of finger portions 614b may extend from a pad portion 614a of the plurality of pad portions 614a, the finger portion 614b having a smaller width than the pad portion 614b. [0085] The material for electrodes 612. 614 may selected from titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), silver (Ag), chromium (Cr), tungsten (W), platinum (Pt), titanium nitride (TiN), or a combination thereof. In various embodiments, the electrodes 612, 614 may include a reflective metal as the first layer, i.e. top layer. Aluminum or an alloy of aluminum may be selected for the reflective metal. The first electrode 612 and the second electrode 614 may be formed as a multi-layer film with the lower layer or layers including Cr/Al, Ni/Al, Al alloy, or the like. Each layer may be of any suitable thickness.
[0086] FIG. 6D is scanning electron microscopy (SEM) image illustrating the region of the second electrode 614 according to various embodiments. The electrodes 612, 614 may serve as electrically contact members as well as reflection members that reflect light.
[0087] A compound reflecting structure or layer 616 may be formed on the "epitaxial layer stack". The compound reflecting structure or layer 616 may include side surfaces of the mesa regions so as to cover the multi-quantum well (MQW) active layer 606 exposed by the etched region. The compound reflecting structure or layer 616 may include a first compound layer 616a, a second compound layer 616b, a metal reflecting layer 616c, and a third compound layer 616d. The compound reflecting layer 616 may reflect light from the multi-quantum well (MQW) active layer 606.
[0088] The compound reflecting structure or layer 616 may be formed by plasma enhanced chemical vapor deposition (PECVD), sputtering, and electron beam deposition method, etc. The first compound layer 616a may be a single layer film formed of a dielectric material such as silicon oxide (S1O2), silicon nitride (SiNx), silicon oxynitride (SiON), titanium oxide (Ti02), aluminum oxide (AI2O3), titanium nitride (TiN), aluminum nitride (A1N), zirconium oxide (ZrCh) or the like. The thickness of the first compound layer 616a may be of any value between about 0.01 μπι to 2 μπι.
[0089] The second compound layer 616b may be a multilayer film structure with different dielectric materials. For example, the multilayer film structure may include two dielectric materials with low and high refractive index respectively arranged in an alternating sequence. The dielectric materials may include but are not limited to silicon oxide (S1O2), titanium oxide (TiOx), tantalum oxide Ta205, niobium oxide (Nb205), aluminum oxide (AI2O3) or the like. The multilayer film structure may be a Ti02/Si02 structure with any number selected from one to twenty ( 1 -20) pairs of multilayers. The thickness of the multilayer film structure may be an integral multiple of λ/4 (λ as light wavelength emitted from the multi-quantum well (MQW) active layer 606 or the light wavelength excited from the phosphor in device package). The thickness of the second compound layer 140b may be of any value from around 200 nm to around 3000 nm.
[0090] The metal reflecting layer 616c may include but may not be limited to a metal such silver (Ag), aluminum (Al), rhodium (Rh), nickel (Ni), titanium (Ti), tungsten (W), chromium (Cr), copper (Cu), or any combination thereof. The thickness of the metal reflecting layer 616c may be of any value from around 80 nm to around 500 nm A third compound layer 616d may be formed or deposited as a passivation layer for the compound reflecting structure or layer 616. The material used for the third compound layer 616d may be insulative inorganics such as silicon oxide (SiOx) or silicon nitride oxide (SiON), silicon nitride (SiNx), titanium oxide (TiOx), aluminum oxide (AI2O3), magnesium oxide (MgO), hafnium oxide (HfO), or tantalum oxide (Ta205), or organic materials such as polymers, resists such as NR-7 and SU-8, or the like. The thickness of the third dielectric layer 616d may be of any value from around 100 nm to around 1000 nm.
[0091 ] The compound reflecting layer 616 may form exposed portions at multiple regions. Pad portion 612a of the first electrode 612 may form on the exposed electrically conductive layer 610 (see FIG. 6C), and pad portion 614a of the second electrode 614 may be formed at the exposed portions of the semiconductor layer 602 (see FIG. 6B). The exposed portions may refer to portions of the device not covered by the compound reflecting layer 616. The exposed portions may be formed partly by etching to remove corresponding portions of the first compound layer 616a, the second compound layer 616b, and the third compound layer 616d. In various embodiments, a portion of the first electrode 612, i.e. the finger portion 612b, may at least be partially covered by the first compound layer 616a, the second compound layer 616b, and the third compound layer 616d (see FIG. 6C). In various embodiments, a portion of the second electrode 614, i.e. the finger portion 614b, may at least be partially covered by the first compound layer 616a, the second compound layer 616b, and the third compound layer 616d (see FIG. 6B).
[0092] A first solder pad 618 and a second solder pad 620 may be formed. The first solder pad 618 may connect to the first electrode 612 through the etched regions of the compound reflecting layer 616 (see FIG. 6C), and the second solder pad 620 may connect to the second electrode 614 through the etched regions of the compound reflecting layer 616 (see FIG. 6B). [0093] The compound layers 616a, 616b. 616c may electrically isolate electrode 612 from solder pad 620, and may electrically isolate electrode 614 from solder pad 618.
[0094] In addition, the first solder pad 618 may be electrically connected to the second conductivity-type semiconductor layer 604 through the electrical conducting layer 610, and the second solder pad 620 may be electrically connected to the first conductivity-type semiconductor layer 602.
[0095] The material for the solder pads 618, 620 may include, but may not be limited to titanium (Ti), nickel (Ni), platinum (Pt), aluminum (Al), gold (Au), chromium (Cr), tungsten (W), copper (Cu), tin (Sn), titanium nitride (TiN), or any combination thereof. For example, the first solder pad 618 and the second solder pad 620 may include one material selected from a group consisting of nickel (Ni), gold (Au), copper (Cu), tin (Sn) and an alloy thereof.
[0096] FIG. 6E shows a magnified schematic of the region C of FIG. 6B according to various embodiments. The sidewall protection layer 608b may be a single layer, formed of aluminum oxide (AI2O3), silicon oxide (S1O2), silicon nitride (SiNx), silicon oxynitride (SiON), or the like. One function of the sidewall protection layer 608b may be to improve light efficiency. In the regions without coverage of electrical conducting layer 610, light may penetrate from the upper surface of the "epitaxial layer stack" (like GaN) to the first compound layer 616a (like S1O2), and a large refractive index difference may reduce the light transmittance between the interface of GaN/Si02. The sidewall protection layer 608b may help improve light extraction in these regions.
[0097] FIG. 6F shows a magnified schematic of the region C of FIG. 6B according to various other embodiments. The dielectric layer sidewall protection structure or layer 608b may include multiple dielectric layers, which may include but may not be limited to two layers, i.e. the first compound layer 608b 1, and the second compound layer 608b2 on the first compound layer 608b 1. The first compound layer 608b 1 and the second compound layer 608b2 may be formed of silicon oxide (S1O2), titanium oxide (TiOx), tantalum oxide (Ta205), niobium oxide (Nb205), aluminum oxide (AI2O3), silicon nitride (SiNx), silicon oxynitride (SiON) or the like.
[0098] In various embodiments, the material included in the first compound layer 608bl and the material included in the second compound layer 608b 1 may have different refractive indexes. In addition, the dielectric layer sidewall protection structure or layer 608b may have a thickness that is an integral multiple of λ/4 (λ is the wavelength of the light emitted from the multi-quantum well (MQW) active layer 606).
[0099] FIG. 7 is a plot of reflectance (in percent or %) as a function of wavelength (in nanometers or nm) showing the simulated reflectivity comparison of different wavelengths of light incident on a device with embedded dielectric layers and on a reference device. The line showing data related to the reflectance of light incident on the device with embedded dielectric layers is denoted as "Dielectric Layer Embedded", while the line showing data related to the reflectance of light incident on the reference device is denoted as "Reference".
[00100] FIG. 8 is a plot of reflectance (in percent or %) as a function of incident angle (in degrees or deg) showing the simulated reflectivity comparison of light (s-polarized and p-polarized) incident at different angles on a device with embedded dielectric layers and on a reference device. The line showing data related to the reflectance of s-polarized light incident on the device with embedded dielectric layers is denoted "Dielectric Layer Embedded_S", while the line showing data related to the reflectance of p-polarized light incident on the device with embedded dielectric layers is denoted "Dielectric Layer Embedded_P". Also, the line showing data related to the reflectance of s-polarized light incident on the reference device is denoted "Reference_S", while the line showing data related to the reflectance of p-polarized light incident on the reference device "Reference_P".
[00101] In FIG. 7, the average reflectivity is compared between a flip chip light emitting diode with dielectric layers embedded (i.e. device with dielectric layer embedded) and a flip chip light emitting diode without dielectric layers embedded (i.e. reference device). The device with embedded Si02/Ti02 dielectric layers shows higher reflectivity index at the desired wavelength of 455 nm, compared to the reference device without dielectric layers embedded. In FIG. 8, the comparison in reflectivity of s- and p-polarized light is carried out between the flip chip light emitting diode with dielectric layers embedded (i.e. device with dielectric layer embedded) and the flip chip light emitting diode without dielectric layers embedded (reference device).
[00102] Various embodiments may be used as light sources, in displays, or other specific applications. Various embodiments may be used to manufacture light-emitting devices, e.g. semiconductor light-emitting diodes with flip chip structures. [00103] Various embodiments may relate to a light-emitting diode. The diode may include an epitaxial layer stack including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer disposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer; a sidewall protection layer disposed along the edges of the epitaxial layer stack; a current guiding layer disposed on portions of the second conductivity-type semiconductor layer; an electrical conducting layer disposed on the second conductivity-type semiconductor layer and the current guiding layer; electrodes having the same conductivity-type as the second conductivity-type semiconductor layer disposed on portions of the electrical conducting layer The positions of the electrodes on the electrical conducting layer may correspond to the positions of the current guiding layer on the second conductivity-type semiconductor layer.
[00104] In various embodiments, the sidewall protection layer may be a single dielectric layer. In various other embodiments, the sidewall protection layer may include multiple dielectric layers.
[00105] While the invention has been particularly shown and described with reference to specific embodiments, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.

Claims

1. A light-emitting device comprising: a first semiconductor layer of a first conductivity type;
a second semiconductor layer of a second conductivity type different from the first conductivity type;
an active layer between the first semiconductor layer and the second semiconductor layer;
a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer comprising a dielectric material;
an electrically conductive layer in contact with a second portion of the second semiconductor layer;
a first electrode in contact with the electrically conductive layer; and a second electrode in contact with the first semiconductor layer; wherein the current guide layer has a second surface opposite the first surface, the second surface in contact with the electrically conductive layer; and wherein the current guide layer is configured to reflect at least a portion of light generated by the active layer.
2. The light-emitting device according to claim 1 , wherein the electrically conductive layer is configured to allow at least a portion of light generated by the active layer to pass through.
3. The light-emitting device according to claim 1 or claim 2, wherein the electrically conductive layer comprises at least one element selected from a group consisting of zinc, indium, tin, gallium, and magnesium.
4. The light-emitting device according to any one of claim 1 to claim 3, wherein the first electrode is vertically aligned to the current guide layer.
5. The light-emitting device according to any one of claim 1 to claim 4, wherein a portion of the electrically conductive layer is between the first electrode and the current guide layer.
6. The light-emitting device according to any one of claim 1 to claim 5, wherein the current guide layer comprises one or more materials selected from a group consisting of silicon nitride, silicon oxide, and titanium oxide.
7. The light-emitting device according to any one of claim 1 to claim 6, further comprising: a sidewall protection structure in contact with a side wall of the second semiconductor layer.
8. The light-emitting device according to claim 7, wherein the sidewall protection structure is also in contact with a side wall of the active layer.
9. The light-emitting device according to claim 7 or claim 8, wherein the sidewall protection structure is on the first semiconductor layer.
10. The light-emitting device according to any one of claim 7 to claim 9, wherein the sidewall protection structure is a layer.
11. The light-emitting device according to claim 10, wherein the layer comprises a material selected from a group consisting aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.
12. The light-emitting device according to any one of claim 7 to claim 9, wherein the sidewall protection structure comprises:
a first layer; and
a second layer on the first layer.
13. The light-emitting device according to claim 12, wherein the first layer comprises a first dielectric material having a first refractive index; and
wherein the second layer comprises a second dielectric material having a second refractive index different from the first refractive index.
14. The light-emitting device according to any one of claim 1 to claim 13, further
comprising: a reflector over the first semiconductor layer, the second semiconductor layer, and the active layer.
15. The light-emitting device according to claim 14, wherein the reflector comprises:
a first dielectric layer; and
a second dielectric layer in contact with the first dielectric layer.
16. The light-emitting device according to claim 15, wherein the second dielectric layer comprises a first-sub-layer of a first refractive index, and a second sub-layer of a second refractive index different from the first refractive index.
17. The light-emitting device according to any one of claim 14 to claim 16, wherein the reflector further comprises a metal reflector layer.
18. The light-emitting device according to claim 17, wherein the metal reflector layer comprises one or more metals selected from a group consisting of silver, aluminum, rhodium, nickel, titanium, tungsten, chromium, and copper.
19. The light-emitting device according to any one of claim 14 to claim 18, further
comprising: a passivation layer.
20. A method of forming a light-emitting device, the method comprising:
forming a first semiconductor layer of a first conductivity type;
forming a second semiconductor layer of a second conductivity type different from the first conductivity type;
forming an active layer between the first semiconductor layer and the second semiconductor layer;
forming a current guide layer having a first surface in contact with a first portion of the second semiconductor layer, the current guide layer comprising a dielectric material;
forming an electrically conductive layer in contact with a second portion of the second semiconductor layer;
forming a first electrode in contact with the electrically conductive layer; and forming a second electrode in contact with the first semiconductor layer; wherein the current guide layer has a second surface opposite the first surface, the second surface in contact with the electrically conductive layer; and wherein the current guide layer is configured to reflect at least a portion of light generated by the active layer.
21. The method according to claim 20, the method further comprising:
forming a sidewall protection structure in contact with a side wall of the second semiconductor layer.
22. The method according to claim 20 or claim 21,
forming a reflector formed over the first semiconductor layer, the second semiconductor layer, and the active layer.
PCT/SG2018/050463 2017-09-15 2018-09-11 Light-emitting device and method of forming the same WO2019054942A1 (en)

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