KR20120052747A - Light emitting device and method for fabricating the same - Google Patents

Abstract

PURPOSE: A light emitting device and a manufacturing method thereof are provided to prevent a current from being diffused to an area except a sub electrode layer by forming a channel layer which fixes the sub electrode layer and a reflection layer. CONSTITUTION: An electrode layer(130) is formed on a support substrate(110) and includes a first sub electrode layer(131), a second sub electrode layer(132), and a third sub electrode layer(133). A channel layer(140) includes a channel(141) and a channel protrusion(142) protruded from the channel. A light emitting structure(150) including a first semiconductor layer(151), a second semiconductor layer(153), and an active layer(152) is formed on the channel layer. An electrode pad(160) overlapped with the channel protrusion is formed on the first semiconductor layer.

Description

Light Emitting Device and Method for Fabricating The Same

The embodiment relates to a light emitting device and a method of manufacturing the light emitting device.

Fluorescent lamps are increasingly being replaced by other light sources because they are against the trend of the future lighting market aiming to be environmentally friendly due to frequent replacement and the use of fluorescent materials.

The most popular light source is LED (Light Emitting Diode), which has the advantages of fast processing speed and low power consumption of semiconductor, and it is considered as next generation light source because it is environmentally friendly and has high energy saving effect. Therefore, the use of LED to replace the existing fluorescent lamp is actively in progress.

Currently, semiconductor light emitting devices such as LEDs are applied to various devices including televisions, monitors, notebooks, mobile phones, and other display devices, and in particular, are widely used as backlight units in place of existing CCFLs.

Recently, high brightness is required to use a light emitting device as an illumination light source, and in order to achieve such high brightness, research is being conducted to manufacture a light emitting device capable of increasing light emission efficiency by uniformly spreading current.

The embodiment may provide a light emitting device having a plurality of auxiliary electrode layers and a reflective layer, including a channel layer fixing the auxiliary electrode layer and the reflective layer to prevent current diffusion in addition to the auxiliary electrode layer and to prevent peeling of the electrode layer. have.

In addition, the embodiment can provide a light emitting device manufacturing method that can minimize the PR lift-off process to prevent the degradation of the reliability of the light emitting device.

The light emitting device according to the embodiment is formed on a support substrate, the light emitting structure comprising an active layer between the first and second semiconductor layers and the first and second semiconductor layers, the support substrate, An electrode layer including at least one auxiliary electrode layer electrically connected to the light emitting structure, a channel disposed between the support substrate and the electrode layer, and a channel protrusion protruding from the channel so as to be in contact with a side surface of the auxiliary electrode layers. A channel layer including, an electrode pad partially overlapping with the channel protrusion on the first semiconductor and the second semiconductor layer, the first region in contact with the electrode layer; And a second region in contact with the channel layer.

Here, the channel protrusion may be formed in the second semiconductor layer to a depth that does not contact the active layer.

In addition, the light emitting device manufacturing method according to the embodiment, the step of sequentially forming a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer on the growth substrate, the electrode layer and the reflective layer on the second semiconductor layer Forming a photoresist having a predetermined pattern on the reflective layer; removing an area other than a region vertically overlapped with an area in which the PR is disposed among the electrode layer and the reflective layer; and removing the PR And forming a channel layer on the second semiconductor layer and the reflective layer, and removing the growth substrate, and forming a support substrate on the channel layer.

The light emitting device includes a channel layer to prevent diffusion of electric charges other than the electrode layer, and serves as an etching stop layer in an etching process of a light emitting structure which is subsequently performed, and prevents peeling of the electrode layer.

In addition, since the process of removing the PR is minimized, the reliability of the light emitting device can be prevented.

1 is a cross-sectional view showing the structure of a light emitting device according to the embodiment.
2 is a cross-sectional view showing the structure of a light emitting device according to another embodiment.
3 is a cross-sectional view illustrating a structure of a light emitting device according to still another embodiment.
4 to 7 are flowcharts illustrating a method of manufacturing a light emitting device according to the embodiment.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims. Thus, in some embodiments, well known process steps, well known device structures, and well-known techniques are not specifically described to avoid an undesirable interpretation of the present invention. Like reference numerals refer to like elements throughout.

The terms spatially relative, "below", "beneath", "lower", "above", "upper" May be used to readily describe a device or a relationship of components to other devices or components. Spatially relative terms should be understood to include, in addition to the orientation shown in the drawings, terms that include different orientations of the device during use or operation. For example, when flipping a device shown in the figure, a device described as "below" or "beneath" of another device may be placed "above" of another device. Thus, the exemplary term "below" can include both downward and upward directions. The device can also be oriented in other directions, so that spatially relative terms can be interpreted according to orientation.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. As used herein, “comprises” and / or “comprising” refers to the presence of one or more other components, steps, operations and / or elements. Or does not exclude additions.

Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used in a sense that can be commonly understood by those skilled in the art. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size and area of each component does not necessarily reflect the actual size or area.

In addition, the angle and direction mentioned in the process of describing the structure of the light emitting device in the embodiment are based on those described in the drawings. In the description of the structure of the light emitting device in the specification, reference points and positional relationship with respect to angles are not explicitly referred to, refer to the related drawings.

1 is a cross-sectional view showing the structure of a light emitting device according to the embodiment.

Referring to FIG. 1, the light emitting device 100 according to the embodiment may include a support substrate 110, an electrode layer 130, a channel layer 140, and a light emitting structure 150.

The support substrate 110 may be formed using a material having excellent thermal conductivity and may be formed of a conductive material, and may be formed using a metal material or a conductive ceramic. The support substrate 110 may be formed in a single layer, or may be formed in a double structure or multiple structures.

In an embodiment, the support substrate 110 is described as having conductivity, but may not have conductivity, but is not limited thereto.

That is, the support substrate 110 may include gold (Au), nickel (Ni), tungsten (W), molybdenum (Mo), copper (Cu), aluminum (Al), tantalum (Ta), silver (Ag), and platinum ( It may be formed of any one selected from Pt) and chromium (Cr) or formed of two or more alloys, and may be formed by stacking two or more different materials. However, there is no limitation.

The support substrate 110 may facilitate the emission of heat generated from the light emitting device 100 to improve the thermal stability of the light emitting device 100.

The bonding layer 111 may be stacked on the support substrate 110, and the bonding layer 111 may be formed using a material having excellent adhesion to a lower material, and a diffusion barrier layer may be formed on the bonding layer 111. Can be further formed.

As a material having excellent adhesion used as the bonding layer 111, at least one of indium (In), tin (Sn), silver (Ag), niobium (Nb), nickel (Ni), aluminum (Au), and copper (Cu) The diffusion barrier layer is platinum (Pt), palladium (Pd), tungsten (W), nickel (Ni), ruthenium (Ru), molybdenum (Mo), iridium (Ir), rhodium (Rh), tantalum (Ta). ), Hafnium (Hf), zirconium (Zr), niobium (Nb), vanadium (V), or at least one or two or more alloys may be used. However, it is not limited thereto. The bonding layer 111 may be formed in a single layer or a multilayer structure.

The electrode layer 130 is disposed on the support substrate 110. In addition, the electrode layer 130 may include at least one auxiliary electrode layer 131, 132, and 133. 1 illustrates three auxiliary electrode layers, but is not limited thereto.

The auxiliary electrode layers 131, 132, and 133 may include a first auxiliary electrode layer 131, a second auxiliary electrode layer 132, and a third auxiliary electrode layer 133, and may be spaced apart from each other and connected to each other.

In other words, the first to third auxiliary electrode layers 131, 132, and 133 may be connected to each other by thin conductive lines. The first to third auxiliary electrode layers 131, 132, and 133 may be disposed in parallel to each other, but are not limited thereto. The first to third auxiliary electrode layers 131, 132, and 133 may be freely disposed in consideration of current diffusion and light efficiency of the light emitting device. In FIG. 1, a second auxiliary electrode layer 132 is disposed at the center of the light emitting device 100, and is spaced apart from the second auxiliary electrode layer 132 on both sides of the second auxiliary electrode layer 132 so as to be parallel to the first auxiliary electrode layer. Although 131 and the third auxiliary electrode layer 133 are illustrated as being disposed, the present invention is not limited thereto.

The widths of the auxiliary electrode layers 131, 132, and 133 may be different from each other or may be the same, but are not limited thereto.

The electrode layer 130 may include a conductive material. For example, nickel (Ni), platinum (Pt), ruthenium (Ru), iridium (Ir), rhodium (Rh), tantalum (Ta), and molybdenum (Mo) ), Titanium (Ti), silver (Ag), tungsten (W), copper (Cu), chromium (Cr), palladium (Pd), vanadium (V), cobalt (Co), niobium (Nb), zirconium (Zr) ), At least one of indium tin oxide (ITO), aluminum zinc oxide (AZO), and indium zinc oxide (IZO). However, it is not limited thereto.

The channel layer 140 may be included between the support substrate 110 and the electrode layer 130.

The channel layer 140 prevents the diffusion of the charge, serves as an etching stop layer in the etching process of the light emitting structure 150 to be performed later, and prevents the electrode layer 130 from peeling off.

The channel layer 140 may include at least one of a metal material and an insulating material. In the case of the metal material, the channel layer 140 is applied to the electrode layer 130 using a material having a lower electrical conductivity than the material forming the electrode layer 130. Power may not be applied to the channel layer 140.

The channel layer 140 may include at least one of titanium (Ti), nickel (Ni), platinum (Pt), lead (Pb), rhodium (Rh), iridium (Ir), and tungsten (W), or may be oxidized. At least one of aluminum (Al ₂ O ₃ ), silicon oxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ) and titanium oxide (TiO _x ), or indium tin oxide (ITO), aluminum At least one of zinc oxide (AZO) and indium zinc oxide (IZO) may be included, but preferably titanium (Ti), nickel (Ni), platinum (Pt), or tungsten (W). ), Molybdenum (Mo), vanadium (V) and iron (Fe) may include at least one.

Here, the channel layer 140 protrudes from the channel 141 to be in contact with the side surfaces of the channel 141 and the auxiliary electrode layers 131, 132, and 133 disposed between the support substrate 110 and the electrode layer 130. 142 may include. This will be described later.

The light emitting structure 150 may be in contact with the electrode layer 130 and the channel layer 140, and may include a first semiconductor layer 151, an active layer 152, and a second semiconductor layer 153. The active layer 152 may be interposed between the 151 and the second semiconductor layer 153.

The first semiconductor layer 151 may be implemented as an n-type semiconductor layer, and the n-type semiconductor layer may be formed of any one of GaN-based compound semiconductors such as a GaN layer, an AlGaN layer, an InGAN layer, or the like, and the n-type dopant may be doped. Can be.

Meanwhile, the electrode pad 160 may be formed of nickel (Ni) on the first semiconductor layer 151, and the entire or partial region of the surface of the first semiconductor layer 151 on which the electrode pad 160 is not formed. Surface irregularities 158 may be formed in the region to improve light extraction efficiency by a predetermined etching method.

In addition, the electrode pad 160 may be formed to partially overlap the channel protrusion 142 of the channel layer 140. At this time, the channel protrusion 142 is formed of a material having a lower electrical conductivity than the electrode pad 160, so that a current flows only the shortest distance from the electrode pad 160 to the electrode layer 130 to emit light only a part of the active layer to improve luminous efficiency. It can prevent the lowering and serve as a current blocking layer through which current can be evenly spread throughout the light emitting structure.

The surface irregularities 158 may be formed by wet etching, dry etching, or laser lift off, but are not limited thereto.

Here, the electrode pad 160 may be formed on a flat surface on which the surface irregularities 158 are not formed, and may be formed on an upper surface on which the surface irregularities 158 are formed, but is not limited thereto.

An active layer 152 may be formed under the first semiconductor layer 151. The active layer 152 is an area where electrons and holes are recombined. The active layer 152 may transition to a low energy level as the electrons and holes recombine, and may generate light having a corresponding wavelength.

An active layer 152, e.g., including a semiconductor material having a compositional formula of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) It may be formed, and may be formed of a single quantum well structure or a multi quantum well structure (MQW).

Therefore, more electrons are collected at the lower energy level of the quantum well layer, and as a result, the probability of recombination of electrons and holes can be increased, thereby improving the light emitting effect. In addition, a quantum wire structure or a quantum dot structure may be included.

The second semiconductor layer 153 may be formed under the active layer 152. The second semiconductor layer 153 may be implemented as a p-type semiconductor layer to inject holes into the active layer 152. For example, the p-type semiconductor layer is a semiconductor material having a composition formula of In _x Al _y Ga _{1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1), for example GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, or the like, and may be doped with p-type dopants such as Mg, Zn, Ca, Sr, and Ba.

In this case, the second semiconductor layer 153 may be divided into a first region (not shown) in contact with the electrode layer 130 and a second region (not shown) in contact with the channel layer 140.

In other words, the channel protrusion 142 of the channel layer 140 is inserted into the groove contacting or recessed inwardly in the second semiconductor layer 153 in the second region.

The first semiconductor layer 151, the active layer 152, and the second semiconductor layer 153 may be formed of metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), and plasma. Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), Sputtering But it is not limited thereto.

In addition, unlike the above-described embodiments, the first semiconductor layer 151 may be implemented as a p-type semiconductor layer, and the second semiconductor layer 153 may be implemented as an n-type semiconductor layer.

Referring back to FIG. 1, the channel layer 140 protrudes from the channel 141 to contact the outer peripheral side surfaces of the channel 141 and the auxiliary electrode layers 131, 132, and 133 disposed between the support substrate 110 and the electrode layer 130. It may include a channel protrusion 142 is formed. That is, the channel protrusion 142 protrudes toward the second semiconductor layer 153.

In this case, the second semiconductor layer 153 may be divided into a first region (not shown) in contact with the electrode layer 130 and a second region (not shown) in contact with the channel layer 140.

In other words, the channel protrusion 142 of the channel layer 140 may contact the second semiconductor layer 153 in the second region, and the channel 141 may be disposed between the electrode layer 130 and the support substrate 110. Is formed.

The channel protrusion 142 may be freely disposed to contact the second region of the second semiconductor layer 153 in which the auxiliary electrode layers 131, 132, 133 are not disposed, according to the arrangement of the auxiliary electrode layers 131, 132, 133.

In addition, the channel protrusion 142 may be formed separately from the channel 141, but preferably may be integrally formed. However, there is no limitation.

In addition, the channel protrusion 142 may be formed without a step, or may have a step. When the reflective layer 120 described later may have a step according to the width of the reflective layer 120.

The channel protrusion 142 may be disposed in a straight line or zigzag shape, but is not limited thereto. The channel protrusion 142 may be disposed to correspond to the arrangement of the auxiliary electrode layers 131, 132, and 133.

In addition, the cross-sectional shape of the channel protrusion 142 may be polygonal or have a curvature, but is not limited thereto.

And, the length of the channel protrusion 142 may be different from each other, but is not limited thereto.

The reflective layer 120 vertically overlapping the auxiliary electrode layers 131, 132, 133 may be included between the channel layer 140 and the auxiliary electrode layers 131, 132, 133. When the reflective layer 120 is formed, the channel layer 140 may prevent peeling due to a weak bonding force between the electrode layer 130 and the reflective layer 120.

The reflective layer 120 reflects the light toward the upper direction of the light emitting device 100 when some of the light generated from the active layer 152 of the light emitting structure 150 is directed toward the support substrate 110. 100) light extraction efficiency can be improved.

Therefore, the reflective layer 120 is a material capable of reflecting light, for example, silver (Ag), nickel (Ni), aluminum (Al), rhodium (Rh), palladium (Pd), iridium (Ir), Ruthenium (Ru), magnesium (Mg), zinc (Zn), platinum (Pt), gold (Au), hafnium (Hf) and may be formed of one or a plurality of layers of a material consisting of two or more alloys thereof In addition, the materials having different refractive indices may be formed in a multilayer structure, and may be formed of a material other than the above-described material, but is not limited thereto.

The reflective layer 120 may have the same width as the auxiliary electrode layers 131, 132, and 133, and may be formed larger than the auxiliary electrode layers 131, 132, and 133, but may be formed smaller than the width of the auxiliary electrode layers 131, 132, 133. have.

In addition, when the reflective layer 120 is formed of a material in ohmic contact with the light emitting structure (eg, the second semiconductor layer 153), the electrode layer 130 may not be separately formed, but is not limited thereto.

On the other hand, the side surface of the light emitting structure 150 may have an inclination. That is, it may be etched by a predetermined etching method to have a slope. In this case, the channel layer 140 may serve as an etching stop layer.

In addition, the passivation 170 may be formed on a portion or the entire area of the outer circumferential surface of the light emitting structure 150.

The passivation 170 protects the light emitting structure 150 from an external shock and prevents an electrical short.

2 is a cross-sectional view showing the structure of a light emitting device according to another embodiment.

Referring to FIG. 2, the light emitting device 100 according to another embodiment has a difference in length and shape of the channel protrusion 142 and a groove of the second semiconductor layer 153 as compared with the above-described embodiment.

Here, the channel protrusion 142 may be formed in the second semiconductor layer 153 to a depth that does not contact the active layer 152. The channel protrusion 142 may be inserted into the second semiconductor layer 153 to prevent peeling of the light emitting structure 150 and the electrode layer 130. Although the length of the channel protrusion 142 is not limited, it is preferable that the length of the channel protrusion 142 is not formed in contact with the active layer 152 so as not to reduce the light extraction efficiency. In addition, any one of the channel protrusions 142 may be in contact with the second semiconductor layer 153, and the other may be inserted into the second semiconductor layer 153.

The channel protrusion 142 may further include an unevenness 143 in a part or the entire area. The arrangement of the unevenness 143 may be continuous or intermittent.

The unevenness 143 may be formed in various shapes such as semicircular shape, columnar shape, and mountain shape, but is not limited thereto.

The method of forming the unevenness 143 may be a dry etching method or a wet etching method, but is not limited thereto.

In this case, a recess may be formed in the second region of the second semiconductor layer 153 to be concave as much as the protruding length of the channel protrusion 142. In addition, a shape of the groove may be formed to correspond to the shape of the channel protrusion 142. In the case of the above shape, the adhesion between the second semiconductor layer 153 and the channel layer 140 may be excellent.

3 is a cross-sectional view illustrating a structure of a light emitting device according to still another embodiment.

Referring to FIG. 3, the channel 141 and the bonding layer 111 may be formed to form a step due to the step between the electrode layer 130 and the reflective layer.

The channel 141 may be formed with a step due to the step between the electrode layer 130 and the reflective layer, or may be formed in a direction opposite to the channel protrusion 142 in the same shape as the channel protrusion 142. However, it is not limited thereto.

In addition, the bonding layer 111 may be formed with a step along the step of the channel 141. Steps of the bonding layer 111 may be formed to mesh with steps of the channel 141. That is, if the step of the channel 141 is concave, the step of the bonding layer 111 may be convex. However, it is not limited thereto.

Due to the step difference between the channel 141 and the bonding layer 111, the bonding force between the channel 141 and the bonding layer 111 may be improved.

4 to 7 are flowcharts illustrating a method of manufacturing a light emitting device according to the embodiment.

The light emitting device manufacturing method according to the embodiment is as follows.

Referring to FIG. 4, first, a light emitting structure 150 including a first semiconductor layer 151, an active layer 152, and a second semiconductor layer 153 is sequentially formed on a growth substrate 101.

The growth substrate 101 may be selected from the group consisting of sapphire substrate (Al ₂ 0 ₃ ), GaN, SiC, ZnO, Si, GaP, InP, GaAs, and the like. A buffer layer (not shown) may be formed between the light emitting structures 150.

The buffer layer (not shown) may have a form in which Group 3 and Group 5 elements are combined, or may be formed of any one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN, and dopants may be doped.

An undoped semiconductor layer (not shown) may be formed on the growth substrate 101 or the buffer layer (not shown), and either or both of the buffer layer and the undoped semiconductor layer (not shown) may be formed. It may or may not be formed and is not limited to this structure.

Thereafter, the electrode layer 130 and the reflective layer 120 may be formed on the second semiconductor layer 153.

Referring to FIG. 5, a PR (Photo Resist) 180 having a predetermined pattern may be disposed on the reflective layer 120. In this case, the PR may be arranged in a predetermined pattern corresponding to the electrode shape in consideration of current diffusion and light extraction efficiency.

Thereafter, regions other than the region vertically overlapping with the region where the PR 180 is disposed among the electrode layer 130 and the reflective layer 120 are removed. In this case, the cross section to be removed may form a rectangle, and may have a curvature or a step. It does not limit to this. The removal method may be a wet etching, dry etching, or laser lift off method, but is not limited thereto.

The removing may further include etching one region of the exposed second semiconductor layer 153 to a depth that does not contact the active layer 152.

In other words, when the electrode layer 130 and the reflective layer 120 are etched, the second semiconductor layer 153 may be etched at the same time, the electrode layer 130 and the reflective layer 120 are etched, and then the second semiconductor again. Layer 153 may be etched. It does not limit to this.

Wet etching, dry etching, or laser lift off may be used, but is not limited thereto.

In addition, the unevenness 143 may be formed in one region of the exposed second semiconductor layer 153. Here, the unevenness 143 may be formed by wet etching, dry etching, or LLO (laser lift off) method, but is not limited thereto.

Thereafter, the PR 180 is removed.

Referring to FIG. 6, a channel layer 140 is formed on the second semiconductor layer 153 and the reflective layer 120.

In other words, the channel layer 140 may be formed to contact one region of the second semiconductor layer 153 and the reflective layer 120. In addition, the channel layer 140 may be formed to be inserted into the groove when the groove is formed in the second semiconductor layer 153.

Thereafter, the growth substrate 101 is removed. The method of removing the growth substrate 101 is not limited, but preferably, a laser lift off (LLO) method may be used.

Thereafter, the support substrate 110 is formed on the channel layer 140. In this case, the support substrate 110 may be attached by a bonding method, and a bonding layer 111 may be included between the channel layer 140 and the support substrate 110 to improve adhesion.

Referring to FIG. 7, the side surface of the light emitting structure 150 may be etched obliquely, and then the passivation 170 may be formed on the outer circumferential surface of the light emitting structure.

Therefore, since the process of removing the PR 180 is minimized, the reliability of the light emitting device can be prevented.

The light emitting device 100 according to the embodiment may be mounted in a package, and a plurality of light emitting device packages on which the light emitting diodes are mounted are arranged on a substrate, and a light guide plate, a prism sheet, which is an optical member on an optical path of the light emitting device package, A diffusion sheet and the like can be arranged.

The light emitting device package, the substrate, and the optical member may function as a light unit. Another embodiment may be implemented as a display device, an indicator device, or an illumination system including the light emitting diode or light emitting device package described in the above embodiments, for example, the illumination system may include a lamp or a street lamp.

In addition, the above description has been made with reference to the embodiment, which is merely an example, and is not intended to limit the present invention. Those skilled in the art to which the present invention pertains will be illustrated as above without departing from the essential characteristics of the present embodiment. It will be appreciated that various modifications and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

100: light emitting element 110: support substrate
111: bonding layer 120: reflective layer
130: electrode layer 140: channel layer
141: channel 142: channel projection
151: first semiconductor layer 152: active layer
153: second semiconductor layer 160: electrode pad
170: passivation

Claims (20)

Support substrate;
A light emitting structure formed on the support substrate and including an active layer between the first and second semiconductor layers and the first and second semiconductor layers;
An electrode layer formed on the support substrate and including at least one auxiliary electrode layer electrically connected to the light emitting structure;
A channel layer including a channel disposed between the support substrate and the electrode layer and a channel protrusion protruding from the channel so as to contact a side surface of an outer peripheral portion of the auxiliary electrode layers;
An electrode pad partially overlapping the channel protrusion on the first semiconductor; And
The second semiconductor layer may include a first region in contact with the electrode layer; And a second region in contact with the channel layer. The method of claim 1,
The channel projection is,
The light emitting device formed on the second semiconductor layer to a depth not in contact with the active layer. The method according to claim 1 or 2,
The light emitting device is formed on the upper surface of the channel projections irregularities in some or all areas. The method according to claim 1 or 2,
The channel protrusion has a step, characterized in that the light emitting element. The method according to claim 1 or 2,
The channel protrusions are formed integrally with the channel. The method according to claim 1 or 2,
The channel projection is,
A light emitting device arranged in a straight or zigzag shape. The method according to claim 1 or 2,
The cross-sectional shape of the channel protrusion is a polygon or a light emitting device having a curvature. The method according to claim 1 or 2,
The channel layer,
Light emitting device comprising at least one of titanium (Ti), nickel (Ni), platinum (Pt), tungsten (W), molybdenum (Mo), vanadium (V), iron (Fe). The method of claim 1,
And a reflective layer vertically overlapping the auxiliary electrode layers between the channel layer and the auxiliary electrode layers. 10. The method of claim 9,
The width of the reflective layer is smaller than the width of the auxiliary electrode layers. The method of claim 2,
Surface irregularities are formed on the first semiconductor layer,
In the second region of the second semiconductor layer,
A light emitting device in which a groove is formed to be recessed as much as the protrusion length of the channel protrusion. The method of claim 11,
The groove is the same light emitting device as the projection of the channel projection. The method of claim 1,
The light emitting device has a side surface of the light emitting structure having a slope. The method of claim 13,
The passivation device is formed passivation on a part or the entire area of the outer peripheral surface of the light emitting structure. The method of claim 1,
The light emitting device further comprises a bonding layer between the support substrate and the channel layer. The method of claim 1,
And the channel layer has a step. 16. The method of claim 15,
The bonding layer is characterized in that the light emitting device having a step. Sequentially forming a light emitting structure including a first semiconductor layer, an active layer, and a second semiconductor layer on the growth substrate;
Forming an electrode layer and a reflective layer on the second semiconductor layer;
Disposing a photo resist (PR) having a predetermined pattern on the reflective layer;
Removing an area of the electrode layer and the reflective layer other than a region vertically overlapping the region where the PR is disposed;
Removing the PR;
Forming a channel layer on the second semiconductor layer and the reflective layer; And
Removing the growth substrate, and forming a support substrate on the channel layer. The method of claim 18,
The PR removal step,
And etching one region of the exposed second semiconductor layer to a depth not in contact with the active layer. The method of claim 18,
The PR removal step,
And forming irregularities in one region of the exposed second semiconductor layer.

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