WO2019037285A1 - 顶发射amoled像素电路及其驱动方法 - Google Patents

顶发射amoled像素电路及其驱动方法 Download PDF

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Publication number
WO2019037285A1
WO2019037285A1 PCT/CN2017/111007 CN2017111007W WO2019037285A1 WO 2019037285 A1 WO2019037285 A1 WO 2019037285A1 CN 2017111007 W CN2017111007 W CN 2017111007W WO 2019037285 A1 WO2019037285 A1 WO 2019037285A1
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node
thin film
film transistor
voltage
pixel circuit
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PCT/CN2017/111007
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French (fr)
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韩佰祥
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US15/579,948 priority Critical patent/US10891898B2/en
Publication of WO2019037285A1 publication Critical patent/WO2019037285A1/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6745—Polycrystalline or microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
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    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
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    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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    • H10K2102/301—Details of OLEDs
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    • H10K2102/3026—Top emission

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a top-emitting AMOLED pixel circuit and a driving method thereof.
  • organic light-emitting diode (OLED) display panels are favored by the market because of their low power consumption, high color gamut, high brightness, high resolution, wide viewing angle, and high response speed.
  • the OLED display device can be classified into two types: passive matrix OLED (PMOLED) and active matrix OLED (AMOLED) according to the driving method.
  • the AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a high-definition large-sized display device.
  • OLEDs can be divided into two structures according to the direction of light emission: one is a bottom emission type, and the other is a top emission type. The light emitted by the top-emitting OLED is emitted from the top of the device, which can effectively increase the aperture ratio.
  • FIG. 1 it is a schematic diagram of a 3T1C pixel circuit of a conventional AMOLED, which mainly includes three thin film transistors T1 to T3 and a capacitor Cst.
  • the driving process of the pixel circuit is mainly controlled by the timing of the signal Scan, and the thin film transistor T1 is a driving TFT.
  • the OLED is driven to control the current through the OLED.
  • T1 needs to operate in the saturation region, that is, it needs to satisfy Vgs-Vth ⁇ VDD-V Anode , where Vth is the threshold voltage of T1.
  • Vth is the threshold voltage of T1.
  • an object of the present invention is to provide a top-emitting AMOLED pixel circuit that solves the problem of circuit failure caused by power supply low voltage VSS voltage rise.
  • Another object of the present invention is to provide a driving method for a top-emitting AMOLED pixel circuit, which solves the problem of circuit failure caused by power supply low voltage VSS voltage rise.
  • the present invention provides a top-emitting AMOLED pixel circuit comprising:
  • a first thin film transistor having a gate connected to the first node, and a source and a drain connected to the second node and the third node, respectively;
  • a second thin film transistor having a gate connected to the scan signal, and a source and a drain connected to the first node and the data signal, respectively;
  • a third thin film transistor having a gate connected to the scan signal, and a source and a drain respectively connected to the second node and the reference voltage;
  • a fourth thin film transistor having a gate connected to the scan signal, and a source and a drain respectively connected to the third node and the power supply high voltage;
  • the anode is connected to the second node, and the cathode is connected to the power supply with a low voltage;
  • the high voltage of the power source is determined according to the low voltage of the power source, and the difference between the high voltage of the power source and the low voltage of the power source remains unchanged, and the reference voltage is smaller than the turn-on voltage of the OLED.
  • the timing of the scan signal is configured to include a compensation phase and an illumination phase.
  • the scan signal is high.
  • the scan signal is low.
  • the reference voltage remains unchanged.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are low temperature polysilicon thin film transistors or oxide semiconductor thin film transistors.
  • the present invention also provides a driving method of the above-described top emission AMOLED pixel circuit, comprising: the timing of the scanning signal is configured to include a compensation phase, and an illumination phase.
  • the scan signal is high.
  • the scan signal is low.
  • the reference voltage remains unchanged.
  • the invention also provides a top emission AMOLED pixel circuit, comprising:
  • a first thin film transistor having a gate connected to the first node and a source and a drain connected to the second node Point and third node;
  • a second thin film transistor having a gate connected to the scan signal, and a source and a drain connected to the first node and the data signal, respectively;
  • a third thin film transistor having a gate connected to the scan signal, and a source and a drain respectively connected to the second node and the reference voltage;
  • a fourth thin film transistor having a gate connected to the scan signal, and a source and a drain respectively connected to the third node and the power supply high voltage;
  • the anode is connected to the second node, and the cathode is connected to the power supply with a low voltage;
  • the high voltage of the power source is determined according to the low voltage of the power source, and the difference between the high voltage of the power source and the low voltage of the power source remains unchanged, and the reference voltage is smaller than the turn-on voltage of the OLED;
  • the timing of the scan signal is configured to include a compensation phase and an illumination phase
  • the scan signal is high
  • the scan signal is low
  • the reference voltage remains unchanged.
  • the top-emitting AMOLED pixel circuit of the present invention and the driving method thereof can effectively alleviate the IR voltage drop caused by the increase of the transparent cathode impedance, effectively solve the circuit failure caused by the VSS voltage rise, and maintain the voltage difference between VDD and VSS. With no additional power consumption, it is suitable for large-size top-emitting AMOLED panels.
  • FIG. 1 is a schematic diagram of a 3T1C pixel circuit of a conventional AMOLED
  • FIG. 2 is a schematic circuit diagram of a preferred embodiment of a top-emitting AMOLED pixel circuit of the present invention
  • FIG. 3 is a timing diagram of signals according to a preferred embodiment of a top-emitting AMOLED pixel circuit of the present invention.
  • FIG. 4 is a schematic diagram of a VSS voltage distribution (hypothesis) of a conventional top-emitting 3T1C pixel circuit.
  • FIG. 2 is a schematic circuit diagram of a preferred embodiment of a top-emitting AMOLED pixel circuit according to the present invention
  • FIG. 3 is a schematic diagram of signal timing of the preferred embodiment.
  • the 4T2C pixel circuit mainly includes thin film transistors T1 to T4, capacitors Cst and C, wherein T1 is a driving TFT: T1 gate connection node G, source and drain are respectively connected to nodes S and D; T2 gate is connected to scan signal Scan The source and the drain are respectively connected to the node G and the data signal Data1; the gate of the T3 is connected to the scan signal Scan, the source and the drain are respectively connected to the node S and the reference voltage Ref; the gate of the T4 is connected to the scan signal Scan, the source and the drain Connect node D and power supply high voltage respectively (Data2; capacitor Cst is connected to nodes G and S respectively; capacitor C is connected to node D and reference voltage Ref respectively; OLED anode is connected to node S
  • the timing of the scan signal Scan is configured to include a compensation phase or a programming phase, and an emitting phase in which the scan signal Scan is at a high potential.
  • the scan signal Scan is Low potential.
  • VDD a function of VSS
  • VSS storage In capacitor C
  • node G writes data signal Data1
  • node S writes reference voltage Ref ( ⁇ OLED turn-on voltage)
  • Vgs Data1-Ref, at which point the OLED does not emit light.
  • VDD voltage is stored on the capacitor C, it can be used as a voltage source. By presetting the capacitance value of the capacitor C reasonably in the design, the capacitor can be guaranteed in one frame time.
  • FIG. 4 it is a schematic diagram of a conventional top-emitting 3T1C pixel circuit VSS voltage distribution (hypothesis). Assume that the initial voltage of VDD is 20V and the initial voltage of VSS is 0V. The voltage distribution of VSS IR voltage caused by transparent cathode is shown in the bracketed font in Figure 4. The closer to the center of the panel, the larger the value of VDD can be in parentheses. The font shows that the VDD-VSS voltage of each region is the same, so that the driving power consumption is not increased, and the IR voltage drop caused by the high transparent cathode impedance is well solved.
  • the invention also provides a driving method for the above pixel driving circuit, the core is to introduce an independently controlled VDD voltage, and the voltage and VSS voltage distribution are corresponding relationships; introducing an independently controlled VDD voltage effectively solves the circuit caused by the VSS voltage rising Failure, and by maintaining a voltage difference between VDD and VSS, no additional power consumption is added; the top-emitting AMOLED pixel circuit of the present invention and its driving method include, but are not limited to, a low-temperature polysilicon process, an oxide semiconductor process, and any possible process involves The similar pixel-related methods belong to the protection scope of the present invention; the TFT size, capacitance value and timing chart of the 4T2C pixel circuit proposed by the present invention allow a certain degree of flexibility, and any changes based thereon are within the protection scope of the present invention.
  • the top-emitting AMOLED pixel circuit of the present invention and the driving method thereof can effectively alleviate the IR voltage drop caused by the increase of the transparent cathode impedance, effectively solve the circuit failure caused by the VSS voltage rise, and maintain the voltage difference between VDD and VSS. With no additional power consumption, it is suitable for large-size top-emitting AMOLED panels.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Geometry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种顶发射AMOLED像素电路及其驱动方法，顶发射AMOLED像素电路包括：第一薄膜晶体管(T1)，连接第一节点(G)，第二节点(S)和第三节点(D)；第二薄膜晶体管(T2)，连接扫描信号(Scan)，第一节点(G)和数据信号(Data1)；第三薄膜晶体管(T3)，连接扫描信号(Scan)，第二节点(S)和参考电压(Ref)；第四薄膜晶体管(T4)，连接扫描信号(Scan)，第三节点(D)和电源高电压(Data2)；第一电容(Cst)连接第一节点(G)和第二节点(S)；第二电容(C)连接第三节点(D)和参考电压(Ref)；OLED连接第二节点(S)和电源低电压(VSS)；电源高电压(Data2)与电源低电压(VSS)之间的差值保持不变。顶发射AMOLED像素电路及其驱动方法可以有效缓解透明阴极阻抗增大引起的IR压降。

Description

顶发射AMOLED像素电路及其驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种顶发射AMOLED像素电路及其驱动方法。
背景技术
作为新一代显示技术，有机发光二极管(OLED)显示面板具有低功耗、高色域、高亮度、高分辨率、宽视角、高响应速度等优点，因此备受市场的青睐。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)两大类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。OLED按照光出射方向的不同，可以分为两种结构：一种是底发射型，另一种是顶发射型。顶发射型OLED所发出的光是从器件的顶部出射，能有效的提高开口率。
大尺寸高解析度AMOLED面板的开发是未来的发展方向，随着解析度的增加，会极大的压缩底发射AMOLED的开口区，故急需开发顶发射架构，而目前大尺寸顶发射AMOLED面板的透明阴极阻抗非常大，引起严重的IR压降(Drop)问题。
参见图1，其为传统AMOLED的3T1C像素电路示意图，主要包括3个薄膜晶体管T1～T3，一个电容Cst，该像素电路驱动过程主要由信号Scan的时序控制，薄膜晶体管T1为驱动TFT，用于驱动OLED，控制通过OLED的电流。
该传统AMOLED的3T1C像素电路工作过程如下：当Scan给高电位时，T2，T3打开，节点G写入数据信号Data，节点S写入参考电压Ref(＜OLED开启电压)，Vgs＝Data－Ref，此时OLED不发光；当Scan给低电位时，T2，T3关闭，节点S被电源高电压VDD充电至VAnode，节点G被耦合(Couple)至Data+VAnode－Ref，此时Vgs＝Data－Ref，OLED开始发光。T1作为驱动TFT，需工作在饱和区，即需要满足Vgs－Vth＜VDD－VAnode，其中Vth为T1的阈值电压。对于大尺寸顶发射AMOLED面板，如电源低电压VSS受限于透明阴极高阻抗影响，出现较大的IR压降，则 VSS上升导致VAnode上升，T1工作在线性区，现有像素电路失效。
发明内容
因此，本发明的目的在于提供一种顶发射AMOLED像素电路，解决电源低电压VSS电压抬升引起的电路失效问题。
本发明的另一目的在于提供一种顶发射AMOLED像素电路的驱动方法，解决电源低电压VSS电压抬升引起的电路失效问题。
为实现上述目的，本发明提供了一种顶发射AMOLED像素电路，包括：
第一薄膜晶体管，其栅极连接第一节点，源极和漏极分别连接第二节点和第三节点；
第二薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第一节点和数据信号；
第三薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第二节点和参考电压；
第四薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第三节点和电源高电压；
第一电容，其两端分别连接第一节点和第二节点；
第二电容，其两端分别连接第三节点和参考电压；
OLED，其阳极连接第二节点，阴极连接电源低电压；
其中，该电源高电压根据电源低电压确定，该电源高电压与电源低电压之间的差值保持不变，该参考电压小于OLED的开启电压。
其中，该扫描信号的时序配置为包括补偿阶段，以及发光阶段。
其中，在补偿阶段，该扫描信号为高电位。
其中，在发光阶段，该扫描信号为低电位。
其中，该参考电压保持不变。
其中，所述第一薄膜晶体管，第二薄膜晶体管，第三薄膜晶体管，以及第四薄膜晶体管为低温多晶硅薄膜晶体管或氧化物半导体薄膜晶体管。
本发明还提供了一种上述顶发射AMOLED像素电路的驱动方法，包括：该扫描信号的时序配置为包括补偿阶段，以及发光阶段。
其中，在补偿阶段，该扫描信号为高电位。
其中，在发光阶段，该扫描信号为低电位。
其中，该参考电压保持不变。
本发明还提供一种顶发射AMOLED像素电路，包括：
第一薄膜晶体管，其栅极连接第一节点，源极和漏极分别连接第二节 点和第三节点；
第二薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第一节点和数据信号；
第三薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第二节点和参考电压；
第四薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第三节点和电源高电压；
第一电容，其两端分别连接第一节点和第二节点；
第二电容，其两端分别连接第三节点和参考电压；
OLED，其阳极连接第二节点，阴极连接电源低电压；
其中，该电源高电压根据电源低电压确定，该电源高电压与电源低电压之间的差值保持不变，该参考电压小于OLED的开启电压；
其中，该扫描信号的时序配置为包括补偿阶段，以及发光阶段；
其中，在补偿阶段，该扫描信号为高电位；
其中，在发光阶段，该扫描信号为低电位；
其中，该参考电压保持不变。
综上，本发明的顶发射AMOLED像素电路及其驱动方法可以有效缓解透明阴极阻抗增大引起的IR压降，有效的解决了VSS电压抬升引起的电路失效，且保持了VDD和VSS的压差，未增加额外的功耗，适用于大尺寸顶发射AMOLED面板。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为传统AMOLED的3T1C像素电路示意图；
图2为本发明顶发射AMOLED像素电路一较佳实施例的电路示意图；
图3为本发明顶发射AMOLED像素电路一较佳实施例的信号时序示意图；
图4为传统顶发射3T1C像素电路VSS电压分布(假设)示意图。
具体实施方式
参见图2及图3，图2为本发明顶发射AMOLED像素电路一较佳实施例的电路示意图，图3为该较佳实施例的信号时序示意图，该较佳实施例 为4T2C像素电路，主要包括薄膜晶体管T1～T4，电容Cst和C，其中T1为驱动TFT：T1栅极连接节点G，源极和漏极分别连接节点S和D；T2栅极连接扫描信号Scan，源极和漏极分别连接节点G和数据信号Data1；T3栅极连接扫描信号Scan，源极和漏极分别连接节点S和参考电压Ref；T4栅极连接扫描信号Scan，源极和漏极分别连接节点D和电源高电压(Data2；电容Cst两端分别连接节点G和S；电容C两端分别连接节点D和参考电压Ref；OLED阳极连接节点S，阴极连接电源低电压(VSS)；在此较佳实施例中，电源高电压Data2根据电源低电压VSS确定，电源高电压Data2与电源低电压VSS之间的差值保持不变，参考电压Ref小于OLED的开启电压并且保持不变。
工作时，扫描信号Scan的时序配置为包括补偿阶段或者称为编程(Programing)阶段，以及发光(Emitting)阶段，在补偿阶段，该扫描信号Scan为高电位，在发光阶段，该扫描信号Scan为低电位。
Scan给高电位，T2，T3，T4打开，节点D写入电源高电压Data2，具体命名为VDD(为VSS的函数)，也就是VDD与VSS的关系可以表示为VDD＝f(VSS)，存储在电容C中；节点G写入数据信号Data1，节点S写入参考电压Ref(＜OLED开启电压)，Vgs＝Data1－Ref，此时OLED不发光。
Scan给低电位，T2，T3，T4关闭，由于电容C上存储VDD电压，可以作为电压源，通过在设计时预先将电容C的电容值合理取值，可以保证在一帧的时间内由电容C为OLED供电，故节点S被电容C上存储的VDD电压充电至VAnode，VAnode为OLED阳极电位，节点G被耦合(Couple)至Data+VAnode－Ref，此时Vgs＝Data－Ref，OLED开始发光。
由于本电路适用于大尺寸顶发射架构AMOLED面板，透明阴极阻抗非常高，VSS存在严重的IR压降，且越靠近面板中心越严重，所以将VDD设置为VSS的函数，根据VSS确定VDD的值，故驱动TFT T1可以满足Vgs－Vth＜VDD(＝f(VSS))－VAnode，此时T1工作在饱和区，面板可以正常驱动，VDD与VSS之间的函数关系f可以如图4所揭示，预先进行确定。
参见图4，其为传统顶发射3T1C像素电路VSS电压分布(假设)示意图。假设VDD初始电压20V，VSS初始电压0V，如透明阴极引起的VSS IR压降电压分布如图4中括号外字体所示，越靠近面板中心越大，则相应的VDD电压取值可以如括号内字体所示，使得各区域的VDD－VSS电压一致，从而未增加驱动功耗，且很好的解决了透明阴极阻抗高带来的IR压降。
本发明还相应提供了上述像素驱动电路的驱动方法，核心为引入独立控制的VDD电压，该电压和VSS的电压分布为对应关系；引入独立控制的VDD电压有效的解决了VSS电压抬升引起的电路失效，且通过保持VDD和VSS的压差，未增加额外的功耗；本发明的顶发射AMOLED像素电路及其驱动方法包含但不局限于低温多晶硅制程，氧化物半导体制程，任何可能的制程涉及的类似像素涉及方法均属于本发明保护范畴；本发明提出的4T2C像素电路TFT尺寸，电容值以及时序图允许一定的可变灵活度，任何在此基础上的变化均属于本发明的保护范畴。
综上，本发明的顶发射AMOLED像素电路及其驱动方法可以有效缓解透明阴极阻抗增大引起的IR压降，有效的解决了VSS电压抬升引起的电路失效，且保持了VDD和VSS的压差，未增加额外的功耗，适用于大尺寸顶发射AMOLED面板。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (12)

  1. 一种顶发射AMOLED像素电路，包括：
    第一薄膜晶体管，其栅极连接第一节点，源极和漏极分别连接第二节点和第三节点；
    第二薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第一节点和数据信号；
    第三薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第二节点和参考电压；
    第四薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第三节点和电源高电压；
    第一电容，其两端分别连接第一节点和第二节点；
    第二电容，其两端分别连接第三节点和参考电压；
    OLED，其阳极连接第二节点，阴极连接电源低电压；
    其中，该电源高电压根据电源低电压确定，该电源高电压与电源低电压之间的差值保持不变，该参考电压小于OLED的开启电压。
  2. 如权利要求1所述的顶发射AMOLED像素电路，其中，该扫描信号的时序配置为包括补偿阶段，以及发光阶段。
  3. 如权利要求2所述的顶发射AMOLED像素电路，其中，在补偿阶段，该扫描信号为高电位。
  4. 如权利要求2所述的顶发射AMOLED像素电路，其中，在发光阶段，该扫描信号为低电位。
  5. 如权利要求1所述的顶发射AMOLED像素电路，其中，该参考电压保持不变。
  6. 如权利要求1所述的顶发射AMOLED像素电路，其中，所述第一薄膜晶体管，第二薄膜晶体管，第三薄膜晶体管，以及第四薄膜晶体管为低温多晶硅薄膜晶体管或氧化物半导体薄膜晶体管。
  7. 一种如权利要求1所述的顶发射AMOLED像素电路的驱动方法，包括：该扫描信号的时序配置为包括补偿阶段，以及发光阶段。
  8. 如权利要求7所述的顶发射AMOLED像素电路的驱动方法，其中，在补偿阶段，该扫描信号为高电位。
  9. 如权利要求7所述的顶发射AMOLED像素电路的驱动方法，其中，在发光阶段，该扫描信号为低电位。
  10. 如权利要求7所述的顶发射AMOLED像素电路的驱动方法，其中，该参考电压保持不变。
  11. 一种顶发射AMOLED像素电路，包括：
    第一薄膜晶体管，其栅极连接第一节点，源极和漏极分别连接第二节点和第三节点；
    第二薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第一节点和数据信号；
    第三薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第二节点和参考电压；
    第四薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第三节点和电源高电压；
    第一电容，其两端分别连接第一节点和第二节点；
    第二电容，其两端分别连接第三节点和参考电压；
    OLED，其阳极连接第二节点，阴极连接电源低电压；
    其中，该电源高电压根据电源低电压确定，该电源高电压与电源低电压之间的差值保持不变，该参考电压小于OLED的开启电压；
    其中，该扫描信号的时序配置为包括补偿阶段，以及发光阶段；
    其中，在补偿阶段，该扫描信号为高电位；
    其中，在发光阶段，该扫描信号为低电位；
    其中，该参考电压保持不变。
  12. 如权利要求11所述的顶发射AMOLED像素电路，其中，所述第一薄膜晶体管，第二薄膜晶体管，第三薄膜晶体管，以及第四薄膜晶体管为低温多晶硅薄膜晶体管或氧化物半导体薄膜晶体管。
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