WO2019019494A1 - 一种偏置电路及功率放大电路 - Google Patents

一种偏置电路及功率放大电路 Download PDF

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Publication number
WO2019019494A1
WO2019019494A1 PCT/CN2017/112171 CN2017112171W WO2019019494A1 WO 2019019494 A1 WO2019019494 A1 WO 2019019494A1 CN 2017112171 W CN2017112171 W CN 2017112171W WO 2019019494 A1 WO2019019494 A1 WO 2019019494A1
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Prior art keywords
current
branch
switch
resistor
bias
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PCT/CN2017/112171
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English (en)
French (fr)
Inventor
李咏乐
苏强
徐柏鸣
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尚睿微电子（上海）有限公司
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Publication of WO2019019494A1 publication Critical patent/WO2019019494A1/zh
Priority to US16/666,329 priority Critical patent/US11005423B2/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216—Continuous control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/111—Indexing scheme relating to amplifiers the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a bias circuit and a power amplifying circuit.
  • Multi-frequency multi-mode RF power amplifiers amplify RF signals in The 2nd Generation (2G), 3rd Generation (3G) or 4th Generation (4G) mobile communication technologies
  • 2G 2nd Generation
  • 3G 3rd Generation
  • 4G 4th Generation
  • the power amplifier operating in 2G mode requires a large bias current, so that the power amplifier works in the Class A power amplifier mode, and thus obtains better output power and linearity; the power amplifiers operating in 3G and 4G modes need to be compared.
  • a small bias current allows the power amplifier to operate in Class A and Class B power amplifier modes, resulting in better efficiency and linearity compatibility.
  • power amplifiers compatible with different modes such as 2G, 3G, and 4G have different bias currents when they have better performance in different modes such as 2G, 3G, and 4G.
  • a fixed bias circuit is generally used in the related art to provide a base bias current for power amplifiers compatible with different modes such as 2G, 3G, and 4G.
  • the fixed bias circuit is fixed relative to the RF impedance of the base of the power amplifier, thereby providing a fixed base current to the power amplifier. Therefore, power amplifiers compatible with different modes such as 2G, 3G, and 4G can achieve optimal performance in only one mode.
  • the embodiments of the present invention provide a bias circuit and a power amplifying circuit.
  • the embodiment of the invention provides a bias circuit, comprising: a first branch, a second branch, a current amplifier and a switch; wherein
  • the first branch is configured to split the input first current and input the first branch current of the first current into the power ground;
  • the second branch is configured to split the input first current and input the second branch current of the first current into the current amplifier
  • the current amplifier is configured to receive the second branch current and amplify the second branch current as a bias current output of a power amplifier connected to the bias circuit;
  • the switch is configured to switch different resistances for the resistance in the first branch, and/or to switch different resistances for the resistance in the second branch.
  • the current amplifier includes a transistor, and a collector of the transistor is connected to a positive pole of a power supply of a direct current power source, and the transistor is configured to amplify the received second branch current as a connection with the bias circuit.
  • the bias current output of the power amplifier is configured to amplify the received second branch current as a connection with the bias circuit.
  • the first branch includes a first resistor
  • the switch is connected in parallel with the first resistor, or the second branch includes a second resistor, and the switch is connected in parallel with the second resistor.
  • the first branch includes a first resistor
  • the second branch includes a second resistor
  • the switch includes a first sub-switch and a second sub-switch, the first sub-switch is connected in parallel with the first resistor, and the second sub-switch is connected in parallel with the second resistor.
  • the emitter of the transistor is connected to the base of the power amplifier of the power amplifying circuit through a third resistor.
  • the first branch includes a series connection in the forward direction along the first branch current direction. At least one diode.
  • the switch is a heterojunction bipolar transistor (HBT), a metal-oxide semiconductor field effect transistor (MOSFET), or a high electron mobility transistor (HEMT).
  • HBT heterojunction bipolar transistor
  • MOSFET metal-oxide semiconductor field effect transistor
  • HEMT high electron mobility transistor
  • the shunt point connected to the first branch and the second branch is connected to the power ground through a first capacitor.
  • the diode is connected between the first resistor and the power ground, or the first resistor is connected between the diode and the power ground.
  • An embodiment of the present invention further provides a power amplifying circuit, including a power amplifier, and a bias circuit in the foregoing technical solution;
  • the bias circuit is coupled to the power amplifier and configured to input a bias current to the power amplifier
  • the power amplifier is configured to perform corresponding amplification processing on the input radio frequency signal according to the bias current, and then output.
  • the bias circuit includes a current amplifier, a switch, and a first branch and a second branch configured to split the input first current; wherein the current amplifier receives The second branch current of the first current is amplified and then used as a bias current output of the power amplifier connected to the bias circuit; the switch is a resistor in the first branch or the second branch to switch different resistance values.
  • the opening and closing of the switch can change the resistance of the resistor in the first branch or the second branch, thereby changing the RF impedance of the bias circuit relative to the base of the power amplifier, and changing the bias
  • the magnitude of the bias current supplied to the power amplifier by the circuit improves the performance of the power amplifier circuit.
  • FIG. 1 is a schematic structural diagram of a circuit of a power amplifying circuit in the related art
  • FIG. 2 is a schematic structural diagram of a circuit of a power amplifying circuit according to an embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a circuit of a power amplifying circuit according to Embodiment 2 of the present invention.
  • FIG. 4 is a schematic structural diagram of a circuit composition of a power amplifier circuit according to a third embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a circuit of a power amplifier circuit according to Embodiment 4 of the present invention.
  • the bias circuit includes a first branch, a second branch, a current amplifier, and a switch; wherein the first branch is configured to shunt the input first current and the first current The first branch current is input to the power ground; the second branch is configured to shunt the input first current, and the second branch current of the first current is input to the current amplifier; the current amplifier is configured to receive the second branch of the first current Current, and amplifying the second branch current of the first current as a bias current output of the power amplifier connected to the bias circuit; the switch is configured to switch different resistance values for the resistance in the first branch, and / Or, switch the resistance value for the resistance in the second branch.
  • the resistance of the first branch or the second branch is different, the bias circuit is different from the RF impedance of the base of the power amplifier, and the bias circuit provides a bias to the power amplifier.
  • the current is also different in size, so that the power amplifier bias current can be effectively and flexibly controlled, so that power amplifiers compatible with different modes such as 2G, 3G, and 4G have better performance in different modes such as 2G, 3G, and 4G.
  • the bias circuit provided by the embodiment of the present invention can make the impedance of the radio frequency signal at the base different. Under the broadband modulated signals of 3G and 4G, when the impedance of the modulation signal of the bias circuit is small, the circuit is advantageously reduced. The memory effect enables optimal RF performance in different mode states.
  • FIG. 2 is a schematic structural diagram of a circuit of a bias circuit according to an embodiment of the present invention.
  • the first branch and the second branch in the bias circuit provided by the embodiment of the present invention are connected to the split point A.
  • the first branch and the second branch divide the current Ib supplied from the current source into the first branch current Ib1 and the second branch current Ib2.
  • the shunt point A connected to the first branch and the second branch is connected to the power ground through the first capacitor C1, and the function of C1 is to provide a radio frequency reference ground for the input bias.
  • the first branch includes two diodes D1 and D2 connected in series in the forward direction of the first branch current Ib1 and a first resistor R1 connected between the diodes D1 and D2 and the power ground.
  • the first branch current Ib1 is input to the power ground through the first branch.
  • the switch S1 is connected in parallel with the first resistor R1.
  • the switch S1 can be implemented with a power device such as an HBT, MOSFET or HEMT.
  • the second branch current Ib2 is input to the base of the transistor T1 having current amplification through the second branch.
  • the collector of the transistor T1 is connected to the positive terminal of the power supply of the DC power supply VBAT, and the transistor T1 is configured to amplify the second branch current Ib2 received by the base of the transistor T1, and then the bias current of the power amplifier M1 connected to the bias circuit is used by the transistor.
  • the emitter of the transistor is connected to the base of the power amplifier of the power amplifying circuit through a third resistor R3.
  • the current supplied by the current source Ib is divided into two parts Ib1 and Ib2 at the node A, and the current is amplified by the transistor T1 into Ib2* ⁇ 1 and then output to the power amplifier M1 through the RF resistor RFballast.
  • the base, the base bias current Ibase Ib2* ⁇ 1 provided for the power amplifier M1.
  • the magnitude ratio of the currents Ib1 and Ib2 after the node A is shunted is determined by the resistors R1, R3 and RFballast.
  • the second branch current Ib2 is larger.
  • the magnitude of the current Ib2 is used to control the bias current of the power amplifier M1. Specifically, when the parameters of R3 and RFballast are fixed, when the switch S1 is turned off, the resistance value of the first branch is R1, and the second branch current Ib2 is maximum, which can be in 2G mode.
  • the power amplifier provides a bias current; when the switch S1 is closed, the resistance of the first branch is zero, and the second branch current Ib2 is minimum, which provides a bias current for the power amplifiers in the 3G and 4G modes.
  • the impedance at point A will be different, so that the impedance of the RF signal at the base is different in different modes, and the modulation signal impedance of the bias circuit is under the wideband modulated signals of 3G and 4G. Lower, it is beneficial to reduce the memory effect of the circuit.
  • the bias circuit includes a current amplifier, a switch, and a first branch and a second branch configured to split the input first current; wherein the current amplifier receives the first current
  • the second branch current is amplified and used as a bias current output of the power amplifier connected to the bias circuit;
  • the switch is a resistor in the first branch or the second branch to switch different resistance values.
  • the opening and closing of the switch can change the resistance of the resistor in the first branch or the second branch, thereby changing the RF impedance of the bias circuit relative to the base of the power amplifier, and changing the bias
  • the magnitude of the bias current supplied to the power amplifier provides a different bias current for power amplifiers compatible with different modes such as 2G, 3G, and 4G, improving the performance of the power amplifier circuit.
  • the embodiment of the present invention is similar to the first embodiment except that, as shown in FIG. 3, in the embodiment of the present invention, the diodes D1 and D2 are connected between the first resistor R1 and the power ground.
  • the bias circuit provided by the embodiment of the present invention can also provide different bias currents for power amplifiers compatible with different modes such as 2G, 3G, and 4G, and improve the performance of the power amplifying circuit.
  • FIG. 4 is a schematic structural diagram of a circuit of a bias circuit according to an embodiment of the present invention.
  • the first branch and the second branch in the bias circuit provided by the embodiment of the present invention are connected to the split point A.
  • the first branch and the second branch divide the current Ib supplied from the current source into the first branch current Ib1 and the second branch current Ib2.
  • the shunt point A connected to the first branch and the second branch is connected to the power ground through the first capacitor C1, and the function of the first capacitor C1 is to provide a radio frequency reference ground for the input bias.
  • the first branch includes two diodes D1 and D2 connected in series in the forward direction of the first branch current Ib1 and a first resistor R1 connected between the diodes D1 and D2 and the power ground.
  • the first branch current Ib1 is input to the power ground through the first branch.
  • the second branch includes a second resistor R2, and a switch S2 is connected in parallel across the second resistor R2.
  • the switch S2 can be implemented with a power device such as an HBT, MOSFET or HEMT.
  • the second branch current Ib2 is input to the base of the transistor T1 having current amplification through the second branch.
  • the collector of the transistor T1 is connected to the positive terminal of the power supply of the DC power supply VBAT, and the transistor T1 is configured to amplify the second branch current Ib2 received by the base of the transistor T1, and then the bias current of the power amplifier M1 connected to the bias circuit is used by the transistor.
  • the emitter of the transistor is connected to the base of the power amplifier of the power amplifying circuit through a third resistor R3.
  • the current supplied by the current source Ib is divided into a first branch current Ib1 and a second branch current Ib2 at the node A, and the second branch current Ib2 is amplified by the transistor T1 to be Ib2*.
  • the base bias current Ibase Ib2* ⁇ 1 provided by the power amplifier M1.
  • the magnitude ratio of the first branch current Ib1 and the second branch current Ib2 after the node A is shunted is determined by the resistors R1, R2, R3 and RFballast.
  • the larger the resistor R1 is, the resistor R2, R3 or RFballast The smaller the smaller the first branch current Ib1, the larger the second branch current Ib2.
  • the resistance of the resistor R2 can be changed, thereby changing the magnitude of the second branch current Ib2 to achieve control of the bias current of the power amplifier M1.
  • the resistance value of the second branch is 0, and the second branch current Ib2 is maximum, which can be 2G mode.
  • the power amplifier provides a bias current; when the switch S2 is turned off, the second branch has a resistance value of R2, and the second branch current Ib2 is minimum, which provides a bias current for the power amplifiers in the 3G and 4G modes. .
  • the impedance of point A will be different, so that the impedance of the RF signal at the base is different in different modes, and the modulation signal impedance of the bias circuit is under the wideband modulated signals of 3G and 4G. Lower, it is beneficial to reduce the memory effect of the circuit.
  • the bias circuit provided by the embodiment of the present invention can also provide different bias currents for power amplifiers compatible with different modes such as 2G, 3G, and 4G, and improve the performance of the power amplifying circuit.
  • FIG. 5 is a schematic structural diagram of a circuit of a bias circuit according to an embodiment of the present invention.
  • a first branch and a second branch in a bias circuit according to an embodiment of the present invention are connected to a split point A.
  • the first branch and the second branch divide the current Ib supplied from the current source into the first branch current Ib1 and the second branch current Ib2.
  • the shunt point A connected to the first branch and the second branch is connected to the power ground through the first capacitor C1, and the function of the first capacitor C1 is to provide a radio frequency reference ground for the input bias.
  • the first branch includes two diodes D1 and D2 connected in series in the forward direction of the first branch current Ib1 and a first resistor R1 connected between the diodes D1 and D2 and the power ground.
  • the first branch current Ib1 is input to the power ground through the first branch.
  • a first sub-switch S1 is connected in parallel across the first resistor R1.
  • the first sub-switch S1 can be implemented with a power device such as an HBT, MOSFET or HEMT.
  • the second branch includes a second resistor R2, and a second sub-switch S2 is connected in parallel across the second resistor R2.
  • the second sub-switch S2 can be implemented with a power device such as an HBT, MOSFET or HEMT.
  • the second branch current Ib2 is input to the base of the transistor T1 having current amplification through the second branch.
  • the collector of the transistor T1 is connected to the positive terminal of the power supply of the DC power supply VBAT, and the transistor T1 is configured to amplify the second branch current Ib2 received by the base of the transistor T1, and then the bias current of the power amplifier M1 connected to the bias circuit is used by the transistor.
  • the emitter of the transistor is connected to the base of the power amplifier of the power amplifying circuit through a third resistor R3.
  • the current supplied by the current source Ib is divided into a first branch current Ib1 and a second branch current Ib2 at the node A, and the second branch current Ib2 is amplified by the transistor T1 to be Ib2*.
  • the base bias current Ibase Ib2* ⁇ 1 provided by the power amplifier M1.
  • the magnitude ratio of the first branch current Ib1 and the second branch current Ib2 after the node A is shunted is determined by the resistors R1, R2, R3 and RFballast.
  • the switching of the first sub-switch S1 and the second sub-switch S2 can change the resistance values of the resistors R1 and R2, thereby changing the magnitude of the second branch current Ib2 to achieve control of the bias current of the power amplifier M1.
  • the resistance value of the first branch is R1
  • the second branch current Ib2 is the maximum, which can provide a bias current for the power amplifier in the 2G mode; when the first sub-switch S1 is closed and the second sub-switch S2 is disconnected, the first branch The resistance value of the circuit is 0, and the resistance value of the second branch is R2.
  • the second branch current Ib2 is the minimum, which can provide a bias current for the power amplifier in the 3G and 4G modes.
  • the impedance of the point A will be different, so that the impedance of the radio frequency signal at the base is different in different modes, under the broadband modulated signals of 3G and 4G.
  • the bias circuit has a lower modulation signal impedance, which is beneficial to reduce the memory effect of the circuit.
  • the bias circuit provided by the embodiment of the present invention can also provide different bias currents for power amplifiers compatible with different modes such as 2G, 3G, and 4G, and improve the performance of the power amplifying circuit.
  • Embodiments of the present invention provide a power amplifying circuit including a power amplifier and a bias circuit;
  • a bias circuit coupled to the power amplifier and configured to input a bias current to the power amplifier
  • the power amplifier is configured to perform corresponding amplification processing on the input RF signal according to the bias current and output.
  • the bias circuit may adopt the composition and function of the bias circuit described in the above technical solutions.
  • a bias circuit as shown in FIG. 2 may be employed, specifically:
  • the first branch and the second branch in the bias circuit are connected to the shunt point A.
  • the first branch and the second branch divide the current Ib supplied from the current source into the first branch current Ib1 and the second branch current Ib2.
  • the first branch includes two diodes D1 and D2 connected in series in the forward direction of the first branch current Ib1 and a first resistor R1.
  • the first branch current Ib1 is input to the power ground through the first branch.
  • the switch S1 is connected in parallel with the first resistor R1.
  • the second branch current Ib2 is input to the base of the transistor T1 having current amplification through the second branch.
  • the collector of the transistor T1 is connected to the positive terminal of the power supply of the DC power supply VBAT, and the transistor T1 is configured to amplify the second branch current Ib2 received by the base of the transistor T1, and then the bias current of the power amplifier M1 connected to the bias circuit is used by the transistor.
  • the bias circuit in the power amplifying circuit provided by the embodiment of the present invention includes a current amplifier, a switch, and a first branch and a second branch configured to shunt the input first current; wherein the current amplifier receives the first current
  • the second branch current is amplified and used as a bias current output of the power amplifier connected to the bias circuit
  • the switch is a resistor in the first branch or the second branch to switch different resistance values.
  • the first branch and the second branch of the bias circuit divide the input first current; the current amplifier of the bias circuit receives the second branch current of the first current and then amplifies the second current As a bias current output of the power amplifier connected to the bias circuit; the switching switch of the bias circuit switches the resistance of the resistor in at least one of the first branch and the second branch to a different value.
  • the opening and closing of the switch can change the resistance of the resistor in the first branch or the second branch, thereby changing the RF impedance of the bias circuit relative to the base of the power amplifier, and changing the bias
  • the magnitude of the bias current supplied to the power amplifier by the circuit improves the performance of the power amplifier circuit.

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  • Physics & Mathematics (AREA)
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  • Amplifiers (AREA)

Abstract

一种偏置电路，包括第一支路、第二支路、电流放大器及切换开关；其中，所述第一支路，配置为将输入的第一电流分流，并将所述第一电流的第一分支电流输入电源地；所述第二支路，配置为将输入的第一电流分流，并将所述第一电流的第二分支电流输入所述电流放大器；所述电流放大器，配置为接收所述第一电流的第二分支电流，并将所述第一电流的第二分支电流放大后作为与所述偏置电路连接的功率放大器的偏置电流输出；所述切换开关，配置为为所述第一支路中的电阻切换不同的阻值，和/或，为所述第二支路中的电阻切换不同的阻值。

Description

一种偏置电路及功率放大电路
相关申请的交叉引用
本申请基于申请号为201710606552.0、申请日为2017年07月24日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本发明涉及电子技术领域，尤其涉及一种偏置电路及功率放大电路。
背景技术
多频多模射频功率放大器在对第二代(The 2nd Generation，2G)、第三代(The 3rd Generation，3G)或第四代(The 4th Generation，4G)移动通信技术中的射频信号进行放大时，功率放大器需要工作在不同的状态。其中，工作在2G模式的功率放大器需要较大的偏置电流，以使功率放大器工作在甲类功放模式，进而获得较好的输出功率和线性度；工作在3G和4G模式的功率放大器需要较小的偏置电流，以使功率放大器工作在甲乙类功放模式，进而获得较好的效率与线性度兼容。也就是说，兼容2G、3G和4G等不同模式的功率放大器在2G、3G和4G等不同模式下均具有较佳性能时的偏置电流不同。
如图1所示，相关技术中通常使用固定偏置电路为兼容2G、3G和4G等不同模式的功率放大器提供基极偏置电流。该固定偏置电路相对于功率放大器的基极的射频阻抗固定，从而提供给功率放大器的基极电流固定。因此，兼容2G、3G和4G等不同模式的功率放大器只能在一种模式下实现最优性能。
发明内容
有鉴于此，本发明实施例提供一种偏置电路及功率放大电路。
本发明实施例提供了一种偏置电路，包括：第一支路、第二支路、电流放大器及切换开关；其中，
所述第一支路，配置为将输入的第一电流分流，并将所述第一电流的第一分支电流输入电源地；
所述第二支路，配置为将输入的第一电流分流，并将所述第一电流的第二分支电流输入所述电流放大器；
所述电流放大器，配置为接收所述第二分支电流，并将所述第二分支电流放大后作为与所述偏置电路连接的功率放大器的偏置电流输出；
所述切换开关，配置为为所述第一支路中的电阻切换不同的阻值，和/或，为所述第二支路中的电阻切换不同的阻值。
上述方案中，所述电流放大器包括晶体管，所述晶体管的集电极与直流电源的电源正极连接，所述晶体管配置为将接收到的所述第二分支电流放大后作为与所述偏置电路连接的功率放大器的偏置电流输出。
上述方案中，所述第一支路包括第一电阻；
所述切换开关与所述第一电阻并联，或者，所述第二支路包括第二电阻，所述切换开关与所述第二电阻并联。
上述方案中，所述第一支路包括第一电阻，所述第二支路包括第二电阻；
所述切换开关包括第一子开关和第二子开关，所述第一子开关与所述第一电阻并联，所述第二子开关与所述第二电阻并联。
上述方案中，所述晶体管的发射极通过第三电阻与所述功率放大电路的功率放大器的基极连接。
上述方案中，所述第一支路包括沿所述第一分支电流方向正向串联的 至少一个二极管。
上述方案中，所述切换开关为异质结双极晶体管(HBT)、或为金属-氧化物半导体场效应晶体管(MOSFET)、或为高电子迁移率晶体管(HEMT)。
上述方案中，所述第一支路与所述第二支路相连接的分流点通过第一电容与所述电源地连接。
上述方案中，所述二极管连接于所述第一电阻和所述电源地之间，或者，所述第一电阻连接于所述二极管和所述电源地之间。
本发明实施例还提供了一种功率放大电路，包括功率放大器、以及上述技术方案中的偏置电路；其中，
所述偏置电路，与所述功率放大器连接，配置为向所述功率放大器输入偏置电流；
所述功率放大器，配置为根据所述偏置电流将输入的射频信号进行相应放大处理后输出。
本发明实施例所提供的偏置电路及功率放大电路，偏置电路包括电流放大器、切换开关及配置为将输入的第一电流分流的第一支路和第二支路；其中，电流放大器接收第一电流的第二分支电流后将其放大后作为与偏置电路连接的功率放大器的偏置电流输出；切换开关为第一支路或第二支路中的电阻切换不同的阻值。采用该方案时，切换开关的开启和闭合可以改变第一支路或第二支路中电阻的阻值，从而改变了该偏置电路相对于功率放大器基极的射频阻抗，并改变了偏置电路提供给功率放大器的偏置电流的大小，改善了功率放大电路的性能。
附图说明
图1为相关技术中功率放大电路的电路组成结构示意图；
图2为本发明实施例一功率放大电路的电路组成结构示意图；
图3为本发明实施例二功率放大电路的电路组成结构示意图；
图4为本发明实施例三功率放大电路的电路组成结构示意图；
图5为本发明实施例四功率放大电路的电路组成结构示意图。
具体实施方式
在本发明实施例中，偏置电路包括第一支路、第二支路、电流放大器及切换开关；其中，第一支路，配置为将输入的第一电流分流，并将第一电流的第一分支电流输入电源地；第二支路，配置为将输入的第一电流分流，并将第一电流的第二分支电流输入电流放大器；电流放大器，配置为接收第一电流的第二分支电流，并将第一电流的第二分支电流放大后作为与偏置电路连接的功率放大器的偏置电流输出；切换开关，配置为为第一支路中的电阻切换不同的阻值，和/或，为第二支路中的电阻切换不同的阻值。
这样，切换开关处于不同的开启和闭合状态时，第一支路或第二支路的阻值不同，偏置电路相对于功率放大器基极的射频阻抗不同，偏置电路提供给功率放大器的偏置电流的大小也不同，从而有效灵活地实现对功率放大器偏置电流的控制，使得兼容2G、3G和4G等不同模式的功率放大器在2G、3G和4G等不同模式下均具有较佳性能。
此外，采用本发明实施例提供的偏置电路可以使得射频信号在基极的阻抗不同，在3G和4G的宽带调制信号下，当偏置电路的调制信号的阻抗较小时，有利于减小电路的记忆效应，使不同模式状态下，射频性能都能达到最佳。
为了能够更加详尽地了解本发明的特点与技术内容，下面结合附图对本发明的实现进行详细阐述，所附附图仅供参考说明之用，并非用来限定本发明。
实施例一
图2为本发明实施例中偏置电路的电路组成结构示意图，如图2所示，本发明实施例提供的偏置电路中的第一支路和第二支路连接于分流点A。第一支路和第二支路将电流源提供的电流Ib分流为第一分支电流Ib1和第二分支电流Ib2。第一支路与第二支路相连接的分流点A通过第一电容C1与电源地连接，C1的作用是为输入偏置提供射频参考地。
第一支路包括沿第一分支电流Ib1方向正向串联的两个二极管D1和D2以及第一电阻R1，第一电阻R1连接于二极管D1和D2和电源地之间。第一分支电流Ib1通过第一支路输入电源地。其中，第一电阻R1两端并联有切换开关S1。切换开关S1可以用HBT、MOSFET或HEMT等功率器件实现。
第二分支电流Ib2通过第二支路输入具有电流放大作用的晶体管T1的基极。晶体管T1的集电极与直流电源VBAT的电源正极连接，晶体管T1配置为将晶体管T1基极接收到的第二分支电流Ib2放大，之后作为与偏置电路连接的功率放大器M1的偏置电流由晶体管T1的发射极输出。
如图2所示，晶体管的发射极通过第三电阻R3与功率放大电路的功率放大器的基极连接。
本发明实施例提供的偏置电路中，电流源Ib提供的电流在节点A处分为Ib1和Ib2两部分，Ib2通过晶体管T1将电流放大为Ib2*β1后通过射频电阻RFballast输出给功率放大器M1的基极，为功率放大器M1提供的基极偏置电流Ibase＝Ib2*β1。在晶体管T1和二极管D1和D2参数固定的情况下，节点A分流后的电流Ib1和Ib2的大小比例由电阻R1、R3和RFballast所决定。电阻R1越小，电阻R3或RFballast越大，第一分支电流Ib1就越大，第二分支电流Ib2就越小；电阻R1越大，电阻R3或RFballast越小，第一分支电流Ib1就越小，第二分支电流Ib2就越大。
通过切换开关S1的切换可以改变电阻R1的阻值，进而改变第二分支 电流Ib2的大小，以实现对功率放大器M1的偏置电流的控制。具体地，电阻在R3和RFballast的参数都固定的情况下，当切换开关S1断开时，第一支路的电阻值为R1，此时第二分支电流Ib2为最大，可为2G模式下的功率放大器提供偏置电流；当切换开关S1闭合时，第一支路的电阻值为0，此时第二分支电流Ib2为最小，可为3G和4G模式下的功率放大器提供偏置电流。
此外，切换开关S1断开和闭合时，A点阻抗会有所不同，从而不同模式下，射频信号在基极的阻抗不同，在3G和4G的宽带调制信号下，偏置电路的调制信号阻抗较低，有利于减小电路的记忆效应。
本发明实施例所提供的偏置电路，偏置电路包括电流放大器、切换开关及配置为将输入的第一电流分流的第一支路和第二支路；其中，电流放大器接收第一电流的第二分支电流后将其放大后作为与偏置电路连接的功率放大器的偏置电流输出；切换开关为第一支路或第二支路中的电阻切换不同的阻值。采用该方案时，切换开关的开启和闭合可以改变第一支路或第二支路中电阻的阻值，从而改变了该偏置电路相对于功率放大器基极的射频阻抗，并改变了偏置电路提供给功率放大器的偏置电流的大小，能够为兼容2G、3G和4G等不同模式的功率放大器提供大小不同的偏置电流，改善了功率放大电路的性能。
实施例二
本发明实施例和实施例一相似，区别在于，如图3所示，本发明实施例中，二极管D1和D2连接于第一电阻R1和电源地之间。
与实施例一相同，本发明实施例提供的偏置电路也可为兼容2G、3G和4G等不同模式的功率放大器提供大小不同的偏置电流，改善了功率放大电路的性能。
实施例三
图4为本发明实施例中偏置电路的电路组成结构示意图，如图4所示，本发明实施例提供的偏置电路中的第一支路和第二支路连接于分流点A。第一支路和第二支路将电流源提供的电流Ib分流为第一分支电流Ib1和第二分支电流Ib2。第一支路与第二支路相连接的分流点A通过第一电容C1与电源地连接，第一电容C1的作用是为输入偏置提供射频参考地。
第一支路包括沿第一分支电流Ib1方向正向串联的两个二极管D1和D2以及第一电阻R1，第一电阻R1连接于二极管D1和D2和电源地之间。第一分支电流Ib1通过第一支路输入电源地。
第二支路包括第二电阻R2，第二电阻R2两端并联有切换开关S2。切换开关S2可以用HBT、MOSFET或HEMT等功率器件实现。
第二分支电流Ib2通过第二支路输入具有电流放大作用的晶体管T1的基极。晶体管T1的集电极与直流电源VBAT的电源正极连接，晶体管T1配置为将晶体管T1基极接收到的第二分支电流Ib2放大，之后作为与偏置电路连接的功率放大器M1的偏置电流由晶体管T1的发射极输出。
如图4所示，晶体管的发射极通过第三电阻R3与功率放大电路的功率放大器的基极连接。
本发明实施例提供的偏置电路中，电流源Ib提供的电流在节点A处分为第一分支电流Ib1和第二分支电流Ib2两部分，第二分支电流Ib2通过晶体管T1将电流放大为Ib2*β1后通过射频电阻RFballast输出给功率放大器M1的基极，为功率放大器M1提供的基极偏置电流Ibase＝Ib2*β1。在晶体管T1和二极管D1和D2参数固定的情况下，节点A分流后的第一分支电流Ib1和第二分支电流Ib2的大小比例由电阻R1、R2、R3和RFballast所决定。电阻R1越小，电阻R2、R3或RFballast越大，第一分支电流Ib1就越大，第二分支电流Ib2就越小；电阻R1越大，电阻R2、R3或RFballast 越小，第一分支电流Ib1就越小，第二分支电流Ib2就越大。
通过切换开关S2的切换可以改变电阻R2的阻值，进而改变第二分支电流Ib2的大小，以实现对功率放大器M1的偏置电流的控制。具体地，在电阻R1、R3和RFballast的参数都固定的情况下，当切换开关S2闭合时，第二支路的电阻值为0，此时第二分支电流Ib2为最大，可为2G模式下的功率放大器提供偏置电流；当切换开关S2断开时，第二支路的电阻值为R2，此时第二分支电流Ib2为最小，可为3G和4G模式下的功率放大器提供偏置电流。
此外，切换开关S2断开和闭合时，A点阻抗会有所不同，从而不同模式下，射频信号在基极的阻抗不同，在3G和4G的宽带调制信号下，偏置电路的调制信号阻抗较低，有利于减小电路的记忆效应。
与实施例一相同，本发明实施例提供的偏置电路也可为兼容2G、3G和4G等不同模式的功率放大器提供大小不同的偏置电流，改善了功率放大电路的性能。
实施例四
图5为本发明实施例中偏置电路的电路组成结构示意图，如图5所示，本发明实施例提供的偏置电路中的第一支路和第二支路连接于分流点A。第一支路和第二支路将电流源提供的电流Ib分流为第一分支电流Ib1和第二分支电流Ib2。第一支路与第二支路相连接的分流点A通过第一电容C1与电源地连接，第一电容C1的作用是为输入偏置提供射频参考地。
第一支路包括沿第一分支电流Ib1方向正向串联的两个二极管D1和D2以及第一电阻R1，第一电阻R1连接于二极管D1和D2和电源地之间。第一分支电流Ib1通过第一支路输入电源地。第一电阻R1两端并联有第一子开关S1。第一子开关S1可以用HBT、MOSFET或HEMT等功率器件实现。
第二支路包括第二电阻R2，第二电阻R2两端并联有第二子开关S2。第二子开关S2可以用HBT、MOSFET或HEMT等功率器件实现。
第二分支电流Ib2通过第二支路输入具有电流放大作用的晶体管T1的基极。晶体管T1的集电极与直流电源VBAT的电源正极连接，晶体管T1配置为将晶体管T1基极接收到的第二分支电流Ib2放大，之后作为与偏置电路连接的功率放大器M1的偏置电流由晶体管T1的发射极输出。
如图5所示，晶体管的发射极通过第三电阻R3与功率放大电路的功率放大器的基极连接。
本发明实施例提供的偏置电路中，电流源Ib提供的电流在节点A处分为第一分支电流Ib1和第二分支电流Ib2两部分，第二分支电流Ib2通过晶体管T1将电流放大为Ib2*β1后通过射频电阻RFballast输出给功率放大器M1的基极，为功率放大器M1提供的基极偏置电流Ibase＝Ib2*β1。在晶体管T1和二极管D1和D2参数固定的情况下，节点A分流后的第一分支电流Ib1和第二分支电流Ib2的大小比例由电阻R1、R2、R3和RFballast所决定。电阻R1越小，电阻R2、R3或RFballast越大，第一分支电流Ib1就越大，第一分支电流Ib2就越小；电阻R1越大，电阻R2、R3或RFballast越小，第一分支电流Ib1就越小，第二分支电流Ib2就越大。
通过第一子开关S1和第二子开关S2的切换可以改变电阻R1和R2的阻值，进而改变第二分支电流Ib2的大小，以实现对功率放大器M1的偏置电流的控制。具体地，在电阻R1、R2、R3和RFballast的参数都固定的情况下，当第一子开关S1断开且第二子开关S2闭合时，第一支路的电阻值为R1，第二支路的电阻值为0，此时第二分支电流Ib2为最大，可为2G模式下的功率放大器提供偏置电流；当第一子开关S1闭合且第二子开关S2断开时，第一支路的电阻值为0，第二支路的电阻值为R2，此时第二分支电流Ib2为最小，可为3G和4G模式下的功率放大器提供偏置电流。
此外，第一子开关S1和第二子开关S2断开和闭合时，A点阻抗会有所不同，从而不同模式下，射频信号在基极的阻抗不同，在3G和4G的宽带调制信号下，偏置电路的调制信号阻抗较低，有利于减小电路的记忆效应。
与实施例一相同，本发明实施例提供的偏置电路也可为兼容2G、3G和4G等不同模式的功率放大器提供大小不同的偏置电流，改善了功率放大电路的性能。
实施例五
本发明实施例提供一种功率放大电路，功率放大电路包括功率放大器、以及偏置电路；其中，
偏置电路，与功率放大器连接，配置为向功率放大器输入偏置电流；
功率放大器，配置为根据偏置电流将输入的射频信号进行相应放大处理后输出。
这里，所述偏置电路可采用上述技术方案中描述的偏置电路的组成及功能，比如：可采用如图2所示的偏置电路，具体地：
如图2所示，偏置电路中的第一支路和第二支路连接于分流点A。第一支路和第二支路将电流源提供的电流Ib分流为第一分支电流Ib1和第二分支电流Ib2。
第一支路包括沿第一分支电流Ib1方向正向串联的两个二极管D1和D2以及第一电阻R1。第一分支电流Ib1通过第一支路输入电源地。其中，第一电阻R1两端并联有切换开关S1。
第二分支电流Ib2通过第二支路输入具有电流放大作用的晶体管T1的基极。晶体管T1的集电极与直流电源VBAT的电源正极连接，晶体管T1配置为将晶体管T1基极接收到的第二分支电流Ib2放大，之后作为与偏置电路连接的功率放大器M1的偏置电流由晶体管T1的发射极输出。
本发明实施例所提供的功率放大电路中的偏置电路包括电流放大器、切换开关及配置为将输入的第一电流分流的第一支路和第二支路；其中，电流放大器接收第一电流的第二分支电流后将其放大后作为与偏置电路连接的功率放大器的偏置电流输出；切换开关为第一支路或第二支路中的电阻切换不同的阻值。采用该方案时，切换开关的开启和闭合可以改变第一支路或第二支路中电阻的阻值，从而改变了该偏置电路相对于功率放大器基极的射频阻抗，并改变了偏置电路提供给功率放大器的偏置电流的大小，改善了功率放大电路的性能。
以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。
工业实用性
本发明实施例所提供的方案，偏置电路的第一支路和第二支路将输入的第一电流分流；偏置电路的电流放大器接收第一电流的第二分支电流后将其放大后作为与偏置电路连接的功率放大器的偏置电流输出；偏置电路的切换开关为第一支路和第二支路中至少一个支路中的电阻切换不同的阻值。采用该方案时，切换开关的开启和闭合可以改变第一支路或第二支路中电阻的阻值，从而改变了该偏置电路相对于功率放大器基极的射频阻抗，并改变了偏置电路提供给功率放大器的偏置电流的大小，改善了功率放大电路的性能。

Claims (10)

  1. 一种偏置电路，包括：第一支路、第二支路、电流放大器及切换开关；其中，
    所述第一支路，配置为将输入的第一电流分流，并将所述第一电流的第一分支电流输入电源地；
    所述第二支路，配置为将输入的第一电流分流，并将所述第一电流的第二分支电流输入所述电流放大器；
    所述电流放大器，配置为接收所述第二分支电流，并将所述第二分支电流放大后作为与所述偏置电路连接的功率放大器的偏置电流输出；
    所述切换开关，配置为为所述第一支路中的电阻切换不同的阻值，和/或，为所述第二支路中的电阻切换不同的阻值。
  2. 根据权利要求1所述的偏置电路，其中，所述电流放大器包括晶体管，所述晶体管的集电极与直流电源的电源正极连接，所述晶体管配置为将接收到的所述第二分支电流放大后作为与所述偏置电路连接的功率放大器的偏置电流输出。
  3. 根据权利要求1或2所述的偏置电路，其中，所述第一支路包括第一电阻；
    所述切换开关与所述第一电阻并联，或者，所述第二支路包括第二电阻，所述切换开关与所述第二电阻并联。
  4. 根据权利要求1或2所述的偏置电路，其中，所述第一支路包括第一电阻，所述第二支路包括第二电阻；
    所述切换开关包括第一子开关和第二子开关，所述第一子开关与所述第一电阻并联，所述第二子开关与所述第二电阻并联。
  5. 根据权利要求2所述的偏置电路，其中，所述晶体管的发射极通过第三电阻与所述功率放大电路的功率放大器的基极连接。
  6. 根据权利要求1、2或5所述的偏置电路，其中，所述第一支路包括沿所述第一分支电流方向正向串联的至少一个二极管。
  7. 根据权利要求1、2或5所述的偏置电路，其中，所述切换开关为HBT、或为MOSFET、或为HEMT。
  8. 根据权利要求6所述的偏置电路，其中，所述第一支路与所述第二支路相连接的分流点通过第一电容与所述电源地连接。
  9. 根据权利要求6所述的偏置电路，其中，所述二极管连接于所述第一电阻和所述电源地之间，或者，所述第一电阻连接于所述二极管和所述电源地之间。
  10. 一种功率放大电路，包括功率放大器、以及权利要求1至9任一项所述的偏置电路；其中，
    所述偏置电路，与所述功率放大器连接，配置为向所述功率放大器输入偏置电流；
    所述功率放大器，配置为根据所述偏置电流将输入的射频信号进行相应放大处理后输出。
PCT/CN2017/112171 2017-07-24 2017-11-21 一种偏置电路及功率放大电路 WO2019019494A1 (zh)

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