WO2018188389A1 - 时序控制器、显示装置及显示驱动方法 - Google Patents

时序控制器、显示装置及显示驱动方法 Download PDF

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Publication number
WO2018188389A1
WO2018188389A1 PCT/CN2018/070786 CN2018070786W WO2018188389A1 WO 2018188389 A1 WO2018188389 A1 WO 2018188389A1 CN 2018070786 W CN2018070786 W CN 2018070786W WO 2018188389 A1 WO2018188389 A1 WO 2018188389A1
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Prior art keywords
gamma correction
digital gamma
data voltage
correction table
current frame
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PCT/CN2018/070786
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English (en)
French (fr)
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朴根
聂春扬
戴珂
尹傛俊
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京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to US16/078,049 priority Critical patent/US20210193064A1/en
Publication of WO2018188389A1 publication Critical patent/WO2018188389A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0204—Compensation of DC component across the pixels in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a timing controller, a display device, and a display driving method.
  • the liquid crystal molecules used in the liquid crystal display have the following characteristics that the level of the data voltage applied to the liquid crystal molecules through the pixel electrode cannot be always fixed, otherwise the liquid crystal molecules may not be destroyed due to the characteristics. It is deflected in response to changes in the electric field to form different brightnesses.
  • the typical measure is to divide the data voltage into two polarities (positive polarity and negative polarity). When the voltage of the pixel electrode is higher than the voltage of the common electrode, it is called positive polarity, when the voltage of the pixel electrode is low. When the voltage of the common electrode is referred to as negative polarity.
  • the steering of the liquid crystal molecules can be changed by alternately changing the positive and negative polarities of the level of the data voltage, thereby functioning to protect the liquid crystal molecules.
  • a timing controller including: a first digital gamma correction circuit, a second digital gamma correction circuit, and a microcontroller.
  • the microcontroller is configured to count the outputted frame in response to receiving the video signal; determining, based on the count, whether the outputted current frame requires polarity inversion of the data voltage; in response to determining that the current frame needs to be performed Polarity inversion of the data voltage, using the first digital gamma correction table read from the first digital gamma correction circuit to calculate the corrected data voltage; in response to determining that the current frame does not require polarity inversion, And calculating a corrected data voltage from a second digital gamma correction table read by the second digital gamma correction circuit; and outputting the corrected data voltage to the display.
  • the second digital gamma correction table is obtained by pre-adjusting the data voltage such that the frame that does not require polarity inversion of the data voltage is consistent with the brightness of the two frames before and after.
  • the first digital gamma correction table is obtained by pre-adjusting the data voltage to achieve a specified display effect.
  • the timing controller described above further includes a digital gamma buffer.
  • the digital gamma buffer is configured to read a first digital gamma correction table from the first digital gamma correction circuit and a second digital gamma correction table from the second digital gamma correction circuit, respectively, And buffering the first digital gamma correction table and the second digital gamma correction table read.
  • the microcontroller is further configured to read the first digital gamma correction table or the second digital gamma correction table from the digital gamma buffer.
  • the determining, by the microcontroller, whether the current frame of the output needs to perform polarity reversal of the data voltage according to the counting comprises: the microcontroller determining, according to a preset polarity non-inversion period, Whether the current frame is a frame that does not require polarity inversion of the data voltage.
  • a display device including a display and any of the above timing controllers.
  • the display is configured to display an image based on the received corrected data voltage.
  • a display driving method comprising: counting an outputted frame in response to receiving a video signal; determining, according to the counting, whether a current frame of the output needs to perform polarity of a data voltage Reversing; in response to determining that the current frame requires polarity inversion of the data voltage, using the first digital gamma correction table read from the first digital gamma correction circuit to calculate the corrected data voltage; in response to determining The current frame does not require polarity inversion, the second digital gamma correction table read from the second digital gamma correction circuit is used to calculate the corrected data voltage; and the corrected data voltage is output to the display.
  • the second digital gamma correction table is obtained by pre-adjusting the data voltage such that the frame that does not require polarity inversion of the data voltage is consistent with the brightness of the two frames before and after.
  • the first digital gamma correction table is obtained by pre-adjusting the data voltage to achieve a specified display effect.
  • the display driving method further includes: reading a first digital gamma correction table from the first digital gamma correction circuit, respectively; and reading a second digital gamma from the second digital gamma correction circuit a correction table; and a first digital gamma correction table and a second digital gamma correction table read by the buffer.
  • the display driving method further includes reading the cached first digital gamma correction table or the second digital gamma correction table.
  • determining whether the output current frame needs to perform polarity inversion according to the counting comprises: determining, according to a preset polarity non-inversion period, whether the current frame is not required to perform data voltage A frame with a polarity reversal.
  • FIG. 1 is a schematic diagram of periodic polarity inversion in the conventional art.
  • FIG. 2 is a schematic diagram of a timing controller in accordance with an embodiment of the present disclosure.
  • FIG. 3 is a schematic diagram of another timing controller in accordance with an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a display device in accordance with an embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a display driving method according to an embodiment of the present disclosure.
  • the display panel will produce a flicker of visibility due to a sudden change in voltage.
  • FIG. 2 is a schematic diagram of a timing controller according to an embodiment of the present disclosure.
  • the timing controller 202 includes a first digital gamma correction circuit 2021, a second digital gamma correction circuit 2022, and a microcontroller 2023.
  • the microcontroller 2023 is configured to count the outputted frame in response to receiving the video signal, determine, based on the count, whether the output of the current frame requires polarity inversion of the data voltage, and in response to determining that the current frame requires data voltage Polarity inversion, using the first digital gamma correction table read from the first digital gamma correction circuit 2021 to calculate the corrected data voltage, in response to determining that the current frame does not require polarity inversion, The second digital gamma correction table read by the second digital gamma correction circuit 2022 calculates the corrected data voltage and outputs the corrected data voltage to the display 201.
  • determining, by the microcontroller, whether the current frame of the output needs to perform polarity inversion of the data voltage according to the counting may specifically include: determining, by the microcontroller, according to a preset polarity non-inversion period, Whether the current frame is a frame that does not require polarity inversion of the data voltage.
  • the micro control circuit 2023 counts the output frames according to a preset polarity non-inversion period. When the current frame is in the polarity non-inversion period, it is determined that the current frame needs to perform polarity inversion of the data voltage; when the current frame is the last frame before jumping to the next polarity non-inversion period, the current frame is determined. There is no need to reverse the polarity of the data voltage.
  • the timing controller 202 can first calculate the corrected data voltage of the current frame using the first digital gamma correction table until the timing controller 202 detects the 1680th frame, at which time the timing controller 202 uses the second digital gamma.
  • the Ma calibration table calculates the corrected data voltage for the frame. Thereafter, timing controller 202 will continue to calculate the corrected data voltage for the current frame using the first digital gamma correction table until the next 1680th frame (i.e., n*1680, where n is a positive integer), and so on.
  • the second digital gamma correction table may be a Flash DGA (ACC) Table, wherein DGA represents Digital Gamma adjusted, ie, digital gamma correction, and ACC represents Accurate Color Calibration, That is, accurate color correction.
  • the second digital gamma correction table can be obtained by pre-adjusting the data voltage so that the frame that does not need to be reversed in polarity of the data voltage is consistent with the brightness of the two frames before and after.
  • the Flash DGA (ACC) Table value can be pre-adjusted to perform brightness correction on the blinking frame until the flicker of periodic visibility is not visible or falls below a threshold.
  • the first digital gamma correction table may be a Normal DGA (ACC) Table, typically a DGA (ACC) table.
  • the first digital gamma correction table can be obtained by pre-adjusting the data voltage to achieve a specified display effect.
  • the Normal DGA (ACC) Table value can be adjusted in advance to fine-tune the 256-gray gamma to correct the color temperature under white to achieve the desired display.
  • the timing controller 202 determines that the current frame needs to be reversed in polarity of the data voltage, the timing controller 202 calculates the corrected data voltage according to the normal gamma corrected Normal DGA (ACC) Table and will calculate the corrected The data voltage is output to the display 201 so that the display 201 displays the corresponding picture.
  • ACC normal gamma corrected Normal DGA
  • the timing controller 202 determines that the current frame of the output does not need to perform polarity inversion of the data voltage, since the display panel itself has DC residual, so that its brightness is different from the normal DGA output gray scale brightness, the timing controller 202 uses The Flash DGA (ACC) Table performs corrected data voltage calculations to ensure that the brightness of the front and back pictures is consistent, thereby reducing or eliminating periodic flicker.
  • ACC Flash DGA
  • the timing controller of the embodiment of the present disclosure adds a second digital gamma correction circuit 2022 that stores the current frame by pre-adjusting the data voltage so that the polarity is not reversed and the two frames before and after it A second digital gamma correction table obtained by keeping the brightness uniform.
  • the timing controller 202 determines that the current frame of the output does not need to perform the polarity inversion of the data voltage, the second digital gamma correction table is used to calculate the corresponding corrected data voltage, thereby ensuring that the polarity inversion is not performed. There is no noticeable flicker at the frame.
  • the timing controller 202' additionally includes a digital gamma buffer 2024 as compared to the timing controller 202 shown in FIG.
  • the data gamma buffer 2024 is configured to read the first digital gamma correction table from the first digital gamma correction circuit 2021 and the second digital gamma correction table from the second digital gamma correction circuit 2022, respectively. And buffering the read first digital gamma correction table and the second digital gamma correction table.
  • the microcontroller 2023 reads the pre-cached first digital gamma correction table or the second digital gamma correction table from the digital gamma buffer 2024, thereby speeding up the reading of the digital gamma by the microcontroller 2023. Correct the rate of the table.
  • timing controller 202' The other portions of the timing controller 202' are similar to the timing controller 202 and will not be described again herein.
  • the timing controller of the embodiment of the present disclosure adds a second digital gamma correction circuit 2022 that stores a current frame by pre-adjusting the data voltage so that the polarity of the data voltage does not need to be reversed
  • a second digital gamma correction table obtained by keeping the brightness of the two frames before and after is consistent.
  • the timing controller 202 determines that the current frame of the output does not need to perform the polarity inversion of the data voltage
  • the second digital gamma correction table is used to calculate the corresponding corrected data voltage, thereby ensuring that the polarity inversion is not performed. There is no noticeable flicker at the frame.
  • the display device includes a display 201 and a timing controller 202 as shown in FIG. 2 or 3.
  • Display 201 is configured to display an image based on the received corrected data voltage.
  • the timing controller in the display device of the embodiment of the present disclosure adds a second digital gamma correction circuit 2022 that stores the data voltage by pre-adjusting so as not to reverse the polarity of the data voltage, as compared with a conventional display device.
  • a second digital gamma correction table obtained by the current frame being consistent with the brightness of the two frames before and after.
  • the timing controller 202 determines that the current frame of the output does not need to perform the polarity inversion of the data voltage, the second digital gamma correction table is used to calculate the corresponding corrected data voltage, thereby ensuring that the polarity inversion is not performed. There is no noticeable flicker at the frame.
  • FIG. 5 is a flow chart 500 of a display driving method utilizing any of the above described timing controllers in accordance with an embodiment of the present disclosure.
  • the outputted frames are counted in response to receiving the video signal.
  • the method jumps to step 503.
  • the corrected digital voltage is calculated using the first digital gamma correction table and the corrected data voltage is output to the display.
  • the corrected digital voltage is calculated using a second digital gamma correction table and the corrected data voltage is output to the display.
  • determining whether the current frame of the output needs to perform polarity inversion of the data voltage according to the counting may specifically include: determining whether the current frame is unnecessary according to a preset polarity non-inversion period A frame in which the polarity of the data voltage is inverted.
  • the output frame may be counted according to a preset polarity non-inversion period.
  • the current frame is in the polarity non-inversion period, it is determined that the current frame needs to perform polarity inversion of the data voltage; when the current frame is the last frame before jumping to the next polarity non-inversion period, the current frame is determined. There is no need to reverse the polarity of the data voltage.
  • the corrected data voltage of the current frame can be first calculated using the first digital gamma correction table until the 1680th frame, at which time the corrected data voltage for the frame is calculated using the second digital gamma correction table. Thereafter, the corrected digital data of the current frame is continued using the first digital gamma correction table until the next 1680th frame (i.e., n*1680, where n is a positive integer), and so on.
  • the second digital gamma correction table may be a Flash DGA (ACC) Table, wherein DGA represents Digital Gamma adjusted, ie, digital gamma correction, and ACC represents Accurate Color Calibration, That is, accurate color correction.
  • the second digital gamma correction table can be obtained by pre-adjusting the data voltage so that the frame that does not need to be reversed in polarity of the data voltage is consistent with the brightness of the two frames before and after.
  • the Flash DGA (ACC) Table value can be pre-adjusted to perform brightness correction on the blinking frame until the flicker of periodic visibility is not visible or falls below a threshold.
  • the first digital gamma correction table may be a Normal DGA (ACC) Table, typically a DGA (ACC) table.
  • the first digital gamma correction table can be obtained by pre-adjusting the data voltage to achieve a specified display effect.
  • the Normal DGA (ACC) Table value can be adjusted in advance to fine-tune the 256-gray gamma to correct the color temperature under white to achieve the desired display.
  • the corrected data voltage is calculated according to the normal gamma corrected Normal DGA (ACC) Table, and the calculated corrected data voltage is output to the display 201,
  • the display 201 is caused to display a corresponding picture.
  • the display panel When it is determined that the current frame of the output does not need to be reversed in polarity of the data voltage, the display panel itself has DC residual, so that its brightness is different from the normal DGA output gray scale brightness, so the Flash DGA (ACC) Table is used for The corrected data voltage is calculated to ensure that the brightness of the front and back pictures is consistent, thereby reducing or eliminating periodic flicker.
  • the Flash DGA (ACC) Table is used for The corrected data voltage is calculated to ensure that the brightness of the front and back pictures is consistent, thereby reducing or eliminating periodic flicker.
  • the display driving method of the embodiment of the present disclosure employs a second digital gamma correction circuit that stores the current frame by pre-adjusting the data voltage so that the polarity of the data voltage does not need to be reversed
  • a second digital gamma correction table obtained by keeping the brightness of the two frames consistent.
  • the second digital gamma correction table is used to calculate the corresponding corrected data voltage, thereby ensuring that the frame is not inverted at the polarity There will be noticeable flicker.

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  • Crystallography & Structural Chemistry (AREA)
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  • Computer Hardware Design (AREA)
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Abstract

一种时序控制器（202，202'）、显示装置和显示驱动方法。该时序控制器（202，202'）包括：第一数字伽玛校正电路（2021）、第二数字伽玛校正电路（2022）和微控制器（2023）；微控制器（2023）配置成，响应于接收到视频信号而对所输出的帧进行计数；根据计数确定输出的当前帧是否需要进行数据电压的极性反转；响应于确定当前帧需要进行数据电压的极性反转，采用从第一数字伽玛校正电路（2021）读取的第一数字伽玛校正表来计算经校正的数据电压；响应于确定当前帧不需要极性反转，采用从第二数字伽玛校正电路（2022）读取的第二数字伽玛校正表来计算经校正的数据电压；以及将经校正的数据电压输出到显示器（201）。

Description

时序控制器、显示装置及显示驱动方法
相关申请的交叉引用
本申请要求享有2017年4月14日提交的中国专利申请No.201710243862.0的优先权，其全部公开内容通过引用并入本文。
技术领域
本公开涉及显示技术领域，特别地涉及一种时序控制器、显示装置及显示驱动方法。
背景技术
液晶显示器(Liquid Crystal Display，简称LCD)所使用的液晶分子具有以下特性，即通过像素电极向液晶分子施加的数据电压的电平不能一直固定不变，否则液晶分子会因为特性已被破坏而无法再响应电场的变化而偏转以形成不同的亮度。为避免上述情形，典型的措施是将数据电压分成两种极性(正极性和负极性)，当像素电极的电压高于公共电极的电压时，称之为正极性，当像素电极的电压低于公共电极的电压时，称之为负极性。可以通过交替改变数据电压的电平的正负极性来改变液晶分子的转向，从而起到保护液晶分子的作用。
当在TFT(Thin Film Transistor，薄膜晶体管)-LCD面板中出现灰阶电压的正负极性偏差时，在奇数帧和偶数帧之间的不对称的电压造成直流残留。液晶在长时间受到该直流残留的影响后，会发生闪烁。因此，直流残留是困扰TFT-LCD的一大难题。
发明内容
本公开的目的在于提供一种改进的时序控制器、显示装置及显示驱动方法，其能够至少部分地缓解或消除以上提到的问题中的一个或多个。
根据本公开的一方面，提供了一种时序控制器，包括：第一数字伽玛校正电路、第二数字伽玛校正电路和微控制器。所述微控制器配置成，响应于接收到视频信号而对所输出的帧进行计数；根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转；响应于确定 当前帧需要进行数据电压的极性反转，采用从所述第一数字伽玛校正电路读取的第一数字伽玛校正表来计算经校正的数据电压；响应于确定当前帧不需要极性反转，采用从所述第二数字伽玛校正电路读取的第二数字伽玛校正表来计算经校正的数据电压；以及将经校正的数据电压输出到显示器。
根据一些实施例，所述第二数字伽玛校正表通过以下方式获得：预先调节数据电压以便使所述不需要进行数据电压的极性反转的帧与其前后两帧的亮度保持一致。
根据一些实施例，所述第一数字伽玛校正表通过以下方式获得：为达到指定的显示效果而预先调节数据电压。
根据一些实施例，上述时序控制器还包括数字伽玛缓存器。所述数字伽玛缓存器配置成分别从所述第一数字伽玛校正电路读取第一数字伽玛校正表和从所述第二数字伽玛校正电路读取第二数字伽玛校正表，并且缓存所所读取的第一数字伽玛校正表和第二数字伽玛校正表。
根据一些实施例，所述微控制器还配置成从所述数字伽玛缓存器读取所述第一数字伽玛校正表或所述第二数字伽玛校正表。
根据一些实施例，所述微控制器根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转包括：所述微控制器根据预设的极性不反转周期，确定所述当前帧是否为不需要进行数据电压的极性反转的帧。
根据本公开的另一方面，提供了一种显示装置，包括显示器和上述任一种时序控制器。所述显示器配置成根据所接收的经校正的数据电压而显示图像。
根据本公开的又一方面，提供了一种显示驱动方法，包括：响应于接收到视频信号而对所输出的帧进行计数；根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转；响应于确定当前帧需要进行数据电压的极性反转，采用从所述第一数字伽玛校正电路读取的第一数字伽玛校正表来计算经校正的数据电压；响应于确定当前帧不需要极性反转，采用从所述第二数字伽玛校正电路读取的第二数字伽玛校正表来计算经校正的数据电压；以及将经校正的数据电压输出到显示器。
根据一些实施例，所述第二数字伽玛校正表通过以下方式获得：预先调节数据电压以便使所述不需要进行数据电压的极性反转的帧与其前后两帧的亮度保持一致。
根据一些实施例，所述第一数字伽玛校正表通过以下方式获得：为达到指定的显示效果而预先调节数据电压。
根据一些实施例，上述显示驱动方法还包括：分别从所述第一数字伽玛校正电路读取第一数字伽玛校正表；从所述第二数字伽玛校正电路读取第二数字伽玛校正表；以及缓存所所读取的第一数字伽玛校正表和第二数字伽玛校正表。
根据一些实施例，上述显示驱动方法还包括：读取所缓存的所述第一数字伽玛校正表或所述第二数字伽玛校正表。
根据一些实施例，根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转包括：根据预设的极性不反转周期，确定所述当前帧是否为不需要进行数据电压的极性反转的帧。
附图说明
图1为常规技术中的周期性极性反转的示意图。
图2为根据本公开实施例的一种时序控制器的示意图。
图3为根据本公开实施例的另一种时序控制器的示意图。
图4为根据本公开实施例的显示装置的示意图。
图5为根据本公开实施例的显示驱动方法的流程图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，下文中将结合附图对本公开的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
关于以上提到的直流残留问题，已经提出使用周期性极性反转的方式来消除直流残留，其中奇数帧和偶数帧的电压相互抵消。但是，当存在残像时，如图1所示，奇数帧的电压与偶数帧的电压不相等，因此在极性反转时将会有残留电荷。为了消除残留电荷，如图1所示，将一个周期的极性反转的最后一帧的数据电压的极性设置成与下一周期的极性反转的第一帧的数据电压的极性相同(如图1中的椭圆区域 所示)。以此方式，前一周期的极性反转产生的电荷(例如正电荷)将与下一周期的极性反转的电荷(例如负电荷)抵消掉。然而，在该椭圆区域中，由于电压的突变，显示面板将产生可视性的闪烁。
有鉴于此，本公开的实施例提供了一种时序控制器。图2为本公开实施例的一种时序控制器的示意图。如图2所示，时序控制器202包括：第一数字伽玛校正电路2021、第二数字伽玛校正电路2022和微控制器2023。微控制器2023配置成响应于接收到视频信号而对所输出的帧进行计数，根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转，响应于确定当前帧需要进行数据电压的极性反转，采用从所述第一数字伽玛校正电路2021读取的第一数字伽玛校正表来计算经校正的数据电压，响应于确定当前帧不需要极性反转，采用从所述第二数字伽玛校正电路2022读取的第二数字伽玛校正表来计算经校正的数据电压，并且将经校正的数据电压输出到显示器201。
在示例实施例中，微控制器根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转可以具体地包括：微控制器根据预设的极性不反转周期，确定所述当前帧是否为不需要进行数据电压的极性反转的帧。
具体地，微控制电路2023根据预设的极性不反转周期对输出的帧进行计数。在当前帧在极性不反转周期内时，确定当前帧需要进行数据电压的极性反转；在当前帧为跳到下一极性不反转周期之前的最后一帧时，确定当前帧不需要进行数据电压的极性反转。
例如，在输入60Hz视频信号的情况下，如果将极性不反转周期设定为28s，则极性不反转周期中的帧计数为60Hz*28s＝1680。这样，时序控制器202可以首先使用第一数字伽玛校正表计算当前帧的经校正的数据电压，直到时序控制器202侦测到第1680个帧，此时时序控制器202使用第二数字伽玛校正表计算该帧的经校正的数据电压。此后，时序控制器202将继续使用第一数字伽玛校正表计算当前帧的经校正的数据电压，直到下一个第1680帧(即n*1680，其中n为正整数)，并且以此类推。
在示例实施例中，第二数字伽玛校正表可以是Flash DGA(ACC)Table(闪烁DGA(ACC)表)，其中，DGA表示Digital Gamma adjusted，即数字伽玛校正，ACC表示Accurate Color Calibration，即精确的色彩 校正。第二数字伽玛校正表可以通过以下方式获取：预先调节数据电压以便使所述不需要进行数据电压的极性反转的帧与其前后两帧的亮度保持一致。例如，可以预先调节Flash DGA(ACC)Table值以便对闪烁的帧进行亮度校正，直至周期性可视性的闪烁不可见或降低到阈值以下。
在示例实施例中，第一数字伽玛校正表可以是Normal DGA(ACC)Table，通常DGA(ACC)表。第一数字伽玛校正表可以通过为达到指定的显示效果而预先调节数据电压来获得。例如，可以预先调节Normal DGA(ACC)Table值，以便对256灰阶的伽玛进行微调矫正，从而矫正白色下的色温，以达到期望的显示效果。
当时序控制器202确定当前帧需要进行数据电压的极性反转时，时序控制器202按照正常伽玛矫正过的Normal DGA(ACC)Table计算经校正的数据电压，并将计算出的经校正的数据电压输出到显示器201，使得显示器201显示相应的画面。
当时序控制器202确定输出的当前帧不需要进行数据电压的极性反转时，因显示面板本身有直流残留，使得其亮度与正常的DGA输出灰阶亮度有差异，因此时序控制器202使用Flash DGA(ACC)Table进行经校正的数据电压计算，从而确保前后画面的亮度保持一致，进而减少或消除周期性闪烁。
与常规的时序控制器相比，本公开实施例的时序控制器增加第二数字伽玛校正电路2022，其存储通过预先调节数据电压以便使不需要极性反转的当前帧与其前后两帧的亮度保持一致而获得的第二数字伽玛校正表。当时序控制器202确定输出的当前帧不需要进行数据电压的极性反转时，利用第二数字伽玛校正表来计算对应的经校正的数据电压，因此可以确保在不进行极性反转的帧处不会出现明显的闪烁。
图3为根据本公开实施例的另一时序控制器的示意图。如图3所示，时序控制器202′与如图2所示的时序控制器202相比，还附加地包括数字伽玛缓存器2024。数据伽玛缓存器2024配置成分别从所述第一数字伽玛校正电路2021读取第一数字伽玛校正表和从所述第二数字伽玛校正电路2022读取第二数字伽玛校正表，并且缓存所读取的第一数字伽玛校正表和第二数字伽玛校正表。
在该实施例中，微控制器2023从数字伽玛缓存器2024读取预先缓存的第一数字伽玛校正表或第二数字伽玛校正表，从而可以加快微控制器2023读取数字伽玛校正表的速率。
时序控制器202′的其它部分与时序控制器202类似，因此本文不再进行赘述。
与常规的时序控制器相比，本公开实施例的时序控制器增加第二数字伽玛校正电路2022，其存储通过预先调节数据电压以便使不需要进行数据电压的极性反转的当前帧与其前后两帧的亮度保持一致而获得的第二数字伽玛校正表。当时序控制器202确定输出的当前帧不需要进行数据电压的极性反转时，利用第二数字伽玛校正表来计算对应的经校正的数据电压，因此可以确保在不进行极性反转的帧处不会出现明显的闪烁。
图4为根据本公开实施例的显示装置的示意图。如图4所示，显示装置包括显示器201和如图2或图3所示的时序控制器202。显示器201配置成根据所接收的经校正的数据电压而显示图像。
与常规的显示装置相比，本公开实施例的显示装置中的时序控制器增加第二数字伽玛校正电路2022，其存储通过预先调节数据电压以便使不需要进行数据电压的极性反转的当前帧与其前后两帧的亮度保持一致而获得的第二数字伽玛校正表。当时序控制器202确定输出的当前帧不需要进行数据电压的极性反转时，利用第二数字伽玛校正表来计算对应的经校正的数据电压，因此可以确保在不进行极性反转的帧处不会出现明显的闪烁。
图5为根据本公开实施例的利用上述任一种时序控制器的显示驱动方法的流程图500。如图5所示，在步骤501处，响应于接收到视频信号而对所输出的帧进行计数。接着，在步骤502处，根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转。当确定当前帧需要进行数据电压的极性反转时，方法跳转到步骤503。当确定当前帧不需要进行数据电压的极性反转时，方法跳转到步骤504。在步骤503处，使用第一数字伽玛校正表来计算经校正的数据电压，并且将经校正的数据电压输出到显示器。在步骤504处，使用第二数字伽玛校正表来计算经校正的数据电压，并且将经校正的数据电压输出到显示器。
在示例实施例中，根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转可以具体地包括：根据预设的极性不反转周期，确定所述当前帧是否为不需要进行数据电压的极性反转的帧。
具体地，可以根据预设的极性不反转周期对输出的帧进行计数。在当前帧在极性不反转周期内时，确定当前帧需要进行数据电压的极性反转；在当前帧为跳到下一极性不反转周期之前的最后一帧时，确定当前帧不需要进行数据电压的极性反转。
例如，在输入60Hz视频信号的情况下，如果将极性不反转周期设定为28s，则极性不反转周期中的帧计数为60Hz*28s＝1680。这样，可以首先使用第一数字伽玛校正表计算当前帧的经校正的数据电压，直到第1680个帧，此时使用第二数字伽玛校正表计算该帧的经校正的数据电压。此后，继续使用第一数字伽玛校正表计算当前帧的经校正的数据电压，直到下一个第1680帧(即n*1680，其中n为正整数)，并且以此类推。
在示例实施例中，第二数字伽玛校正表可以是Flash DGA(ACC)Table(闪烁DGA(ACC)表)，其中，DGA表示Digital Gamma adjusted，即数字伽玛校正，ACC表示Accurate Color Calibration，即精确的色彩校正。第二数字伽玛校正表可以通过以下方式获取：预先调节数据电压以便使所述不需要进行数据电压的极性反转的帧与其前后两帧的亮度保持一致。例如，可以预先调节Flash DGA(ACC)Table值以便对闪烁的帧进行亮度校正，直至周期性可视性的闪烁不可见或降低到阈值以下。
在示例实施例中，第一数字伽玛校正表可以是Normal DGA(ACC)Table，通常DGA(ACC)表。第一数字伽玛校正表可以通过为达到指定的显示效果而预先调节数据电压来获得。例如，可以预先调节Normal DGA(ACC)Table值，以便对256灰阶的伽玛进行微调矫正，从而矫正白色下的色温，以达到期望的显示效果。
当确定当前帧需要进行数据电压的极性反转时，按照正常伽玛矫正过的Normal DGA(ACC)Table计算经校正的数据电压，并将计算出的经校正的数据电压输出到显示器201，使得显示器201显示相应的画面。
当确定输出的当前帧不需要进行数据电压的极性反转时，因显示面板本身有直流残留，使得其亮度与正常的DGA输出灰阶亮度有差异，因此使用Flash DGA(ACC)Table进行经校正的数据电压计算，从而确保前后画面的亮度保持一致，进而减少或消除周期性闪烁。
与常规的显示驱动方法相比，本公开实施例的显示驱动方法采用第二数字伽玛校正电路，其存储通过预先调节数据电压以便使不需要进行数据电压的极性反转的当前帧与其前后两帧的亮度保持一致而获得的第二数字伽玛校正表。当确定输出的当前帧不需要进行数据电压的极性反转时，利用第二数字伽玛校正表来计算对应的经校正的数据电压，因此可以确保在不进行极性反转的帧处不会出现明显的闪烁。
本领域普通技术人员可以理解到，上述方法中的全部或部分步骤可通过程序来指令相关硬件完成。所述程序可以存储于计算机可读存储介质中，如只读存储器、磁盘或光盘等。可选地，上述实施例的全部或部分步骤也可以使用一个或多个集成电路来实现。相应地，上述实施例中的各电路可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。本公开不限制于任何特定形式的硬件和软件的结合。
以上仅为本公开的示例实施例。当然，本公开还可有其他多种实施例。在不背离本公开精神及其实质的情况下，熟悉本领域的技术人员当可根据本公开作出各种相应的改变和变形，但这些相应的改变和变形都应属于本公开所附的权利要求的保护范围。

Claims (13)

  1. 一种时序控制器，包括：第一数字伽玛校正电路、第二数字伽玛校正电路和微控制器，
    其中，所述微控制器配置成，
    响应于接收到视频信号而对所输出的帧进行计数；
    根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转；
    响应于确定当前帧需要进行数据电压的极性反转，采用从所述第一数字伽玛校正电路读取的第一数字伽玛校正表来计算经校正的数据电压；
    响应于确定当前帧不需要极性反转，采用从所述第二数字伽玛校正电路读取的第二数字伽玛校正表来计算经校正的数据电压；以及
    将经校正的数据电压输出到显示器。
  2. 如权利要求1所述的时序控制器，其中
    所述第二数字伽玛校正表通过以下方式获得：预先调节数据电压以便使所述不需要进行数据电压的极性反转的帧与其前后两帧的亮度保持一致。
  3. 如权利要求1所述的时序控制器，其中
    所述第一数字伽玛校正表通过以下方式获得：为达到指定的显示效果而预先调节数据电压。
  4. 如权利要求1所述的时序控制器，还包括数字伽玛缓存器，所述数字伽玛缓存器配置成分别从所述第一数字伽玛校正电路读取第一数字伽玛校正表和从所述第二数字伽玛校正电路读取第二数字伽玛校正表，并且缓存所所读取的第一数字伽玛校正表和第二数字伽玛校正表。
  5. 如权利要求4所述的时序控制器，其中
    所述微控制器还配置成从所述数字伽玛缓存器读取所述第一数字伽玛校正表或所述第二数字伽玛校正表。
  6. 如权利要求1-5任一项所述的时序控制器，其中所述微控制器根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转包括：
    所述微控制器根据预设的极性不反转周期，确定所述当前帧是否为不需要进行数据电压的极性反转的帧。
  7. 一种显示装置，包括显示器和如权利要求1-6任一项所述的时序控制器，其中所述显示器配置成根据所接收的经校正的数据电压而显示图像。
  8. 一种显示驱动方法，包括：
    响应于接收到视频信号而对所输出的帧进行计数；
    根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转；
    响应于确定当前帧需要进行数据电压的极性反转，采用从所述第一数字伽玛校正电路读取的第一数字伽玛校正表来计算经校正的数据电压；
    响应于确定当前帧不需要极性反转，采用从所述第二数字伽玛校正电路读取的第二数字伽玛校正表来计算经校正的数据电压；以及
    将经校正的数据电压输出到显示器。
  9. 如权利要求8所述的驱动方法，其中
    所述第二数字伽玛校正表通过以下方式获得：预先调节数据电压以便使所述不需要进行数据电压的极性反转的帧与其前后两帧的亮度保持一致。
  10. 如权利要求8所述的驱动方法，其中
    所述第一数字伽玛校正表通过以下方式获得：为达到指定的显示效果而预先调节数据电压。
  11. 如权利要求8所述的驱动方法，还包括：
    分别从所述第一数字伽玛校正电路读取第一数字伽玛校正表；
    从所述第二数字伽玛校正电路读取第二数字伽玛校正表；以及
    缓存所所读取的第一数字伽玛校正表和第二数字伽玛校正表。
  12. 如权利要求11所述的驱动方法，还包括：
    读取所缓存的所述第一数字伽玛校正表或所述第二数字伽玛校正表。
  13. 如权利要求8-12任一项所述的驱动方法，其中根据所述计数确定输出的当前帧是否需要进行数据电压的极性反转包括：
    根据预设的极性不反转周期，确定所述当前帧是否为不需要进行数据电压的极性反转的帧。
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