WO2018159217A1 - 封止シート、および半導体装置の製造方法 - Google Patents
封止シート、および半導体装置の製造方法 Download PDFInfo
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- WO2018159217A1 WO2018159217A1 PCT/JP2018/003726 JP2018003726W WO2018159217A1 WO 2018159217 A1 WO2018159217 A1 WO 2018159217A1 JP 2018003726 W JP2018003726 W JP 2018003726W WO 2018159217 A1 WO2018159217 A1 WO 2018159217A1
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- WIPO (PCT)
- Prior art keywords
- sealing
- semiconductor chip
- adhesive layer
- adhesive
- inorganic filler
- Prior art date
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Images
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2301/00—Additional features of adhesives in the form of films or foils
- C09J2301/40—Additional features of adhesives in the form of films or foils characterized by the presence of essential components
- C09J2301/408—Additional features of adhesives in the form of films or foils characterized by the presence of essential components additives as essential feature of the adhesive layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
Definitions
- the present invention relates to a sealing sheet and a method for manufacturing a semiconductor device using the sheet.
- a semiconductor chip is sealed using a sealing sheet including a layer (adhesive layer) in which a sealing material is formed in a sheet shape.
- a sealing sheet including a layer (adhesive layer) in which a sealing material is formed in a sheet shape.
- a semiconductor chip is sealed by laminating an adhesive layer in a sealing sheet on a semiconductor chip provided on a substrate and then curing the adhesive layer (Patent Document 1).
- chip-embedded substrate a substrate with a built-in semiconductor chip
- the semiconductor chip is also sealed in the manufacture of the substrate.
- a semiconductor chip is provided on the base material, and the adhesive layer of the sealing sheet is laminated on the surface of the base material on which the semiconductor chip is provided, and then the adhesive layer is cured.
- a hole penetrating the cured layer formed by curing the adhesive layer, and forming an electrode for electrically connecting the semiconductor chip and the outside through the hole a chip built-in substrate can be obtained.
- a technique for sealing a semiconductor chip on an adhesive sheet has also been developed.
- a sealing body in which the semiconductor chip is sealed is obtained by laminating the adhesive layer in the sealing sheet on the semiconductor chip provided on the adhesive sheet and curing the adhesive layer. It is done.
- An electrode may be further formed on the sealing body.
- the adhesive sheet is peeled from the sealing body, and an interlayer insulating film is laminated on the exposed surface of the sealing body. Thereafter, a hole penetrating the interlayer insulating film is formed, and an electrode for electrically connecting the semiconductor chip and the outside through the hole is formed.
- a fan-out type wafer level package (FOWLP) or the like is manufactured.
- resin residues (hereinafter sometimes referred to as “smear”) are generated when holes are formed in the hardened layer and the interlayer insulating film, and the smears are formed in the holes. May remain. If the electrode is formed with smears remaining in the holes, problems such as poor electrode conduction are likely to occur. Therefore, in order to avoid such a problem, a desmear process for removing the generated smear is performed following the formation of the holes. Such a desmear process may be performed also when the hole for alignment is formed.
- a method of exposing a treatment target to an alkaline solution is performed.
- smear can be dissolved in an alkaline solution and removed.
- the process by an alkaline solution may be performed in order to form fine unevenness
- the resin surface is partially dissolved by the alkaline solution, and irregularities are formed on the surface.
- the present invention has been made in view of such a situation, and an object thereof is to provide a sealing sheet in which an inorganic filler is hardly detached from a cured layer. Moreover, this invention provides the manufacturing method of the semiconductor device which has a favorable performance using such a sealing sheet.
- a sealing sheet used for sealing wherein the sealing sheet includes at least a curable adhesive layer, and the adhesive layer has a thermosetting resin, a thermoplastic resin, and a minimum covering area of 550 m 2. / G or more and 1500 m ⁇ 2 > / g or less It is formed from the adhesive composition containing the inorganic filler surface-treated with the surface treating agent (Invention 1) characterized by the above-mentioned. .
- the surface treatment agent is preferably at least one selected from the group consisting of a silazane compound, an alkoxysilane, and a silane coupling agent (Invention 2).
- the silazane compound is represented by the following formula (1): SiR 3 —N (H) —SiR 3 (1)
- R represents a substituted or unsubstituted alkyl group each independently having 1 to 6 carbon atoms. It is preferable that it is a compound which has a structure of (Invention 3).
- the inorganic filler is preferably a silica filler or an alumina filler (Invention 4).
- the average particle size of the inorganic filler is preferably 0.01 ⁇ m or more and 3.0 ⁇ m or less (Invention 5).
- the maximum particle size of the inorganic filler is preferably 0.05 ⁇ m or more and 5.0 ⁇ m or less (Invention 6).
- the inorganic filler is preferably spherical (Invention 7).
- the adhesive composition further contains an imidazole curing catalyst (Invention 8).
- the present invention provides a step of providing one or more semiconductor chips on at least one surface of a substrate, and the adhesive in the sealing sheet (Inventions 1 to 8) so as to cover at least the semiconductor chips.
- a step of laminating layers, a cured layer formed by curing the adhesive layer by curing the adhesive layer, the semiconductor chip sealed by the cured layer, and the base material A step of obtaining a body, a step of forming a hole penetrating from a surface of the cured layer opposite to the base material to an interface between the cured layer and the semiconductor chip, and the sealing body in which the hole is formed
- the present invention provides a step of providing one or more semiconductor chips on the pressure-sensitive adhesive surface of the pressure-sensitive adhesive sheet, the adhesive layer in the sealing sheet (Inventions 1 to 8) so as to cover at least the semiconductor chip.
- a step of laminating a step of obtaining a sealed body comprising a cured layer formed by curing the adhesive layer by curing the adhesive layer, and the semiconductor chip sealed by the cured layer, the sealing
- a step of peeling the pressure-sensitive adhesive sheet from the stationary body a step of laminating an interlayer insulating film on the surface of the sealing body exposed by peeling of the pressure-sensitive adhesive sheet, a surface of the interlayer insulating film opposite to the sealing body From the step of forming a hole penetrating to the interface between the interlayer insulating film and the semiconductor chip, by exposing the sealing body in which the interlayer insulating film formed with the hole is laminated to an alkaline solution, Desmi through the hole Step processes, and to provide a method of manufacturing a semiconductor device characterized by compris
- the present invention provides a step of providing one or more semiconductor chips on at least one surface of a base material or an adhesive surface of an adhesive sheet, the sealing sheet (invention 1) so as to cover at least the semiconductor chip.
- a method for manufacturing a semiconductor device comprising a step of obtaining a sealing body, and a step of forming irregularities on a surface of the sealing body by exposing the sealing body to an alkaline solution (Invention 11). ).
- the sealing sheet of the present invention it is difficult for the inorganic filler to be detached from the cured layer. Moreover, according to the manufacturing method of this invention, the semiconductor device which has favorable performance can be manufactured using such a sealing sheet.
- FIG. 4 is a photograph taken by a scanning electron microscope of the surface of a cured layer according to Example 2.
- 2 is a photograph taken by a scanning electron microscope of the surface of a cured layer according to Comparative Example 1.
- 4 is a photograph taken by a scanning electron microscope of the surface of a cured layer according to Comparative Example 2.
- FIG. 1 shows a cross-sectional view of a sealing sheet 1 according to this embodiment.
- the sealing sheet 1 according to this embodiment includes an adhesive layer 11 and a release sheet 12 laminated on at least one surface of the adhesive layer 11.
- Another release sheet may be further laminated on the surface of the adhesive layer 11 opposite to the release sheet 12.
- the release sheet 12 and another release sheet may be omitted.
- the sealing sheet 1 according to the present embodiment is used for sealing a semiconductor chip in a method for manufacturing a semiconductor device having a treatment process using an alkaline solution.
- the sealing is sealing of a semiconductor chip incorporated in a substrate or sealing of a semiconductor chip on an adhesive sheet.
- the semiconductor device manufactured using the sealing sheet 1 according to the present embodiment includes a sealed semiconductor chip.
- a chip-embedded substrate, a fan-out type wafer level package (FOWLP), a fan-in type A semiconductor package such as a wafer level package (FIWLP) may be mentioned.
- the adhesive layer 11 has curability.
- having the curability means that the adhesive layer 11 can be cured by heating or the like. That is, the adhesive layer 11 is uncured in a state where the sealing sheet 1 is configured.
- the adhesive layer 11 is preferably thermosetting. Thereby, even if it is difficult to irradiate the laminated adhesive layer 11 with energy rays, the adhesive layer 11 can be cured well.
- the adhesive bond layer 11 is formed from the adhesive composition containing the inorganic filler surface-treated with the thermosetting resin, the thermoplastic resin, and the surface treating agent. is there.
- the surface treatment agent has a minimum covering area of 550 m 2 / g or more and 1500 m 2 / g or less.
- the adhesive layer 11 is formed from an adhesive composition containing an inorganic filler surface-treated with the surface treatment agent, a cured layer formed by curing the adhesive layer 11 is also the inorganic filler. It will contain.
- the surface treatment agent has most of the hydroxy groups present on the surface of the inorganic filler by being surface-treated as described above. Disappeared by reaction with reactive groups.
- the surface treatment agent having the minimum covering area in the above range has a smaller molecular weight of the portion other than the reactive group in the molecule compared to other surface treatment agents, in other words, the physical size of the portion. Is small.
- a surface treatment agent reacts with the hydroxy group on the surface of the inorganic filler, collisions at the portions of the surface treatment agents hardly occur.
- the reaction between the surface treatment agent and the hydroxy group proceeds satisfactorily without hindering and most of the hydroxy groups present on the surface of the inorganic filler are lost.
- the inorganic filler from which most of the hydroxy groups present on the surface have disappeared has a relatively low affinity with the alkaline solution. Therefore, when the cured layer is exposed to the alkaline solution, the inorganic filler is removed from the cured layer. Hard to separate.
- the inorganic filler is desorbed, air is present in the voids generated thereby, and when the cured layer is heated, the air expands, and accordingly, the entire cured layer also expands.
- voids due to the removal of the inorganic filler are difficult to occur, and therefore, the expansion of the air is difficult to occur. Is done.
- Adhesive Layer (1) Inorganic Filler
- the inorganic filler contained in the adhesive composition is surface-treated with a surface treatment agent. Thereby, detachment
- the adhesive composition contains an inorganic filler, the cured layer has excellent mechanical strength, and the reliability of the obtained semiconductor device is improved.
- the effect by a surface treating agent is exhibited about the inorganic filler which has a hydroxyl group on the surface.
- the inorganic filler include silica, alumina, glass, titanium oxide, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, and aluminum nitride.
- Aluminum borate whisker, boron nitride, crystalline silica, amorphous silica, mullite, cordierite and other complex oxides, montmorillonite, smectite, etc. can be exemplified as fillers. Or in combination of two or more. Among these, it is preferable to use a silica filler and an alumina filler, and it is particularly preferable to use a silica filler.
- the shape of the inorganic filler may be any of a granular shape, a needle shape, a plate shape, an indeterminate shape, etc., but among these, a spherical shape is preferable.
- a spherical shape is preferable.
- the average particle size of the inorganic filler is preferably 0.01 ⁇ m or more, particularly preferably 0.1 ⁇ m or more, and more preferably 0.3 ⁇ m or more.
- the average particle size of the inorganic filler is preferably 3.0 ⁇ m or less, and particularly preferably 1.0 ⁇ m or less.
- the detachment of the inorganic filler is satisfactorily suppressed.
- the average particle size of the inorganic filler is 3.0 ⁇ m or less, the inorganic filler has a surface area that can be easily surface-treated with the surface treatment agent, and can be effectively surface-treated and cured.
- the inorganic filler is satisfactorily filled in the layer, and the cured layer has better mechanical strength.
- the average particle size of the inorganic filler in the present specification is a value measured by a dynamic light scattering method using a particle size distribution measuring device (product name “Nanotrack Wave-UT151” manufactured by Nikkiso Co., Ltd.).
- the maximum particle size of the inorganic filler is preferably 0.05 ⁇ m or more, and particularly preferably 0.5 ⁇ m or more.
- the maximum particle size is preferably 5 ⁇ m or less, particularly preferably 3 ⁇ m or less.
- the surface treatment agent has a minimum covering area of 550 m 2 / g or more, and preferably 600 m 2 / g or more.
- the surface treatment agent has a minimum covering area of 1500 m 2 / g or less, preferably 1200 m 2 / g or less, particularly preferably 1000 m 2 / g or less.
- the minimum covering area is in the above range, the molecular weight of the portion other than the reactive group in the surface treatment agent is relatively small, that is, the physical size is relatively small, and the hydroxyl group on the surface of the inorganic filler When reacting, it is presumed that collisions between the surface treatment agents at the portions concerned hardly occur. Therefore, by using the surface treatment agent having the above minimum covering area, the hydroxy group present on the surface of the inorganic filler can be effectively eliminated, and as a result, the inorganic filler can be effectively detached from the cured layer. Can be suppressed.
- the minimum covering area (m 2 / g) in the surface treatment agent refers to the area (m 2 ) of the monomolecular film when a monomolecular film is formed using 1 g of the surface treatment agent.
- the minimum coverage area can be theoretically calculated from the structure of the surface treatment agent, for example, when considering a surface treatment agent having a trialkoxysilane group as a reactive group, the trialkoxysilane group is hydrolyzed.
- the resulting Si (O) 3 structure is a tetrahedron with one Si atom and three O atoms as vertices.
- the Si atom is a sphere with a radius of 2.10 ⁇
- the O atom is a sphere with a radius of 1.52 ⁇
- the distance of the Si—O bond is 1.51 ⁇ ⁇
- the angle is 109.5 °. Then, assuming that all three O atoms in the tetrahedron react with the hydroxy group on the surface of the inorganic filler, the minimum circular area that can be covered by the three O atoms is calculated. .33 ⁇ 10 ⁇ 19 m 2 / molecule.
- the surface treatment agent is preferably at least one selected from the group consisting of a silazane compound, an alkoxysilane, and a silane coupling agent.
- These surface treatment agents have a relatively small molecular weight other than reactive groups in the surface treatment agent, that is, the physical size is relatively small, and thus react with the hydroxy group on the surface of the inorganic filler. In this case, it is estimated that the collision between the surface treatment agents at the portions is less likely to occur. Therefore, by using these surface treatment agents, the hydroxy groups present on the surface of the inorganic filler can be more effectively eliminated, and as a result, the detachment of the inorganic filler from the cured layer can be more effectively suppressed. can do.
- the silazane compound has the following formula (1): SiR 3 —N (H) —SiR 3 (1)
- R represents a substituted or unsubstituted alkyl group each independently having 1 to 6 carbon atoms.
- the carbon number of the alkyl group is preferably 4 or less, particularly preferably 2 or less.
- the alkyl group include a methyl group, an ethyl group, a propyl group, an isopropyl group, and a butyl group.
- a methyl group, an ethyl group, or a propyl group is preferable, and a methyl group or an ethyl group is particularly preferable. It is preferable.
- the alkyl group when the alkyl group is substituted, it is preferable that part or all of the hydrogen atoms of the alkyl group are substituted with a fluorine atom, a chlorine atom, a bromine atom, etc., and particularly with a fluorine atom. It is preferable.
- silazane compound examples include 1,1,1,3,3,3-hexamethyldisilazane, 1,3-divinyl-1,1,3,3-tetramethyldisilazane, octamethyltrisilazane, Hexa (t-butyl) disilazane, hexabutyldisilazane, hexaoctyldisilazane, 1,3-diethyltetramethyldisilazane, 1,3-di-n-octyltetramethyldisilazane, 1,3-diphenyltetramethyldi Silazane, 1,3-dimethyltetraphenyldisilazane, 1,3-diethyltetramethyldisilazane, 1,1,3,3-tetraphenyl-1,3-dimethyldisilazane, 1,3-dipropyltetramethyldi Silazane, hex
- alkoxysilane examples include methyltrimethoxysilane, methyltriethoxysilane, methyltriisopropoxysilane, methyltributoxysilane, ethyltrimethoxysilane, propyltrimethoxysilane, dimethyldimethoxysilane, phenyltrimethoxysilane, diphenyl Dimethoxysilane, phenylmethyldimethoxysilane, tetramethoxysilane, tetraethoxysilane, tetraisopropoxysilane, tetrabutoxysilane, 3-aminopropyltrimethoxysilane, 3- (2-aminoethyl) aminopropyltrimethoxysilane, 3-glycyl Sidoxypropyltrimethoxysilane, 3-glycidoxypropyltriethoxysilane, ⁇ - (meth) acryloxypropyltrime
- dimethyldimethoxysilane from the viewpoint that the elimination of the inorganic filler can be effectively suppressed.
- (meth) acryloxy means both acryloxy and methacryloxy. The same applies to other similar terms.
- silane coupling agent examples include polymerizable unsaturated group-containing silicon compounds such as vinyltrimethoxysilane, vinyltriethoxysilane, and methacryloxypropyltrimethoxysilane, 3-glycidoxypropyltrimethoxysilane, 2- Silicon compounds having an epoxy structure such as (3,4-epoxycyclohexyl) ethyltrimethoxysilane, 3-aminopropyltrimethoxysilane, N- (2-aminoethyl) -3-aminopropyltrimethoxysilane, N- (2 -Aminoethyl) -3-aminopropylmethyldimethoxysilane and other amino group-containing silicon compounds, 3-chloropropyltrimethoxysilane, 3-isocyanatopropyltriethoxysilane and the like. These may be used individually by 1 type and may be used in combination of 2 or more type.
- the method for surface-treating the inorganic filler with the surface treatment agent is not particularly limited, and can be performed by a general method.
- the untreated inorganic filler can be stirred at room temperature using a mixer, and after the surface treatment agent is sprayed thereon, the surface treatment can be performed by further stirring for a predetermined time.
- the stirring time after spraying is preferably 5 minutes or more and 15 minutes or less, for example.
- the inorganic filler may be taken out from the mixer and allowed to stand for one day or longer, or a slight heat treatment may be performed.
- a mixer a well-known thing can be used, for example, blenders, such as a V blender, a ribbon blender, a bubble cone blender, a Henschel mixer, a mixer, such as a concrete mixer, a ball mill etc., Among these, a mixer is used. Is preferred.
- the proportion of the inorganic filler surface-treated with the surface treatment agent is preferably 40% by mass or more, and particularly preferably 50% by mass or more.
- the ratio is in the above range, it is possible to effectively suppress the detachment of the inorganic filler from the cured layer and the cured layer has excellent mechanical strength. .
- the content of the inorganic filler surface-treated with the surface treatment agent in the adhesive composition is preferably 40% by mass or more, and particularly preferably 50% by mass or more. Further, the content is preferably 90% by mass or less, particularly preferably 85% by mass or less, and further preferably 80% by mass or less. When the content of the inorganic filler surface-treated with the surface treatment agent is within the above range, the adhesive layer 11 has better mechanical strength.
- thermosetting resin is not particularly limited as long as the adhesive layer 11 can be cured.
- a resin that is normally contained in a sealing material can be used. Specific examples include epoxy resins, phenol resins, melamine resins, urea resins, polyester resins, urethane resins, acrylic resins, polyimide resins, benzoxazine resins, phenoxy resins, acid anhydride compounds, and amine compounds. Can be used singly or in combination of two or more.
- an epoxy resin from the viewpoint of being suitable for curing using an imidazole-based curing catalyst, it is preferable to use an epoxy resin, a phenol resin, a melamine resin, a urea resin, an acid anhydride compound and an amine compound, and particularly excellent adhesion.
- an epoxy resin from the viewpoint of exhibiting properties, at least one selected from the group consisting of epoxy resins, phenol resins, mixtures thereof, or epoxy resins and phenol resins, melamine resins, urea resins, amine compounds, and acid anhydride compounds It is preferable to use a mixture of
- Epoxy resins generally have the property of forming a three-dimensional network when heated and forming a hardened product.
- various known epoxy resins can be used. Specifically, glycidyl ethers of phenols such as bisphenol A, bisphenol F, resorcinol, phenyl novolac, cresol novolac; butanediol, polyethylene Glycidyl ether of alcohols such as glycol and polypropylene glycol; Glycidyl ether of carboxylic acid such as phthalic acid, isophthalic acid and tetrahydrophthalic acid; Glycidyl type in which active hydrogen bonded to nitrogen atom such as aniline isocyanurate is substituted with glycidyl group or Alkyl glycidyl type epoxy resin; vinylcyclohexane diepoxide, 3,4-epoxycyclohexylmethyl-3,4-dicyclohexanecarboxylate, 2- (3,4-ep
- an epoxy resin having a biphenyl skeleton, a triphenylmethane skeleton, a dicyclohexadiene skeleton, a naphthalene skeleton, or the like can also be used. These epoxy resins can be used alone or in combination of two or more.
- glycidyl ether of bisphenol A bisphenol A type epoxy resin
- epoxy resin having a biphenyl skeleton bisphenol A type epoxy resin
- epoxy resin having a naphthalene skeleton naphthalene type epoxy resin
- phenol resin examples include bisphenol A, tetramethyl bisphenol A, diallyl bisphenol A, biphenol, bisphenol F, diallyl bisphenol F, triphenylmethane phenol, tetrakisphenol, novolac phenol, cresol novolac resin, and biphenyl aralkyl skeleton.
- Phenol (biphenyl type phenol) and the like can be mentioned, and among these, it is preferable to use biphenyl type phenol.
- These phenol resins can be used individually by 1 type or in combination of 2 or more types.
- an epoxy resin as curable resin it is preferable to use a phenol resin together from the viewpoint of reactivity with the epoxy resin.
- the content of the thermosetting resin in the adhesive composition is preferably 10% by mass or more, particularly preferably 15% by mass or more, and more preferably 20% by mass or more. Further, the content is preferably 60% by mass or less, particularly preferably 50% by mass or less, and further preferably 40% by mass or less. When the content is 10% by mass or more, the adhesive layer 11 is sufficiently cured, and the semiconductor chip can be more firmly sealed. Moreover, when the content is 60% by mass or less, curing at an unintended stage of the adhesive layer 11 can be further suppressed, and the storage stability becomes more excellent.
- thermoplastic resin in the sealing sheet 1 which concerns on this embodiment, when the adhesive composition contains a thermoplastic resin, it becomes easy to form the adhesive bond layer 11 in a sheet form. Therefore, the thermoplastic resin is not particularly limited as long as the adhesive layer can be formed into a sheet shape, and for example, a resin usually contained in a sealing material can be used.
- thermoplastic resins include phenoxy resins, olefin resins, polyester resins, polyurethane resins, polyester urethane resins, acrylic resins, amide resins, styrene resins, silane resins, rubber resins, etc. These may be used alone or in combination of two or more.
- a phenoxy-type resin For example, bisphenol A type, bisphenol F type, bisphenol A / bisphenol F copolymerization type, bisphenol S type, bisphenol acetophenone type, novolac type, fluorene type, dicyclopentadiene type, norbornene Type, naphthalene type, anthracene type, adamantane type, terpene type, trimethylcyclohexane type, biphenol type, biphenyl type, etc., among which bisphenol A type phenoxy resin is preferably used.
- the content of the thermoplastic resin in the adhesive composition is preferably 1% by mass or more, particularly preferably 3% by mass or more, and further preferably 5% by mass or more. Further, the content is preferably 30% by mass or less, particularly preferably 20% by mass or less, and further preferably 10% by mass or less. When the content is within the above range, it becomes easier to form the adhesive layer 11 in a sheet shape.
- the adhesive composition preferably further contains an imidazole-based curing catalyst.
- imidazole-based curing catalyst examples include 2-methylimidazole, 2-undecylimidazole, 2-heptadecylimidazole, 2-ethyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-phenylimidazole, 1,2-dimethylimidazole, 1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 1-cyanoethyl -2-undecylimidazole, 1-cyanoethyl-2-phenylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, 2-phenyl-4,5-di (hydroxymethyl) imidazole, etc. From the perspective of sex It is preferred to use 2-ethyl-4-methylimidazole. In addition, an imidazole
- the content of the imidazole curing catalyst in the adhesive composition is preferably 0.01% by mass or more, particularly preferably 0.05% by mass or more, and more preferably 0.1% by mass or more. Preferably there is. Further, the content is preferably 2.0% by mass or less, particularly preferably 1.5% by mass or less, and further preferably 1.0% by mass or less. When the content is in the above range, the adhesive layer 11 can be cured more favorably.
- the adhesive composition may further contain another inorganic filler.
- the other inorganic filler is preferably one that is not easily detached from the cured layer by treatment with an alkaline solution, and particularly preferably an inorganic filler that does not substantially have a hydroxy group on the surface.
- the other inorganic filler may be an inorganic filler that may be detached from the cured layer by the treatment with the alkaline solution, but only to such an extent that the removal hardly contributes to the expansion of the cured layer. Good.
- the adhesive composition may further contain a plasticizer, a stabilizer, a tackifier, a colorant, a coupling agent, an antistatic agent, an antioxidant, and the like.
- the thickness of the adhesive layer 11 can be set in consideration of the use of sealing, the thickness of the cured adhesive layer 11 after sealing, etc. It is preferably 2 ⁇ m or more, particularly preferably 5 ⁇ m or more, and further preferably 10 ⁇ m or more.
- the thickness is preferably 500 ⁇ m or less, particularly preferably 300 ⁇ m or less, and more preferably 100 ⁇ m or less.
- the thickness of the adhesive layer 11 is 2 ⁇ m or more, the adhesive layer 11 can be effectively embedded around the semiconductor chip.
- tip after sealing can be acquired favorably because the thickness of the adhesive bond layer 11 is 500 micrometers or less.
- the sealing sheet 1 may include a release sheet 12.
- the configuration of the release sheet 12 is arbitrary, and examples thereof include plastic films such as polyester films such as polyethylene terephthalate, polybutylene terephthalate, and polyethylene naphthalate, and polyolefin films such as polypropylene and polyethylene. It is preferable that a peeling treatment is performed on these peeling surfaces (surfaces in contact with the adhesive layer 11 of the sealing sheet 1).
- the release agent used for the release treatment include silicone-based, fluorine-based, and long-chain alkyl-based release agents.
- the thickness of the peeling sheet 12 Usually, they are 20 micrometers or more and 250 micrometers or less.
- the sealing sheet 1 which concerns on this embodiment can be manufactured similarly to the conventional sealing sheet.
- an adhesive composition and, if desired, a coating liquid further containing a solvent or a dispersion medium are prepared, and on the release surface of the release sheet 12, a die coater, a curtain coater, a spray coater, a slit coater, a knife coater, etc.
- the sealing sheet 1 can be manufactured by applying the coating liquid to form a coating film and drying the coating film.
- the properties of the coating liquid are not particularly limited as long as it can be applied.
- the coating liquid may contain a component for forming the adhesive layer 11 as a solute or a dispersoid. .
- the release sheet 12 may be released as a process material, or may protect the adhesive layer 11 until it is used for sealing.
- a coating liquid is apply
- a coating film is formed
- a laminate composed of the adhesive layer 11 and the release sheet 12 is formed by drying, and a surface opposite to the release sheet 12 in the adhesive layer 11 of the laminate is pasted on a release surface of another release sheet 12.
- a laminate comprising release sheet 12 / adhesive layer 11 / release sheet 12 can be obtained. At least one of the release sheets 12 in this laminate may be peeled off as a process material, or the adhesive layer 11 may be protected until used for sealing.
- the solvent include organic solvents such as toluene, ethyl acetate, and methyl ethyl ketone.
- a semiconductor device can be manufactured using the sealing sheet 1 according to the present embodiment.
- the manufacturing method includes a step of sealing the semiconductor chip using the sealing sheet 1 and a step of treating the sealing body obtained by the sealing with an alkaline solution.
- Examples of such a manufacturing method of a semiconductor device include a method of manufacturing a chip-embedded substrate including a step of sealing a semiconductor chip embedded in a substrate, and a step of sealing a semiconductor chip on an adhesive sheet. Examples thereof include a method and a method including a step of forming irregularities on the surface of the sealing body.
- the manufacturing method of the semiconductor device which concerns on the 1st aspect, the 2nd aspect, and the 3rd aspect which are demonstrated below is mentioned.
- a method for manufacturing a semiconductor device includes a step of providing one or more semiconductor chips on at least one surface of a substrate (hereinafter referred to as a first aspect).
- the manufacturing method according to the present invention may be referred to as a “preparation step.”), A step of laminating the adhesive layer 11 in the sealing sheet 1 according to the present embodiment so as to cover at least the semiconductor chip (hereinafter, “ In some cases, it is referred to as a “lamination step.”), And a cured layer formed by curing the adhesive layer 11 by curing the adhesive layer 11, a semiconductor chip sealed by the cured layer, and a base material (Hereinafter referred to as “curing step” in some cases), and penetrates from the surface of the cured layer opposite to the substrate to the interface between the cured layer and the semiconductor chip.
- a step of forming a hole (hereinafter sometimes referred to as a “hole forming step”), and a step of desmearing the hole by exposing the sealing body in which the hole is formed to an alkaline solution (hereinafter referred to as a “hole forming step”).
- the method may be referred to as an “alkali treatment step”), and a step of obtaining a chip-embedded substrate by forming an electrode electrically connected to the semiconductor chip through the hole (hereinafter referred to as “electrode” Forming process ”).
- the semiconductor chips 2 are provided on both surfaces of the base material 3 as a preparation step.
- the position where the semiconductor chip 2 provided on one surface of the base material 3 and the semiconductor chip 2 provided on the other surface of the base material 3 do not overlap when the base material 3 is viewed in plan. Is provided.
- the method for providing the semiconductor chip 2 on the substrate 3 is not particularly limited, and a general method can be employed.
- the semiconductor chip 2 is placed at a predetermined position on the base 3 using a pickup device.
- the semiconductor chip 2 may be fixed on the substrate 3 using an adhesive, an adhesive, or the like.
- a material of the base material 3 a base material generally used for manufacturing a chip-embedded substrate can be used.
- the adhesive layer 11 in the sealing sheet 1 according to the present embodiment is laminated on both sides of the substrate 3 as a lamination process.
- the semiconductor chip 2 provided on the base material 3 is covered with the adhesive layer 11 by the lamination.
- the surface of the sealing sheet 1 opposite to the release sheet 12 is laminated on the substrate 3, and then the release sheet 12 is peeled from the adhesive layer 11.
- the adhesive layer 11 is cured to form a cured layer 11 '.
- the curing is preferably performed by heating the adhesive layer 11.
- a sealed body 4 including the cured layer 11 ′, the semiconductor chip 2 sealed with the cured layer 11 ′, and the base material 3 is obtained.
- the hole 5 penetrating the hardened layer 11 ' is formed. Specifically, the hole 5 penetrating from the surface of the hardened layer 11 ′ opposite to the substrate 3 to the interface between the hardened layer 11 ′ and the semiconductor chip 2 is formed.
- the hole 5 can be formed using a general method.
- the hole 5 can be formed by irradiating the surface of the cured layer 11 ′ opposite to the substrate 3 with a laser. Such laser irradiation can be performed under general irradiation conditions using a general laser irradiation apparatus when forming the hole.
- the sealing body 4 in which the holes 5 are formed is exposed to an alkaline solution.
- a residue (smear) of a component constituting the hardened layer 11 ′ may be generated and the smear may remain in the hole 5.
- Such smear can be removed by exposing the sealing body 4 to an alkaline solution.
- Such a process is also called a desmear process, and by removing the smear in the hole 5, when an electrode is formed in the hole 5 in an electrode forming process to be described later, the conduction failure of the electrode can be suppressed.
- the treatment exposed to the alkaline solution can be performed by a general method, for example, by immersing the sealing body 4 in an alkaline solution at 30 ° C. or higher and 120 ° C. or lower for 15 minutes.
- a solution generally used for desmear treatment can be used.
- a sodium hydroxide solution containing potassium permanganate, sodium permanganate and sodium hydroxide are used.
- the aqueous solution etc. which contain can be used.
- the aqueous solution etc. which contain potassium hydroxide other than the aqueous solution containing sodium permanganate and sodium hydroxide can be used.
- an electrode 6 is formed in the hole 5 as an electrode forming step.
- the electrode 6 is electrically connected to the semiconductor chip 2 through the hole 5.
- the electrode 6 can be formed by a general method. For example, a plating process using a metal such as copper is performed on the surface of the hardened layer 11 ′ where the hole 5 is formed, and the metal is embedded in the hole 5. Subsequently, unnecessary portions of the plated metal can be removed by etching or the like, and the electrode 6 can be formed as a remaining metal piece. Note that the chip-embedded substrate 7 can be obtained by forming the electrode 6.
- the cured layer 11 ′ formed using the sealing sheet 1 according to the present embodiment contains an inorganic filler that has been surface-treated with the above-described surface treatment agent. Most of the hydroxy groups present on the surface of the inorganic filler have disappeared due to the reaction with the surface treatment agent.
- Such an inorganic filler has a low affinity with an alkaline solution, and therefore, when the cured layer 11 ′ is exposed to the alkaline solution in the alkali treatment step, the inorganic filler is difficult to be detached from the cured layer 11 ′. As a result, expansion of the hardened layer 11 ′ is suppressed even when the temperature of the hardened layer 11 ′ increases during the subsequent manufacturing process of the semiconductor device or when the manufactured semiconductor device is used. Therefore, the semiconductor device which has favorable performance can be manufactured by using the sealing sheet 1 which concerns on this embodiment.
- the number of semiconductor chips mounted on the substrate surface can be reduced by the amount of the predetermined semiconductor chip 2 embedded therein. Therefore, the surface area of the substrate can be reduced. That is, the substrate can be reduced in size. Also, compared to the case where all electronic components such as conductor chips and semiconductor devices are mounted on the substrate surface, the length of the wiring between the built-in semiconductor chip and the electronic component mounted on the surface is reduced. As a result, the electrical characteristics can be improved and the density of electronic components on the substrate after mounting can be increased.
- a method for manufacturing a semiconductor device includes a step of providing one or more semiconductor chips on an adhesive surface of an adhesive sheet (hereinafter referred to as the second aspect).
- the manufacturing method may be referred to as “preparation step”.)
- a step of obtaining a stationary body (hereinafter sometimes referred to as “curing step” for the method), a step of peeling the pressure-sensitive adhesive sheet from the sealing body (hereinafter referred to as “peeling step” for the method).
- a step of laminating an interlayer insulating film on the surface of the sealing body exposed by peeling of the pressure-sensitive adhesive sheet (hereinafter sometimes referred to as “interlayer insulating film laminating step”),
- a step of forming a hole penetrating from the surface opposite to the sealing body to the interface between the interlayer insulating film and the semiconductor chip (hereinafter, the method may be referred to as a “hole forming step”), and a hole is formed.
- the sealing body on which the interlayer insulating film is laminated is exposed to an alkaline solution, whereby a hole is desmeared (hereinafter sometimes referred to as an “alkali treatment process”), and the semiconductor chip is passed through the hole.
- a step of forming an electrically connected electrode hereinafter, this method may be referred to as an “electrode formation step”).
- FIG. 4A is cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to the second aspect.
- the semiconductor chip 2 is provided on one side of the adhesive sheet 8 as a preparation step.
- the method of providing the semiconductor chip 2 on the adhesive sheet 8 is not particularly limited, and a general method can be adopted.
- the semiconductor chip 2 is placed at a predetermined position of the adhesive sheet 8 using a pickup device. In this case, it is preferable to provide the semiconductor chip 2 on the adhesive surface of the adhesive sheet 8.
- the adhesive sheet 8 is not particularly limited as long as the semiconductor chip 2 can be fixed on the sheet by the adhesive force exerted by the sheet.
- the adhesive sheet 8 includes a base material and an adhesive layer laminated on the base material.
- the pressure-sensitive adhesive layer is preferably energy ray curable. Thereby, it becomes possible to harden an adhesive layer by irradiation of an energy ray and to reduce the adhesive force of the adhesive sheet 8. As a result, it becomes easy to peel the pressure-sensitive adhesive sheet 8 from the sealing body 6 in the peeling step described later.
- the adhesive layer 11 in the sealing sheet 1 according to the present embodiment is provided on the surface side of the pressure-sensitive adhesive sheet 8 on which the semiconductor chip 2 is provided. Are laminated.
- the semiconductor chip 2 provided on the pressure-sensitive adhesive sheet 8 is covered with the adhesive layer 11 by the lamination.
- the surface of the sealing sheet 1 opposite to the release sheet 12 is laminated on the pressure-sensitive adhesive sheet 8, and then the release sheet 12 is peeled from the adhesive layer 11.
- the adhesive layer 11 is cured to form a cured layer 11 '.
- the curing is preferably performed by heating the adhesive layer 11.
- a sealed body 4 including the cured layer 11 ′ and the semiconductor chip 2 sealed with the cured layer 11 ′ is obtained.
- the pressure-sensitive adhesive sheet 8 is peeled from the sealing body 4 as a peeling step.
- the pressure-sensitive adhesive sheet 8 includes the pressure-sensitive adhesive layer having energy ray curability
- the pressure-sensitive adhesive force of the pressure-sensitive adhesive sheet 8 is obtained by irradiating the pressure-sensitive adhesive layer with an energy ray before curing. And the peeling can be easily performed.
- an interlayer insulating film 9 is stacked on the surface of the sealing body 4 exposed by peeling of the adhesive sheet 8.
- the interlayer insulating film 9 can be laminated by a general method.
- a silicon material, an organic polymer, a silicon oxide film, or the like is sealed by a CVD method, a spin coating method, a dip coating method, a spray method, or the like.
- the interlayer insulating film 9 can be formed.
- the hole 5 penetrating the interlayer insulating film 9 is formed. Specifically, a hole 5 penetrating from the surface of the interlayer insulating film 9 opposite to the base 3 to the interface between the interlayer insulating film 9 and the semiconductor chip 2 is formed. In the cross-sectional view of FIG. 5B, a state in which two holes 5 are formed in one semiconductor chip 2 is shown.
- the hole 5 may be formed by a general method.
- the hole 5 may be formed by irradiating the surface of the interlayer insulating film 9 opposite to the substrate 3 with a laser. Such laser irradiation can be performed under general irradiation conditions by using a laser irradiation apparatus that is generally used for forming holes.
- the sealing body 4 on which the interlayer insulating film 9 in which the holes 5 are formed is laminated is exposed to an alkaline solution.
- the hole forming step when the hole 5 is formed in the interlayer insulating film 9, a residue (smear) of a component constituting the interlayer insulating film 9 is generated, and the smear may remain in the hole 5.
- the alkali treatment step smear in the hole 5 can be removed, and when an electrode is formed in the hole 5 in the electrode forming step described later, conduction failure of the electrode can be suppressed.
- the method and type demonstrated in the manufacturing method of the semiconductor device which concerns on a 1st aspect can be used for the method exposed to alkaline solution, and the kind of alkaline solution.
- an electrode 6 is formed in the hole 5 as an electrode forming step.
- the electrode 6 is electrically connected to the semiconductor chip 2 through the hole 5.
- the formation of the electrode 6 can be performed by a general method. For example, the method for forming the electrode 6 described in the method for manufacturing the semiconductor device according to the first aspect can be used.
- the cured layer 11 ′ formed using the sealing sheet 1 according to the present embodiment contains an inorganic filler that has been surface-treated with the above-described surface treatment agent. Most of the hydroxy groups present on the surface of the inorganic filler have disappeared due to the reaction with the surface treatment agent.
- Such an inorganic filler has a low affinity with an alkaline solution, and therefore, when the cured layer 11 ′ is exposed to the alkaline solution in the alkali treatment step, the inorganic filler is difficult to be detached from the cured layer 11 ′. As a result, expansion of the hardened layer 11 ′ is suppressed even when the temperature of the hardened layer 11 ′ increases during the subsequent manufacturing process of the semiconductor device or when the manufactured semiconductor device is used. Therefore, the semiconductor device which has favorable performance can be manufactured by using the sealing sheet 1 which concerns on this embodiment.
- semiconductor packages such as a fan-out type wafer level package, etc. can be manufactured as a semiconductor device.
- a method for manufacturing a semiconductor device includes a step of providing one or more semiconductor chips on at least one surface of a base material or on an adhesive surface of an adhesive sheet.
- the manufacturing method according to the third aspect may be referred to as “preparation step”.
- the method may be referred to as “lamination step”.
- a step of obtaining a sealing body including a semiconductor chip (hereinafter, sometimes referred to as “curing step” for the method), and exposing the sealing body to an alkaline solution on the surface of the sealing body
- a step of forming irregularities (hereinafter, the method may be referred to as an “alkali treatment step”).
- the preparation step, the stacking step, and the curing step can be performed in the same manner as the steps described in the method for manufacturing a semiconductor device according to the first aspect.
- the sealing body 4 is exposed to an alkaline solution to form irregularities on the surface of the sealing body 4.
- the conditions of this treatment can be appropriately determined according to the unevenness to be formed.
- the sealing body 4 is immersed in an alkaline solution at 60 ° C. or higher and 90 ° C. or lower for 5 minutes. It can be carried out.
- the alkaline solution is also appropriately selected according to the unevenness to be formed, and for example, the alkaline solution mentioned in the description of the method for manufacturing the semiconductor device according to the first aspect can be used.
- the cured layer 11 ′ formed using the sealing sheet 1 according to the present embodiment contains an inorganic filler that has been surface-treated with the above-described surface treatment agent. Most of the hydroxy groups present on the surface of the inorganic filler have disappeared due to the reaction with the surface treatment agent.
- Such an inorganic filler has a low affinity with an alkaline solution, and therefore, when the cured layer 11 ′ is exposed to the alkaline solution in the alkali treatment step, the inorganic filler is difficult to be detached from the cured layer 11 ′. As a result, expansion of the hardened layer 11 ′ is suppressed even when the temperature of the hardened layer 11 ′ increases during the subsequent manufacturing process of the semiconductor device or when the manufactured semiconductor device is used. Therefore, also when using the sealing sheet 1 which concerns on this embodiment for the manufacturing method of a semiconductor device provided with the process of surface unevenness
- Examples 1 and 2 and Comparative Examples 1 and 2 The constituent components shown in Table 1 were mixed and diluted with methyl ethyl ketone to obtain an adhesive composition coating liquid having a solid content concentration of 40% by mass.
- the coating liquid is applied onto the release surface of a release film (product name “SP-PET 381031”, manufactured by Lintec Corporation) on which one side is subjected to silicone release treatment, and the obtained coating film is heated in an oven at 100 ° C. for 1 minute. By drying, the sealing sheet which consists of a 25-micrometer-thick adhesive layer and a peeling film was obtained.
- the surface treatment of the inorganic filler shown in Table 1 was conducted by adding 1 part by mass of a surface treating agent after stirring methyl ethyl ketone and 100 parts by mass of an untreated inorganic filler at 40 ° C. in an eggplant flask, It was performed by stirring for 180 minutes.
- FIG. 6 shows a photograph according to Example 1
- FIG. 7 shows a photograph according to Example 2
- FIG. 8 shows a photograph according to Comparative Example 1
- FIG. 9 shows a photograph according to Comparative Example 2. Each is shown.
- the sealing sheets obtained in the examples hardly caused the inorganic filler to be detached from the cured layer even by treatment with an alkaline solution.
- the sealing sheet according to the present invention is less likely to cause the inorganic filler to be detached from the cured layer, so that the cured layer is less likely to expand due to heating. Therefore, the manufacturing of a semiconductor device such as a chip built-in substrate or a fan-out type wafer level package Can be suitably used.
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Abstract
Description
SiR3-N(H)-SiR3 … (1)
〔式(1)中、Rは、それぞれ独立に、炭素数が1以上、6以下である、置換されたまたは置換されていないアルキル基を表す。〕の構造を有する化合物であることが好ましい(発明3)。
〔封止シート〕
図1には、本実施形態に係る封止シート1の断面図が示される。図1に示すように、本実施形態に係る封止シート1は、接着剤層11と、当該接着剤層11の少なくとも一方の面に積層された剥離シート12とを備える。なお、接着剤層11における剥離シート12とは反対の面に、別の剥離シートがさらに積層されてもよい。ただし、剥離シート12および別の剥離シートは省略されてもよい。
(1)無機フィラー
本実施形態に係る封止シート1では、接着剤組成物に含まれる無機フィラーが表面処理剤により表面処理されている。これにより、硬化層からの当該無機フィラーの脱離が抑制される。また、接着剤組成物が無機フィラーを含有することにより、硬化層が優れた機械的強度を有するものとなり、得られる半導体装置の信頼性が向上する。
SiR3-N(H)-SiR3 … (1)
〔式(1)中、Rは、それぞれ独立に、炭素数が1以上、6以下である、置換されたまたは置換されていないアルキル基を表す。〕
の構造を有する化合物であることが好ましい。
本実施形態に係る封止シート1では、接着剤組成物が熱硬化性樹脂を含有することにより、半導体チップを強固に封止することが可能となる。熱硬化性樹脂としては、接着剤層11の硬化を可能とするものであれば特に限定されず、例えば、封止材に通常含有される樹脂を使用することができる。具体的には、エポキシ樹脂、フェノール樹脂、メラミン樹脂、尿素樹脂、ポリエステル樹脂、ウレタン樹脂、アクリル樹脂、ポリイミド樹脂、ベンゾオキサジン樹脂、フェノキシ樹脂、酸無水物化合物、アミン系化合物などが挙げられ、これらは1種を単独でまたは2種以上を組み合わせて用いることができる。これらの中でも、イミダゾール系硬化触媒を使用した硬化に適すという観点から、エポキシ樹脂、フェノール樹脂、メラミン樹脂、尿素樹脂、酸無水物化合物およびアミン系化合物を使用することが好ましく、特に、優れた接着性を示すという観点から、エポキシ樹脂、フェノール樹脂、それらの混合物、またはエポキシ樹脂と、フェノール樹脂、メラミン樹脂、尿素樹脂、アミン系化合物および酸無水物系化合物からなる群から選択される少なくとも1種との混合物を使用することが好ましい。
本実施形態に係る封止シート1では、接着剤組成物が熱可塑性樹脂を含有することにより、接着剤層11をシート状に形成することが容易となる。そのため、当該熱可塑性樹脂としては、接着剤層をシート状に形成することを可能とするものであれば特に限定されず、例えば、封止材に通常含有される樹脂を使用することができる。熱可塑性樹脂の例としては、フェノキシ系樹脂、オレフィン系樹脂、ポリエステル系樹脂、ポリウレタン系樹脂、ポリエステルウレタン系樹脂、アクリル系樹脂、アミド系樹脂、スチレン系樹脂、シラン系樹脂、ゴム系樹脂等が挙げられ、これらは、1種を単独で、または2種以上を組み合わせて用いることができる。
本実施形態に係る封止シート1では、接着剤組成物が、イミダゾール系硬化触媒をさらに含有することが好ましい。これにより、熱硬化性樹脂の硬化反応を効果的に進行させることが可能となり、接着剤層11を良好に硬化することが可能となる。
接着剤組成物は、前述した表面処理剤により表面処理された無機フィラーに加えて、別の無機フィラーをさらに含有してもよい。この場合、当該別の無機フィラーは、アルカリ性溶液の処理によって硬化層から脱離し難いものであることが好ましく、特に、表面にヒドロキシ基を実質的に有しない無機フィラーであることが好ましい。あるいは、当該別の無機フィラーは、アルカリ性溶液の処理によって硬化層から脱離する場合があるものの、当該脱離が硬化層の膨張に殆ど寄与しない程度にしか生じないような無機フィラーであってもよい。
接着剤層11の厚さは、封止の用途や、封止後の硬化した接着剤層11の厚さ等を考慮して設定することができるが、例えば、2μm以上であることが好ましく、特に5μm以上であることが好ましく、さらには10μm以上であることが好ましい。また、当該厚さは、500μm以下であることが好ましく、特に300μm以下であることが好ましく、さらには100μm以下であることが好ましい。接着剤層11の厚さが2μm以上であることで、接着剤層11を半導体チップの周囲に効果的に埋め込むことができる。また、接着剤層11の厚さが500μm以下であることで、封止後のチップを保護する効果を良好に得ることができる。
本実施形態に係る封止シート1は、剥離シート12を備えていてもよい。剥離シート12の構成は任意であり、例えば、ポリエチレンテレフタレート、ポリブチレンテレフタレート、ポリエチレンナフタレート等のポリエステルフィルム、ポリプロピレン、ポリエチレン等のポリオレフィンフィルムなどのプラスチックフィルムが挙げられる。これらの剥離面(封止シート1の接着剤層11と接する面)には、剥離処理が施されていることが好ましい。剥離処理に使用される剥離剤としては、例えば、シリコーン系、フッ素系、長鎖アルキル系等の剥離剤が挙げられる。
本実施形態に係る封止シート1は、従来の封止シートと同様に製造することができる。例えば、接着剤組成物、および所望によりさらに溶媒または分散媒を含有する塗工液を調製し、剥離シート12の剥離面上に、ダイコーター、カーテンコーター、スプレーコーター、スリットコーター、ナイフコーター等によりその塗工液を塗布して塗膜を形成し、当該塗膜を乾燥させることにより封止シート1を製造することができる。塗工液は、塗布を行うことが可能であればその性状は特に限定されず、接着剤層11を形成するための成分を溶質として含有する場合もあれば、分散質として含有する場合もある。剥離シート12は工程材料として剥離してもよいし、封止に使用するまでの間、接着剤層11を保護していてもよい。
本実施形態に係る封止シート1を使用して、半導体装置を製造することができる。特に、この製造方法は、封止シート1を使用して半導体チップを封止する工程、および当該封止により得られた封止体をアルカリ性溶液により処理する工程を含む。このような半導体装置の製造方法の例としては、基板内に内蔵される半導体チップを封止する工程を含む、チップ内蔵基板を製造する方法、粘着シート上において半導体チップを封止する工程を含む方法、封止体の表面に凹凸を形成する工程を含む方法等が挙げられる。具体的には、以下に説明する第1の態様、第2の態様および第3の態様に係る半導体装置の製造方法が挙げられる。
第1の態様に係る半導体装置の製造方法は、基材の少なくとも一方の面上に1または2以上の半導体チップを設ける工程(以下、第1の態様に係る製造方法について「準備工程」という場合がある。)、少なくとも当該半導体チップを覆うように、本実施形態に係る封止シート1における接着剤層11を積層する工程(以下、当該方法について「積層工程」という場合がある。)、および当該接着剤層11を硬化することで、当該接着剤層11が硬化してなる硬化層と、当該硬化層により封止された半導体チップと、基材とを備える封止体を得る工程(以下、当該方法について「硬化工程」という場合がある。)、硬化層における基材とは反対側の面から、硬化層と半導体チップとの界面までを貫通する孔を形成する工程(以下、当該方法について「孔形成工程」という場合がある。)、当該孔が形成された封止体をアルカリ性溶液に晒すことで、当該孔をデスミア処理する工程(以下、当該方法について「アルカリ処理工程」という場合がある。)、および当該孔を通じて半導体チップに電気的に接続された電極を形成することで、チップ内蔵基板を得る工程(以下、当該方法について「電極形成工程」という場合がある。)を含む。
第2の態様に係る半導体装置の製造方法は、粘着シートの粘着面上に1または2以上の半導体チップを設ける工程(以下、第2の態様に係る製造方法について「準備工程」という場合がある。)、少なくとも当該半導体チップを覆うように、本実施形態に係る封止シート1における接着剤層11を積層する工程(以下、当該方法について「接着剤層積層工程」という場合がある。)、当該接着剤層11を硬化することで、当該接着剤層11が硬化してなる硬化層と、当該硬化層により封止された半導体チップとを備える封止体を得る工程(以下、当該方法について「硬化工程」という場合がある。)、当該封止体から当該粘着シートを剥離する工程(以下、当該方法について「剥離工程」という場合がある。)、当該粘着シートの剥離により露出した封止体の面に、層間絶縁膜を積層する工程(以下、当該方法について「層間絶縁膜積層工程」という場合がある。)、層間絶縁膜における封止体とは反対側の面から、層間絶縁膜と半導体チップとの界面までを貫通する孔を形成する工程(以下、当該方法について「孔形成工程」という場合がある。)、孔が形成された層間絶縁膜が積層された封止体をアルカリ性溶液に晒すことで、孔をデスミア処理する工程(以下、当該方法について「アルカリ処理工程」という場合がある。)、および孔を通じて半導体チップに電気的に接続された電極を形成する工程(以下、当該方法について「電極形成工程」という場合がある。)を含む。
第3の態様に係る半導体装置の製造方法は、基材の少なくとも一方の面上または粘着シートの粘着面上に1または2以上の半導体チップを設ける工程(以下、第3の態様に係る製造方法について「準備工程」という場合がある。)、少なくとも当該半導体チップを覆うように、本実施形態に係る封止シート1における接着剤層11を積層する工程(以下、当該方法について「積層工程」という場合がある。)、当該接着剤層11を硬化することで、当該接着剤層11が硬化してなる硬化層と、当該硬化層により封止された半導体チップとを備える封止体を得る工程(以下、当該方法について「硬化工程」という場合がある。)、および、当該封止体をアルカリ性溶液に晒すことで、当該封止体の表面に凹凸を形成する工程(以下、当該方法について「アルカリ処理工程」という場合がある。)を含む。
表1に示す構成成分を混合し、メチルエチルケトンにて希釈して、固形分濃度が40質量%である接着剤組成物塗工液を得た。当該塗工液を、片面がシリコーン剥離処理された剥離フィルム(リンテック社製,製品名「SP-PET381031」)の剥離面上に塗布し、得られた塗膜をオーブンにて100℃で1分間乾燥することで、厚さ25μmの接着剤層と剥離フィルムとからなる封止シートを得た。
実施例および比較例で作製した封止シートを銅張り積層板上にラミネートした後、100℃で60分間加熱し、さらに170℃で60分間加熱することにより、接着剤層を硬化させた。硬化後の接着剤層を含む封止シートと銅張り積層板との積層体を、アルカリ性溶液としての過マンガン酸カリウムを含有する水酸化ナトリウム溶液中に80℃で15分間浸漬した。当該浸漬後の測定用サンプルの表面を、走査型電子顕微鏡(日立製作所社製,製品名「S-4700」)を用いて、加速電圧10kV、傾斜角30度、倍率10000倍の条件で撮影した。得られた写真を図6~9に示す。ここで、図6には実施例1に係る写真が、図7には実施例2に係る写真が、図8には比較例1に係る写真が、図9には比較例2に係る写真がそれぞれ示される。
[熱可塑性樹脂]
BisA型フェノキシ樹脂:ビスフェノールA型フェノキシ樹脂(三菱化学社製,製品名「jER1256」)
[熱硬化性樹脂]
BisA型エポキシ樹脂:ビスフェノールA型エポキシ樹脂(三菱化学社製,製品名「jER828」)
ビフェニル型エポキシ樹脂:ビフェニル型エポキシ樹脂(日本化薬社製,製品名「NC-3000-L」)
ナフタレン型エポキシ樹脂:ナフタレン型エポキシ樹脂(DIC社製,製品名「HP-4700」)
ビフェニル型フェノール:ビフェニル型フェノール(明和化成社製,製品名「MEHC-7851-SS」)
[硬化触媒]
イミダゾール系熱硬化触媒:2-エチル-4-メチルイミダゾール(四国化成社製,製品名「2E4MZ」)
[無機フィラー]
シラザン処理シリカフィラー:シリカフィラー(アドマテックス社製,製品名「SO-C2」,平均粒径:0.5μm,最大粒径:2μm,形状:球状)を、1,1,1,3,3,3-ヘキサメチルジシラザン(信越化学社製,製品名「SZ-31」,最小被覆面積:967m2/g)を用いて表面処理したもの
ジメチルジメトキシシラン処理シリカフィラー:シリカフィラー(アドマテックス社製,製品名「SO-C2」,平均粒径:0.5μm,最大粒径:2μm,形状:球状)を、ジメチルジメトキシシラン(信越化学社製,製品名「KBM-22」,最小被覆面積:649m2/g)を用いて表面処理したもの
エポキシシラン処理シリカフィラー:シリカフィラー(アドマテックス社製,製品名「SO-C2」,平均粒径:0.5μm,最大粒径:2μm,形状:球状)を、3-グリシドキシプロピルトリメトキシシラン(信越化学社製,製品名「KBM-403」,最小被覆面積:330m2/g)を用いて表面処理したもの
ビニルシラン処理シリカフィラー:シリカフィラー(アドマテックス社製,製品名「SO-C2」,平均粒径:0.5μm,最大粒径:2μm,形状:球状)を、ビニルトリメトキシシラン(信越化学社製,製品名「KBM-1003」,最小被覆面積:515m2/g)を用いて表面処理したもの
11…接着剤層
11’…硬化層
12…剥離シート
2…半導体チップ
3…基材
4…封止体
5…孔
6…電極
7…チップ内蔵基板
8…粘着シート
9…層間絶縁膜
Claims (11)
- アルカリ性溶液を用いた処理工程を有する半導体装置の製造方法において、基板内に内蔵される半導体チップの封止または粘着シート上における半導体チップの封止に用いられる封止シートであって、
前記封止シートは、少なくとも硬化性の接着剤層を備え、
前記接着剤層は、熱硬化性樹脂、熱可塑性樹脂、および最小被覆面積が550m2/g以上、1500m2/g以下である表面処理剤により表面処理された無機フィラーを含有する接着剤組成物から形成されたものであることを特徴とする封止シート。 - 前記表面処理剤は、シラザン化合物、アルコキシシランおよびシランカップリング剤からなる群から選択される少なくとも1種であることを特徴とする請求項1に記載の封止シート。
- 前記シラザン化合物は、下記式(1)
SiR3-N(H)-SiR3 … (1)
〔式(1)中、Rは、それぞれ独立に、炭素数が1以上、6以下である、置換されたまたは置換されていないアルキル基を表す。〕
の構造を有する化合物であることを特徴とする請求項2に記載の封止シート。 - 前記無機フィラーは、シリカフィラーまたはアルミナフィラーであることを特徴とする請求項1~3のいずれか一項に記載の封止シート。
- 前記無機フィラーの平均粒径は、0.01μm以上、3.0μm以下であることを特徴とする請求項1~4のいずれか一項に記載の封止シート。
- 前記無機フィラーの最大粒径は、0.05μm以上、5.0μm以下であることを特徴とする請求項1~5のいずれか一項に記載の封止シート。
- 前記無機フィラーは、球状であることを特徴とする請求項1~6のいずれか一項に記載の封止シート。
- 前記接着剤組成物は、イミダゾール系硬化触媒をさらに含有することを特徴とする請求項1~7のいずれか一項に記載の封止シート。
- 基材の少なくとも一方の面上に1または2以上の半導体チップを設ける工程、
少なくとも前記半導体チップを覆うように、請求項1~8のいずれか一項に記載の封止シートにおける前記接着剤層を積層する工程、
前記接着剤層を硬化することで、前記接着剤層が硬化してなる硬化層と、前記硬化層により封止された前記半導体チップと、前記基材とを備える封止体を得る工程、
前記硬化層における前記基材とは反対側の面から、前記硬化層と前記半導体チップとの界面までを貫通する孔を形成する工程、
前記孔が形成された前記封止体をアルカリ性溶液に晒すことで、前記孔をデスミア処理する工程、および
前記孔を通じて前記半導体チップに電気的に接続された電極を形成することで、チップ内蔵基板を得る工程
を含むことを特徴とする半導体装置の製造方法。 - 粘着シートの粘着面上に1または2以上の半導体チップを設ける工程、
少なくとも前記半導体チップを覆うように、請求項1~8のいずれか一項に記載の封止シートにおける前記接着剤層を積層する工程、
前記接着剤層を硬化することで、前記接着剤層が硬化してなる硬化層と、前記硬化層により封止された前記半導体チップとを備える封止体を得る工程、
前記封止体から前記粘着シートを剥離する工程、
前記粘着シートの剥離により露出した前記封止体の面に、層間絶縁膜を積層する工程、
前記層間絶縁膜における前記封止体とは反対側の面から、前記層間絶縁膜と前記半導体チップとの界面までを貫通する孔を形成する工程、
前記孔が形成された前記層間絶縁膜が積層された前記封止体をアルカリ性溶液に晒すことで、前記孔をデスミア処理する工程、および
前記孔を通じて前記半導体チップに電気的に接続された電極を形成する工程
を含むことを特徴とする半導体装置の製造方法。 - 基材の少なくとも一方の面上または粘着シートの粘着面上に1または2以上の半導体チップを設ける工程、
少なくとも前記半導体チップを覆うように、請求項1~8のいずれか一項に記載の封止シートにおける前記接着剤層を積層する工程、
前記接着剤層を硬化することで、前記接着剤層が硬化してなる硬化層と、前記硬化層により封止された前記半導体チップとを備える封止体を得る工程、および
前記封止体をアルカリ性溶液に晒すことで、前記封止体の表面に凹凸を形成する工程
を含むことを特徴とする半導体装置の製造方法。
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