WO2018126337A1 - 多路延时控制装置及控制电源 - Google Patents

多路延时控制装置及控制电源 Download PDF

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Publication number
WO2018126337A1
WO2018126337A1 PCT/CN2017/000039 CN2017000039W WO2018126337A1 WO 2018126337 A1 WO2018126337 A1 WO 2018126337A1 CN 2017000039 W CN2017000039 W CN 2017000039W WO 2018126337 A1 WO2018126337 A1 WO 2018126337A1
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Prior art keywords
resistor
field effect
delay control
channel
insulated gate
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PCT/CN2017/000039
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English (en)
French (fr)
Inventor
尹朋
侯晓东
兰启庆
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深圳配天智能技术研究院有限公司
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Priority to PCT/CN2017/000039 priority Critical patent/WO2018126337A1/zh
Priority to CN201780002238.XA priority patent/CN107980206A/zh
Publication of WO2018126337A1 publication Critical patent/WO2018126337A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching
    • H03K17/284—Modifications for introducing a time delay before switching in field effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/296—Time-programme switches providing a choice of time-intervals for executing more than one switching action and automatically terminating their operation after the programme is completed
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof

Definitions

  • the invention relates to the field of automatic control, in particular to a device and a control power supply for multi-channel delay control.
  • Multi-channel delay control is widely used in circuit design to realize delay switching of different states of multiple circuits.
  • the existing multi-channel delay control device adopts special IC or logic chip control.
  • the logic function of the dedicated IC or logic chip is realized by the designer by means of the development tool, and the program is used to realize the delay. Control and delay switching function.
  • An embodiment of the present invention provides a multi-channel delay control device, including: an input power supply and N sets of delay control circuits, each set of delay control circuits includes: a capacitor, a resistor, and an N-channel enhanced insulated gate type.
  • the field effect transistor wherein the first end of the capacitor is connected to the input power source, the second end of the capacitor is connected to the first end of the resistor and the gate of the N-channel enhanced insulated gate field effect transistor; the second end of the resistor Grounding; the drain of the N-channel reinforced insulated gate field effect transistor is suspended as the output terminal of the delay control device, the source of the N-channel reinforced insulated gate field effect transistor is grounded, and the N-channel enhanced IGBT
  • the type field effect tube is used to control the switching of the output state of the delay control circuit; the input power source is used to charge the capacitor, and the output voltage of the input power source is greater than or equal to the relationship between the source and the gate of the plurality of sets of N-channel enhanced insulated gate type FETs.
  • Another embodiment of the present invention provides a multi-channel delay control power supply, including: an input power supply, N sets of delay control circuits, and N sets of secondary power supplies, each set of delay control circuits including: capacitor, resistor, N a channel-enhanced insulated gate field effect transistor, a pull-up resistor, and a pull-up power supply, wherein the first end of the capacitor is connected to the input power source, and the second end of the capacitor is insulated from the first end of the resistor and the N-channel enhancement type The gate of the gate field effect transistor is connected; the second end of the resistor is grounded; the drain of the N-channel enhancement type insulated gate field effect transistor is respectively connected with the first end of the pull-up resistor and the third end of the secondary power source For control Delayed power-on of the secondary power supply, the source of the N-channel reinforced insulated gate field effect transistor is grounded; the first end of the pull-up resistor and the drain of the N-channel reinforced insulated gate field effect transistor and The third end of the secondary power supply is connected
  • the multi-channel delay control device and the control power supply realize different delay switching and delay by using N-channel enhanced insulated gate field effect transistor, resistor, capacitor and other discrete devices. Power-on, and the delay can be changed by changing the size of the resistor and capacitor. The requirements for the operator are low and easy to use.
  • FIG. 1 is a schematic diagram of an embodiment of a multi-channel delay control apparatus according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of another embodiment of a multi-channel delay control apparatus according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of an embodiment of a multi-channel delay control power supply according to an embodiment of the present invention.
  • the embodiment of the invention provides a multi-channel delay control device and a control power supply, which are used for simple and convenient control of multiple different delay switching and delay power-on.
  • an embodiment of a multiple delay control apparatus in an embodiment of the present invention includes:
  • each set of delay control circuits includes:
  • the first end of the capacitor 102 is connected to the input power source 101, and the second end of the capacitor 102 is connected to the first end of the resistor 103 and the gate of the N-channel enhancement type insulated gate field effect transistor 104;
  • the second end of the resistor 103 is grounded
  • the drain of the N-channel enhancement type insulated gate field effect transistor 104 is suspended, and serves as an output terminal of the delay control device.
  • the source of the N-channel enhancement type insulated gate field effect transistor 104 is grounded, and the N-channel enhancement type insulated gate
  • the type field effect transistor 104 is used to control the switching of the output state of the delay control circuit;
  • the input power source 101 is used to charge the capacitor 102.
  • the output voltage of the input power source 101 is greater than or equal to the cutoff voltage between the source and the gate of the plurality of sets of N-channel enhancement type insulated gate field effect transistors 104;
  • Capacitor 102 is discharged through resistor 103, and capacitor 102 and resistor 103 are used to control the delay time of the delay control circuit.
  • the above N groups include:
  • the input power supply voltage is generally 12V
  • the capacitance capacity is 100nF
  • the cut-off voltage between the source and the gate of the N-channel enhanced insulated gate field effect transistor is 1.2V
  • the multi-channel delay control device In the initial state, the capacitor is charged by the input power supply, and the capacitor is charged instantaneously.
  • the voltage across the capacitor is 12V of the input power source, which is much larger than the source and the gate of the N-channel enhanced insulated gate field effect transistor.
  • the cutoff voltage is 1.2V.
  • the source and the drain of the N-channel enhancement type insulated gate field effect transistor are in an on state, and the multi-channel delay control device outputs a zero potential.
  • the capacitor When the capacitor is fully charged, the capacitor begins to discharge through the resistor. When the voltage across the capacitor is discharged to less than 1.2V between the source and the gate of the N-channel enhancement type insulated gate field effect transistor, the N trench The channel-enhanced insulated gate field effect transistor is in an off state between the source and the drain, and the multi-channel delay control device outputs a high impedance state.
  • the delay time of the delay control device can be controlled by changing the size of the resistor and the capacitor to achieve the purpose of delay control.
  • the multi-channel delay control device realizes multiple different delay switching by using N-channel enhanced insulated gate field effect transistor 104, resistor 103, capacitor 102 and the like, and can change the resistance 103 and The size of the capacitor 102 is used to achieve a delay change, which is low on the operator's requirements and is easy to use.
  • FIG. 2 another embodiment of the multi-channel delay control device in the embodiment of the present invention includes:
  • each group of delay control circuits includes:
  • Capacitor C resistor R, N channel enhanced insulated gate field effect transistor Q, pull-up resistor r, pull-up power supply V and output terminal S;
  • the input power source VC is connected to the first end of the capacitor C;
  • the second end of the capacitor C is connected to the first end of the resistor R and the gate of the N-channel enhancement type insulated gate field effect transistor Q;
  • the second end of the resistor R is grounded
  • the drain of the N-channel reinforced insulated gate field effect transistor Q is connected to the first end of the pull-up resistor r, and serves as the output terminal S of the multi-channel delay control device, and the N-channel enhanced insulated gate field effect
  • the source of the tube Q is grounded, and the N-channel enhanced insulated gate field effect transistor Q is used to control the switching of the output state of the delay control circuit;
  • the second end of the pull-up resistor r is connected to the pull-up power supply V;
  • the input power source VC is used to charge the capacitor C.
  • the output voltage of the input power source VC is greater than or equal to the cutoff voltage between the source and the gate of the plurality of sets of N-channel enhancement type insulated gate type field effect transistors Q;
  • Capacitor C is discharged through resistor R, and capacitor C and resistor R are used to control the delay time of the delay control circuit;
  • the pull-up resistor r and the pull-up power supply V are used to increase the output potential of the output terminal S of the multi-channel delay control device when the N-channel enhanced insulated gate field effect transistor outputs a high impedance state, so that the multi-channel delay control device The output is high.
  • the above-mentioned N sets of delay control circuits include: 2 sets and 2 sets of control circuits.
  • the resistor R may be a fixed resistor or a variable resistor
  • the capacitor C may be a fixed capacitor or a variable capacitor
  • the pull-up resistor r may be a fixed resistor or a variable resistor.
  • the input power supply voltage is generally 12V
  • the capacitance capacity is 100nF
  • the cut-off voltage between the source and the gate of the N-channel enhanced insulated gate field effect transistor is 1.2V
  • the multi-channel delay control device In the initial state, the capacitor is charged by the input power supply, and the capacitor is charged instantaneously.
  • the voltage across the capacitor is 12V of the input power source, which is much larger than the source and the gate of the N-channel enhanced insulated gate field effect transistor.
  • the cut-off voltage is 1.2V.
  • the source and the drain of the N-channel enhancement type insulated gate field effect transistor are in an on state, and the multi-channel delay control device outputs a zero potential.
  • the capacitor When the capacitor is fully charged, the capacitor begins to discharge through the resistor.
  • the voltage across the capacitor When the voltage across the capacitor is discharged to less than 1.2V between the source and the gate of the N-channel enhancement type insulated gate field effect transistor, the N trench The source and the drain of the channel-enhanced insulated gate field effect transistor are in an off state, and the first end of the pull-up resistor is connected to the drain of the N-channel enhancement type insulated gate field effect transistor and is used as a multi-channel delay control
  • the pull-up power supply is divided by the pull-up resistor, and the high-potential output is outputted at the output end of the multi-channel delay control device, and in actual use, different pull-up resistors and pull-up power supplies can be connected according to actual needs. So that the multi-channel delay control device outputs different high potentials.
  • the multi-channel delay control device realizes different delay switching by using N-channel enhanced insulated gate field effect transistor Q, resistor R, capacitor C and the like, and can change the resistance R and The size of the capacitor C is used to realize the change of the delay, and the requirements for the operator are low and easy to use.
  • the multi-channel delay control device increases the output of the multi-channel delay control device when the N-channel enhancement type insulated gate type field effect transistor Q outputs a high impedance state through the pull-up resistor r and the pull-up power supply V.
  • the potential causes the multi-channel delay control device to output a high potential, increasing the diversity of the scheme.
  • the multi-channel delay control device can also replace the capacitor C, the resistor R and the pull-up resistor r into a variable capacitor and a variable resistor, thereby making it easier to change the delay time of the multi-channel delay control device and increase The diversity of the program.
  • the multi-channel delay control device in the embodiment of the present invention is described above. Referring to FIG. 3, the multi-channel delay control power supply in the embodiment of the present invention is described below.
  • One embodiment includes:
  • each set of delay control circuits includes: a capacitor 302, a resistor 303, an N-channel enhancement type insulated gate field effect transistor 304, and a pull-up resistor 305. And a pull-up power supply 306, wherein
  • the first end of the capacitor 302 is connected to the input power source 301, and the second end of the capacitor 302 is connected to the first end of the resistor 303 and the gate of the N-channel enhancement type insulated gate field effect transistor 304;
  • the second end of the resistor 303 is grounded
  • the drains of the N-channel enhancement type insulated gate field effect transistor 304 are respectively connected to the first end of the pull-up resistor 305 and the third end of the secondary power source 307 for controlling the delay power-on of the secondary power source 307.
  • the source of the N-channel enhanced insulated gate field effect transistor 304 is grounded;
  • the first end of the pull-up resistor 305 is connected to the drain of the N-channel enhancement type insulated gate field effect transistor 304 and the third end of the secondary power source 307;
  • the second end of the pull-up resistor 305 is connected to the pull-up power supply 306, and the output voltage of the pull-up power supply 306 is smaller than the control signal voltage received by the third end of the secondary power supply 307;
  • the pull-up power supply 306 and the pull-up resistor 305 are used to increase the output potential of the output terminal of the delay control circuit when the drain output of the N-channel enhancement type insulated gate field effect transistor is high impedance state, so that the output of the multi-channel delay control device is output. High potential
  • the first end S1 of the secondary power source 307 is for receiving a power input, and the second end S2 of the secondary power source 307 is for providing a power output;
  • the input power source 301 is used to charge the capacitor 302.
  • the output voltage of the input power source 301 is greater than or equal to the cutoff voltage between the source and the gate of the N-channel enhancement type insulated gate field effect transistor 304.
  • Capacitor 302 is discharged through resistor 303, which is used to control the delay time of the delay control circuit.
  • the above N group includes: 2 groups and 2 or more groups.
  • the capacitor 302 described above includes:
  • the above resistor 303 includes:
  • the pull-up resistor 305 described above includes:
  • the input power supply voltage is generally 12V
  • the capacitance capacity is 100nF
  • the cut-off voltage between the source and the gate of the N-channel enhanced insulated gate field effect transistor is 1.2V
  • the multi-channel delay control device In the initial state, the capacitor is charged by the input power supply, and the capacitor is charged instantaneously.
  • the voltage across the capacitor is 12V of the input power source, which is much larger than the source and the gate of the N-channel enhanced insulated gate field effect transistor.
  • the cut-off voltage is 1.2V.
  • the source and the gate of the N-channel enhancement type insulated gate field effect transistor are in an on state, and the multi-channel delay control device outputs a zero potential.
  • the capacitor When the capacitor is fully charged, the capacitor begins to discharge through the resistor.
  • the voltage across the capacitor When the voltage across the capacitor is discharged to less than 1.2V between the source and the gate of the N-channel enhancement type insulated gate field effect transistor, the N trench The source-and-drain of the channel-enhanced insulated gate field effect transistor is in an off state, the first end of the pull-up resistor and the drain of the N-channel enhancement type insulated gate field effect transistor and the third of the secondary power supply
  • the terminal phase is connected, and the second end of the pull-up resistor is connected with the pull-up power supply, so that the control circuit outputs a high potential, wherein the high potential of the control circuit output is lower than the control signal voltage received by the third terminal of the secondary power source, in actual use.
  • different pull-up resistors and pull-up power supplies can be connected, so that the control circuit outputs different high potentials.
  • the first end S1 of the secondary power source is for receiving an external power input
  • the second end S2 of the secondary power source is for providing a power output
  • the drain of the N-channel reinforced insulated gate field effect transistor is connected to receive the control signal of the control circuit, so the third end of the secondary power source can make the second power supply second when the control circuit outputs zero potential
  • the terminal S2 has no output.
  • the control circuit outputs a high potential
  • the second terminal S2 of the secondary power source has an output, and the control circuit can change the delay time of the control circuit by the size of the capacitor and the resistor, thereby realizing the multipath delay. Control power supply delay power-on.
  • the secondary power supply in the embodiment may be a DC/DC power module or an LDO power module, which is not limited herein.
  • the multi-channel delay control power supply realizes multi-channel delay control through discrete devices such as an N-channel enhanced insulated gate field effect transistor 304, a resistor 303, a capacitor 302, a pull-up resistor 305, and a pull-up power supply 306.
  • the power supply is delayed in power-on, and the delay can be changed by changing the size of the resistor 303 and the capacitor 302. The requirements for the operator are low and easy to use.
  • the multi-channel delay control power supply can also replace the capacitor 302, the resistor 303, and the pull-up resistor 305 into variable capacitors and variable resistors, thereby making it easier to change the delay time of the multi-channel delay control device. Increased the diversity of the program.

Abstract

一种多路延时控制装置及控制电源，用于控制多路不同的延时切换及延时上电。该装置包括：输入电源（101）及N组延时控制电路，每组延时控制电路均包括：电容（102）、电阻（103）及N沟道增强型绝缘栅型场效应管（104），电容（102）的第一端与输入电源（101）相连接，电容（102）的第二端与电阻（103）的第一端及N沟道增强型绝缘栅型场效应管（104）的栅极相连；电阻（103）的第二端接地；N沟道增强型绝缘栅型场效应管（104）的漏极作为装置的输出端，N沟道增强型绝缘栅型场效应管（104）的源极接地；输入电源（101）用于给电容（102）充电，输入电源（101）电压大于等于N沟道增强型场绝缘栅型场效应管（104）的截止电压；电容（102）通过电阻（103）放电，电容（102）和电阻（103）控制延时控制电路的延时时间。还提供了控制电源，用于控制延时上电。

Description

多路延时控制装置及控制电源 技术领域
本发明涉及自动化控制领域，尤其涉及一种多路延时控制的装置及控制电源。
背景技术
多路延时控制被广泛用于电路设计，可以实现多个电路不同状态的延时切换。
现有的多路延时控制装置采用的多是专用IC或者逻辑芯片控制，这种专用的IC或者逻辑芯片的逻辑功能是由设计者借助于开发工具，通过编写程序的方法来实现延时的控制及延时切换功能。
这种专用IC或者逻辑芯片的逻辑功能对操作人员的要求标准较高，操作起来复杂困难。
发明内容
本发明实施例一方面提供了一种多路延时控制装置，包括：输入电源及N组延时控制电路，每组延时控制电路均包括：电容、电阻以及N沟道增强型绝缘栅型场效应管，其中，电容的第一端与输入电源相连接，电容的第二端与电阻的第一端以及N沟道增强型绝缘栅型场效应管的栅极相连；电阻的第二端接地；N沟道增强型绝缘栅型场效应管的漏极悬空，作为延时控制装置的输出端，N沟道增强型绝缘栅型场效应管的源极接地，N沟道增强型绝缘栅型场效应管用于控制延时控制电路输出状态的切换；输入电源用于给电容充电，输入电源的输出电压大于等于多组N沟道增强型绝缘栅型场效应管源极与栅极之间的截止电压；电容通过电阻放电，电容和电阻用于控制延时控制电路的延时时间。
本发明实施例另一反面提供了一种多路延时控制电源，包括：输入电源、N组延时控制电路以及N组二次电源，每组延时控制电路均包括：电容、电阻、N沟道增强型绝缘栅型场效应管、上拉电阻以及上拉电源，其中，电容的第一端与输入电源相连接，电容的第二端与电阻的第一端以及N沟道增强型绝缘栅型场效应管的栅极相连；电阻的第二端接地；N沟道增强型绝缘栅型场效应管的漏极分别与上拉电阻的第一端及二次电源的第三端相连接，用于控 制二次电源的延时上电，N沟道增强型绝缘栅型场效应管的源极接地；上拉电阻的第一端与N沟道增强型绝缘栅型场效应管的漏极及二次电源的第三端相连接；上拉电阻的第二端与上拉电源相连接，上拉电源的输出电压小于二次电源第三端所接收的控制信号电压；上拉电源和上拉电阻用于在N沟道增强型绝缘栅型场效应管的漏极输出高阻态时，提高多路延时控制装置输出端的输出电位，使得多路延时控制装置输出高电位；二次电源的第一端用于接收电源输入，二次电源的第二端用于提供电源输出；输入电源用于给电容充电，输入电源的输出电压大于等于多组N沟道增强型绝缘栅型场效应管源极与栅极之间的截止电压；电容通过电阻放电，电容和电阻用于控制延时控制电路的延时时间。
本发明实施例提供的技术方案中，多路延时控制装置及控制电源通过N沟道增强型绝缘栅型场效应管、电阻、电容等分立器件来实现多路不同的延时切换及延时上电，而且可以通过改变电阻和电容的大小来实现延时的改变，对操作人员的要求标准较低，简单易用。
附图说明
图1为本发明实施例中多路延时控制装置一个实施例的示意图；
图2为本发明实施例中多路延时控制装置另一个实施例的示意图；
图3为本发明实施例中多路延时控制电源一个实施例的示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚 地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
本发明实施例提供了一种多路延时控制的装置及控制电源，用于简单、方便的控制多路不同的延时切换及延时上电。
请参阅图1，本发明实施例中多路延时控制装置的一个实施例包括：
输入电源101及N组延时控制电路，每组延时控制电路均包括：
电容102，电阻103以及N沟道增强型绝缘栅型场效应管104；
电容102的第一端与输入电源101相连接，电容102的第二端与电阻103的第一端以及N沟道增强型绝缘栅型场效应管104的栅极相连；
电阻103的第二端接地；
N沟道增强型绝缘栅型场效应管104的漏极悬空，作为延时控制装置的输出端，N沟道增强型绝缘栅型场效应管104的源极接地，N沟道增强型绝缘栅型场效应管104用于控制延时控制电路输出状态的切换；
输入电源101用于给电容102充电，输入电源101的输出电压大于等于多组N沟道增强型绝缘栅型场效应管104源极与栅极之间的截止电压；
电容102通过电阻103放电，电容102和电阻103用于控制延时控制电路的延时时间。
上述的N组包括：
2组及2组以上的控制电路。
具体以一个例子来说明多路延时控制装置的工作过程：
实际使用中，输入电源的电压一般为12V，电容的容量为100nF，N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压为1.2V，多路延时控制装置在初始状态时，通过输入电源给电容充电，电容瞬间完成充电，电容两端的电压为输入电源的电压12V，远远大于N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压1.2V，这时，N沟道增强型绝缘栅型场效应管的源极与漏极之间处于导通状态，多路延时控制装置输出零电位。
在电容完成充电时，电容即通过电阻开始放电，在电容两端的电压放电至小于N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压为1.2V时，N沟道增强绝缘栅型场效应管的源极与漏极之间处于断开状态，多路延时控制装置输出高阻态。
因为电容的放电时间正比于电阻大小与电容大小的乘积，所以可以通过改变电阻和电容的大小来控制延时控制装置的延时时间，达到延时控制的目的。
本实施例中，多路延时控制装置通过N沟道增强型绝缘栅型场效应管104、电阻103、电容102等分立器件来实现多路不同的延时切换，而且可以通过改变电阻103和电容102的大小来实现延时的改变，对操作人员的要求标准较低，简单易用。
为便于理解，下面详细介绍本发明实施例中多路延时控制装置，请参阅图2，本发明实施例中多路延时控制装置的另一个实施例包括：
输入电源VC及N组延时控制电路，每组延时控制电路均包括：
电容C，电阻R、N沟道增强型绝缘栅型场效应管Q、上拉电阻r、上拉电源V以及输出端S；
输入电源VC与电容C的第一端相连接；
电容C的第二端与电阻R的第一端以及N沟道增强型绝缘栅型场效应管Q的栅极相连；
电阻R的第二端接地；
N沟道增强型绝缘栅型场效应管Q的漏极与上拉电阻r的第一端相连接，并作为多路延时控制装置的输出端S，N沟道增强型绝缘栅型场效应管Q的源极接地，N沟道增强型绝缘栅型场效应管Q用于控制延时控制电路输出状态的切换；
上拉电阻r的第二端与上拉电源V相连接；
输入电源VC用于给电容C充电，输入电源VC的输出电压大于等于多组N沟道增强型绝缘栅型场效应管Q源极与栅极之间的截止电压；
电容C通过电阻R放电，电容C和电阻R用于控制延时控制电路的延时时间；
上拉电阻r及上拉电源V用于在N沟道增强型绝缘栅型场效应管输出高阻态时，提高多路延时控制装置输出端S的输出电位，使多路延时控制装置输出高电位。
上述的N组延时控制电路包括：2组及2组以上的控制电路。
上述电阻R可以为固定电阻或者可变电阻；
上述电容C可以为固定电容或者可变电容；
上述上拉电阻r可以为固定电阻或者可变电阻。
具体举例来说明本实施例中多路延时控制装置的工作原理：
实际使用中，输入电源的电压一般为12V，电容的容量为100nF，N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压为1.2V，多路延时控制装置在初始状态时，通过输入电源给电容充电，电容瞬间完成充电，电容两端的电压为输入电源的电压12V，远远大于N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压1.2V，这时，N沟道增强型绝缘栅型场效应管的源极与漏极处于导通状态，多路延时控制装置输出零电位。
在电容完成充电时，电容即通过电阻开始放电，在电容两端的电压放电至小于N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压为1.2V时，N沟道增强型绝缘栅型场效应管的源极与漏极处于断开状态，上拉电阻的第一端与N沟道增强型绝缘栅型场效应管的漏极相连并作为多路延时控制装置的输出端，上拉电源通过上拉电阻分压，在多路延时控制装置的输出端输出高电位，且实际使用中，可以根据实际需要，接入不同的上拉电阻和上拉电源，使得多路延时控制装置输出不同的高电位。
实际使用中，还可以将电容、电阻和上拉电阻分别换为可变电容、可变电阻，从而更容易改变多路延时控制装置的延时时间。
本实施例中，多路延时控制装置通过N沟道增强型绝缘栅型场效应管Q、电阻R、电容C等分立器件来实现多路不同的延时切换，而且可以通过改变电阻R和电容C的大小来实现延时的改变，对操作人员的要求标准较低，简单易用。
本实施例中，多路延时控制装置通过上拉电阻r和上拉电源V，在N沟道增强型绝缘栅型场效应管Q输出高阻态时，提高多路延时控制装置的输出电位，使多路延时控制装置输出高电位，增加了方案的多样性。
本实施例中，多路延时控制装置还可以将电容C、电阻R及上拉电阻r换为可变电容，可变电阻，从而更容易改变多路延时控制装置的延时时间，增加了方案的多样性。
上面介绍了本发明实施例中的多路延时控制装置，下面来介绍本发明实施例中的多路延时控制电源，请参阅图3，本发明实施例中的多路延时控制电源的一个实施例包括：
输入电源301、N组延时控制电路以及N组二次电源307，每组延时控制电路均包括：电容302、电阻303、N沟道增强型绝缘栅型场效应管304、上拉电阻305以及上拉电源306，其中，
电容302的第一端与输入电源301相连接，电容302的第二端与电阻303的第一端以及N沟道增强型绝缘栅型场效应管304的栅极相连；
电阻303的第二端接地；
N沟道增强型绝缘栅型场效应管304的漏极分别与上拉电阻305的第一端及二次电源307的第三端相连接，用于控制二次电源307的延时上电，N沟道增强型绝缘栅型场效应管304的源极接地；
上拉电阻305的第一端与N沟道增强型绝缘栅型场效应管304的漏极及二次电源307的第三端相连接；
上拉电阻305的第二端与上拉电源306相连接，上拉电源306的输出电压小于二次电源307第三端所接收的控制信号电压；
上拉电源306和上拉电阻305用于在N沟道增强型绝缘栅型场效应管的漏极输出高阻态时，提高延时控制电路输出端的输出电位，使得多路延时控制装置输出高电位；
二次电源307的第一端S1用于接收电源输入，二次电源307的第二端S2用于提供电源输出；
输入电源301用于给电容302充电，输入电源301的输出电压大于等于N沟道增强型绝缘栅型场效应管304源极与栅极之间的截止电压；
电容302通过电阻303放电，电容302和电阻303用于控制延时控制电路的延时时间。
上述N组包括：2组及2组以上。
上述电容302包括：
固定电容或可变电容。
上述电阻303包括：
固定电阻或可变电阻。
上述上拉电阻305包括：
固定电阻或可变电阻。
具体举例来说明本实施例中多路延时控制电源的工作原理：
实际使用中，输入电源的电压一般为12V，电容的容量为100nF，N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压为1.2V，多路延时控制装置在初始状态时，通过输入电源给电容充电，电容瞬间完成充电，电容两端的电压为输入电源的电压12V，远远大于N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压1.2V，这时，N沟道增强型绝缘栅型场效应管的源极与栅极处于导通状态，多路延时控制装置输出零电位。
在电容完成充电时，电容即通过电阻开始放电，在电容两端的电压放电至小于N沟道增强型绝缘栅型场效应管的源极与栅极之间的截止电压为1.2V时，N沟道增强绝缘栅型场效应管的源极与漏极之间处于断开状态，上拉电阻的第一端与N沟道增强型绝缘栅型场效应管的漏极及二次电源的第三端相连接，上拉电阻的第二端与上拉电源相连接，使控制电路输出高电位，其中控制电路输出的高电位低于二次电源第三端接收的控制信号电压，在实际使用中，可以根据实际需要，接入不同的上拉电阻和上拉电源，使得控制电路输出不同的高电位。
实际使用中，二次电源的第一端S1用于接受外部电源输入，二次电源的第二端S2用于提供电源输出，因为二次电源的第三端与上拉电阻的第一端及N沟道增强型绝缘栅型场效应管的漏极相连接，用于接受控制电路的控制信号，所以二次电源的第三端可以在控制电路输出零电位时，使得二次电源的第二端S2无输出，在控制电路输出高电位时，使得二次电源的第二端S2有输出，控制电路又可以通过电容和电阻的大小来改变控制电路的延时时间，从而实现多路延时控制电源的延时上电。
实施例中的二次电源可以为DC/DC电源模块或LDO类电源模块，具体此处不作限定。
本实施例中，多路延时控制电源通过N沟道增强型绝缘栅型场效应管304、电阻303、电容302、上拉电阻305以及上拉电源306等分立器件来实现多路延时控制电源的延时上电，而且可以通过改变电阻303和电容302的大小来实现延时的改变，对操作人员的要求标准较低，简单易用。
本实施例中，多路延时控制电源还可以将电容302、电阻303及上拉电阻305分别换为可变电容和可变电阻，从而更容易改变多路延时控制装置的延时时间，增加了方案的多样性。

Claims (14)

  1. 一种多路延时控制装置，其特征在于，所述多路延时控制装置包括输入电源及N组延时控制电路，每组所述延时控制电路均包括：电容、电阻以及N沟道增强型绝缘栅型场效应管，其中，
    所述电容的第一端与所述输入电源相连接，所述电容的第二端与所述电阻的第一端以及所述N沟道增强型绝缘栅型场效应管的栅极相连；
    所述电阻的第二端接地；
    所述N沟道增强型绝缘栅型场效应管的漏极悬空，作为所述延时控制装置的输出端，所述N沟道增强型绝缘栅型场效应管的源极接地，所述N沟道增强型绝缘栅型场效应管用于控制所述延时控制电路输出状态的切换；
    所述输入电源用于给所述电容充电，所述输入电源的输出电压大于等于多组N沟道增强型绝缘栅型场效应管源极与栅极之间的截止电压；
    所述电容通过所述电阻放电，所述电容和所述电阻用于控制所述延时控制电路的延时时间。
  2. 根据权利要求1所述的装置，其特征在于，所述延时控制电路输出状态包括：
    零电位或高阻态。
  3. 根据权利要求2所述的装置，其特征在于，所述延时控制电路还包括：
    上拉电阻和上拉电源；
    所述上拉电阻的第一端与所述N沟道增强型绝缘栅型场效应管的漏极相连接，并作为所述多路延时控制装置的输出端；
    所述上拉电阻的第二端与所述上拉电源相连接；
    所述上拉电源和所述上拉电阻用于在所述N沟道增强型绝缘栅型场效应管的漏极输出高阻态时，提高所述多路延时控制装置输出端的输出电位，使得所述多路延时控制装置输出高电位。
  4. 根据权利要求1所述的装置，其特征在于，所述电容包括：
    固定电容或可变电容。
  5. 根据权利要求1所述的装置，其特征在于，所述电阻包括：
    固定电阻或可变电阻。
  6. 根据权利要求3所述的装置，其特征在于，所述上拉电阻包括：
    固定电阻或可变电阻。
  7. 根据权利要求1所述的装置，其特征在于，所述N组延时控制电路包括：
    2组或2组以上延时控制电路。
  8. 一种多路延时控制电源，其特征在于，所述多路延时控制电源包括输入电源、N组延时控制电路以及N组二次电源，每组所述延时控制电路均包括：电容、电阻、N沟道增强型绝缘栅型场效应管、上拉电阻以及上拉电源，其中，
    所述电容的第一端与所述输入电源相连接，所述电容的第二端与所述电阻的第一端以及所述N沟道增强型绝缘栅型场效应管的栅极相连；
    所述电阻的第二端接地；
    所述N沟道增强型绝缘栅型场效应管的漏极分别与所述上拉电阻的第一端及所述二次电源的第三端相连接，用于控制所述二次电源的延时上电，所述N沟道增强型绝缘栅型场效应管的源极接地；
    所述上拉电阻的第一端与所述N沟道增强型绝缘栅型场效应管的漏极及所述二次电源的第三端相连接；
    所述上拉电阻的第二端与所述上拉电源相连接，所述上拉电源的输出电压小于所述二次电源第三端所接收的控制信号电压；
    所述上拉电源和所述上拉电阻用于在所述N沟道增强型绝缘栅型场效应管的漏极输出高阻态时，提高所述多路延时控制装置输出端的输出电位，使得所述多路延时控制装置输出高电位；
    所述二次电源的第一端用于接收电源输入，所述二次电源的第二端用于提供电源输出；
    所述输入电源用于给所述电容充电，所述输入电源的输出电压大于等于多组N沟道增强型绝缘栅型场效应管源极与栅极之间的截止电压；
    所述电容通过所述电阻放电，所述电容和所述电阻用于控制所述延时控制电路的延时时间。
  9. 根据权利要求8所述的控制电源，其特征在于，所述N沟道增强型绝缘栅型场效应管的漏极分别与所述二次电源的第三端相连接，用于控制所述二次电源的延时上电包括：
    在所述N沟道增强型绝缘栅型场效应管的漏极与源极之间处于导通状态，即N沟道增强型绝缘栅型场效应管的漏极输出零电位时，控制所述二次电源的第二端无输出；
    在所述N沟道增强型绝缘栅型场效应管的漏极与源极之间处于截止状态，即N沟道增强型绝缘栅型场效应管的漏极输出高电位时，控制所述二次电源的第二端有输出。
  10. 根据权利要求8所述的控制电源，其特征在于，所述二次电源包括：
    DC/DC电源模块和/或LDO类电源模块。
  11. 根据权利要求8所述的控制电源，其特征在于，所述电容包括：
    固定电容或可变电容。
  12. 根据权利要求8所述的控制电源，其特征在于，所述电阻包括：
    固定电阻或可变电阻。
  13. 根据权利要求8所述的控制电源，其特征在于，所述上拉电阻包括：
    固定电阻或可变电阻。
  14. 根据权利要求8所述的控制电源，其特征在于，所述N组延时控制电路包括：
    2组或2组以上延时控制电路。
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