WO2018112990A1 - 驱动电路及使用其的显示装置 - Google Patents

驱动电路及使用其的显示装置 Download PDF

Info

Publication number
WO2018112990A1
WO2018112990A1 PCT/CN2016/112154 CN2016112154W WO2018112990A1 WO 2018112990 A1 WO2018112990 A1 WO 2018112990A1 CN 2016112154 W CN2016112154 W CN 2016112154W WO 2018112990 A1 WO2018112990 A1 WO 2018112990A1
Authority
WO
WIPO (PCT)
Prior art keywords
switching element
connection end
module
pull
control
Prior art date
Application number
PCT/CN2016/112154
Other languages
English (en)
French (fr)
Inventor
张娣
李骏
Original Assignee
武汉华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US15/328,218 priority Critical patent/US10115338B2/en
Publication of WO2018112990A1 publication Critical patent/WO2018112990A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms

Definitions

  • the present invention relates to a driving circuit, and more particularly to a driving circuit having a stable signal.
  • the pixel driving of the OLED display driving technology is current type, and the GOA (gate on array) is required to supply the scanning signal.
  • the GOA gate on array
  • the transmit signal distinguishes the pixel drive time (data signal read time, anode reset time, grab threshold voltage time) from the OLED illumination time.
  • Each rectangular pulse of the transmitted signal lasts longer than the scan signal, so the stability of the circuit is more demanding.
  • the transmission signal generating circuit of the conventional P-type TFT panel is composed of a plurality of transistors and capacitors.
  • the inventive concept provides a driving circuit capable of preventing a drain circuit.
  • the inventive concept also provides a display device including a drive circuit capable of preventing leakage current.
  • the driving circuit includes: an input module for inputting a control signal from a signal input terminal; and a pull-down module connected to the input module for pulling down a control signal from the input module to a low battery a pull-up module connected to the input module for pulling up a control signal from the input module to a high level; and an output module outputting a corresponding output signal to the signal output terminal based on the control of the pull-up module and the pull-down module,
  • a setting is provided between the pull-up module and the pull-down module
  • An eleventh switching element comprising a control end, a first connection end and a second connection end.
  • the driving circuit may include a plurality of switching elements and a capacitor.
  • the switching element may be a thin film transistor.
  • the input module may include a first switching element and a second switching element, wherein the first switching element may include a control end, a first connection end, and a second connection end, wherein The control terminal of a switching element can be connected to the first clock signal, the first connection end of the switching element can be connected to the signal input end, the second connection end of the switching element can be connected to the second switching element, and the second switching element can include a control end, a connection end and a second connection end, wherein the control end of the second switching element can be connected to the second clock signal, the first connection end of the second switching element can be connected to the second end of the first switching element, and the second end of the switching element
  • the connection end can be connected to the pull-down module, wherein the second connection end of the first switching element can also be connected to the pull-up module and the pull-down module.
  • the pull-down module may include a third switching element, a fourth switching element, and a first capacitor
  • the third switching element may include a control end, a first connection end, and a second connection end
  • the control terminal of the third switching element may be connected to the first clock signal
  • the first connection end of the third switching element may be connected to the first fixed voltage
  • the second connection end of the third switching element may be connected to the eleventh switching element
  • the first connecting end, the fourth switching element may include a control end, a first connecting end and a second connecting end, wherein the control end of the fourth switching element may be connected to the first capacitor, and the first connecting end of the fourth switching element may be connected
  • the first connection end of the fourth switching element may be connected to the first connection end of the eleventh switching element, and the control end of the fourth switching element may also be connected to the input module and the pull-up module.
  • the pull-up module may include a fifth switching element, a sixth switching element, a seventh switching element, an eighth switching element, and a second capacitor
  • the fifth switching element may include control The first connection end and the second connection end, wherein the control end of the fifth switching element can be connected to the second end of the eleventh switching element, and the first connection end of the fifth switching element can be connected to the input module, the fifth switch
  • the second connecting end of the component may be connected to the second fixed voltage
  • the sixth switching component may include a control end, a first connecting end and a second connecting end, wherein the control end of the sixth switching element may be connected to the eleventh switching element
  • the second connection end of the sixth switching element may be connected to the second clock signal, the second connection end of the sixth switching element may be connected to the second capacitor
  • the seventh switching element includes a control end, a first connection end and a second connection end, wherein the control end of the seventh switching element can be connected to the second clock signal, the first connection end of the seventh switching element
  • the output module may include a ninth switching element, a tenth switching element, and a third capacitance
  • the ninth switching element may include a control end, a first connection end, and a second connection end
  • the control end of the ninth switching element may be connected to the second end of the first capacitor of the pull-down module, the first connection end of the ninth switching element may be connected to the first fixed voltage, and the second connection end of the ninth switching element may be connected
  • the tenth switching element may include a control end, a first connecting end and a second connecting end, wherein the control end of the tenth switching element may be connected to the second end of the eighth switching element of the pull-up module, the tenth switch
  • the first connection end of the component may be connected to the signal output end, and the second connection end of the tenth switch element may be connected to the second fixed voltage
  • the third capacitance may include a first connection end and a second connection end, the first of the third capacitance The connecting end can be connected to the second connecting
  • control end of the eleventh switching element may be connected to the first fixed voltage.
  • the first fixed voltage may be a low level voltage
  • the second fixed voltage may be a high level voltage
  • FIG. 1 is a schematic view schematically showing an EM circuit according to the related art
  • FIG. 2 is a schematic view schematically showing an EM circuit in accordance with the inventive concept
  • FIG. 3 is a schematic diagram showing a phase waveform simulating an EM circuit in accordance with the inventive concept.
  • Fig. 1 schematically shows a schematic diagram of an EM circuit according to the prior art.
  • the existing EM signal generating circuit it is composed of a plurality of transistors and capacitors, and its specific configuration is as shown in FIG.
  • the role of capacitor C3 is very important, directly related to whether the output signal can be filled with a high level signal.
  • the two poles of the capacitor C3 are A and B, respectively, wherein the point A is connected to the drain/source of the transistor T7 and the transistor T6, and the clock signal XCK is always in a clock state, so that the leakage current is relatively serious.
  • the prior art improves this phenomenon by increasing the area of the capacitor C3 and changing the T6 to a two-channel thin film transistor.
  • the present inventive concept provides a driving circuit for improving the above-described leakage phenomenon.
  • the driving circuit of the inventive concept will be described in detail below with reference to FIGS. 2 and 3.
  • a driving circuit according to the inventive concept includes an input module 100, a pull-down module 200, a pull-up module 300, and an output module 400.
  • the input module 100 outputs a control signal according to the clock signal and the transmission signal based on the switching element; the pull-down module 200 is electrically connected to the input module 100 for pulling the control signal from the input module 100 to a low level; the pull-up module 300, Electrically connected to the input module 100 for pulling up the control signal from the input module 100 to a high level; the output module 400 is connected to the pull-down module 200 and the pull-up module 300, based on the control of the pull-down module 200 and the pull-up module 300 The corresponding output signal is output.
  • An EM circuit in accordance with the inventive concept may include a plurality of switching elements and capacitors.
  • the input module 100, the pull-down module 200, the pull-up module 300, and the output module 400 in the EM circuit are constituted by a plurality of switching elements and capacitors.
  • Input module 100 can include a switching element, such as a transistor.
  • the switching element T8 and the switching element T9 are included in the input module 100, T8 And the T9 respectively can have a control end, a first connection end and a second connection end, wherein the control end of the T8 can input the first clock signal XCK, and the first connection end of the T8 can be connected to the transmission signal input end, and the signal input end is transmitted
  • a transmit signal EM STV may be input
  • a second connection of T8 may be coupled to the first connection of T9 and may be coupled to pull down module 200 and pull down module 300.
  • the control terminal of T9 can input a second clock signal CK, and the second connection end of T9 can be connected to the pull-down module 200.
  • the pull down module 200 can include a plurality of switching elements (eg, transistors) and capacitors.
  • the switching element T6 and the switching element T7 and the capacitor C1 may be included in the pull-down module 200.
  • the switching element T6 and the switching element T7 may respectively include a control end, a first connection end and a second connection end, and the capacitor C1 may include a first connection end and a second connection end.
  • the control terminal of T6 can be connected to the output module 400.
  • the first connection terminal of T6 can input the first clock signal XCK, and the second connection terminal of T6 can be connected to the pull-up module 300 (for example, through the switching element T11).
  • the control terminal of T7 can input the first clock signal XCK, the first connection terminal of T7 can input the level signal VGL, and the second connection terminal of T7 can be connected to the pull-up module 300 (for example, through the switching element T11).
  • the first end of C1 can input a second clock signal CK, and the second end of C1 can be connected to the output module 400.
  • the pull up module 300 can include a plurality of switching elements (eg, transistors) and capacitors.
  • the switching element T3, the switching element T4, the switching element T5 and the switching element T10, and the capacitor C3 may be included in the pull-down module 200, the switching element T3, the switching element T4, and the switch
  • the component T5 and the switching component T10 may have a control end, a first connection end and a second connection end, respectively, and the capacitor C3 may have a first connection end and a second connection end.
  • the control terminal of T3 can connect the pull-down module 200 and the input module 100 (for example, connected to the control end of T6 and the second connection end of T8), and the first connection end of T3 can be connected with the high-level voltage VGH, the second connection of T3
  • the terminal can be connected to the second connection of T4 and can be connected to the output module 400 (eg, the control terminal of T1).
  • the control terminal of T4 can input a second clock signal CK, and the first connection end of T4 can be connected to the second connection end of T5.
  • the control end of the T5 can be connected to the control end of the T10 (the first connection end of the capacitor C3), the first connection end of the T5 can input the second clock signal CK, and the second connection end of the T5 can be connected to the second connection end of the capacitor.
  • the first connection end of the T10 can be connected to the input module 100. Specifically, it can be connected to the second connection end of the T9 of the input module 100, and the second connection end of the T10 can input the high level voltage VGH.
  • Output module 400 can include a plurality of dry elements and capacitors.
  • the switching element T1 and the switching element T2 and the electric C2 may be included in the output module 400.
  • the switching element T1 and the switching element T2 may include a control end, a first connection end, and a second connection end
  • the capacitor C2 may include a first connection end and a second connection end.
  • the control terminal of the T1 can be connected to the pull-down module 200. Specifically, it can be connected to the control terminal of the T6 of the pull-down module.
  • the first connection end of the T1 can input the level voltage VGL, and the second connection end of the T1 can be connected to the first connection of the T2. end.
  • the second connection end of T1 can also be connected to the transmission signal output end.
  • the transmit signal output can output a transmit signal EM OUT.
  • the control terminal of the T2 can be connected to the pull-up module 300.
  • the second connection end of the T3 of the pull-up module 300 can be connected, and the second connection end of the T2 can be connected to the high-level voltage VGH.
  • the first end of the C2 can be connected to the pull-up module 300.
  • the first end of the T3 of the pull-up module and the first end of the T4 can be connected, and the second end of the C12 can be connected to the high-level voltage VGH.
  • a switching element T11 is further disposed between the pull-down module 200 and the pull-up module 300.
  • the switching element T11 may include a control end, a first connection end, and a second connection end.
  • the control terminal of the T11 can be connected to the level voltage VGL, and the first connection end of the T11 can be connected to the pull-down module 200.
  • the second connection end of the T6 (the second connection end of the T7) can be connected, the second of the T11, the second of the T11
  • the connection end can be connected to the pull-up module 300.
  • the control end of the T10 (the control end of the T5, the first connection end of the C3) can be connected.
  • the operation phase of the driving circuit may include a sampling phase and a retention phase, and in the following, the sampling phase and the retention phase will be described in detail with reference to specific examples.
  • the sampling phase is the transition phase of the waveform, which can include six phases:
  • Stage 1 When the second clock signal CK and the transmit signal EM STV are the high level voltage VGH and the first clock signal XCK is low level, the input module 100 can input the high level to the pull-down module 200 while cutting off T1, thereby The level voltage VGL can be stopped from flowing into the emission signal output terminal EM OUT. In this case, since T2 is not turned on, the emission signal output terminal EM OUT still outputs the level voltage VGL.
  • the control terminal of T7 is the first clock signal XCK having a low level, T7 can be turned on, and the low potential can be transmitted to the first connection end of the C3 capacitor through point D (point A), and T3 can be turned on. To transfer the high potential to the second connection of the C3 capacitor (point B), Thus the C3 capacitor stores the charge and prepares for the next stage;
  • Stage 2 When the first clock signal XCK and the transmission signal EM STV are a high level voltage and the second clock signal CK is a low level voltage. Since T9 and T10 are turned on, the high level voltage VGH can be input to the pull-down module, thereby cutting off the pull-down module; meanwhile, the second connection end (point B) of C3 of the pull-up module 300 is pulled low due to the bootstrap action of the capacitor. In addition, since T6 is turned off, the pull-up module 300 is activated.
  • point A is coupled to be lower, so that T3 is continuously turned on, and T4 is also turned on, so that the low level can be smoothly input to the control terminal (point P) of T2 to turn on T2, so that it can be high.
  • Stage 3 In the case where the second clock signal and the CK and the transmission signal EM STV are the high level voltage VGH and the first clock signal XCK is the low level voltage, the input module 100 is turned on by T8 to input the high level voltage to The module 200 is pulled down so that the pull-down module can be turned off. In addition, the output module 100 causes the P point to be in a low-level voltage state through C2, so that T2 can be continuously turned on, so that the high-level voltage is continuously input to the transmission signal output terminal.
  • the pull-up module T7 is turned on due to the first clock signal of its control terminal, so that the low potential can be transmitted to the first connection end of C3 through point D (point A), and T3 is turned on, so that the high potential is transmitted to C3.
  • Stage 4 In the case where the first clock signal XCK and the transmission signal STV are a high level voltage and the second clock signal CK is a low level voltage, since T9 and T10 are turned on, the high level voltage VGH is input to the pull-down module. So that the drop-down module can be cut off. At the same time, the second connection end (point B) of C3 of the pull-up module 300 is pulled low, and the first connection end (point A) of C3 is coupled lower due to the coupling of the capacitor, which will continuously open T3. At the same time, T4 is turned on, so that the low level can be smoothly input to the control terminal (point P) of T2, thereby turning on T2, so that the high level voltage can be output to the output of the transmitting signal, which is consistent with phase 2;
  • Stage 5 In the case where the first clock signal XCK and the transmission signal STV are a low level voltage and the second clock signal CK is a high level voltage, T6 is turned on and the pull-up module 300 is turned off.
  • the input module 100 transmits a low level voltage of the input signal EM STV to the pull-down module 200 through T8 and turns on the T1 of the output module, thereby inputting a low level voltage to the transmit signal output.
  • the first connection terminal and the control terminal of the drain of T1 are all low-level voltages, and based on the characteristic of the threshold voltage difference of the PTFT, the output will be higher than the potential of the second connection terminal (Q point) of C1 by a threshold. Voltage value;
  • Stage 6 When the second clock signal CK and the transmission signal level voltage STV are at a low level and the first clock signal XCK is at a high level voltage, the control terminal (Q point) of the T1 is caused by the coupling action of C1.
  • the two clock signals CK are coupled to be lower, so that T1 is fully turned on, so that the potential of the output signal is completely equal to the low level voltage VGL.
  • the control terminal (Q point) of T1 continues to be a low-level voltage, so that T1 is turned on, and the output of the transmit signal is continuously output. Low level voltage.
  • a switching element eg, transistor
  • T11 is disposed between the pull-down module 200 and the pull-up module 300 (between points D and A). Since the control terminal (gate) of T11 is connected to the VGL DC signal, when the voltage across the first connection terminal (gate) and the second connection terminal (drain) is maintained near or above VGL, the TFT can be at The on state; however, when the voltage at either terminal is lower than VGL, the switching element T11 can be in an off state, so that the potential drop at the other end can be prevented.
  • a switching element eg, transistor
  • T11 since the control terminal of T11 is connected to the low-level voltage VGL, T11 is turned off, which prevents the potential fluctuation at point A from affecting the potential at point D, thereby reducing the leakage current of T6 and T7, so that the T6 double channel can be made. Change to a single channel structure.
  • the Q-point potential is very unstable.
  • the second end of C1 (Q) Point) The potential is pulled low by the bootstrap action, and the pull-down size is determined by the capacitance ratio.
  • T6 Once the voltage drop at the Q point exceeds the threshold voltage, T6 will enter the conduction state, causing a large loss of the stored charge of C3, which will affect the output of the next transmitted signal.
  • T11 intercepts the large current formed when T6 is turned on, and maintains the charge stored in C3, so that the C3 capacitance value can be appropriately reduced.
  • an exemplary embodiment of the present disclosure provides a driving circuit through A switching element is provided between the pull-up module and the pull-down module of the driver, so that a double-channel switching element in the driving circuit is changed into a single-channel switching element, and the area occupied by one of the capacitors is reduced, thereby providing more A stable transmit signal can reduce the area occupied by the drive circuit in the layout.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

提供了一种驱动电路，该驱动电路包括：输入模块（100），用于输入控制信号；下拉模块（200），与输入模块连接，用来将来自输入模块的控制信号下拉至低电平电压；上拉模块（300），与输入模块连接，用来将来自输入模块的控制信号上拉至高电平电压；输出模块（400），基于上拉模块（300）和下拉模块（400）的控制而输出相应的输出信号，其中，在上拉模块（300）和下拉模块（400）之间设置有第十一开关元件（T11），该第十一开关元件（T11）包括控制端、第一连接端和第二连接端。

Description

驱动电路及使用其的显示装置 技术领域
本发明涉及一种驱动电路，更具体地，涉及一种具有稳定的信号的驱动电路。
背景技术
随着高清显示屏幕的发展，人们追求更大屏幕，更高的分辨率，更刺激的视觉效果，广视角、高色域、高PPI显示技术的开发已经成为了行业的趋势。OLED屏幕高对比度、宽视角、高饱和度、低能耗等优势，无疑将其推向显示市场发展前沿。
OLED显示驱动技术的像素驱动属于电流型，需要GOA(gate on array)供给扫描信号，同时，为了较佳的显示效果和阈值电压补偿效果，需要额外为像素电路提供多重信号。其中发射信号将像素驱动时间(数据信号读取时间、阳极复位时间、抓取阈值电压时间)与OLED发光时间区分开来。发射信号每一个矩形脉冲持续时间比扫描讯号持久，因此对电路稳定性的要求更高。为了产生稳定的发射信号，现有的P型TFT面板的发射信号产生电路由多个晶体管和电容构成。
发明内容
本发明构思提供了一种能够防止漏电路的驱动电路。
本发明构思还提供了一种包括能够防止漏电流的驱动电路的显示装置。
根据本发明构思的示例性实施例，所述驱动电路包括：输入模块，用于从信号输入端输入控制信号；下拉模块，与输入模块连接，用来将来自输入模块的控制信号下拉至低电平；上拉模块，与输入模块连接，用来将来自输入模块的控制信号上拉至高电平；输出模块，基于上拉模块和下拉模块的控制而将相应的输出信号输出到信号输出端，其中，在上拉模块和下拉模块之间设置有第 十一开关元件，所述第十一开关元件包括控制端、第一连接端和第二连接端。
根据本发明构思的示例性实施例，所述驱动电路可以包括多个开关元件和电容。
根据本发明构思的示例性实施例，所述开关元件可以为薄膜晶体管。
根据本发明构思的示例性实施例，所述输入模块可以包括第一开关元件和第二开关元件，其中，第一开关元件可以包括控制端、第一连接端和第二连接端，其中，第一开关元件的控制端可以连接第一时钟信号，开关元件的第一连接端可以连接信号输入端，开关元件的第二连接端可以连接第二开关元件，第二开关元件可以包括控制端、第一连接端和第二连接端，其中，第二开关元件的控制端可以连接第二时钟信号，第二开关元件的第一连接端可以连接第一开关元件的第二端，开关元件的第二连接端可以连接下拉模块，其中，第一开关元件的第二连接端还可以连接到上拉模块和下拉模块。
根据本发明构思的示例性实施例，所述下拉模块可以包括第三开关元件、第四开关元件和第一电容，其中，第三开关元件可以包括控制端、第一连接端和第二连接端，其中，第三开关元件的控制端可以连接第一时钟信号，第三开关元件的第一连接端可以连接第一固定电压，第三开关元件的第二连接端可以连接第十一开关元件的第一连接端，第四开关元件可以包括控制端、第一连接端和第二连接端，其中，第四开关元件的控制端可以连接第一电容，第四开关元件的第一连接端可以连接第一时钟信号，第四开关元件的第二连接端可以连接第十一开关元件的第一连接端，其中，第四开关元件的控制端还可以连接输入模块和上拉模块。
根据本发明构思的示例性实施例，所述上拉模块可以包括第五开关元件、第六开关元件、第七开关元件、第八开关元件和第二电容，其中，第五开关元件可以包括控制端、第一连接端和第二连接端，其中，第五开关元件的控制端可以连接第十一开关元件的第二端，第五开关元件的第一连接端可以连接输入模块，第五开关元件的第二连接端可以连接第二固定电压；第六开关元件可以包括控制端、第一连接端和第二连接端，其中，第六开关元件的控制端可以连接第十一开关元件的第二端，第六开关元件的第一连接端可以连接第二时钟信号，第六开关元件的第二连接端可以连接第二电容；第七开关元件包括控制端、 第一连接端和第二连接端，其中，第七开关元件的控制端可以连接第二时钟信号，第七开关元件的第一连接端可以连接第二电容，第七开关元件的第二连接端可以连接第八开关元件；第八开关元件可以包括控制端、第一连接端和第二连接端，其中，第八开关元件的控制端可以连接输入模块和下拉模块，第八开关元件的第一连接端可以连接第二固定电压，第八开关元件的第二连接端可以连接第七开关元件的第二端；第二电容，可以具有第一连接端和第二连接端，第二电容的第一连接端可以连接第五开关元件的控制端，第二电容的第二端可以连接第五开关元件的第二端，其中，第八开关元件的第二端还可以连接到输出模块。
根据本发明构思的示例性实施例，所述输出模块可以包括第九开关元件、第十开关元件和第三电容，其中，第九开关元件可以包括控制端、第一连接端和第二连接端，其中，第九开关元件的控制端可以连接下拉模块的第一电容的第二端，第九开关元件的第一连接端可以连接第一固定电压，第九开关元件的第二连接端连可以接信号输出端；第十开关元件可以包括控制端、第一连接端和第二连接端，其中，第十开关元件的控制端可以连接上拉模块的第八开关元件第二端，第十开关元件的第一连接端可以连接信号输出端，第十开关元件的第二连接端可以连接第二固定电压；第三电容，可以包括第一连接端和第二连接端，第三电容的第一连接端可以连接上拉模块的第八开关元件的第二连接端，第三电容的第二端可以连接第二固定电压。
根据本发明构思的示例性实施例，第十一开关元件的控制端可以连接第一固定电压。
根据本发明构思的示例性实施例，其中，第一固定电压可以为低电平电压，第二固定电压可以为高电平电压。
附图说明
以下参照附图的示例性实施例的详细描述，本发明的上述和其它方面将变得明显，其中：
图1是示意性地示出根据现有技术的EM电路的示意图；
图2是示意性地示出根据本发明构思的EM电路的示意图；
图3是示出模拟根据本发明构思的EM电路的阶段波形示意图。
具体实施方式
在下面参照附图的示例性实施例的详细描述，本发明构思将变得明显。同样的附图标记指示同样的元件。
图1示意性地示出了根据现有技术的EM电路的示意图。对于现有的EM信号产生电路，其由多个晶体管和电容构成，其具体构造如图1所示。在图1的EM电路中，电容C3的作用十分重要，直接关系到输出信号中是否可以灌入高电平信号。电容C3的两极分别是A和B，其中A点与晶体管T7和晶体管T6的漏极/源极相连，时钟信号XCK一直处于时钟状态，从而漏电流比较严重。具体地，在电容C1的耦合作用下，Q点电位非常不稳定，在动作过程中极易把晶体管T6打开，这样就会有大量电荷从C3流失，造成EM电路工作不稳定。为此，现有技术会通过增加电容C3的面积并将T6改为双沟道薄膜晶体管的方法对该现象进行改善。
基于上述现有技术的不足，本发明构思提供了一种用来改善上述漏电现象的驱动电路。以下将参照图2和图3来详细描述本发明构思的驱动电路。
图2是示意性地示出根据本发明构思的EM电路的示意图，图3是模拟根据本发明构思的EM电路的阶段波形示意图。参照图2，根据本发明构思的驱动电路包括输入模块100、下拉模块200、上拉模块300和输出模块400、。输入模块100，基于开关元件依据时钟信号和发射信号来输出控制信号；下拉模块200，电连接到输入模块100，用来将来自输入模块100的控制信号下拉至低电平；上拉模块300，电连接到输入模块100，用来将来自输入模块100的控制信号上拉至高电平；输出模块400，连接至下拉模块200和上拉模块300，基于下拉模块200和上拉模块300的控制而输出相应的输出信号。
根据本发明构思的EM电路可以包括多个开关元件及电容。换言之，通过多个开关元件和电容构成了EM电路中的输入模块100、下拉模块200、上拉模块300和输出模块400。
输入模块100可以包括开关元件，例如晶体管。在本发明构思的具体示例中，如图2中所示，开关元件T8和开关元件T9包括在输入模块100中，T8 和T9分别可以具有控制端、第一连接端和第二连接端，其中，T8的控制端可以输入第一时钟信号XCK，T8的第一连接端可以与发射信号输入端连接，发射信号输入端可以输入发射信号EM STV，T8的第二连接端可以连接T9的第一连接端，并且可以连接到下拉模块200和下拉模块300。T9的控制端可以输入第二时钟信号CK，T9的第二连接端可以连接至下拉模块200。
下拉模块200可以包括多个开关元件(例如，晶体管)和电容。在本发明构思的示例中，如图2所示，开关元件T6和开关元件T7以及电容C1可以包括在下拉模块200中。开关元件T6和开关元件T7可以分别包括控制端，第一连接端和第二连接端，电容C1可以包括第一连接端和第二连接端。T6的控制端可以连接到输出模块400，T6的第一连接端可以输入第一时钟信号XCK，T6的第二连接端可以(例如，通过开关元件T11)连接到上拉模块300。T7的控制端可以输入第一时钟信号XCK，T7的第一连接端可以输入电平信号VGL，T7的第二连接端可以(例如，通过开关元件T11)连接到上拉模块300。C1的第一端可以输入第二时钟信号CK，C1的第二端可以连接到输出模块400。
上拉模块300可以包括多个开关元件(例如晶体管)和电容。在本发明构思的具体示例中，如图2所示，开关元件T3、开关元件T4、开关元件T5和开关元件T10以及电容C3可以包括在下拉模块200中，开关元件T3、开关元件T4、开关元件T5和开关元件T10可以分别具有控制端、第一连接端和第二连接端，电容C3可以具有第一连接端和第二连接端。T3的控制端可以连接下拉模块200和输入模块100(例如，连接至T6的控制端和T8的第二连接端)，T3的第一连接端可以连接高电平电压VGH，T3的第二连接端可以连接T4的第二连接端，并且可以连接至输出模块400(例如，T1的控制端)。T4的控制端可以输入第二时钟信号CK，T4的第一连接端可以连接T5的第二连接端。T5的控制端可以连接T10的控制端(电容C3的第一连接端)，T5的第一连接端可以输入第二时钟信号CK，T5的第二连接端可以连接至电容的第二连接端。T10的第一连接端可以连接至输入模块100，具体地，可以连接至输入模块100的T9的第二连接端，T10的第二连接端可以输入高电平电压VGH。
输出模块400可以包括多个开干元件和电容。在本发明构思的具体示例中，如图2所示，开关元件T1和开关元件T2以及电C2可以包括在输出模块400中。开关元件T1和开关元件T2可以包括控制端、第一连接端和第二连接端， 电容C2可以包括第一连接端和第二连接端。T1的控制端可以连接下拉模块200，具体地，可以与下拉模块的T6的控制端连接，T1的第一连接端可以输入电平电压VGL，T1的第二连接端可以连接T2的第一连接端。此外，T1的第二连接端还可以连接至发射信号输出端。发射信号输端可以输出发射信号EM OUT。T2的控制端可以连接上拉模块300，具体地，可以连接上拉模块300的T3的第二连接端，T2的第二连接端可以连接高电平电压VGH。C2的第一端可以连接上拉模块300，具体地，可以连接上拉模块的T3的第一端和T4的第一端，C12的第二端可以连接高电平电压VGH。
此外，在下拉模块200和上拉模块300之间还设置有开关元件T11。开关元件T11可以包括控制端、第一连接端和第二连接端。T11的控制端可以连接电平电压VGL，T11的第一连接端可以连接下拉模块200，具体地，可以连接T6的第二连接端(T7的第二连接端)，T11的，T11的第二连接端可以连接上拉模块300，具体地，可以连接T10的控制端(T5的控制端、C3的第一连接端)。
以上结合具体示例详细地描述了根据本发明构思的驱动电路的基本构造，然而，本领域技术人员可根据实际情况来修改驱动电路的组成及布局，本发明构思不限于上述具体示例。
以下，将结合图2和图3来详细描述驱动电路的工作原理。
根据本公开的示例性实施例的驱动电路的工作阶段可以包括采样阶段和保持阶段，在下面，将结合具体示例详细描述采样阶段和保持阶段。
如图2和图3中所示，采样阶段是波形的传递阶段，其可以包括六个阶段：
阶段①：在第二时钟信号CK和发射信号EM STV为高电平电压VGH且第一时钟信号XCK为低电平时，输入模块100可以将高电平输入到下拉模块200，同时截止T1，从而可以停止电平电压VGL流入发射信号输出端EM OUT。在这种情况下，由于T2没有打开，所以发射信号输出端EM OUT依旧输出电平电压VGL。同时，由于T7的控制端为具有低电平的第一时钟信号XCK，因此可以T7被打开，此时低电位可以通过D点传输到C3电容的第一连接端(A点)，T3可以打开以使高电位传输到C3电容的第二连接端(B点)， 从而C3电容存储电荷，为下一个阶段做准备；
阶段②：在第一时钟信号XCK和发射信号EM STV为高电平电压且第二时钟信号CK为低电平电压时。由于T9、T10被打开，高电平电压VGH可以输入到下拉模块，从而截止下拉模块；同时，上拉模块300的C3的第二连接端(B点)由于电容的自举作用被拉低。另外，由于T6被截止，所以上拉模块300被激活。在电容的耦合作用下，A点被耦合得更加低，使得T3被持续打开，同时T4也打开，从而低电平可以顺利输入到T2的控制端(P点)以打开T2，使得可以将高电平输出到发射信号输出端；
阶段③：在第二时钟信号和CK和发射信号EM STV为高电平电压VGH且第一时钟信号XCK为低电平电压的情况下，输入模块100通过T8被打开将高电平电压输入到下拉模块200，从而能够截止下拉模块。此外，输出模块100通过C2使P点处于低电平电压状态，从而能够使T2持续打开，以使高电平电压持续输入到发射信号输出端。同时，上拉模块T7由于其控制端的第一时钟信号而被打开，使低电位可以通过D点传输到C3的第一连接端(A点)，而T3被打开，使得高电位被传输到C3的第二连接端(B点)，从而使C3存储电荷，为下一个阶段做准备；
阶段④：在第一时钟信号XCK和发射信号STV为高电平电压且第二时钟信号CK为低电平电压的情况下，由于T9、T10被打开，高电平电压VGH被输入到下拉模块，从而能够截止下拉模块。同时，上拉模块300的C3的第二连接端(B点)被拉低，由于电容的耦合作用，使得C3的第一连接端(A点)被耦合得更加低，这将持续打开T3，同时T4被打开，使得低电平可以顺利输入到T2的控制端(P点)，从而打开T2，使得可以将高电平电压输出到发射信号输出端，这与阶段②一致；
阶段⑤：在第一时钟信号XCK和发射信号STV为低电平电压且第二时钟信号CK为高电平电压的情况下，T6被打开且上拉模块300被关闭。输入模块100通过T8将输入信号EM STV的低电平电压传输到下拉模块200并且打开输出模块的T1，从而将低电平电压输入到发射信号输出端。另外，由于T1的漏第一连接端和控制端全为低电平电压，并且基于PTFT的阈值电压差的特性，输出的会比C1的第二连接端(Q点)的电位高出一个阈值电压值；
阶段⑥：在第二时钟信号CK和发射信号电平电压STV为低电平且第一时钟信号XCK为高电平电压时，由于C1的耦合作用，使T1的控制端(Q点)被第二时钟信号CK耦合得更加低，从而T1完全打开，使输出信号的电位完全等于低电平电压VGL。
此外，在保持阶段下，由于输入模块100持续向下拉模块200输入低电平电压VGL，使得T1的控制端(Q点)持续为低电平电压，从而T1被打开，发射信号输出端持续输出低电平电压。
以上参照图2和图3描述了根据本发明构思的驱动电路，其在下拉模块200与上拉模块300之间(D与A点之间)设置了开关元件(例如，晶体管)T11。由于T11的控制端(栅极)连接VGL直流信号，当第一连接端(栅极)和第二连接端(漏极)的两端的电压保持在VGL附近或者以上时，该则TFT则可处于导通状态；然而，当任一端的电压低于VGL时，该开关元件T11则可处于截止状态，从而可以阻止另一端的电位下降。
具体地，一方面，通过在下拉模块200和上拉模块300之间设置T11，可以在C3的电荷在自举作用下拉低C3的第一连接端(A点)的电位时阻止D点电位的下降，从而可以有效降低T7与T6两个开关元件在截断时候的漏电流，从而可以增大C3的电荷保持能力。另外，在图3的工作阶段期间(即，阶段②至阶段④)，由于第二时钟信号CK在低电平电压的情况下灌入C3的第二连接端(B点)，在自举作用的作用下电容C3的另一连接端(A点)位会被拉低(比低电平电压VGL更低)。这时，由于T11的控制端连接低电平电压VGL，T11被截止，这便阻止了A点的电位波动影响到D点电位，从而减少T6和T7的漏电流，使得可以将T6双沟道改成单沟道结构。
另一方面，在C1的自举耦合作用下，Q点电位非常不稳定，在第二时钟信号CK由高电平电压变成低电平电压的过程中，会将C1的第二端(Q点)电位通过自举作用拉低，且拉低大小由电容比例决定。一旦Q点电压的下降值超过阈值电压，就会导致T6进入导通状态，造成C3存储的电荷大量流失，严重时会影响下一个发射信号的输出。这里，T11即截断了T6导通时形成的较大电流，又保持了C3所存储的电荷，从而可以适当减少C3电容值。
通过总结和回顾，根据本公开的示例性实施例提供了一种驱动电路，通过 在驱动的上拉模块和下拉模块之间设置开关元件，使得将驱动电路中的一个双沟道开关元件变成了单沟道开关元件，并且减少了其中一个电容所占面积，从而在提供更加稳定的发射讯号的同时可以减少该驱动电路在版图中所占的面积。

Claims (13)

  1. 一种驱动电路，所述驱动电路包括：
    输入模块，用于从信号输入端输入控制信号；
    下拉模块，与输入模块连接，用来将来自输入模块的控制信号下拉至低电平；
    上拉模块，与输入模块连接，用来将来自输入模块的控制信号上拉至高电平；
    输出模块，基于上拉模块和下拉模块的控制而将相应的输出信号输出到信号输出端，
    其中，在上拉模块和下拉模块之间设置有第十一开关元件，所述第十一开关元件包括控制端、第一连接端和第二连接端。
  2. 如权利要求1所述的驱动电路，其中，所述驱动电路包括多个开关元件和电容。
  3. 如权利要求1所述的驱动电路，其中，所述开关元件为薄膜晶体管。
  4. 如权利要求1所述的驱动电路，其中，所述输入模块包括第一开关元件和第二开关元件，其中，
    第一开关元件包括控制端、第一连接端和第二连接端，其中，第一开关元件的控制端连接第一时钟信号，开关元件的第一连接端连接信号输入端，开关元件的第二连接端连接第二开关元件，
    第二开关元件包括控制端、第一连接端和第二连接端，其中，第二开关元件的控制端连接第二时钟信号，第二开关元件的第一连接端连接第一开关元件的第二端，开关元件的第二连接端连接下拉模块，
    其中，第一开关元件的第二连接端还连接到上拉模块和下拉模块。
  5. 如权利要求1所述的驱动电路，其中，所述下拉模块包括第三开关元件、第四开关元件和第一电容，其中，
    第三开关元件包括控制端、第一连接端和第二连接端，其中，第三开关元件的控制端连接第一时钟信号，第三开关元件的第一连接端连接第一固定电压，第三开关元件的第二连接端连接第十一开关元件的第一连接端，
    第四开关元件包括控制端、第一连接端和第二连接端，其中，第四开关元件的控制端连接第一电容，第四开关元件的第一连接端连接第一时钟信号，第四开关元件的第二连接端连接第十一开关元件的第一连接端，
    其中，第四开关元件的控制端还连接到输入模块和上拉模块。
  6. 如权利要求1所述的驱动电路，其中，所述上拉模块包括第五开关元件、第六开关元件、第七开关元件、第八开关元件和第二电容，其中，
    第五开关元件包括控制端、第一连接端和第二连接端，其中，第五开关元件的控制端连接第十一开关元件的第二端，第五开关元件的第一连接端连接输入模块，第五开关元件的第二连接端连接第二固定电压，
    第六开关元件包括控制端、第一连接端和第二连接端，其中，第六开关元件的控制端连接第十一开关元件的第二端，第六开关元件的第一连接端连接第二时钟信号，第六开关元件的第二连接端连接第二电容，
    第七开关元件包括控制端、第一连接端和第二连接端，其中，第七开关元件的控制端连接第二时钟信号，第七开关元件的第一连接端连接第二电容，第七开关元件的第二连接端连接第八开关元件，
    第八开关元件包括控制端、第一连接端和第二连接端，其中，第八开关元件的控制端连接输入模块和下拉模块，第八开关元件的第一连接端连接第二固定电压，第八开关元件的第二连接端连接第七开关元件的第二端，
    第二电容，具有第一连接端和第二连接端，第二电容的第一连接端连接第五开关元件的控制端，第二电容的第二端连接第五开关元件的第二端，
    其中，第八开关元件的第二端还连接到输出模块。
  7. 如权利要求1所述的驱动电路，其中，所述输出模块包括第九开关元件、第十开关元件和第三电容，其中，
    第九开关元件包括控制端、第一连接端和第二连接端，其中，第九开关元件的控制端连接下拉模块的第一电容的第二端，第九开关元件的第一连接端连接第一固定电压，第九开关元件的第二连接端连接信号输出端，
    第十开关元件包括控制端、第一连接端和第二连接端，其中，第十开关元件的控制端连接上拉模块的第八开关元件第二端，第十开关元件的第一连接端连接信号输出端，第十开关元件的第二连接端连接第二固定电压，
    第三电容，包括第一连接端和第二连接端，第三电容的第一连接端连接上拉模块的第八开关元件的第二连接端，第三电容的第二端连接第二固定电压。
  8. 如权利要求1所述的驱动电路，其中，第十一开关元件的控制端连接第一固定电压。
  9. 如权利要求5所述的驱动电路，其中，第一固定电压为低电平电压，第二固定电压为高电平电压。
  10. 如权利要求6所述的驱动电路，其中，第一固定电压为低电平电压，第二固定电压为高电平电压。
  11. 如权利要求7所述的驱动电路，其中，第一固定电压为低电平电压，第二固定电压为高电平电压。
  12. 如权利要求8所述的驱动电路，其中，第一固定电压为低电平电压，第二固定电压为高电平电压。
  13. 一种显示装置，包括驱动电路，其中，所述驱动电路包括：
    输入模块，用于从信号输入端输入控制信号；
    下拉模块，与输入模块连接，用来将来自输入模块的控制信号下拉至低电平；
    上拉模块，与输入模块连接，用来将来自输入模块的控制信号上拉至高电 平；
    输出模块，基于上拉模块和下拉模块的控制而将相应的输出信号输出到信号输出端，
    其中，在上拉模块和下拉模块之间设置有第十一开关元件，所述第十一开关元件包括控制端、第一连接端和第二连接端。
PCT/CN2016/112154 2016-12-22 2016-12-26 驱动电路及使用其的显示装置 WO2018112990A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/328,218 US10115338B2 (en) 2016-12-22 2016-12-26 Driving circuit and display device using the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201611200371.X 2016-12-22
CN201611200371.XA CN106652901B (zh) 2016-12-22 2016-12-22 驱动电路及使用其的显示装置

Publications (1)

Publication Number Publication Date
WO2018112990A1 true WO2018112990A1 (zh) 2018-06-28

Family

ID=58826472

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/112154 WO2018112990A1 (zh) 2016-12-22 2016-12-26 驱动电路及使用其的显示装置

Country Status (3)

Country Link
US (1) US10115338B2 (zh)
CN (1) CN106652901B (zh)
WO (1) WO2018112990A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109427285B (zh) * 2017-08-31 2022-06-24 乐金显示有限公司 选通驱动电路和使用该选通驱动电路的电致发光显示器
CN108230999B (zh) * 2018-02-01 2019-11-19 武汉华星光电半导体显示技术有限公司 Goa电路及oled显示装置
CN108877619B (zh) * 2018-06-22 2021-06-01 武汉华星光电半导体显示技术有限公司 显示设备的控制电路、控制方法
WO2020147060A1 (zh) * 2019-01-17 2020-07-23 深圳市柔宇科技有限公司 像素驱动电路和显示面板
CN110767176A (zh) * 2019-10-08 2020-02-07 武汉华星光电半导体显示技术有限公司 驱动电路及显示面板
CN110767175A (zh) * 2019-10-08 2020-02-07 武汉华星光电半导体显示技术有限公司 驱动电路及显示面板
CN111524486A (zh) * 2020-06-04 2020-08-11 京东方科技集团股份有限公司 复位控制信号生成电路、方法、模组和显示装置
CN113257178B (zh) * 2021-05-20 2022-07-12 武汉华星光电技术有限公司 驱动电路及显示面板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090184914A1 (en) * 2008-01-17 2009-07-23 Kai-Shu Han Driving device for gate driver in flat panel display
CN103474038A (zh) * 2013-08-09 2013-12-25 京东方科技集团股份有限公司 移位寄存器单元及其驱动方法、移位寄存器与显示装置
CN105261343A (zh) * 2015-11-24 2016-01-20 武汉华星光电技术有限公司 一种goa驱动电路
CN106128347A (zh) * 2016-07-13 2016-11-16 京东方科技集团股份有限公司 移位寄存器单元及其驱动方法、栅极驱动电路、显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103426414B (zh) * 2013-07-16 2015-12-09 北京京东方光电科技有限公司 移位寄存器单元及其驱动方法、栅极驱动电路及显示装置
CN104835450B (zh) * 2015-05-22 2017-01-25 京东方科技集团股份有限公司 移位寄存器单元及其控制方法、栅极驱动电路、显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090184914A1 (en) * 2008-01-17 2009-07-23 Kai-Shu Han Driving device for gate driver in flat panel display
CN103474038A (zh) * 2013-08-09 2013-12-25 京东方科技集团股份有限公司 移位寄存器单元及其驱动方法、移位寄存器与显示装置
CN105261343A (zh) * 2015-11-24 2016-01-20 武汉华星光电技术有限公司 一种goa驱动电路
CN106128347A (zh) * 2016-07-13 2016-11-16 京东方科技集团股份有限公司 移位寄存器单元及其驱动方法、栅极驱动电路、显示装置

Also Published As

Publication number Publication date
US10115338B2 (en) 2018-10-30
US20180211590A1 (en) 2018-07-26
CN106652901A (zh) 2017-05-10
CN106652901B (zh) 2019-12-31

Similar Documents

Publication Publication Date Title
WO2018112990A1 (zh) 驱动电路及使用其的显示装置
US10593279B2 (en) Display device, gate driving circuit and gate driving unit
CN110164352B (zh) 移位寄存器电路及其驱动方法、栅极驱动电路和显示面板
EP2874140B1 (en) Light-emitting control circuit, light-emitting control method and shift register
US11568791B2 (en) Shift register, gate driving circuit and display device
US10140911B2 (en) Shift register unit and driving method, gate drive circuit, and display apparatus
WO2016188367A1 (zh) 移位寄存器单元及其驱动方法、栅极驱动电路、显示装置
US20180204494A1 (en) Shift register unit, gate driving circuit and driving method thereof, and display apparatus
US9406400B2 (en) Gate driving circuit
WO2017219824A1 (zh) 移位寄存器单元、驱动方法、栅极驱动电路和显示装置
WO2018209937A1 (zh) 移位寄存器及其驱动方法、栅极驱动电路、显示装置
WO2021057067A1 (zh) 扫描电路、显示面板和显示装置
EP3657485A1 (en) Shift register unit and driving method therefor, gate drive circuit
WO2017016190A1 (zh) 移位寄存器、显示装置及移位寄存器驱动方法
CN112652271B (zh) 移位寄存器、显示面板及显示装置
CN102270434A (zh) 显示驱动电路
CN205050536U (zh) 移位寄存器单元、移位寄存器和显示装置
CN110782940B (zh) 移位寄存单元、栅极驱动电路、阵列基板及显示装置
US11721268B2 (en) Display panel and display device comprising cascaded shift registers
CN109616041A (zh) 移位寄存器单元、驱动方法、栅极驱动电路及显示装置
CN106997755B (zh) 移位寄存器及其驱动方法、栅极驱动电路、显示装置
US10643533B2 (en) Emission control driving circuit, emission control driver and organic light emitting display device
EP3624103A1 (en) Emission control driving circuit, emission control driver and organic light emitting display device
TW201340065A (zh) 閘極驅動器
CN112164371B (zh) 驱动电路及显示面板

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15328218

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16924297

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16924297

Country of ref document: EP

Kind code of ref document: A1