WO2018023547A1 - 一种单边带调制装置 - Google Patents

一种单边带调制装置 Download PDF

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Publication number
WO2018023547A1
WO2018023547A1 PCT/CN2016/093233 CN2016093233W WO2018023547A1 WO 2018023547 A1 WO2018023547 A1 WO 2018023547A1 CN 2016093233 W CN2016093233 W CN 2016093233W WO 2018023547 A1 WO2018023547 A1 WO 2018023547A1
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signal
electrical signal
clock
analog
circuit
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PCT/CN2016/093233
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English (en)
French (fr)
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张亮
张强
周恩波
左天健
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华为技术有限公司
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Priority to PCT/CN2016/093233 priority Critical patent/WO2018023547A1/zh
Priority to CN201680082733.1A priority patent/CN109478933A/zh
Publication of WO2018023547A1 publication Critical patent/WO2018023547A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication

Definitions

  • the present invention relates to the field of short-range optical communication technologies, and in particular, to a single sideband modulation device.
  • the signal is usually processed by Intensity Modulation/Direct Detection (IM/DD) technology, that is, intensity modulation is adopted at the transmitting end.
  • IM/DD Intensity Modulation/Direct Detection
  • the technology modulates the original electrical signal to obtain an optical signal, and uses a direct detection technique at the receiving end to demodulate the received optical signal to recover the original electrical signal.
  • the scheme shown in Figure 1 is usually used.
  • the original electrical signal passes through Quadrature Amplitude Modulation Mapping (QAM Mapping), RF tone insertion, Zero padding, and Fast Fourier.
  • QAM Mapping Quadrature Amplitude Modulation Mapping
  • RF tone insertion RF tone insertion
  • Zero padding RF padding
  • Fast Fourier IFFT
  • Cyclic prefix CP
  • DAC digital-to-analog conversion processing
  • the single-sideband modulator obtains light by performing single-sideband modulation (SSB) on the input continuous wave source (CW) through an analog electrical signal.
  • SSB single-sideband modulation
  • the optical signal is a single sideband signal, and its spectrum can be as shown in FIG. Since the pilot signal is inserted in the frequency domain of the original electrical signal, the scheme shown in FIG.
  • the prior art adopts the IM/DD technology to perform single-sideband modulation on the continuous wave source through the original electrical signal, which has the problems of low system performance and waste of bandwidth resources.
  • a single sideband modulation device is provided to solve the problem of low system performance and waste of bandwidth resources in the prior art that the IM/DD technology uses the original electrical signal to perform single sideband modulation on the continuous wave source. The problem.
  • the embodiment of the present application provides a single sideband modulation apparatus, including: an analog signal generating circuit, configured to process an input original electrical signal to obtain a first analog electrical signal and a second analog electrical signal; a clock circuit, And generating a first first clock signal and a second first clock signal, and performing phase shift processing on the second first clock signal to obtain a second clock signal, outputting the first first clock signal and the second a clock signal; an adder coupled to the analog signal generating circuit and the clock circuit, respectively, configured to process the input first analog electrical signal and the first first clock signal to output the first modulated electrical signal, and input the second analog electrical
  • the signal and the second clock signal are processed to output a second modulated electrical signal;
  • the single sideband modulation circuit is coupled to the adder for performing single sideband modulation on the continuous wave source by the first modulated electrical signal and the second modulated electrical signal Optical signal.
  • the first analog electric signal is superimposed on the first analog electric signal in the time domain
  • the second analog signal is superimposed on the second analog electric signal in the time domain, so that the pilot can be inserted in the time domain. signal.
  • the first first clock signal and the second clock signal are external clock signals in the time domain, superimposing the first first clock signal and the second clock signal does not affect the first analog electrical signal output by the analog signal generating circuit
  • the PAPR of the second analog electrical signal that is, the problem of excessive PAPR and system performance degradation of the discrete multi-carrier electrical signal and the analog electrical signal caused by inserting the pilot signal in the frequency domain of the original electrical signal in the prior art is avoided. Improve the performance of the system.
  • the optical signal obtained by performing single-sideband modulation on the continuous wave source by the first modulated electrical signal superimposed with the first first clock signal and the second modulated electrical signal superimposed with the second clock signal has high spectral efficiency, Avoid the problem of wasted bandwidth resources when transmitting optical signals.
  • the single sideband modulation apparatus provided by the embodiment of the present invention avoids the use of the original electrical signal to the continuous wave by using the IM/DD technology in the prior art.
  • the technical solution of the single sideband modulation of the light source has the problems of low system performance and waste of bandwidth resources.
  • the optical signal generated by the transmitting end has high spectral efficiency and avoids the waste of bandwidth resources, when the receiving end recovers the original electrical signal through the Photo Detector (PD), the bandwidth requirement for the PD is also reduced. , thereby further improving the system performance of the receiving end.
  • PD Photo Detector
  • the analog signal generating circuit includes: a digital signal processor configured to modulate the input original electrical signal to output a discrete multi-carrier electrical signal; a Hilbert transformer, and a digital signal processor Coupling, for inputting the discrete multi-carrier electrical signals through a Hilbert transform output to each other as a first digital electrical signal and a second digital electrical signal of a Hilbert transform pair; a digital-to-analog converter, and Hill
  • the Bode converter is coupled to convert the input first digital electrical signal to the first analog electrical signal, and convert the input second digital electrical signal to the second analog electrical signal.
  • the carrier-signal power ratio (CSPR) of the single sideband modulation device can be adjusted by adjusting the amplitudes of the first analog electrical signal and the second analog electrical signal output by the digital-to-analog converter to make the carrier of the system
  • the signal ratio is flexible and adjustable, so that the system has a better carrier-to-signal ratio.
  • the clock circuit includes a clock source and a phase shifter, wherein: the clock source is configured to generate a first first clock signal and a second first clock signal, and the first first clock signal The input adder, the second first clock signal is input to the phase shifter, and the phase shifter is configured to perform phase shift processing on the input second first clock signal to output the second clock signal.
  • an implementation of a clock circuit is provided.
  • the amplitude of the first first clock signal and the second clock signal output by the clock circuit can be adjusted by adjusting the amplitudes of the first first clock signal and the second first clock signal, thereby adjusting the single sideband
  • the carrier signal ratio of the modulation circuit makes the carrier signal ratio of the system flexible and adjustable, so that the system has a better carrier signal ratio.
  • the adder includes: a first adder coupled to the analog signal generating circuit and the clock circuit, respectively, configured to process the input first analog electrical signal and the first first clock signal to output a modulated electrical signal; a second adder coupled to the analog signal generating circuit and the clock circuit, respectively for outputting the second analog electrical signal and the second clock signal to be outputted to the second tone Power signal.
  • an implementation of an adder is provided.
  • the first first clock signal is superimposed on the first analog electric signal by the first adder
  • the second clock signal is superimposed on the second analog electric signal by the second adder, thereby realizing the time domain.
  • the insertion of the pilot signal is provided.
  • the single sideband modulation circuit includes: a continuous wave source input port for receiving a continuous wave source; a first RF port for receiving the first modulated electrical signal; and a second RF port for Receiving a second modulated electrical signal; the first modulating circuit is configured to perform single sideband modulation on the continuous wave light source by the first modulated electrical signal to output the first optical signal; and the second modulating circuit is configured to pass the second modulated electrical signal pair
  • the continuous wave source performs single sideband modulation to output a second optical signal;
  • the synthesizing circuit is coupled to the first modulation circuit and the second modulation circuit, respectively, for synthesizing the first optical signal and the second optical signal to obtain an optical signal.
  • the bias point in the first modulation circuit is set to 0, the bias point in the second modulation circuit is set to 0, and the bias point in the synthesis circuit is set to ⁇ /2.
  • the linearity of the single sideband modulation device can be adjusted by the setting of the bias points of the first modulation circuit, the second modulation circuit, and the synthesis circuit. It has been experimentally verified that when the bias point in the first modulation circuit is set to 0, the bias point in the second modulation circuit is set to 0, and the bias point in the synthesis circuit is set to ⁇ /2, the linearity of the system is best. .
  • FIG. 1 is a schematic diagram of a technical solution for modulating a continuous wave source by an original electrical signal using an IM/DD technology provided by the prior art
  • FIG. 2 is a schematic diagram of a discrete multi-carrier electrical signal in a technical solution for modulating an optical signal from a continuous wave source by using an original electrical signal by using an IM/DD technology provided by the prior art;
  • FIG. 3 is a schematic diagram of a spectrum of an optical signal in a technical solution for modulating an optical signal by using an original electrical signal by using an IM/DD technology
  • FIG. 4 is a schematic structural diagram of a single sideband modulation apparatus according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of another single sideband modulation apparatus according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of a frequency spectrum of an optical signal output by a single sideband modulation apparatus according to an embodiment of the present invention.
  • the signal is usually processed by IM/DD technology, that is, the original electrical signal is modulated by the intensity modulation technique at the transmitting end to obtain an optical signal, and the received optical signal is directly detected by the receiving end. Demodulation restores the original electrical signal.
  • the pilot signal is usually inserted in the frequency domain of the original electrical signal, and the amplitude of the pilot signal is much larger than the amplitude of other frequency components. Since the pilot signal appears as a periodic signal in the time domain, the power of the periodic signal corresponding to the pilot signal is much higher than the average power of the discrete multi-carrier electrical signal in the time domain in the time domain. In turn, the PAPR of the discrete multi-carrier electrical signal is large, resulting in a decrease in performance of the system and a waste of bandwidth of the optical signal.
  • the embodiment of the present invention provides a single sideband modulation.
  • the device comprises: an analog signal generating circuit, configured to process the input original electrical signal to obtain a first analog electrical signal and a second analog electrical signal; and a clock circuit for generating the first first clock signal and the second circuit a first clock signal, and performing phase shift processing on the second first clock signal to obtain a second clock signal, outputting the first first clock signal and the first a second clock signal; an adder coupled to the analog signal generating circuit and the clock circuit, respectively, configured to process the input first analog electrical signal and the first first clock signal to output the first modulated electrical signal, and input the second analog
  • the electrical signal and the second clock signal are processed to output a second modulated electrical signal;
  • the single sideband modulation circuit is coupled to the adder for performing single sideband modulation of the continuous wave source by the first modulated electrical signal and the second modulated electrical signal, Obtain an optical signal.
  • the first analog electrical signal is superimposed with the first first clock signal in the time domain
  • the second analog electrical signal is superimposed with the second clock signal in the time domain.
  • the pilot signal is inserted in the time domain. Since the first first clock signal and the second clock signal are external clock signals in the time domain, superimposing the first first clock signal and the second clock signal does not affect the first analog electrical signal output by the analog signal generating circuit And the PAPR of the second analog electrical signal, that is, the problem of excessive PAPR and system performance degradation of the discrete multi-carrier electrical signal and the analog electrical signal caused by inserting the pilot signal in the frequency domain of the original electrical signal in the prior art is avoided. Improve the performance of the system.
  • the optical signal obtained by performing single-sideband modulation on the continuous wave source by the first modulated electrical signal superimposed with the first first clock signal and the second modulated electrical signal superimposed with the second clock signal has high spectral efficiency, Avoid the problem of wasted bandwidth resources when transmitting optical signals.
  • the single sideband modulation apparatus provided by the embodiment of the present invention avoids the low performance and bandwidth resources of the prior art technical solution of using the IM/DD technology to perform single sideband modulation on the continuous wave source by using the original electrical signal. The problem of wasting.
  • the optical signal generated by the transmitting end has high spectral efficiency and avoids the waste of bandwidth resources, when the original electrical signal is recovered by the PD at the receiving end, the bandwidth requirement for the PD is also reduced, thereby further improving the system of the receiving end. performance.
  • the embodiment of the invention provides a single sideband modulation device.
  • the single sideband modulation device 400 includes:
  • An analog signal generating circuit 401 configured to process the input original electrical signal to obtain a first analog electrical signal and a second analog electrical signal;
  • the clock circuit 402 is configured to generate a first path first clock signal and a second path first clock signal, and perform phase offset processing on the second path first clock signal to obtain a second clock signal, and output a first path first clock a signal and a second clock signal;
  • the adder 403 is coupled to the analog signal generating circuit 401 and the clock circuit 402, respectively, for processing the input first analog electrical signal and the first first clock signal to output the first modulated electrical signal, and inputting the second analog electrical And outputting the second modulated electrical signal by the signal and the second clock signal;
  • the single sideband modulation circuit 404 is coupled to the adder 403 for performing single sideband modulation on the continuous wave source by the first modulated electrical signal and the second modulated electrical signal to obtain an optical signal.
  • the original electrical signal may be a binary bit stream, which is a digital signal obtained by encoding the original analog electrical signal.
  • the first first clock signal and the second first clock signal are clock signals having the same parameters of amplitude, frequency, phase, etc., wherein the first first clock signal is directly output to the adder 403, the second way A clock signal is subjected to phase shift processing to obtain a second clock signal, and then input to the adder 403.
  • the continuous wave light source is used to generate an optical signal, that is, a single sideband modulation of the continuous wave light source by the first modulated electrical signal and the second modulated electrical signal to obtain an optical signal.
  • the optical signal is a single sideband signal, that is, the spectrum of the optical signal contains only the left-band frequency component or only the right-band frequency component, and the frequency component of each sideband contains the complete transmitted message.
  • the optical signal is an optical signal having a real part and an imaginary part, and the real part of the optical signal is a signal obtained by performing single sideband modulation on the continuous wave source by the first modulated electrical signal, and the imaginary part of the optical signal is passed through the second modulated electric A signal obtained by unilaterally modulating a continuous wave source with a signal.
  • the superposition of the first analog electrical signal and the first first clock signal and the superposition of the second analog electrical signal and the second clock signal are implemented by the adder 403, thereby The insertion of the pilot signal is implemented in the time domain. Since the first first clock signal and the second clock signal are external clock signals output by the clock circuit 402, superimposing the first first clock signal and the second clock signal in the time domain does not affect the output of the analog signal generating circuit 401.
  • the PAPR of the first analog electrical signal and the second analog electrical signal thereby avoiding the problem of excessive PAPR and system performance degradation of the analog electrical signal caused by inserting the pilot signal in the frequency domain of the original electrical signal in the prior art. Improve the performance of the system.
  • the analog signal generating circuit 401 may include:
  • a digital signal processor configured to modulate the input original electrical signal to output a discrete multi-carrier electrical signal
  • a Hilbert transformer coupled to the digital signal processor for passing the input discrete multi-carrier electrical signal through a Hilbert transform output to each other as a first digital electrical signal of the Hilbert transform pair and a second Digital electrical signal;
  • a digital-to-analog converter coupled to the Hilbert transformer for converting the input first digital electrical signal to the first analog electrical signal and converting the input second digital electrical signal to the second analog electrical signal.
  • the digital signal processor is configured to modulate the original electrical signal, and then output the discrete multi-carrier electrical signal.
  • the processing can be implemented by a digital signal processor (DSP), a Reduced Instruction Set Computer (RISC), a Micro Control System (MCS), or the like by software programming. .
  • DSP digital signal processor
  • RISC Reduced Instruction Set Computer
  • MCS Micro Control System
  • the process of the digital signal processor modulating the original electrical signal may be: performing parallel conversion and mapping processing on the original electrical signal string to obtain multiple parallel frequency domain signals; and multi-parallel frequency domain by fast inverse Fourier transform
  • the signal is converted into multi-parallel time domain signals; then the CP is loaded to make the single sideband modulation device have certain anti-dispersion performance, and then the parallel multi-channel time domain signals loaded with the CP are converted into one serial by parallel-serial conversion.
  • the time domain signal that is, the discrete multi-carrier electrical signal.
  • the discrete multi-carrier electrical signal is a discrete multi-carrier signal, which is a digital signal processed by a digital signal processor. Since the signal of the electrical domain involved in the embodiment of the present invention also has the signal of the optical domain, the discrete multicarrier signal of the electrical domain is referred to as a discrete multicarrier electrical signal for the purpose of distinguishing and understanding.
  • the Hilbert transformer is used to perform a Hilbert transform on a discrete multi-carrier electrical signal and output a first digital electrical signal and a second digital electrical signal that are mutually Hilbert transform pairs.
  • the Hilbert transformer can be implemented by hardware such as a Field-Programmable Gate Array (FPGA), or can be implemented by software. In the embodiment of the present invention, the implementation of the Hilbert transformer is not limited. .
  • the first analog electrical signal output by the digital-to-analog converter and the second The amplitude of the analog electrical signal can be adjusted.
  • the carrier signal ratio of the single sideband modulation circuit 400 can be adjusted by adjusting the amplitudes of the first analog electrical signal and the second analog electrical signal output by the digital to analog converter, so that the carrier signal ratio of the system is flexible. Adjustable to give the system a better carrier-to-signal ratio.
  • clock circuit 402 includes a clock source and a phase shifter, wherein:
  • a clock source for generating a first first clock signal and a second first clock signal, wherein the first first clock signal is input to the adder, and the second first clock signal is input to the phase shifter;
  • phase shifter configured to perform phase shift processing on the input second first clock signal to output a second clock signal.
  • the clock source may be a crystal oscillator (referred to as “crystal oscillator”), a silicon-based micro-electro-mechanical system (MEMS), an inductor-capacitor oscillator, and the like.
  • crystal oscillator referred to as "crystal oscillator”
  • MEMS micro-electro-mechanical system
  • inductor-capacitor oscillator and the like.
  • the first first clock signal and the second first clock signal generated by the clock source are clock signals having the same parameters of amplitude, frequency, phase, etc., and the amplitude of the first clock signal can be adjusted.
  • the amplitude of the first path first clock signal and the second clock signal output by the clock circuit 402 can be adjusted by adjusting the amplitude of the first clock signal, thereby adjusting the single sideband modulation circuit 400.
  • the carrier signal ratio makes the carrier signal ratio of the system flexible and adjustable, so that the system has a better carrier signal ratio.
  • the adder 403 comprises:
  • the first adder is coupled to the analog signal generating circuit 401 and the clock circuit 402, respectively, for processing the input first analog electrical signal and the first first clock signal to output the first modulated electrical signal;
  • the second adder is coupled to the analog signal generating circuit 401 and the clock circuit 402, respectively, for processing the input second analog electrical signal and the second clock signal to output the second modulated electrical signal.
  • the single sideband modulation circuit 404 includes:
  • a continuous wave source input port for receiving a continuous wave source
  • a first RF port for receiving the first modulated electrical signal
  • a second RF port for receiving the second modulated electrical signal
  • a first modulation circuit configured to perform single sideband modulation on the continuous wave source by the first modulated electrical signal, and output the first optical signal
  • a second modulation circuit configured to perform single sideband modulation on the continuous wave source by the second modulated electrical signal, and output the second optical signal
  • the combining circuit is coupled to the first modulating circuit and the second modulating circuit respectively for synthesizing the first optical signal and the second optical signal to obtain an optical signal.
  • the bias point in the first modulation circuit is set to 0, the bias point in the second modulation circuit is set to 0, and the bias point in the synthesis circuit is set to ⁇ /2.
  • the bias point of the first modulation circuit, the bias point of the second modulation circuit, and the bias point of the synthesis circuit can be manually set by setting the above three sides in the single sideband modulation circuit 404.
  • the bias point can adjust the linearity of the single sideband modulation device 400. It has been experimentally verified that when the bias point in the first modulation circuit is set to 0, the bias point in the second modulation circuit is set to 0, and the bias point in the synthesis circuit is set to ⁇ /2, the linearity of the system is best. .
  • An alternative embodiment of a single sideband modulation device 400 can be as shown in FIG. 5 based on the above alternative implementation of the single sideband modulation device 400 shown in FIG.
  • the single sideband modulation device 400 of FIG. 5 includes an analog signal generation circuit 401, a clock circuit 402, an adder 403, and a single sideband modulation circuit 404.
  • the analog signal generating circuit 401 includes a digital signal processor 401a, a Hilbert transformer 401b, and a digital to analog converter 401c;
  • the clock circuit 402 includes a clock source 402a and a phase shifter 402b;
  • the adder 403 includes a first adder 403a. And a first adder 403b.
  • the digital signal processor 401a modulates the original electrical signal to output a discrete multicarrier electrical signal; the Hilbert transformer 401b is coupled to the digital signal processor 401a for pairing
  • the input discrete multi-carrier electrical signals are subjected to Hilbert transform and output a first digital electrical signal and a second digital electrical signal that are mutually Hilbert transform pairs.
  • the first digital electrical signal and the second digital electrical signal are not explicitly labeled in FIG. 5, and the default Hilbert transform is used in the embodiment of the present invention.
  • the upper signal output by the device 401b is the first digital electrical signal, and the lower one signal is the second digital electrical signal.
  • the digital to analog converter 401c is coupled to the Hilbert transformer 401b for converting the input first digital electrical signal to the first analog electrical signal and converting the input second digital electrical signal to the second analog electrical signal.
  • the first analog electrical signal and the second analog electrical signal are not explicitly labeled in FIG. 5.
  • the upper digital signal output by the default digital-to-analog converter 401c is the first analog electrical signal
  • the lower one signal is the second analog electrical signal. .
  • the digital-to-analog converter 401c is used for digital-to-analog conversion, that is, for converting an input digital signal into an analog signal.
  • a digital to analog converter 401c is used to digitally convert the two signals (i.e., the first digital electrical signal and the second digital electrical signal).
  • two digital-to-analog converters may also be provided, and the two digital-to-analog converters respectively perform digital-to-analog conversion on the first digital electrical signal and the second digital electrical signal, respectively outputting the first analog electrical signal and the second analog electrical signal.
  • the number of digital to analog converters in the embodiment of the present invention is not limited.
  • the clock source 402a is configured to generate a first first clock signal and a second first clock signal, and the first first clock signal is input to the first adder 403a, and is superimposed with the first analog electrical signal output by the digital to analog converter 401c.
  • the second first clock signal is phase-shifted by the phase shifter 402b to output a second clock signal.
  • the second clock signal is input to the second adder 403b, and is added to the second analog electric signal output from the digital-to-analog converter 401c.
  • the first adder 403a superimposes the first first clock signal and the first analog electrical signal to output a first modulated electrical signal
  • the second adder 403b superimposes the second clock signal and the second analog electrical signal.
  • a second modulated electrical signal is output.
  • the single sideband modulation circuit 404 includes three ports: a continuous wave source input port 404a, a first RF port 404b, and a second RF port 404c.
  • the continuous wave source input port 404a is configured to receive the continuous wave source
  • the first RF port 404b is configured to receive the first modulated electrical signal input by the first adder 403a
  • the second RF port 404c is configured to receive the input of the second adder 403b.
  • the second modulated electrical signal is configured to receive the continuous wave source.
  • the first modulation circuit 404d of the single sideband modulation circuit 404 is configured to perform single sideband modulation on the continuous wave source by the first modulated electrical signal, and output the first optical signal.
  • the first side of the single sideband modulation circuit 404 The second modulation circuit 404e is configured to perform single sideband modulation on the continuous wave source by the second modulated electrical signal, and output the second optical signal.
  • the combining circuit 404f is coupled to the first modulation circuit 404d and the second modulation circuit 404e, respectively, for combining the first optical signal and the second optical signal to output an optical signal.
  • the optical signal is a single sideband signal that is output by the single sideband modulation device 400 after the single sideband modulation of the input original electrical signal.
  • the spectrum of the optical signal output by the single sideband modulation device 400 can be as shown in FIG. 6, and the spectrum of the optical signal shown in FIG. 6 and the spectrum of the optical signal shown in FIG. 3 (in the spectrum of the optical signal shown in FIG. 3) The corresponding bandwidth between -B/2 and 0 is wasted. It can be seen from the comparison that the optical signal shown in FIG. 6 does not have a waste of bandwidth, and the optical spectrum efficiency is high.
  • the bias point of the first modulation circuit 404d can be set to 0, the bias point of the second modulation circuit 404e can be set to 0, and the bias point of the synthesis circuit 404f can be set. It is ⁇ /2.
  • the first first clock signal and the second first clock signal may be cosine signals having the same parameters such as amplitude, frequency, and phase, and the phase of the phase shifter 402b.
  • the offset value can be set to ⁇ /2, that is, the second clock signal outputted by the second first clock signal after being phase-shifted by the phase shifter 402b is a sinusoidal signal.
  • the first analog electrical signal is A and the second analog electrical signal is The first first clock signal is cos( ⁇ t).
  • the phase shift value of the phase shifter 402b is set to ⁇ /2
  • the second clock signal is sin( ⁇ t).
  • the first modulated electrical signal is A+cos( ⁇ t)
  • the second modulated electrical signal is In a case where the bias point of the first modulation circuit 404d is set to 0, the first modulation circuit 404d performs single-sideband modulation on the continuous wave source by the first modulated electrical signal, and then outputs the first optical signal as the first modulated electrical signal.
  • the expression in the optical domain, ie the first optical signal, can be expressed as A+cos( ⁇ t).
  • the second optical signal can be expressed as Assuming that the continuous wave source is E in , and in the case where the bias point of the synthesizing circuit 404f is set to ⁇ /2, the optical signal E out output from the synthesizing circuit 404f can be expressed as:
  • the optical signal E out contains the signal on the right side. And the right side with the clock cos( ⁇ t)+j*sin( ⁇ t).
  • the optical signal E out is amplified by an Erbium-doped fiber amplifier (EFDA) and transmitted to the receiving end through the optical fiber. After receiving the optical signal E out , the receiving end can beat the right side signal and the right side clock through the PD to recover the original electrical signal.
  • EFDA Erbium-doped fiber amplifier
  • the optical signal output by the single sideband modulation device is taken as a signal on the right side as an example.
  • the optical signal output by the single sideband modulation device can also be the signal on the left side.
  • the amplitudes of the first clock signal and the second clock signal of the first path are changed from a positive value to a negative value, so that the optical signal output by the single sideband modulation device includes the left side.
  • the optical signal is a signal on the left side.
  • the time is realized.
  • a pilot signal is inserted on the domain. Since the first first clock signal and the second clock signal are external clock signals in the time domain, superimposing the first first clock signal and the second clock signal does not affect the first analog electrical signal output by the analog signal generating circuit And the PAPR of the second analog electrical signal, that is, the problem of excessive PAPR and system performance degradation of the discrete multi-carrier electrical signal and the analog electrical signal caused by inserting the pilot signal in the frequency domain of the original electrical signal in the prior art is avoided. Improve the performance of the system.
  • the optical signal obtained by performing single-sideband modulation on the continuous wave source by the first modulated electrical signal superimposed with the first first clock signal and the second modulated electrical signal superimposed with the second clock signal has high spectral efficiency, Avoid the problem of wasted bandwidth resources when transmitting optical signals.
  • the single sideband modulation apparatus provided by the embodiment of the present invention avoids the low performance and bandwidth resources of the prior art technical solution of using the IM/DD technology to perform single sideband modulation on the continuous wave source by using the original electrical signal. The problem of wasting.
  • the optical signal generated by the transmitting end has high spectral efficiency and avoids the waste of bandwidth resources, when the original electrical signal is recovered by the PD at the receiving end, the bandwidth requirement for the PD is also reduced, thereby further improving the system of the receiving end. performance.
  • the single sideband modulation circuit The bias point can be artificially set. Therefore, in the embodiment of the present invention, the linearity of the single sideband modulation device can be adjusted by setting the bias point of the single sideband modulation circuit, thereby making the system have better linearity.
  • the amplitude of the first first clock signal and the second clock signal output by the clock circuit may be adjusted, or the first simulation of the output of the analog signal generating circuit may be adjusted.
  • the amplitude of the electrical signal and the second analog electrical signal adjust the carrier signal ratio of the single sideband modulation device, thereby making the carrier signal ratio of the system flexible and adjustable, so that the system has a better carrier to signal ratio.

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  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)

Abstract

一种单边带调制装置，以解决采用IM/DD技术进行单边带调制时存在的系统性能低、带宽资源浪费问题。包括：模拟信号产生电路，用于将原始电信号处理得到第一模拟电信号和第二模拟电信号；时钟电路，用于产生第一路第一时钟信号和第二路第一时钟信号，对第二路第一时钟信号进行相位偏移处理得到第二时钟信号，输出第一路第一时钟信号和第二时钟信号；加法器，与模拟信号产生电路和时钟电路耦合，用于将输入的第一模拟电信号和第一路第一时钟信号处理输出第一调制电信号，将输入的第二模拟电信号和第二时钟信号处理输出第二调制电信号；单边带调制电路，与加法器耦合，用于通过第一调制电信号和第二调制电信号对连续波光源进行单边带调制得到光信号。

Description

一种单边带调制装置 技术领域
本发明涉及短距离光通信技术领域，尤其涉及一种单边带调制装置。
背景技术
随着移动互联网技术的不断发展，短距离光通信受到了越来越多的关注。在短距离光通信领域，出于器件成本和功耗等因素的考虑，通常采用强度调制/直接检测(Intensity Modulation/Direct Detection，IM/DD)技术对信号进行处理，即在发射端采用强度调制技术对原始电信号进行调制得到光信号，在接收端采用直接检测技术对接收到的光信号进行解调，恢复出原始电信号。
采用IM/DD技术对原始电信号进行调制时，通常采用图1所示的方案。如图1所示，在发射端，原始电信号依次经过正交调制映射(Quadrature Amplitude Modulation Mapping，QAM Mapping)、导频插入(RF tone insertion)、边界补零(Zero padding)、快速傅里叶反变换(Inverse Fast Fourier Transform，IFFT)以及加入循环前缀(Cyclic prefix，CP)处理后，得到图2所示的离散多载波电信号，离散多载波电信号经过数模转换器(Digital to analog converter，DAC)进行数模转换处理后得到模拟电信号，单边带调制器通过模拟电信号对输入的连续波光源(Continuous Wave，CW)进行单边带调制(Single sideband modulation，SSB)后得到光信号，该光信号为单边带信号，其频谱可如图3所示。由于在原始电信号的频域插入了导频信号，因而图1所示的方案会导致离散多载波电信号和模拟电信号的峰均比(Peak to average power ratio，PAPR)较大，因而，将离散多载波电信号转换为模拟电信号时需要具有较高有效位宽(Effective Number of Bit，ENOB)的数模转换器进行转换，导致系统性能降低。同时，由图3所示的光信号的频谱可以看出，采用图1所示的方案进行单边带调制时，单边带调制器输出的光信号的光频谱效率低，从而导致传输光信号时会存在带宽资源浪费的问题。
综上，现有技术中采用IM/DD技术通过原始电信号对连续波光源进行单边带调制的技术方案存在系统性能低、带宽资源浪费的问题。
发明内容
有鉴于此，提供一种单边带调制装置，用以解决现有技术中采用IM/DD技术通过原始电信号对连续波光源进行单边带调制的技术方案存在的系统性能低、带宽资源浪费的问题。
一方面，本申请实施例提供一种单边带调制装置，包括：模拟信号产生电路，用于将输入的原始电信号处理得到一路第一模拟电信号和一路第二模拟电信号；时钟电路，用于产生第一路第一时钟信号和第二路第一时钟信号，以及对第二路第一时钟信号进行相位偏移处理得到第二时钟信号，输出第一路第一时钟信号和第二时钟信号；加法器，分别与模拟信号产生电路和时钟电路耦合，用于将输入的第一模拟电信号和第一路第一时钟信号处理输出第一调制电信号，将输入的第二模拟电信号和第二时钟信号处理输出第二调制电信号；单边带调制电路，与加法器耦合，用于通过第一调制电信号和第二调制电信号对连续波光源进行单边带调制，得到光信号。
采用上述技术方案，在时域上对第一模拟电信号叠加第一路第一时钟信号以及在时域上对第二模拟电信号叠加第二时钟信号，即可实现在时域上插入导频信号。由于第一路第一时钟信号和第二时钟信号为时域上的外部时钟信号，因而叠加第一路第一时钟信号和第二时钟信号不会影响模拟信号产生电路输出的第一模拟电信号和第二模拟电信号的PAPR，即避免了现有技术中在原始电信号的频域插入导频信号而导致的离散多载波电信号和模拟电信号的PAPR过大、系统性能降低的问题，提高了系统的性能。同时，通过叠加了第一路第一时钟信号的第一调制电信号和叠加了第二时钟信号的第二调制电信号对连续波光源进行单边带调制所得到的光信号频谱效率高，可以避免传输光信号时存在的带宽资源浪费的问题。综上，采用本发明实施例提供的单边带调制装置避免了现有技术中采用IM/DD技术通过原始电信号对连续波 光源进行单边带调制的技术方案存在的系统性能低、带宽资源浪费的问题。相应地，由于发射端产生的光信号频谱效率较高、避免了带宽资源浪费的问题，在接收端通过光电探测器(Photo Detector，PD)恢复原始电信号时，对PD的带宽要求也会降低，从而进一步提高了接收端的系统性能。
在一种可能的实现方式中，模拟信号产生电路包括：数字信号处理器，用于将输入的原始电信号经过调制后输出离散多载波电信号；希尔伯特变换器，与数字信号处理器耦合，用于将输入的离散多载波电信号经过希尔伯特变换输出互为希尔伯特变换对的一路第一数字电信号和一路第二数字电信号；数模转换器，与希尔伯特变换器耦合，用于将输入的第一数字电信号转换输出第一模拟电信号，将输入的第二数字电信号转换输出第二模拟电信号。
采用上述技术方案，提供了一种模拟信号产生电路的实现方式。同时，可通过调节数模转换器输出的第一模拟电信号和第二模拟电信号的幅值来调节单边带调制装置的载波信号比(Carrier-Signal Power Ratio，CSPR)，使系统的载波信号比灵活可调，从而使系统具有较佳的载波信号比。
在一种可能的实现方式中，时钟电路包括时钟源和移相器，其中：时钟源，用于产生第一路第一时钟信号和第二路第一时钟信号，第一路第一时钟信号输入加法器，第二路第一时钟信号输入移相器；移相器，用于对输入的第二路第一时钟信号进行相位偏移处理输出第二时钟信号。
采用上述技术方案，提供了一种时钟电路的实现方式。同时，可通过调节第一路第一时钟信号和第二路第一时钟信号的幅值来调节时钟电路输出的第一路第一时钟信号和第二时钟信号的幅值，从而调节单边带调制电路的载波信号比，使系统的载波信号比灵活可调，从而使系统具有较佳的载波信号比。
在一种可能的实现方式中，加法器包括：第一加法器，分别与模拟信号产生电路和时钟电路耦合，用于将输入的第一模拟电信号和第一路第一时钟信号处理输出第一调制电信号；第二加法器，分别与模拟信号产生电路和时钟电路耦合，用于将输入的第二模拟电信号和第二时钟信号处理输出第二调 制电信号。
采用上述技术方案，提供了一种加法器的实现方式。同时，通过第一加法器实现在第一模拟电信号上叠加第一路第一时钟信号，通过第二加法器实现在第二模拟电信号上叠加第二时钟信号，从而实现了时域上的导频信号的插入。
在一种可能的实现方式中，单边带调制电路包括：连续波光源输入端口，用于接收连续波光源；第一射频端口，用于接收第一调制电信号；第二射频端口，用于接收第二调制电信号；第一调制电路，用于通过第一调制电信号对连续波光源进行单边带调制，输出第一光信号；第二调制电路，用于通过第二调制电信号对连续波光源进行单边带调制，输出第二光信号；合成电路，分别与第一调制电路和第二调制电路耦合，用于将第一光信号和第二光信号合成，得到光信号。
采用上述技术方案，提供了一种单边带调制电路的实现方式。
在一种可能的实现方式中，第一调制电路中的偏置点设置为0，第二调制电路中的偏置点设置为0，合成电路中的偏置点设置为π/2。
采用上述技术方案，可通过第一调制电路、第二调制电路和合成电路的偏置点的设置来调节单边带调制装置的线性度。经过实验验证，当第一调制电路中的偏置点设置为0、第二调制电路中的偏置点设置为0、合成电路中的偏置点设置为π/2时系统的线性度最好。
附图说明
图1为现有技术提供的采用IM/DD技术通过原始电信号对连续波光源调制得到光信号的技术方案的示意图；
图2为现有技术提供的采用IM/DD技术通过原始电信号对连续波光源调制得到光信号的技术方案中的离散多载波电信号的示意图；
图3为现有技术提供的采用IM/DD技术通过原始电信号对连续波光源调制得到光信号的技术方案中的光信号的频谱的示意图；
图4为本发明实施例提供的一种单边带调制装置的结构示意图；
图5为本发明实施例提供的另一种单边带调制装置的结构示意图；
图6为本发明实施例提供的单边带调制装置输出的光信号的频谱的示意图。
具体实施方式
为了更好地理解本发明的上述目的、方案和优势，下文提供了详细描述。该详细描述通过使用框图、流程图等附图和/或示例，阐明了装置和/或方法的各种实施方式。在这些框图、流程图和/或示例中，包含一个或多个功能和/或操作。本领域技术人员将理解到：这些框图、流程图或示例内的各个功能和/或操作，能够通过各种各样的硬件、软件、固件单独或共同实施，或者通过硬件、软件和固件的任意组合实施。
在远距离光通信领域，通常采用IM/DD技术对信号进行处理，即在发射端采用强度调制技术对原始电信号进行调制得到光信号，在接收端采用直接检测技术对接收到的光信号进行解调，恢复出原始电信号。当采用IM/DD技术通过原始电信号对连续波光源调制得到光信号时，通常在原始电信号的频域插入导频信号，该导频信号的幅值远远大于其他频率分量的幅值，由于导频信号在时域上表现为一个周期性信号，因此在时域上，该导频信号对应的周期性信号的功率就会远远高于时域上的离散多载波电信号的平均功率，进而造成离散多载波电信号的PAPR较大，导致系统的性能降低以及光信号的带宽浪费。
为了解决现有技术中采用IM/DD技术通过原始电信号对连续波光源进行单边带调制的技术方案存在的系统性能低、带宽资源浪费的问题，本发明实施例提供一种单边带调制装置，包括：模拟信号产生电路，用于将输入的原始电信号处理得到一路第一模拟电信号和一路第二模拟电信号；时钟电路，用于产生第一路第一时钟信号和第二路第一时钟信号，以及对第二路第一时钟信号进行相位偏移处理得到第二时钟信号，输出第一路第一时钟信号和第 二时钟信号；加法器，分别与模拟信号产生电路和时钟电路耦合，用于将输入的第一模拟电信号和第一路第一时钟信号处理输出第一调制电信号，将输入的第二模拟电信号和第二时钟信号处理输出第二调制电信号；单边带调制电路，与加法器耦合，用于通过第一调制电信号和第二调制电信号对连续波光源进行单边带调制，得到光信号。
采用本发明实施例所提供的技术方案，在时域上对第一模拟电信号叠加第一路第一时钟信号以及在时域上对第二模拟电信号叠加第二时钟信号，即可实现在时域上插入导频信号。由于第一路第一时钟信号和第二时钟信号为时域上的外部时钟信号，因而叠加第一路第一时钟信号和第二时钟信号不会影响模拟信号产生电路输出的第一模拟电信号和第二模拟电信号的PAPR，即避免了现有技术中在原始电信号的频域插入导频信号而导致的离散多载波电信号和模拟电信号的PAPR过大、系统性能降低的问题，提高了系统的性能。同时，通过叠加了第一路第一时钟信号的第一调制电信号和叠加了第二时钟信号的第二调制电信号对连续波光源进行单边带调制所得到的光信号频谱效率高，可以避免传输光信号时存在的带宽资源浪费的问题。综上，采用本发明实施例提供的单边带调制装置避免了现有技术中采用IM/DD技术通过原始电信号对连续波光源进行单边带调制的技术方案存在的系统性能低、带宽资源浪费的问题。相应地，由于发射端产生的光信号频谱效率较高、避免了带宽资源浪费的问题，在接收端通过PD恢复原始电信号时，对PD的带宽要求也会降低，从而进一步提高了接收端的系统性能。
本发明实施例提供一种单边带调制装置，如图4所示，单边带调制装置400包括：
模拟信号产生电路401，用于将输入的原始电信号处理得到一路第一模拟电信号和一路第二模拟电信号；
时钟电路402，用于产生第一路第一时钟信号和第二路第一时钟信号，以及对第二路第一时钟信号进行相位偏移处理得到第二时钟信号，输出第一路第一时钟信号和第二时钟信号；
加法器403，分别与模拟信号产生电路401和时钟电路402耦合，用于将输入的第一模拟电信号和第一路第一时钟信号处理输出第一调制电信号，将输入的第二模拟电信号和第二时钟信号处理输出第二调制电信号；
单边带调制电路404，与加法器403耦合，用于通过第一调制电信号和第二调制电信号对连续波光源进行单边带调制，得到光信号。
其中，原始电信号可以为二进制比特流，是对原始的模拟电信号经过编码后得到的数字信号。
第一路第一时钟信号和第二路第一时钟信号为幅值、频率、相位等参数完全相同的时钟信号，其中，第一路第一时钟信号直接输出至加法器403，第二路第一时钟信号经过相位偏移处理得到第二时钟信号后再输入至加法器403。
连续波光源用于产生光信号，即通过第一调制电信号和第二调制电信号对连续波光源进行单边带调制，得到光信号。
光信号为一种单边带信号，即光信号的频谱只包含左边带频率分量或只包含右边带频率分量，每一个边带的频率分量包含有完整的被传输的消息。光信号为具有实部和虚部的光信号，光信号的实部为通过第一调制电信号对连续波光源进行单边带调制后得到的信号，光信号的虚部为通过第二调制电信号对连续波光源进行单边带调制后得到的信号。
在图4所示的单边带调制装置400中，通过加法器403实现第一模拟电信号与第一路第一时钟信号的叠加以及第二模拟电信号和第二时钟信号的叠加，从而在时域上实现了导频信号的插入。由于第一路第一时钟信号和第二时钟信号为时钟电路402输出的外部时钟信号，因而在时域上叠加第一路第一时钟信号和第二时钟信号不会影响模拟信号产生电路401输出的第一模拟电信号和第二模拟电信号的PAPR，从而避免了现有技术中在原始电信号的频域插入导频信号而导致的模拟电信号的PAPR过大、系统性能降低的问题，提高了系统的性能。
可选地，模拟信号产生电路401可以包括：
数字信号处理器，用于将输入的原始电信号经过调制后输出离散多载波电信号；
希尔伯特变换器，与数字信号处理器耦合，用于将输入的离散多载波电信号经过希尔伯特变换输出互为希尔伯特变换对的一路第一数字电信号和一路第二数字电信号；
数模转换器，与希尔伯特变换器耦合，用于将输入的第一数字电信号转换输出第一模拟电信号，将输入的第二数字电信号转换输出第二模拟电信号。
其中，数字信号处理器用于对原始电信号这一数字信号进行调制处理后输出离散多载波电信号。该处理过程可通过数字信号处理器(Digital Signal Processor，DSP)、精简指令集计算机(Reduced Instruction Set Computer，RISC)，微控制器(Micro Control System，MCS)等硬件实现，也可以通过软件编程实现。
数字信号处理器对原始电信号进行调制处理的流程可以是：对原始电信号串并转换和映射处理，得到多路并行的频域信号；通过快速反傅里叶变换将多路并行的频域信号转换为多路并行的时域信号；再通过加载CP使得单边带调制装置具有一定的抗色散性能，然后通过并串转换将加载了CP的多路并行的时域信号转换为一路串行的时域信号，即离散多载波电信号。
其中，离散多载波电信号为一种离散多载波信号，是经数字信号处理器处理后得到的数字信号。由于本发明实施例中涉及的信号有电域的信号也有光域的信号，因此为了便于区分和理解，将电域的离散多载波信号称为离散多载波电信号。
希尔伯特变换器用于对离散多载波电信号进行希尔伯特变换后输出互为希尔伯特变换对的一路第一数字电信号和一路第二数字电信号。希尔伯特变换器可通过现场可编程门阵列(Field－Programmable Gate Array，FPGA)等硬件实现，也可以通过软件实现，本发明实施例中对希尔伯特变换器的实现方式不做限制。
在模拟信号产生电路401中，数模转换器输出的第一模拟电信号和第二 模拟电信号的幅值可以调节。在本发明实施例中，可通过调节数模转换器输出的第一模拟电信号和第二模拟电信号的幅值来调节单边带调制电路400的载波信号比，使系统的载波信号比灵活可调，从而使系统具有较佳的载波信号比。
可选地，时钟电路402包括时钟源和移相器，其中：
时钟源，用于产生第一路第一时钟信号和第二路第一时钟信号，第一路第一时钟信号输入加法器，第二路第一时钟信号输入移相器；
移相器，用于对输入的第二路第一时钟信号进行相位偏移处理输出第二时钟信号。
其中，时钟源可以是晶体振荡器(简称“晶振”)、硅基微机电系统(Micro-Electro-Mechanical System，MEMS)、电感电容振荡器等。
在时钟电路402中，时钟源产生的第一路第一时钟信号和第二路第一时钟信号为幅值、频率、相位等参数完全相同的时钟信号，该第一时钟信号的幅值可以调节。在本发明实施例中，可通过调节该第一时钟信号的幅值来调节时钟电路402输出的第一路第一时钟信号和第二时钟信号的幅值，从而调节单边带调制电路400的载波信号比，使系统的载波信号比灵活可调，从而使系统具有较佳的载波信号比。
可选地，加法器403包含：
第一加法器，分别与模拟信号产生电路401和时钟电路402耦合，用于将输入的第一模拟电信号和第一路第一时钟信号处理输出第一调制电信号；
第二加法器，分别与模拟信号产生电路401和时钟电路402耦合，用于将输入的第二模拟电信号和第二时钟信号处理输出第二调制电信号。
通过加法器403包含的第一加法器实现在第一模拟电信号上叠加第一路第一时钟信号，通过加法器403包含的第二加法器实现在第二模拟电信号上叠加第二时钟信号，从而实现了时域上的导频信号的插入。
可选地，单边带调制电路404包括：
连续波光源输入端口，用于接收连续波光源；
第一射频端口，用于接收第一调制电信号；
第二射频端口，用于接收第二调制电信号；
第一调制电路，用于通过第一调制电信号对连续波光源进行单边带调制，输出第一光信号；
第二调制电路，用于通过第二调制电信号对连续波光源进行单边带调制，输出第二光信号；
合成电路，分别与第一调制电路和第二调制电路耦合，用于将第一光信号和第二光信号合成，得到光信号。
可选地，第一调制电路中偏置点设置为0，第二调制电路中偏置点设置为0，合成电路中偏置点设置为π/2。
在单边带调制电路404中，第一调制电路的偏置点、第二调制电路的偏置点以及合成电路的偏置点均可以人为设置，通过设置单边带调制电路404中如上三个偏置点可以对单边带调制装置400的线性度进行调节。经过实验验证，当第一调制电路中的偏置点设置为0、第二调制电路中的偏置点设置为0、合成电路中的偏置点设置为π/2时系统的线性度最好。
基于图4所示的单边带调制装置400的如上可选实现方式，一种单边带调制装置400的可选实施方式可如图5所示。
图5中的单边带调制装置400包括：模拟信号产生电路401、时钟电路402、加法器403、单边带调制电路404。其中，模拟信号产生电路401包括数字信号处理器401a、希尔伯特变换器401b和数模转换器401c；时钟电路402包括时钟源402a和移相器402b；加法器403包括第一加法器403a和第一加法器403b。
在图5所示的单边带调制装置400中，数字信号处理器401a对原始电信号调制后输出离散多载波电信号；希尔伯特变换器401b与数字信号处理器401a耦合，用于对输入的离散多载波电信号进行希尔伯特变换后输出互为希尔伯特变换对的一路第一数字电信号和一路第二数字电信号。图5中未明确标示第一数字电信号和第二数字电信号，本发明实施例中默认希尔伯特变换 器401b输出的上面一路信号为第一数字电信号，下面一路信号为第二数字电信号。数模转换器401c与希尔伯特变换器401b耦合，用于将输入的第一数字电信号转换输出第一模拟电信号，以及将输入的第二数字电信号转换输出第二模拟电信号。图5中未明确标示第一模拟电信号和第二模拟电信号，本发明实施例中默认数模转换器401c输出的上面一路信号为第一模拟电信号，下面一路信号为第二模拟电信号。
需要说明的是，数模转换器401c用于进行数模转换，即用于将输入的数字信号转换为模拟信号。图5中采用一个数模转换器401c对两路信号(即第一数字电信号和第二数字电信号)进行了数模转换。实际实现时，也可以设置两个数模转换器，两个数模转换器分别对第一数字电信号和第二数字电信号进行数模转换，分别输出第一模拟电信号和第二模拟电信号。本发明实施例中对数模转换器的数量不做限制。
时钟源402a用于产生第一路第一时钟信号和第二路第一时钟信号，第一路第一时钟信号输入第一加法器403a，与数模转换器401c输出的第一模拟电信号叠加，第二路第一时钟信号经移相器402b进行相位偏移处理后输出第二时钟信号。第二时钟信号输入第二加法器403b，与数模转换器401c输出的第二模拟电信号相加。
第一加法器403a将第一路第一时钟信号和第一模拟电信号进行叠加处理后输出第一调制电信号，第二加法器403b将第二时钟信号和第二模拟电信号进行叠加处理后输出第二调制电信号。
单边带调制电路404包含三个端口：连续波光源输入端口404a、第一射频端口404b和第二射频端口404c。其中，连续波光源输入端口404a用于接收连续波光源，第一射频端口404b用于接收第一加法器403a输入的第一调制电信号，第二射频端口404c用于接收第二加法器403b输入的第二调制电信号。
单边带调制电路404中的第一调制电路404d用于通过第一调制电信号对连续波光源进行单边带调制，输出第一光信号。单边带调制电路404中的第 二调制电路404e用于通过第二调制电信号对连续波光源进行单边带调制，输出第二光信号。合成电路404f分别与第一调制电路404d和第二调制电路404e耦合，用于将第一光信号和第二光信号合成，输出光信号。光信号即为单边带调制装置400对输入的原始电信号进行单边带调制后最终输出的单边带信号。
单边带调制装置400输出的光信号的频谱可如图6所示，将图6所示的光信号的频谱与图3所示的光信号的频谱(图3所示的光信号的频谱中，-B/2～0之间对应的带宽被浪费)对比后可以看出，图6所示的光信号不存在带宽浪费的情况，光频谱效率高。
图5所示的单边带调制装置400中，第一调制电路404d的偏置点可以设置为0，第二调制电路404e的偏置点可以设置为0，合成电路404f的偏置点可以设置为π/2。
图5所示的单边带调制装置400中，第一路第一时钟信号和第二路第一时钟信号可以为幅值、频率、相位等参数完全相同的余弦信号，移相器402b的相位偏移值可以设置为π/2，即第二路第一时钟信号经移相器402b进行相位偏移后输出的第二时钟信号为正弦信号。
举例说明：假设第一模拟电信号为A，第二模拟电信号为
Figure PCTCN2016093233-appb-000001
第一路第一时钟信号为cos(ωt)。在移相器402b的相位偏移值设置为π/2时，第二时钟信号为sin(ωt)。那么经第一加法器和第二加法器进行叠加处理后，第一调制电信号为A+cos(ωt)，第二调制电信号为
Figure PCTCN2016093233-appb-000002
在第一调制电路404d的偏置点设置为0的情况下，第一调制电路404d通过第一调制电信号对连续波光源进行单边带调制后输出的第一光信号为第一调制电信号在光域的表达，即第一光信号可以表示为A+cos(ωt)。同样地，在第二调制电路404e的偏置点设置为0的情况下，第二光信号可以表示为
Figure PCTCN2016093233-appb-000003
假设连续波光源为Ein，在合成电路404f的偏置点设置为π/2的情况下，合成电路404f输出的光信号Eout可以表示为：
Figure PCTCN2016093233-appb-000004
从上式可以看出，光信号Eout包含了右边带信号
Figure PCTCN2016093233-appb-000005
和右边带时钟cos(ωt)+j*sin(ωt)。光信号Eout经过掺铒光纤放大器(Erbium-doped fiber amplifier，EFDA)放大后，即可通过光纤传输到接收端。接收端接收到光信号Eout后，即可通过PD对右边带信号和右边带时钟进行拍频，从而恢复出原始电信号。
需要说明的是，本申请实施例中以单边带调制装置输出的光信号为右边带信号为例进行说明。实际实现时，单边带调制装置输出的光信号也可以为左边带信号。通过在时钟电路中设置反向器，即可实现第一路第一时钟信号和第二时钟信号的幅值由正值变为负值，从而实现单边带调制装置输出的光信号中包含左边带时钟，即该光信号为左边带信号。
采用本发明实施例提供的技术方案，在时域上对第一模拟电信号叠加第一路第一时钟信号以及在时域上对第二模拟电信号叠加第二时钟信号，即可实现在时域上插入导频信号。由于第一路第一时钟信号和第二时钟信号为时域上的外部时钟信号，因而叠加第一路第一时钟信号和第二时钟信号不会影响模拟信号产生电路输出的第一模拟电信号和第二模拟电信号的PAPR，即避免了现有技术中在原始电信号的频域插入导频信号而导致的离散多载波电信号和模拟电信号的PAPR过大、系统性能降低的问题，提高了系统的性能。同时，通过叠加了第一路第一时钟信号的第一调制电信号和叠加了第二时钟信号的第二调制电信号对连续波光源进行单边带调制所得到的光信号频谱效率高，可以避免传输光信号时存在的带宽资源浪费的问题。综上，采用本发明实施例提供的单边带调制装置避免了现有技术中采用IM/DD技术通过原始电信号对连续波光源进行单边带调制的技术方案存在的系统性能低、带宽资源浪费的问题。相应地，由于发射端产生的光信号频谱效率较高、避免了带宽资源浪费的问题，在接收端通过PD恢复原始电信号时，对PD的带宽要求也会降低，从而进一步提高了接收端的系统性能。
此外，在本发明实施例所提供的单边带调制装置中，单边带调制电路的 偏置点可以人为设置，因而在本发明实施例中可以通过设置单边带调制电路的偏置点来调节单边带调制装置的线性度，从而使系统具有较佳的线性度。本发明实施例所提供的单边带调制装置中，可通过调节时钟电路输出的第一路第一时钟信号和第二时钟信号的幅值，或者可通过调节模拟信号产生电路输出的第一模拟电信号和第二模拟电信号的幅值来调节单边带调制装置的载波信号比，从而使系统的载波信号比灵活可调，使系统具有较佳的载波信号比。
尽管已描述了本发明的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本发明范围的所有变更和修改。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明实施例的精神和范围。这样，倘若本发明实施例的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

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  1. 一种单边带调制装置，其特征在于，包括：
    模拟信号产生电路，用于将输入的原始电信号处理得到一路第一模拟电信号和一路第二模拟电信号；
    时钟电路，用于产生第一路第一时钟信号和第二路第一时钟信号，以及对所述第二路第一时钟信号进行相位偏移处理得到第二时钟信号，输出所述第一路第一时钟信号和所述第二时钟信号；
    加法器，分别与所述模拟信号产生电路和所述时钟电路耦合，用于将输入的所述第一模拟电信号和所述第一路第一时钟信号处理输出第一调制电信号，将输入的所述第二模拟电信号和所述第二时钟信号处理输出第二调制电信号；
    单边带调制电路，与所述加法器耦合，用于通过所述第一调制电信号和所述第二调制电信号对连续波光源进行单边带调制，得到光信号。
  2. 如权利要求1所述的装置，其特征在于，所述模拟信号产生电路包括：
    数字信号处理器，用于将输入的所述原始电信号经过调制后输出离散多载波电信号；
    希尔伯特变换器，与所述数字信号处理器耦合，用于将输入的所述离散多载波电信号经过希尔伯特变换输出互为希尔伯特变换对的一路第一数字电信号和一路第二数字电信号；
    数模转换器，与所述希尔伯特变换器耦合，用于将输入的所述第一数字电信号转换输出所述第一模拟电信号，将输入的所述第二数字电信号转换输出所述第二模拟电信号。
  3. 如权利要求1或2所述的装置，其特征在于，所述时钟电路包括时钟源和移相器：
    时钟源，用于产生所述第一路第一时钟信号和所述第二路第一时钟信号，所述第一路第一时钟信号输入所述加法器，所述第二路第一时钟信号输入移 相器；
    所述移相器，用于对输入的所述第二路第一时钟信号进行相位偏移处理输出所述第二时钟信号到所述加法器。
  4. 如权利要求1～3任一项所述的装置，其特征在于，所述加法器包括：
    第一加法器，分别与所述模拟信号产生电路和所述时钟电路耦合，用于将输入的所述第一模拟电信号和所述第一路第一时钟信号处理输出所述第一调制电信号；
    第二加法器，分别与所述模拟信号产生电路和所述时钟电路耦合，用于将输入的所述第二模拟电信号和所述第二时钟信号处理输出所述第二调制电信号。
  5. 如权利要求1～4任一项所述的装置，其特征在于，所述单边带调制电路包括：
    连续波光源输入端口，用于接收所述连续波光源；
    第一射频端口，用于接收所述第一调制电信号；
    第二射频端口，用于接收所述第二调制电信号；
    第一调制电路，用于通过所述第一调制电信号对所述连续波光源进行单边带调制，输出第一光信号；
    第二调制电路，用于通过所述第二调制电信号对所述连续波光源进行单边带调制，输出第二光信号；
    合成电路，分别与所述第一调制电路和所述第二调制电路耦合，用于将所述第一光信号和所述第二光信号合成，得到所述光信号。
  6. 如权利要求5所述的装置，其特征在于，所述第一调制电路中的偏置点设置为0，所述第二调制电路中的偏置点设置为0，所述合成电路中的偏置点设置为π/2。
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