WO2018003391A1 - Component-embedded substrate, method for manufacturing same, and high-frequency module - Google Patents

Component-embedded substrate, method for manufacturing same, and high-frequency module Download PDF

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Publication number
WO2018003391A1
WO2018003391A1 PCT/JP2017/020382 JP2017020382W WO2018003391A1 WO 2018003391 A1 WO2018003391 A1 WO 2018003391A1 JP 2017020382 W JP2017020382 W JP 2017020382W WO 2018003391 A1 WO2018003391 A1 WO 2018003391A1
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WIPO (PCT)
Prior art keywords
substrate
component
resist
electrode
resin substrate
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PCT/JP2017/020382
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French (fr)
Japanese (ja)
Inventor
博史 杣田
Original Assignee
株式会社村田製作所
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2018003391A1 publication Critical patent/WO2018003391A1/en
Priority to US16/212,750 priority Critical patent/US10707172B2/en

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    • H—ELECTRICITY
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    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs

Definitions

  • the present invention relates to a component-embedded substrate, a manufacturing method thereof, and a high-frequency module.
  • Patent Document 1 discloses a component-embedded substrate that enables three-dimensional mounting of electronic components.
  • a through-via electrode that penetrates the component-embedded substrate is often formed.
  • the through via electrode is used to connect an electronic component mounted on the component built-in substrate to a wiring on the printed circuit board via the component built-in substrate.
  • the through via electrode is generally formed by forming a through hole in a resin substrate constituting the component built-in substrate and filling the through hole with an electrode material.
  • the resin used for forming the resin substrate contains a filler made of a hard material such as silicon oxide in order to make the linear expansion coefficient of the resin substrate uniform.
  • the surface roughness on the side surface (the surface in contact with the resin substrate) of the through via electrode is large.
  • a laser is often used to form a through-hole in a resin substrate, but it is difficult to partially scrape off the filler with a laser.
  • the filler exposed to the inner surface of the through hole when the through hole is formed is left as it is in a state of protruding from the inner surface, or is detached from the inner surface to form a depression (filler mark). Therefore, unevenness due to the filler is formed on the inner surface of the through hole. Therefore, unevenness is formed on the side surface of the through via electrode formed by filling the through hole with the electrode material in the same manner as the inner surface of the through hole.
  • an object of the present invention is to provide a component-embedded substrate having a small surface roughness on the side surface of the through via electrode, a manufacturing method thereof, and a high-frequency module.
  • the method for manufacturing a component-embedded substrate includes a resist formation step, a patterning step, a first electrode formation step, a resist removal step, a component placement step, a substrate formation step, and a peeling step.
  • a resist for patterning is formed on the support.
  • a through-hole penetrating the resist is formed by patterning the resist.
  • the through via electrode is formed by filling the through hole with an electrode material.
  • the resist is removed in the resist removal process, and the electronic component is placed in the part placement process.
  • the substrate forming step the electronic component is resin-sealed to form a resin substrate.
  • the peeling step the support is peeled from the resin substrate.
  • a 1st electrode formation process is implemented before a board
  • the resist for patterning formed by the photolithography technique does not include a filler that is generally included in a sealing resin, and is designed so that a smooth surface can be obtained in the formed resist. For this reason, the inner surface of the through-hole formed in the resist is not formed with irregularities due to the filler, and the inner surface becomes smooth. Therefore, the side surface of the through via electrode formed by filling the through hole with the electrode material is smooth with few irregularities like the inner surface of the through hole.
  • the resist forming step preferably includes a step of supporting the base conductor on the support and a step of forming a resist for patterning on the base conductor.
  • the patterning step the surface of the base conductor is exposed by forming a through hole.
  • an electronic component is placed on the base conductor.
  • the substrate forming step a resin substrate is formed on the base conductor.
  • the peeling step when the support is peeled from the resin substrate, the base conductor is left on the resin substrate. And in such a method, it is preferable to further perform the conductor removal process which removes a base conductor from a resin substrate after a peeling process.
  • the through via electrode in the first electrode formation step, can be formed by electrolytic plating such as filling plating using the base conductor as an electrode for plating. Further, by leaving the base conductor on the resin substrate in the peeling step, static electricity that can be generated at the time of peeling can be released to the outside through the base conductor. Therefore, electrostatic breakdown of the electronic component in the peeling process can be prevented.
  • the base conductor can be removed without generating static electricity. Therefore, electrostatic breakdown of the electronic component in the conductor removing process can be prevented.
  • the electronic component is sealed with a resin containing a filler in the substrate forming step.
  • the linear expansion coefficient of the resin substrate can be made uniform, and as a result, the reliability of the manufactured component-embedded substrate can be improved.
  • a second electrode is formed on the main surface on the support side of the resin substrate, after the peeling step, to connect the wiring component electrode and the through-via electrode to each other. It is preferable to further perform an electrode formation process.
  • the component-embedded substrate manufactured by this method when another electronic component is mounted on the component-embedded substrate, the other electronic component is connected to the electronic component embedded in the component-embedded substrate. Is possible.
  • the component-embedded substrate according to the present invention includes a resin substrate, an electronic component embedded in the resin substrate, a through via conductor, and a wiring electrode.
  • the resin substrate is a substrate formed of a resin containing a filler, and the through via electrode penetrates the resin substrate.
  • the wiring electrode is an electrode formed on at least one main surface of the resin substrate, and connects the terminal of the electronic component and the through via electrode to each other.
  • the parameter representing the surface roughness of the side surface in contact with the resin substrate in the through via electrode is smaller than the parameter representing the size of the filler.
  • the side surface of the through via electrode is smooth with few irregularities.
  • a high-frequency module according to the present invention includes the above-described component-embedded substrate and another electronic component.
  • the other electronic component is mounted on one main surface of a resin substrate included in the component-embedded substrate, and is connected to the through via electrode on the one main surface.
  • the surface roughness on the side surface of the through via electrode is reduced.
  • FIG. 1 is a sectional view conceptually showing a component built-in substrate according to an embodiment of the present invention. It is sectional drawing which showed notionally the high frequency module which concerns on embodiment of this invention.
  • FIGS. 4A to 4C are diagrams sequentially illustrating steps performed when manufacturing a component-embedded substrate.
  • FIGS. 4A to 4C are diagrams sequentially illustrating steps performed when manufacturing a component-embedded substrate, following FIG.
  • FIG. 5A to FIG. 5C are diagrams sequentially illustrating steps performed when manufacturing the component-embedded substrate, following FIG. 4C. It is the cross-sectional image which showed a part of side surface of the penetration via electrode in the component built-in board
  • FIG. 1 is a sectional view conceptually showing a component-embedded substrate 101 according to an embodiment of the present invention.
  • the component-embedded substrate 101 includes a resin substrate 1, an electronic component 2, through via electrodes 3A and 3B, and wiring electrodes 4A and 4B.
  • the resin substrate 1 is a substrate formed of a resin containing a filler made of a hard material such as silicon oxide, and has a first main surface 1a and a second main surface 1b located on opposite sides.
  • the electronic component 2 is a high-frequency device, for example, and is built in the resin substrate 1.
  • the electronic component 2 has two terminals 21 ⁇ / b> A and 21 ⁇ / b> B, and these terminals 21 ⁇ / b> A and 21 ⁇ / b> B are exposed on the second main surface 1 b of the resin substrate 1.
  • the number of terminals of the electronic component 2 exposed on the second main surface 1b is not limited to two, and may be one, or may be three or more.
  • the through via electrodes 3A and 3B penetrate the resin substrate 1 from the first main surface 1a to the second main surface 1b at positions on both sides of the electronic component 2, respectively.
  • the positions and number of through via electrodes formed on the resin substrate 1 are the number of terminals of the electronic component 2 exposed on the second main surface 1b and other electrons mounted on the first main surface 1a.
  • the number may be appropriately changed according to the number of terminals of the component 102 (see FIG. 2).
  • the number of through-via electrodes is not limited to two, but may be one or a plurality of three or more.
  • the parameter P1 representing the surface roughness on the side surfaces 3Aa and 3Ba constitutes the resin substrate 1. It is smaller than the parameter P2 representing the size of the filler contained in the resin.
  • the parameter P1 is a value measured using a length measuring function of a microscope, and is 1 ⁇ m to 3 ⁇ m.
  • the parameter P2 is a value measured by the same method, and is 2 ⁇ m to 20 ⁇ m.
  • the wiring electrodes 4A and 4B are planar electrodes formed in regions separated from each other on the second main surface 1b.
  • the wiring electrode 4A connects the terminal 21A of the electronic component 2 and the through via electrode 3A to each other at the second main surface 1b
  • the wiring electrode 4B includes the terminal 21B of the electronic component 2 and the through via electrode. 3B are connected to each other by the second main surface 1b.
  • the position and number of wiring electrodes formed on the second main surface 1b are the positions and number of terminals of the electronic component 2 exposed on the second main surface 1b, and further, the through vias formed on the resin substrate 1. It may be appropriately changed according to the position and number of electrodes. Further, the number of wiring electrodes is not limited to two, but may be one or may be three or more. Further, the wiring electrode is not limited to connecting the terminal of the electronic component 2 and the through via electrode, but may be connected to only the terminal or the through via electrode.
  • FIG. 2 is a sectional view conceptually showing the high frequency module according to the embodiment of the present invention.
  • a high frequency module can be configured by mounting another electronic component 102 on the component-embedded substrate 101 described above.
  • the electronic component 102 is mounted on the first main surface 1a of the resin substrate 1 and connected to the through via electrodes 3A and 3B by solder or the like on the first main surface 1a.
  • FIGS. 3A to 3C, FIGS. 4A to 4C, and FIGS. 5A to 5C are diagrams showing these steps in order.
  • the resist formation process includes two processes.
  • a support 51 having a flat surface 51a and a metal film 52 are prepared.
  • the metal film 52 is attached to the flat surface 51 a of the support 51, thereby supporting the metal film 52 on the support 51.
  • a substrate having an appropriate rigidity such as a printed circuit board or a silicon substrate
  • a metal film 52 for example, copper foil is used.
  • a sticking material 511 that can be peeled off from the support 51 or the metal film 52 such as a double-sided tape is used for sticking the metal film 52.
  • the flat surface 51a of the support 51 is not limited to the metal film 52 such as copper foil, and various conductive thin films (including sheets and plates) may be attached.
  • Various thin films including the metal film 52 correspond to the base conductor in the claims.
  • a patterning resist 53 is formed on the surface 52a of the metal film 52 (a flat surface opposite to the support 51). At this time, the resist 53 is formed with a predetermined thickness T corresponding to the length of the through via electrodes 3A and 3B to be formed in the component-embedded substrate 101.
  • a solder resist is used as the resist 53 for patterning.
  • the patterning step as shown in FIG. 3C, by patterning the resist 53, through holes 54A and 54B penetrating the resist 53 are formed. Thereby, the surface 52a of the metal film 52 is exposed.
  • a photolithography technique is used for patterning.
  • These through holes 54A and 54B correspond to the through via electrodes 3A and 3B to be formed, respectively.
  • high accuracy is not required for the absolute position in the resist 53. That is, when the through holes 54A and 54B are formed, even if the actual formation positions of the through holes 54A and 54B are deviated from the target position, it is permissible as long as it is deviated from the target position by the same distance in the same direction. This is because, unlike the conventional manufacturing method, the electronic component 2 (described later) is arranged (positioned) after the through via electrodes 3A and 3B are formed.
  • the resist 53 for patterning formed by the photolithography technique does not include a filler that is generally included in a sealing resin, and is designed so that a smooth surface can be obtained in the formed resist 53. Therefore, the inner surfaces of the through holes 54A and 54B formed in the resist 53 are not formed with irregularities due to the filler, and the inner surfaces are smooth.
  • the through holes 54A and 54B for the through via electrodes 3A and 3B are formed using the resist 53. This is important in reducing the surface roughness of the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B.
  • the through-hole electrodes 3A and 3B are formed by filling the through-holes 54A and 54B with an electrode material.
  • electrolytic plating such as filling plating is used to fill the through holes 54A and 54B with the electrode material.
  • the metal film 52 is used as an electrode for plating.
  • the electrode material a material having high conductivity such as copper (Cu), nickel (Ni), tin (Sn), gold (Au), or the like is used.
  • the electrodes formed by plating grow along the patterned resist in this way, the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B are less uneven as the inner surfaces of the through holes 54A and 54B. It will be smooth. As a result, in the manufactured component-embedded substrate 101, the surface roughness on the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B is reduced. In this way, following the patterning step of forming the through holes 54A and 54B in the resist 53, the first electrode forming step of filling the through holes 54A and 54B with the electrode material is further performed, whereby the surfaces on the side surfaces 3Aa and 3Ba Roughness can be remarkably improved.
  • a resist removing step is performed as shown in FIG.
  • the resist 53 is removed from the surface 52a of the metal film 52.
  • the metal film 52 is in a state where the surface 52a is exposed and the through via electrodes 3A and 3B are erected on the surface 52a.
  • a component placement step is performed as shown in FIG.
  • the electronic component 2 is placed on the surface 52a of the metal film 52 using a fixing material or the like.
  • the electronic component 2 is disposed at a predetermined position set in advance in relation to the positions of the through via electrodes 3A and 3B.
  • the electronic component 2 is positioned at a predetermined position after the electronic component is built in the resin substrate by a conventional manufacturing method and the formation position of the through hole in the resin substrate is determined in relation to the position of the electronic component. Compared to the case, it can be performed easily and accurately.
  • a substrate formation process is performed as shown in FIG.
  • the electronic component 2 is resin-sealed on the surface 52a of the metal film 52.
  • the resin substrate 1 is formed on the surface 52 a of the metal film 52.
  • the resin substrate 1 incorporates the electronic component 2, and the through via electrodes 3 ⁇ / b> A and 3 ⁇ / b> B are formed on the surface of the resin substrate 1 (surface opposite to the metal film 52. Surface that becomes the first main surface 1 a). It is formed so that the end face is exposed.
  • the resin substrate 1 is formed using a resin containing a filler. Thereby, the linear expansion coefficient of the resin substrate 1 can be made uniform, and as a result, the reliability of the component-embedded substrate 101 to be manufactured can be improved. In the case where sufficient reliability can be obtained without a filler, a resin that does not contain a filler may be used for forming the resin substrate 1.
  • the support 51 is peeled from the resin substrate 1 while leaving the metal film 52 on the resin substrate 1. That is, the support 51 and the metal film 52 are separated at the location of the adhesive material 511 such as a double-sided tape.
  • the adhesive material 511 such as a double-sided tape.
  • a conductor removing process is performed as shown in FIG.
  • the metal film 52 is chemically removed from the resin substrate 1.
  • wet etching is used to remove the metal film 52.
  • a second electrode forming step is performed (see FIG. 1).
  • the electrode 4A and the wiring electrode 4B that connects the terminal 21B of the electronic component 2 and the through via electrode 3B to each other are formed.
  • the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B are smooth with few irregularities. That is, in any of the through via electrodes 3A and 3B, the parameter P1 representing the surface roughness on the side surfaces 3Aa and 3Ba is smaller than the parameter P2 representing the size of the filler contained in the resin constituting the resin substrate 1. Become.
  • FIG. 6 is a cross-sectional image showing a part of the side surface of the through via electrode in the component built-in substrate 101 actually manufactured. From this cross-sectional image, it can be seen that the size of the unevenness on the side surface is sufficiently smaller than the diameter of the filler. Therefore, according to the manufacturing method, it can be seen that the side surface of the through via electrode becomes smooth.
  • the surface roughness on the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B is reduced.
  • the current flows through the surface layer portion including the side surface 3Aa of the through via electrode 3A.
  • the surface roughness on the side surface 3Aa is small as in the present embodiment, the current flow is not inhibited in the through via electrode 3A, and as a result, the resistance value in the through via electrode 3A remains low.
  • the through via electrode 3B Therefore, when the component-embedded substrate 101 is applied to a high frequency module, excellent frequency characteristics can be obtained in the high frequency module.
  • the resist 53 is formed directly on the support 51 or indirectly through the adhesive 511. May be formed.
  • a method that does not require the metal film 52 such as electroless plating is used for filling the through holes 54A and 54B with the electrode material.
  • the support 51 is peeled from the resin substrate 1 in an environment where static electricity is unlikely to occur.

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Abstract

This method for manufacturing a component-embedded substrate comprises: a resist formation step; a patterning step; a first electrode formation step; a resist removal step; a component arrangement step; a substrate formation step; and a separation step. In the resist formation step, a resist (53) for patterning is formed on a support (51). In the patterning step, patterning is applied to the resist (53) to form a through-hole that runs through the resist. In the first electrode formation step, a through-via electrode is formed by filling the through-hole with an electrode material. The resist (53) is removed in the resist removal step, and an electronic component is arranged in the component arrangement step. In the substrate formation step, a resin substrate is formed by sealing the electronic component with resin. In the separation step, the support (51) is separated from the resin substrate. In this manufacturing method, the first electrode formation step is performed before the substrate formation step.

Description

部品内蔵基板及びその製造方法、並びに高周波モジュールComponent-embedded substrate, manufacturing method thereof, and high-frequency module
　本発明は、部品内蔵基板及びその製造方法、並びに高周波モジュールに関する。 The present invention relates to a component-embedded substrate, a manufacturing method thereof, and a high-frequency module.
　プリント基板には、電子部品が平面的に搭載されることが多い。近年、電子機器の小型化及び高機能化に伴い、プリント基板に対して電子部品を高密度で搭載することが必要になっている。そこで、その様な電子部品の高密度化を実現するべく、電子部品を立体的に搭載する技術が提案されている。例えば、特許文献１には、電子部品の立体的な搭載を可能にする部品内蔵基板が開示されている。 In many cases, electronic components are mounted on a printed circuit board in a planar manner. In recent years, with the miniaturization and high functionality of electronic devices, it is necessary to mount electronic components on a printed circuit board at high density. Therefore, in order to realize such a high-density electronic component, a technology for mounting electronic components in three dimensions has been proposed. For example, Patent Document 1 discloses a component-embedded substrate that enables three-dimensional mounting of electronic components.
　そして、特許文献１に開示されている様に、部品内蔵基板には、これを貫通する貫通ビア電極が形成されることが多い。この貫通ビア電極は、部品内蔵基板上に搭載された電子部品を、当該部品内蔵基板を介してプリント基板上の配線に接続するために用いられる。そして、貫通ビア電極は、一般的に、部品内蔵基板を構成する樹脂基板に貫通孔を形成し、その貫通孔を電極材料で埋めることにより形成される。又、樹脂基板の形成に用いられる樹脂には、樹脂基板の線膨張率を均一にするために、酸化ケイ素等の硬質な材料から成るフィラーが含まれている。 And, as disclosed in Patent Document 1, a through-via electrode that penetrates the component-embedded substrate is often formed. The through via electrode is used to connect an electronic component mounted on the component built-in substrate to a wiring on the printed circuit board via the component built-in substrate. The through via electrode is generally formed by forming a through hole in a resin substrate constituting the component built-in substrate and filling the through hole with an electrode material. The resin used for forming the resin substrate contains a filler made of a hard material such as silicon oxide in order to make the linear expansion coefficient of the resin substrate uniform.
特開２００１－２４４６３８号公報JP 2001-244638 A
　しかしながら、部品内蔵基板において貫通ビア電極を形成する従来の方法では、貫通ビア電極の側面（樹脂基板と接する面）における表面粗さが大きくなっていた。理由は、次の通りである。樹脂基板への貫通孔の形成にはレーザが用いられることが多いが、レーザでは、フィラーを部分的に削り取ることが困難である。このため、貫通孔を形成した際に貫通孔の内面に露出したフィラーは、内面から突出した状態でそのまま残置するか、又は、内面から脱離して窪み（フィラー痕）を形成する。従って、貫通孔の内面には、フィラーに起因した凹凸が形成されることになる。よって、貫通孔を電極材料で埋めて形成される貫通ビア電極の側面には、貫通孔の内面と同様に凹凸が形成されることになる。 However, in the conventional method of forming the through via electrode in the component built-in substrate, the surface roughness on the side surface (the surface in contact with the resin substrate) of the through via electrode is large. The reason is as follows. A laser is often used to form a through-hole in a resin substrate, but it is difficult to partially scrape off the filler with a laser. For this reason, the filler exposed to the inner surface of the through hole when the through hole is formed is left as it is in a state of protruding from the inner surface, or is detached from the inner surface to form a depression (filler mark). Therefore, unevenness due to the filler is formed on the inner surface of the through hole. Therefore, unevenness is formed on the side surface of the through via electrode formed by filling the through hole with the electrode material in the same manner as the inner surface of the through hole.
　貫通ビア電極に高周波領域の電流が流れた場合、その電流は、貫通ビア電極の側面を含む表層部を流れることになる。このため、貫通ビア電極の側面における表面粗さが大きいと、貫通ビア電極における電流の流れが阻害され、その結果として貫通ビア電極での抵抗値が増大してしまう。従って、部品内蔵基板が高周波モジュールに適用された場合、貫通ビア電極の側面において表面粗さが大きいことは、高周波特性を低下させる原因となる。 When a current in a high frequency region flows through the through via electrode, the current flows through the surface layer including the side surface of the through via electrode. For this reason, if the surface roughness on the side surface of the through via electrode is large, the current flow in the through via electrode is hindered, and as a result, the resistance value at the through via electrode increases. Therefore, when the component-embedded substrate is applied to a high-frequency module, a large surface roughness on the side surface of the through via electrode causes a decrease in high-frequency characteristics.
　そこで本発明の目的は、貫通ビア電極の側面における表面粗さが小さい部品内蔵基板及びその製造方法、並びに高周波モジュールを提供することである。 Therefore, an object of the present invention is to provide a component-embedded substrate having a small surface roughness on the side surface of the through via electrode, a manufacturing method thereof, and a high-frequency module.
　本発明に係る部品内蔵基板の製造方法は、レジスト形成工程と、パターニング工程と、第１の電極形成工程と、レジスト除去工程と、部品配置工程と、基板形成工程と、剥離工程と、を有する。レジスト形成工程では、支持体にパターニング用のレジストを形成する。パターニング工程では、レジストにパターニングを施すことにより、レジストを貫通する貫通孔を形成する。第１の電極形成工程では、貫通孔を電極材料で埋めることにより、貫通ビア電極を形成する。レジスト除去工程ではレジストを除去し、部品配置工程では電子部品を配置する。基板形成工程では、電子部品を樹脂封止して樹脂基板を形成する。剥離工程では、樹脂基板から支持体を剥離する。そして、この製造方法では、基板形成工程の前に第１の電極形成工程を実施する。 The method for manufacturing a component-embedded substrate according to the present invention includes a resist formation step, a patterning step, a first electrode formation step, a resist removal step, a component placement step, a substrate formation step, and a peeling step. . In the resist forming step, a resist for patterning is formed on the support. In the patterning step, a through-hole penetrating the resist is formed by patterning the resist. In the first electrode formation step, the through via electrode is formed by filling the through hole with an electrode material. The resist is removed in the resist removal process, and the electronic component is placed in the part placement process. In the substrate forming step, the electronic component is resin-sealed to form a resin substrate. In the peeling step, the support is peeled from the resin substrate. And in this manufacturing method, a 1st electrode formation process is implemented before a board | substrate formation process.
　フォトリソグラフィ技術によって形成されるパターニング用のレジストは、封止樹脂に一般的に含まれる様なフィラーを含まず、形成したレジストにおいて滑らかな表面が得られる様に設計されている。このため、レジストに形成された貫通孔の内面には、フィラーに起因した凹凸が形成されることがなく、それらの内面は滑らかになる。よって、貫通孔を電極材料で埋めることで形成される貫通ビア電極の側面は、貫通孔の内面と同様に凹凸が少ない滑らかなものとなる。 The resist for patterning formed by the photolithography technique does not include a filler that is generally included in a sealing resin, and is designed so that a smooth surface can be obtained in the formed resist. For this reason, the inner surface of the through-hole formed in the resist is not formed with irregularities due to the filler, and the inner surface becomes smooth. Therefore, the side surface of the through via electrode formed by filling the through hole with the electrode material is smooth with few irregularities like the inner surface of the through hole.
　本発明に係る部品内蔵基板の製造方法では、レジスト形成工程は、支持体にベース導体を支持させる工程と、ベース導体上にパターニング用のレジストを形成する工程と、を含んでいることが好ましい。この場合、パターニング工程では、貫通孔を形成することによりベース導体の表面を露出させる。部品配置工程では、ベース導体上に電子部品を配置する。基板形成工程では、ベース導体上に樹脂基板を形成する。剥離工程では、樹脂基板から支持体を剥離する際、樹脂基板にベース導体を残置させる。そして、この様な方法においては、剥離工程の後、樹脂基板からベース導体を除去する導体除去工程を更に実行することが好ましい。 In the method for manufacturing a component-embedded substrate according to the present invention, the resist forming step preferably includes a step of supporting the base conductor on the support and a step of forming a resist for patterning on the base conductor. In this case, in the patterning step, the surface of the base conductor is exposed by forming a through hole. In the component placement step, an electronic component is placed on the base conductor. In the substrate forming step, a resin substrate is formed on the base conductor. In the peeling step, when the support is peeled from the resin substrate, the base conductor is left on the resin substrate. And in such a method, it is preferable to further perform the conductor removal process which removes a base conductor from a resin substrate after a peeling process.
　この方法によれば、第１の電極形成工程において、ベース導体をメッキ用の電極として、フィリングメッキ等の電解メッキで貫通ビア電極を形成することができる。又、剥離工程において、樹脂基板にベース導体を残置させることにより、剥離時に生じ得る静電気を、ベース導体を通じて外部に逃がすことができる。よって、剥離工程での電子部品の静電破壊を防止することができる。 According to this method, in the first electrode formation step, the through via electrode can be formed by electrolytic plating such as filling plating using the base conductor as an electrode for plating. Further, by leaving the base conductor on the resin substrate in the peeling step, static electricity that can be generated at the time of peeling can be released to the outside through the base conductor. Therefore, electrostatic breakdown of the electronic component in the peeling process can be prevented.
　本発明に係る部品内蔵基板の製造方法では、導体除去工程において、樹脂基板からベース導体を化学的に除去することが好ましい。この方法によれば、静電気を発生させることなくベース導体を除去することが可能になる。よって、導体除去工程での電子部品の静電破壊を防止することができる。 In the method for manufacturing a component-embedded substrate according to the present invention, it is preferable to chemically remove the base conductor from the resin substrate in the conductor removing step. According to this method, the base conductor can be removed without generating static electricity. Therefore, electrostatic breakdown of the electronic component in the conductor removing process can be prevented.
　本発明に係る部品内蔵基板の製造方法では、基板形成工程において、フィラーを含んだ樹脂を用いて電子部品を樹脂封止することが好ましい。この方法によれば、樹脂基板の線膨張率を均一にすることができ、その結果として、製造される部品内蔵基板の信頼性を向上させることができる。 In the method for manufacturing a component-embedded substrate according to the present invention, it is preferable that the electronic component is sealed with a resin containing a filler in the substrate forming step. According to this method, the linear expansion coefficient of the resin substrate can be made uniform, and as a result, the reliability of the manufactured component-embedded substrate can be improved.
　本発明に係る部品内蔵基板の製造方法では、樹脂基板のうちの支持体側の主面に、剥離工程の後、電子部品の端子と貫通ビア電極とを互いに接続する配線電極を形成する第２の電極形成工程を更に実行することが好ましい。この方法で製造される部品内蔵基板によれば、その部品内蔵基板上に別の電子部品を搭載したときに、当該別の電子部品を、部品内蔵基板に内蔵されている電子部品と接続することが可能となる。 In the method of manufacturing a component-embedded substrate according to the present invention, a second electrode is formed on the main surface on the support side of the resin substrate, after the peeling step, to connect the wiring component electrode and the through-via electrode to each other. It is preferable to further perform an electrode formation process. According to the component-embedded substrate manufactured by this method, when another electronic component is mounted on the component-embedded substrate, the other electronic component is connected to the electronic component embedded in the component-embedded substrate. Is possible.
　本発明に係る部品内蔵基板は、樹脂基板と、樹脂基板に内蔵された電子部品と、貫通ビア導体と、配線電極とを備える。樹脂基板は、フィラーを含んだ樹脂で形成された基板であり、貫通ビア電極は、樹脂基板を貫通している。配線電極は、樹脂基板の少なくとも一方の主面に形成された電極であって、電子部品の端子と貫通ビア電極とを互いに接続している。そして、貫通ビア電極における樹脂基板と接する側面の表面粗さを表すパラメータが、フィラーのサイズを表すパラメータより小さい。 The component-embedded substrate according to the present invention includes a resin substrate, an electronic component embedded in the resin substrate, a through via conductor, and a wiring electrode. The resin substrate is a substrate formed of a resin containing a filler, and the through via electrode penetrates the resin substrate. The wiring electrode is an electrode formed on at least one main surface of the resin substrate, and connects the terminal of the electronic component and the through via electrode to each other. The parameter representing the surface roughness of the side surface in contact with the resin substrate in the through via electrode is smaller than the parameter representing the size of the filler.
　上記部品内蔵基板によれば、貫通ビア電極の側面は、凹凸が少ない滑らかなものとなる。 According to the component-embedded substrate, the side surface of the through via electrode is smooth with few irregularities.
　本発明に係る高周波モジュールは、上記部品内蔵基板と、別の電子部品とを備える。当該別の電子部品は、部品内蔵基板が備える樹脂基板の一方の主面上に搭載されると共に、当該一方の主面にて貫通ビア電極に接続されている。 A high-frequency module according to the present invention includes the above-described component-embedded substrate and another electronic component. The other electronic component is mounted on one main surface of a resin substrate included in the component-embedded substrate, and is connected to the through via electrode on the one main surface.
　上記高周波モジュールによれば、貫通ビア電極の側面における表面粗さが小さいため、優れた周波数特性が得られる。 According to the above high frequency module, since the surface roughness on the side surface of the through via electrode is small, excellent frequency characteristics can be obtained.
　本発明に係る部品内蔵基板及びその製造方法、並びに高周波モジュールによれば、貫通ビア電極の側面における表面粗さが小さくなる。 According to the component-embedded substrate, the manufacturing method thereof, and the high frequency module according to the present invention, the surface roughness on the side surface of the through via electrode is reduced.
本発明の実施形態に係る部品内蔵基板を概念的に示した断面図である。1 is a sectional view conceptually showing a component built-in substrate according to an embodiment of the present invention. 本発明の実施形態に係る高周波モジュールを概念的に示した断面図である。It is sectional drawing which showed notionally the high frequency module which concerns on embodiment of this invention. （Ａ）～（Ｃ）部品内蔵基板を製造する際に実行する工程を順に示した図である。(A) to (C) are diagrams sequentially showing steps to be performed when manufacturing a component-embedded substrate. （Ａ）～（Ｃ）部品内蔵基板を製造する際に実行する工程を、図３（Ｃ）に続けて順に示した図である。(A) to (C) FIGS. 4A to 4C are diagrams sequentially illustrating steps performed when manufacturing a component-embedded substrate, following FIG. （Ａ）～（Ｃ）部品内蔵基板を製造する際に実行する工程を、図４（Ｃ）に続けて順に示した図である。FIG. 5A to FIG. 5C are diagrams sequentially illustrating steps performed when manufacturing the component-embedded substrate, following FIG. 4C. 実際に製造された部品内蔵基板における貫通ビア電極の側面の一部を示した断面画像である。It is the cross-sectional image which showed a part of side surface of the penetration via electrode in the component built-in board | substrate actually manufactured.
　［１］部品内蔵基板の構成
　図１は、本発明の実施形態に係る部品内蔵基板１０１を概念的に示した断面図である。図１に示される様に、部品内蔵基板１０１は、樹脂基板１と、電子部品２と、貫通ビア電極３Ａ及び３Ｂと、配線電極４Ａ及び４Ｂと、を備える。 [1] Configuration of Component-embedded Substrate FIG. 1 is a sectional view conceptually showing a component-embedded substrate 101 according to an embodiment of the present invention. As shown in FIG. 1, the component-embedded substrate 101 includes a resin substrate 1, an electronic component 2, through via electrodes 3A and 3B, and wiring electrodes 4A and 4B.
　樹脂基板１は、酸化ケイ素等の硬質な材料から成るフィラーを含んだ樹脂で形成された基板であり、互いに反対側に位置する第１の主面１ａ及び第２の主面１ｂを有する。 The resin substrate 1 is a substrate formed of a resin containing a filler made of a hard material such as silicon oxide, and has a first main surface 1a and a second main surface 1b located on opposite sides.
　電子部品２は、例えば高周波デバイスであって樹脂基板１に内蔵されている。本実施形態では、電子部品２は、２つの端子２１Ａ及び２１Ｂを有し、それらの端子２１Ａ及び２１Ｂを樹脂基板１の第２の主面１ｂに露出させている。尚、第２の主面１ｂに露出する電子部品２の端子の数は、２つに限らず、１つであってもよいし、３つ以上の複数であってもよい。 The electronic component 2 is a high-frequency device, for example, and is built in the resin substrate 1. In this embodiment, the electronic component 2 has two terminals 21 </ b> A and 21 </ b> B, and these terminals 21 </ b> A and 21 </ b> B are exposed on the second main surface 1 b of the resin substrate 1. Note that the number of terminals of the electronic component 2 exposed on the second main surface 1b is not limited to two, and may be one, or may be three or more.
　貫通ビア電極３Ａ及び３Ｂはそれぞれ、電子部品２の両側の位置において、第１の主面１ａから第２の主面１ｂまで樹脂基板１を貫通している。尚、樹脂基板１に形成される貫通ビア電極の位置や本数は、第２の主面１ｂに露出する電子部品２の端子の数や、第１の主面１ａ上に搭載される別の電子部品１０２（図２参照）の端子の数などに応じて、適宜変更されてもよい。又、貫通ビア電極の本数に関しては、２本に限らず、１本であってもよいし、３本以上の複数本であってもよい。 The through via electrodes 3A and 3B penetrate the resin substrate 1 from the first main surface 1a to the second main surface 1b at positions on both sides of the electronic component 2, respectively. Note that the positions and number of through via electrodes formed on the resin substrate 1 are the number of terminals of the electronic component 2 exposed on the second main surface 1b and other electrons mounted on the first main surface 1a. The number may be appropriately changed according to the number of terminals of the component 102 (see FIG. 2). Further, the number of through-via electrodes is not limited to two, but may be one or a plurality of three or more.
　そして、本実施形態では、貫通ビア電極３Ａ及び３Ｂの何れにおいても、それらの側面３Ａａ及び３Ｂａ（樹脂基板１と接する面）における表面粗さを表すパラメータＰ１が、樹脂基板１を構成している樹脂に含まれるフィラーのサイズを表すパラメータＰ２より小さくなっている。一例として、パラメータＰ１は、マイクロスコープの測長機能を用いて計測したときの値であって、１μｍ～３μｍである。又、パラメータＰ２は、同様の方法で計測したときの値であって、２μｍ～２０μｍである。 In this embodiment, in any of the through via electrodes 3A and 3B, the parameter P1 representing the surface roughness on the side surfaces 3Aa and 3Ba (the surface in contact with the resin substrate 1) constitutes the resin substrate 1. It is smaller than the parameter P2 representing the size of the filler contained in the resin. As an example, the parameter P1 is a value measured using a length measuring function of a microscope, and is 1 μm to 3 μm. The parameter P2 is a value measured by the same method, and is 2 μm to 20 μm.
　配線電極４Ａ及び４Ｂは、第２の主面１ｂにおける互いに離間した領域に形成された平面電極である。本実施形態では、配線電極４Ａは、電子部品２の端子２１Ａと貫通ビア電極３Ａとを第２の主面１ｂにて互いに接続し、配線電極４Ｂは、電子部品２の端子２１Ｂと貫通ビア電極３Ｂとを第２の主面１ｂにて互いに接続している。 The wiring electrodes 4A and 4B are planar electrodes formed in regions separated from each other on the second main surface 1b. In the present embodiment, the wiring electrode 4A connects the terminal 21A of the electronic component 2 and the through via electrode 3A to each other at the second main surface 1b, and the wiring electrode 4B includes the terminal 21B of the electronic component 2 and the through via electrode. 3B are connected to each other by the second main surface 1b.
　尚、第２の主面１ｂに形成される配線電極の位置や数は、第２の主面１ｂに露出する電子部品２の端子の位置や数、更には樹脂基板１に形成される貫通ビア電極の位置や数などに応じて、適宜変更されてもよい。又、配線電極の数に関しては、２つに限らず、１つであってもよいし、３つ以上の複数であってもよい。更に、配線電極は、電子部品２の端子と貫通ビア電極とを接続するものに限らず、端子又は貫通ビア電極の何れかにのみ接続されたものであってもよい。 The position and number of wiring electrodes formed on the second main surface 1b are the positions and number of terminals of the electronic component 2 exposed on the second main surface 1b, and further, the through vias formed on the resin substrate 1. It may be appropriately changed according to the position and number of electrodes. Further, the number of wiring electrodes is not limited to two, but may be one or may be three or more. Further, the wiring electrode is not limited to connecting the terminal of the electronic component 2 and the through via electrode, but may be connected to only the terminal or the through via electrode.
　［２］高周波モジュールの構成
　図２は、本発明の実施形態に係る高周波モジュールを概念的に示した断面図である。図２に示される様に、上述した部品内蔵基板１０１上に別の電子部品１０２を搭載することにより、高周波モジュールを構成することができる。具体的には、電子部品１０２は、樹脂基板１の第１の主面１ａ上に搭載されると共に、当該第１の主面１ａにて半田等により貫通ビア電極３Ａ及び３Ｂに接続される。 [2] Configuration of High Frequency Module FIG. 2 is a sectional view conceptually showing the high frequency module according to the embodiment of the present invention. As shown in FIG. 2, a high frequency module can be configured by mounting another electronic component 102 on the component-embedded substrate 101 described above. Specifically, the electronic component 102 is mounted on the first main surface 1a of the resin substrate 1 and connected to the through via electrodes 3A and 3B by solder or the like on the first main surface 1a.
　［３］部品内蔵基板の製造方法
　［３－１］第１の実施形態
　上述した部品内蔵基板１０１を製造する際には、レジスト形成工程、パターニング工程、第１の電極形成工程、レジスト除去工程、部品配置工程、基板形成工程、剥離工程、導体除去工程、及び第２の電極形成工程が順に実行される。図３（Ａ）～（Ｃ）、図４（Ａ）～（Ｃ）、及び図５（Ａ）～（Ｃ）は、これらの工程を順に示した図である。 [3] Manufacturing Method of Component Embedded Substrate [3-1] First Embodiment When manufacturing the component embedded substrate 101 described above, a resist forming step, a patterning step, a first electrode forming step, a resist removing step, A component placement process, a board forming process, a peeling process, a conductor removing process, and a second electrode forming process are sequentially performed. FIGS. 3A to 3C, FIGS. 4A to 4C, and FIGS. 5A to 5C are diagrams showing these steps in order.
　レジスト形成工程には、２つの工程が含まれている。第１の工程では、平坦面５１ａを有する支持体５１と、金属膜５２とを用意する。そして、図３（Ａ）に示される様に、支持体５１の平坦面５１ａに金属膜５２を貼り付けることにより、支持体５１に金属膜５２を支持させる。 The resist formation process includes two processes. In the first step, a support 51 having a flat surface 51a and a metal film 52 are prepared. Then, as shown in FIG. 3A, the metal film 52 is attached to the flat surface 51 a of the support 51, thereby supporting the metal film 52 on the support 51.
　支持体５１には、例えばプリント基板やシリコン基板など、適度な剛性を持った基板が用いられる。金属膜５２には、例えば銅箔が用いられる。又、金属膜５２の貼付けには、両面テープ等、支持体５１や金属膜５２からの剥離が可能な貼付け材５１１が用いられる。 For the support 51, a substrate having an appropriate rigidity, such as a printed circuit board or a silicon substrate, is used. For the metal film 52, for example, copper foil is used. Further, a sticking material 511 that can be peeled off from the support 51 or the metal film 52 such as a double-sided tape is used for sticking the metal film 52.
　尚、支持体５１の平坦面５１ａには、銅箔等の金属膜５２に限らず、導電性を有する種々の薄膜（シートや板状のものを含む）が貼り付けられてもよい。金属膜５２を含む種々の薄膜は、特許請求の範囲においてベース導体に対応するものである。 The flat surface 51a of the support 51 is not limited to the metal film 52 such as copper foil, and various conductive thin films (including sheets and plates) may be attached. Various thin films including the metal film 52 correspond to the base conductor in the claims.
　第２の工程では、図３（Ｂ）に示される様に、金属膜５２の表面５２ａ（支持体５１と反対側の平坦面）上にパターニング用のレジスト５３を形成する。このとき、レジスト５３は、部品内蔵基板１０１において形成しようとする貫通ビア電極３Ａ及び３Ｂの長さに応じた所定の厚さＴで形成される。パターニング用のレジスト５３には、例えばソルダーレジストが用いられる。 In the second step, as shown in FIG. 3B, a patterning resist 53 is formed on the surface 52a of the metal film 52 (a flat surface opposite to the support 51). At this time, the resist 53 is formed with a predetermined thickness T corresponding to the length of the through via electrodes 3A and 3B to be formed in the component-embedded substrate 101. As the resist 53 for patterning, for example, a solder resist is used.
　パターニング工程では、図３（Ｃ）に示される様に、レジスト５３にパターニングを施すことにより、レジスト５３を貫通する貫通孔５４Ａ及び５４Ｂを形成する。これにより、金属膜５２の表面５２ａを露出させる。一例として、パターニングにはフォトリソグラフィ技術が用いられる。 In the patterning step, as shown in FIG. 3C, by patterning the resist 53, through holes 54A and 54B penetrating the resist 53 are formed. Thereby, the surface 52a of the metal film 52 is exposed. As an example, a photolithography technique is used for patterning.
　これらの貫通孔５４Ａ及び５４Ｂは、形成しようとする貫通ビア電極３Ａ及び３Ｂのそれぞれに対応するものである。貫通孔５４Ａ及び５４Ｂの形成位置に関して、互いの相対的な位置関係が高い精度で維持されていれば、レジスト５３における絶対的な位置については高い精度は要求されない。即ち、貫通孔５４Ａ及び５４Ｂを形成した際に、それぞれの実際の形成位置が目標位置からずれたとしても、目標位置から同じ方向へ同じ距離だけずれたものであれば許容される。なぜなら、従来の製造方法とは異なり、貫通ビア電極３Ａ及び３Ｂの形成後に、後述する電子部品２の配置（位置決め）が行われるからである。 These through holes 54A and 54B correspond to the through via electrodes 3A and 3B to be formed, respectively. As long as the relative positions of the through holes 54A and 54B are maintained with high accuracy, high accuracy is not required for the absolute position in the resist 53. That is, when the through holes 54A and 54B are formed, even if the actual formation positions of the through holes 54A and 54B are deviated from the target position, it is permissible as long as it is deviated from the target position by the same distance in the same direction. This is because, unlike the conventional manufacturing method, the electronic component 2 (described later) is arranged (positioned) after the through via electrodes 3A and 3B are formed.
　フォトリソグラフィ技術によって形成されるパターニング用のレジスト５３は、封止樹脂に一般的に含まれる様なフィラーを含まず、形成したレジスト５３において滑らかな表面が得られる様に設計されている。このため、レジスト５３に形成された貫通孔５４Ａ及び５４Ｂの内面には、フィラーに起因した凹凸が形成されることがなく、それらの内面は滑らかになる。この様に、フィラーを含む樹脂基板１を形成する前（即ち、後述する基板形成工程の前）に、レジスト５３を用いて貫通ビア電極３Ａ及び３Ｂ用の貫通孔５４Ａ及び５４Ｂを形成することが、貫通ビア電極３Ａ及び３Ｂのそれぞれの側面３Ａａ及び３Ｂａにおける表面粗さを小さくする上で重要である。 The resist 53 for patterning formed by the photolithography technique does not include a filler that is generally included in a sealing resin, and is designed so that a smooth surface can be obtained in the formed resist 53. Therefore, the inner surfaces of the through holes 54A and 54B formed in the resist 53 are not formed with irregularities due to the filler, and the inner surfaces are smooth. Thus, before forming the resin substrate 1 containing the filler (that is, before the substrate forming step described later), the through holes 54A and 54B for the through via electrodes 3A and 3B are formed using the resist 53. This is important in reducing the surface roughness of the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B.
　第１の電極形成工程では、図４（Ａ）に示される様に、貫通孔５４Ａ及び５４Ｂを電極材料で埋めることにより、貫通ビア電極３Ａ及び３Ｂを形成する。一例として、貫通孔５４Ａ及び５４Ｂへの電極材料の充填には、フィリングメッキ等の電解メッキが用いられる。このとき、金属膜５２が、メッキ用の電極として用いられる。又、電極材料には、銅（Ｃｕ）、ニッケル（Ｎｉ）、スズ（Ｓｎ）、金（Ａｕ）等、導電率の高い材料が用いられる。 In the first electrode formation step, as shown in FIG. 4A, the through- hole electrodes 3A and 3B are formed by filling the through- holes 54A and 54B with an electrode material. As an example, electrolytic plating such as filling plating is used to fill the through holes 54A and 54B with the electrode material. At this time, the metal film 52 is used as an electrode for plating. As the electrode material, a material having high conductivity such as copper (Cu), nickel (Ni), tin (Sn), gold (Au), or the like is used.
　この様にメッキで形成される電極は、パターニングされたレジストに沿って成長するため、貫通ビア電極３Ａ及び３Ｂのそれぞれの側面３Ａａ及び３Ｂａは、貫通孔５４Ａ及び５４Ｂの内面と同様に凹凸が少ない滑らかなものとなる。その結果、製造される部品内蔵基板１０１において、貫通ビア電極３Ａ及び３Ｂのそれぞれの側面３Ａａ及び３Ｂａにおける表面粗さが小さくなる。この様に、レジスト５３に貫通孔５４Ａ及び５４Ｂを形成するパターニング工程に続けて、更に貫通孔５４Ａ及び５４Ｂを電極材料で埋める第１の電極形成工程を実施することにより、側面３Ａａ及び３Ｂａにおける表面粗さを顕著に改善することができる。 Since the electrodes formed by plating grow along the patterned resist in this way, the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B are less uneven as the inner surfaces of the through holes 54A and 54B. It will be smooth. As a result, in the manufactured component-embedded substrate 101, the surface roughness on the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B is reduced. In this way, following the patterning step of forming the through holes 54A and 54B in the resist 53, the first electrode forming step of filling the through holes 54A and 54B with the electrode material is further performed, whereby the surfaces on the side surfaces 3Aa and 3Ba Roughness can be remarkably improved.
　第１の電極形成工程の後、図４（Ｂ）に示される様に、レジスト除去工程を行う。この工程では、金属膜５２の表面５２ａ上からレジスト５３を除去する。これにより、金属膜５２は、表面５２ａが露出すると共に、その表面５２ａに貫通ビア電極３Ａ及び３Ｂが立設された状態となる。 After the first electrode forming step, a resist removing step is performed as shown in FIG. In this step, the resist 53 is removed from the surface 52a of the metal film 52. Thereby, the metal film 52 is in a state where the surface 52a is exposed and the through via electrodes 3A and 3B are erected on the surface 52a.
　レジスト除去工程の後、図４（Ｃ）に示される様に、部品配置工程を行う。この工程では、金属膜５２の表面５２ａ上に、固定材等を用いて電子部品２を配置する。このとき、電子部品２は、貫通ビア電極３Ａ及び３Ｂのそれぞれの位置との関係で予め設定された所定の位置に配置される。このときの所定の位置への電子部品２の位置決めは、従来の製造方法にて電子部品を樹脂基板に内蔵した後に当該電子部品の位置との関係で樹脂基板への貫通孔の形成位置を決める場合に比べて、容易に且つ精度良く行うことができる。 After the resist removal step, a component placement step is performed as shown in FIG. In this step, the electronic component 2 is placed on the surface 52a of the metal film 52 using a fixing material or the like. At this time, the electronic component 2 is disposed at a predetermined position set in advance in relation to the positions of the through via electrodes 3A and 3B. At this time, the electronic component 2 is positioned at a predetermined position after the electronic component is built in the resin substrate by a conventional manufacturing method and the formation position of the through hole in the resin substrate is determined in relation to the position of the electronic component. Compared to the case, it can be performed easily and accurately.
　部品配置工程の後、図５（Ａ）に示される様に、基板形成工程を行う。この工程では、金属膜５２の表面５２ａ上にて電子部品２を樹脂封止する。これにより、金属膜５２の表面５２ａ上に樹脂基板１を形成する。このとき、樹脂基板１は、電子部品２を内蔵すると共に、樹脂基板１の表面（金属膜５２とは反対側の面。第１の主面１ａとなる面）に貫通ビア電極３Ａ及び３Ｂの端面が露出する様に形成される。 After the component placement process, a substrate formation process is performed as shown in FIG. In this step, the electronic component 2 is resin-sealed on the surface 52a of the metal film 52. Thereby, the resin substrate 1 is formed on the surface 52 a of the metal film 52. At this time, the resin substrate 1 incorporates the electronic component 2, and the through via electrodes 3 </ b> A and 3 </ b> B are formed on the surface of the resin substrate 1 (surface opposite to the metal film 52. Surface that becomes the first main surface 1 a). It is formed so that the end face is exposed.
　樹脂基板１の形成には、フィラーを含んだ樹脂が用いられる。これにより、樹脂基板１の線膨張率を均一にすることができ、その結果として、製造される部品内蔵基板１０１の信頼性を向上させることができる。尚、フィラーがなくても十分な信頼性が得られる場合には、樹脂基板１の形成に、フィラーを含まない樹脂が用いられてもよい。 The resin substrate 1 is formed using a resin containing a filler. Thereby, the linear expansion coefficient of the resin substrate 1 can be made uniform, and as a result, the reliability of the component-embedded substrate 101 to be manufactured can be improved. In the case where sufficient reliability can be obtained without a filler, a resin that does not contain a filler may be used for forming the resin substrate 1.
　剥離工程では、図５（Ｂ）に示される様に、樹脂基板１に金属膜５２を残置させつつ、樹脂基板１から支持体５１を剥離する。即ち、両面テープ等の貼付け材５１１の箇所で、支持体５１と金属膜５２とを分離させる。この様に樹脂基板１に金属膜５２を残置させることにより、剥離時に生じ得る静電気を、金属膜５２を通じて外部に逃がすことができる。よって、剥離工程での電子部品２の静電破壊を防止することができる。 In the peeling process, as shown in FIG. 5B, the support 51 is peeled from the resin substrate 1 while leaving the metal film 52 on the resin substrate 1. That is, the support 51 and the metal film 52 are separated at the location of the adhesive material 511 such as a double-sided tape. In this way, by leaving the metal film 52 on the resin substrate 1, static electricity that may be generated at the time of peeling can be released to the outside through the metal film 52. Therefore, electrostatic breakdown of the electronic component 2 in the peeling process can be prevented.
　剥離工程の後、図５（Ｃ）に示される様に、導体除去工程を行う。この工程では、樹脂基板１から金属膜５２を化学的に除去する。一例として、金属膜５２の除去には、ウェットエッチングが用いられる。この様に化学的な除去処理を行うことにより、静電気を発生させることなく金属膜５２を除去することが可能になる。よって、導体除去工程での電子部品２の静電破壊を防止することができる。 After the peeling process, a conductor removing process is performed as shown in FIG. In this step, the metal film 52 is chemically removed from the resin substrate 1. As an example, wet etching is used to remove the metal film 52. By performing the chemical removal process in this way, the metal film 52 can be removed without generating static electricity. Therefore, electrostatic breakdown of the electronic component 2 in the conductor removing step can be prevented.
　導体除去工程の後、第２の電極形成工程を行う（図１参照）。この工程では、樹脂基板１の第２の主面１ｂ（剥離工程の前において支持体５１側に位置していた面）に、電子部品２の端子２１Ａと貫通ビア電極３Ａとを互いに接続する配線電極４Ａと、電子部品２の端子２１Ｂと貫通ビア電極３Ｂとを互いに接続する配線電極４Ｂとを形成する。 After the conductor removing step, a second electrode forming step is performed (see FIG. 1). In this step, wiring for connecting the terminal 21A of the electronic component 2 and the through via electrode 3A to the second main surface 1b of the resin substrate 1 (the surface located on the support 51 side before the peeling step). The electrode 4A and the wiring electrode 4B that connects the terminal 21B of the electronic component 2 and the through via electrode 3B to each other are formed.
　第１の実施形態に係る部品内蔵基板１０１の製造方法によれば、基板形成工程の前に第１の電極形成工程が実施されるため、樹脂基板１の形成に用いられる樹脂の種類やフィラーの有無に関係なく、貫通ビア電極３Ａ及び３Ｂのそれぞれの側面３Ａａ及び３Ｂａは、凹凸が少ない平滑なものとなる。即ち、貫通ビア電極３Ａ及び３Ｂの何れにおいても、それらの側面３Ａａ及び３Ｂａにおける表面粗さを表すパラメータＰ１が、樹脂基板１を構成している樹脂に含まれるフィラーのサイズを表すパラメータＰ２より小さくなる。 According to the manufacturing method of the component-embedded substrate 101 according to the first embodiment, since the first electrode forming step is performed before the substrate forming step, the type of resin used for forming the resin substrate 1 and the filler Regardless of the presence or absence, the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B are smooth with few irregularities. That is, in any of the through via electrodes 3A and 3B, the parameter P1 representing the surface roughness on the side surfaces 3Aa and 3Ba is smaller than the parameter P2 representing the size of the filler contained in the resin constituting the resin substrate 1. Become.
　図６は、実際に製造された部品内蔵基板１０１における貫通ビア電極の側面の一部を示した断面画像である。この断面画像から、側面の凹凸の大きさがフィラーの径より十分に小さいことが分かる。よって、上記製造方法によれば、貫通ビア電極の側面が平滑になることが分かる。 FIG. 6 is a cross-sectional image showing a part of the side surface of the through via electrode in the component built-in substrate 101 actually manufactured. From this cross-sectional image, it can be seen that the size of the unevenness on the side surface is sufficiently smaller than the diameter of the filler. Therefore, according to the manufacturing method, it can be seen that the side surface of the through via electrode becomes smooth.
　従って、製造される部品内蔵基板１０１において、貫通ビア電極３Ａ及び３Ｂのそれぞれの側面３Ａａ及び３Ｂａにおける表面粗さが小さくなる。ここで、貫通ビア電極３Ａに高周波領域の電流が流れた場合、その電流は、貫通ビア電極３Ａの側面３Ａａを含む表層部を流れることになる。本実施形態の様に側面３Ａａにおける表面粗さが小さいと、貫通ビア電極３Ａにおいて電流の流れが阻害されることがなく、その結果として貫通ビア電極３Ａでの抵抗値は低いままである。貫通ビア電極３Ｂについても同様である。よって、部品内蔵基板１０１が高周波モジュールに適用された場合、その高周波モジュールにおいて優れた周波数特性が得られる。 Therefore, in the component-embedded substrate 101 to be manufactured, the surface roughness on the side surfaces 3Aa and 3Ba of the through via electrodes 3A and 3B is reduced. Here, when a current in a high frequency region flows through the through via electrode 3A, the current flows through the surface layer portion including the side surface 3Aa of the through via electrode 3A. When the surface roughness on the side surface 3Aa is small as in the present embodiment, the current flow is not inhibited in the through via electrode 3A, and as a result, the resistance value in the through via electrode 3A remains low. The same applies to the through via electrode 3B. Therefore, when the component-embedded substrate 101 is applied to a high frequency module, excellent frequency characteristics can be obtained in the high frequency module.
　［３－２］第２の実施形態
　第２の実施形態として、上述した製造方法において、金属膜５２を用いずに、支持体５１上に直接的又は貼付け材５１１を介して間接的にレジスト５３を形成してもよい。この場合、第１の電極形成工程では、貫通孔５４Ａ及び５４Ｂへの電極材料の充填に、無電解メッキ等、金属膜５２を必要としない方法が用いられる。又、剥離工程では、静電気が発生し難い環境下で、樹脂基板１から支持体５１が剥離される。 [3-2] Second Embodiment As a second embodiment, in the manufacturing method described above, without using the metal film 52, the resist 53 is formed directly on the support 51 or indirectly through the adhesive 511. May be formed. In this case, in the first electrode formation step, a method that does not require the metal film 52 such as electroless plating is used for filling the through holes 54A and 54B with the electrode material. In the peeling process, the support 51 is peeled from the resin substrate 1 in an environment where static electricity is unlikely to occur.
　上述の実施形態の説明は、すべての点で例示であって、制限的なものではないと考えられるべきである。本発明の範囲は、上述の実施形態ではなく、特許請求の範囲によって示される。更に、本発明の範囲には、特許請求の範囲と均等の意味及び範囲内での全ての変更が含まれることが意図される。 The description of the above-described embodiment is an example in all respects, and should be considered as not restrictive. The scope of the present invention is shown not by the above embodiments but by the claims. Further, the scope of the present invention is intended to include all modifications within the meaning and scope equivalent to the scope of the claims.
１　樹脂基板
１ａ　第１の主面
１ｂ　第２の主面
２　電子部品
３Ａ、３Ｂ　貫通ビア電極
３Ａａ、３Ｂａ　側面
４Ａ、４Ｂ　配線電極
２１Ａ、２１Ｂ　端子
５１　支持体
５１ａ　平坦面
５２　金属膜
５２ａ　表面
５３　レジスト
５４Ａ、５４Ｂ　貫通孔
１０１　部品内蔵基板
１０２　電子部品
５１１　貼付け材
Ｐ１、Ｐ２　パラメータ
Ｔ　所定の厚さ DESCRIPTION OF SYMBOLS 1 Resin board | substrate 1a 1st main surface 1b 2nd main surface 2 Electronic component 3A, 3B Through-via electrode 3Aa, 3Ba Side surface 4A, 4B Wiring electrode 21A, 21B Terminal 51 Support body 51a Flat surface 52 Metal film 52a Surface 53 Resist 54A, 54B Through-hole 101 Component-embedded substrate 102 Electronic component 511 Pasting material P1, P2 Parameter T Predetermined thickness

Claims (7)

  1. 　支持体にパターニング用のレジストを形成するレジスト形成工程と、
    　前記レジストにパターニングを施すことにより、レジストを貫通する貫通孔を形成するパターニング工程と、
    　前記貫通孔を電極材料で埋めることにより、貫通ビア電極を形成する第１の電極形成工程と、
    　前記レジストを除去するレジスト除去工程と、
    　電子部品を配置する部品配置工程と、
    　前記電子部品を樹脂封止して樹脂基板を形成する基板形成工程と、
    　前記樹脂基板から前記支持体を剥離する剥離工程と、
    を備え、
    　前記基板形成工程の前に前記第１の電極形成工程を実施する、部品内蔵基板の製造方法。     A resist forming step of forming a resist for patterning on the support;
    Patterning the resist to form a through hole penetrating the resist; and
    A first electrode forming step of forming a through via electrode by filling the through hole with an electrode material;
    A resist removing step for removing the resist;
    A component placement process for placing electronic components;
    A substrate forming step of resin-sealing the electronic component to form a resin substrate;
    A peeling step of peeling the support from the resin substrate;
    With
    A method for manufacturing a component-embedded substrate, wherein the first electrode forming step is performed before the substrate forming step.
  2. 　前記レジスト形成工程は、
    　前記支持体にベース導体を支持させる工程と、
    　前記ベース導体上に前記レジストを形成する工程と、
    を含み、
    　前記パターニング工程では、前記貫通孔を形成することにより前記ベース導体の表面を露出させ、
    　前記部品配置工程では、前記ベース導体上に前記電子部品を配置し、
    　前記基板形成工程では、前記ベース導体上に前記樹脂基板を形成し、
    　前記剥離工程では、前記樹脂基板から前記支持体を剥離する際、前記樹脂基板に前記ベース導体を残置させ、
    　前記剥離工程の後、前記樹脂基板から前記ベース導体を除去する導体除去工程を更に有する、請求項１に記載の部品内蔵基板の製造方法。     The resist forming step includes
    Supporting the base conductor on the support,
    Forming the resist on the base conductor;
    Including
    In the patterning step, the surface of the base conductor is exposed by forming the through hole,
    In the component placement step, the electronic component is placed on the base conductor,
    In the substrate forming step, the resin substrate is formed on the base conductor,
    In the peeling step, when peeling the support from the resin substrate, the base conductor is left on the resin substrate,
    The method for manufacturing a component built-in substrate according to claim 1, further comprising a conductor removing step of removing the base conductor from the resin substrate after the peeling step.
  3. 　前記導体除去工程では、前記樹脂基板から前記ベース導体を化学的に除去する、請求項２に記載の部品内蔵基板の製造方法。 The method for manufacturing a component-embedded substrate according to claim 2, wherein, in the conductor removing step, the base conductor is chemically removed from the resin substrate.
  4. 　前記基板形成工程では、フィラーを含んだ樹脂を用いて前記電子部品を樹脂封止する、請求項１～３の何れか１つに記載の部品内蔵基板の製造方法。 The method for manufacturing a component-embedded substrate according to any one of claims 1 to 3, wherein, in the substrate forming step, the electronic component is resin-sealed using a resin containing a filler.
  5. 　前記樹脂基板のうちの前記支持体側の主面に、前記剥離工程の後、前記電子部品の端子と前記貫通ビア電極とを互いに接続する配線電極を形成する第２の電極形成工程
    を更に有する、請求項１～４の何れか１つに記載の部品内蔵基板の製造方法。     A second electrode forming step of forming a wiring electrode that connects the terminal of the electronic component and the through via electrode to the main surface of the resin substrate on the support side after the peeling step; The method for manufacturing a component-embedded substrate according to any one of claims 1 to 4.
  6. 　フィラーを含んだ樹脂で形成された樹脂基板と、
    　前記樹脂基板に内蔵された電子部品と、
    　前記樹脂基板を貫通する貫通ビア電極と、
    　前記樹脂基板の少なくとも一方の主面に形成された配線電極であって、前記電子部品の端子と前記貫通ビア電極とを互いに接続する配線電極と、
    を備え、
    　前記貫通ビア電極における前記樹脂基板と接する側面の表面粗さを表すパラメータが、前記フィラーのサイズを表すパラメータより小さい、部品内蔵基板。     A resin substrate formed of a resin containing a filler;
    An electronic component built in the resin substrate;
    A through via electrode penetrating the resin substrate;
    A wiring electrode formed on at least one main surface of the resin substrate, the wiring electrode connecting the terminal of the electronic component and the through via electrode to each other;
    With
    A component-embedded substrate, wherein a parameter representing a surface roughness of a side surface in contact with the resin substrate in the through via electrode is smaller than a parameter representing a size of the filler.
  7. 　請求項６に記載の部品内蔵基板と、
    　前記部品内蔵基板が備える前記樹脂基板の前記一方の主面上に搭載されると共に、当該一方の主面にて前記貫通ビア電極に接続された別の電子部品と、
    を備える、高周波モジュール。     The component-embedded substrate according to claim 6,
    Another electronic component mounted on the one main surface of the resin substrate included in the component-embedded substrate and connected to the through via electrode on the one main surface;
    A high frequency module comprising:
PCT/JP2017/020382 2016-06-29 2017-06-01 Component-embedded substrate, method for manufacturing same, and high-frequency module WO2018003391A1 (en)

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