JP2015070105A - Method for manufacturing wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a wiring board having fine high-density wiring lines excellent in electric insulating property.SOLUTION: The method for manufacturing a wiring board includes the steps of: laminating an ultrathin copper foil 6 having a maximum height Rz of 1.5 to 2 μm on an exposed major surface thereof on a surface of an insulating layer 1; depositing a plating resist layer R on the exposed major surface of the ultrathin copper foil 6 so as to expose the ultrathin copper foil 6 along a pattern shape corresponding to a wiring conductor 2; depositing an electrolytic copper plating layer 9 for forming the wiring conductor 2 on the ultrathin copper foil 6 exposed from the plating resist layer R; peeling and removing the plating resist layer R from above the major surface of the ultrathin copper foil 6; and finally removing the ultrathin copper foil 6 in a part covered with the plating resist layer R by etching, so as to form the wiring conductor 2 comprising the remaining ultrathin copper foil 6 and the electrolytic copper plating layer 9 on the copper foil 6.

Description

  The present invention relates to a method of manufacturing a wiring board used for mounting a semiconductor element.

  Conventionally, as a wiring board for mounting a semiconductor element such as a semiconductor integrated circuit element, a wiring board provided with a wiring conductor made of copper formed by a semi-additive method using an ultrathin copper foil as a base metal on the surface of an insulating layer It has been known.

  Such a wiring board is manufactured as follows, for example. First, as shown in FIG. 4A, a copper foil 12 with a carrier is laminated on the surface of the insulating layer 11. The carrier-attached copper foil 12 includes a carrier copper foil 13 having a thickness of about 12 to 35 μm and an ultrathin copper foil 14 having a thickness of about 1 to 3 μm, and the ultrathin copper foil 14 is in close contact with the insulating layer 11. The surface of the ultrathin copper foil 14 that is in close contact with the insulating layer 11 is a roughened surface having a maximum height Rz of about 2 to 3 μm. The foil 14 adheres firmly to the insulating layer 11. The surface of the ultrathin copper foil 14 in close contact with the carrier copper foil 13 is a smooth surface having a maximum height Rz of about 0.5 to 1 μm. The carrier copper foil 13 and the ultrathin copper foil 14 are in close contact with each other so as to be peeled from each other.

  Next, as shown in FIG. 4B, the carrier copper foil 13 is peeled off from the ultrathin copper foil 14 and removed.

  Next, as shown in FIG. 4C, a plating resist layer R that exposes the ultrathin copper foil 14 in a shape corresponding to the wiring conductor is deposited on the surface of the ultrathin copper foil 14. The thickness of the plating resist layer R is 15 to 50 μm.

  Next, as shown in FIG. 5D, an electrolytic copper plating layer 15 is deposited on the surface of the ultrathin copper foil 14 exposed from the plating resist layer R. The thickness of the electrolytic copper plating layer 15 is about 10 to 30 μm.

  Next, as shown in FIG. 5 (e), the plating resist layer R is peeled off from the ultrathin copper foil 14.

  Next, as shown in FIG. 5 (f), the ultrathin copper foil 14 remaining on the surface of the insulating layer 11 and the portion of the ultrathin copper foil 14 covered with the plating resist layer R are removed by etching. A wiring conductor 16 composed of an electrolytic copper plating layer 15 is formed thereon.

  By the way, as semiconductor devices are increasingly integrated and miniaturized, wiring substrates on which semiconductor elements are mounted are also required to have finer and higher density wiring conductors. The following fine high density wiring has been required. By the way, in order to form a fine high-density wiring in which the line width and adjacent interval of the wiring conductor are 20 μm or less in this way, even in the plating resist layer deposited on the surface of the ultrathin copper foil, the width or interval is 20 μm or less. It is necessary to form a resist pattern. However, when a thin resist pattern having a width of 20 μm or less is formed on the surface of the ultrathin copper foil, the contact area between such a resist pattern and the ultrathin copper foil becomes extremely small. Peeling easily occurs between the plating resist layer. When peeling occurs between the ultrathin copper foil and the plating resist layer, when the electrolytic copper plating layer is deposited on the surface of the ultrathin copper foil exposed from the plating resist layer, the ultrathin copper foil and the plating resist layer The electrolytic copper plating solution penetrates into the separated gap, and the electrolytic copper plating layer is deposited on the ultrathin copper foil under the plating resist layer. In this way, when the electrolytic copper plating layer is deposited on the ultrathin copper foil under the plating resist layer, after peeling the plating resist layer, the portion of the ultrathin copper foil covered with the plating resist layer is removed. When etching away, the ultrathin copper foil in the portion where the electrolytic copper plating layer is deposited may remain between the wiring conductor patterns without being sufficiently etched away. If ultra-thin copper foil remains between the wiring conductor patterns in this way, the electrical insulation between the wiring conductor patterns decreases, or the wiring conductor patterns are electrically short-circuited. The problem occurs.

JP 2011-278774 A

  The subject of this invention is providing the manufacturing method of the wiring board of the fine high-density wiring which is excellent in electrical insulation with few electrical insulation fall and short circuit generation | occurrence | production in a wiring conductor.

  The method for manufacturing a wiring board according to the present invention includes a step of laminating an ultrathin copper foil having a maximum height Rz of 1.5 to 2 μm or more on the surface of the insulating layer, and exposing the ultrathin copper foil. A plating resist layer that exposes an ultrathin copper foil in a shape corresponding to the wiring conductor on the main surface, and electrolytic copper for forming the wiring conductor on the ultrathin copper foil exposed from the plating resist layer The step of depositing the plating layer, the step of peeling off the plating resist layer from the main surface of the ultrathin copper foil, and the portion of the ultrathin copper foil covered with the plating resist layer by etching and removing the remaining electrode Forming a wiring conductor comprising a thin copper foil and an electrolytic copper plating layer thereon.

  According to the method for manufacturing a wiring board of the present invention, since the maximum height Rz of the main surface of the ultrathin copper foil to which the plating resist layer is deposited is as large as 1.5 to 2 μm, the main surface of the ultrathin copper foil is obtained. When depositing the plating resist layer on the surface, the fine irregularities on the main surface of the ultrathin copper foil bite into the plating resist layer and both are locked well. As a result, the width of the resist pattern of the plating resist layer is 20 μm. Even if it is the following thin things, a resist pattern can be firmly stuck to the main surface of ultra-thin copper foil. Therefore, when the electrolytic copper plating layer is deposited on the surface of the ultrathin copper foil exposed from the plating resist layer, the electrolytic copper plating solution does not enter under the plating resist layer, and as a result, electrical insulation is achieved. It is possible to provide a wiring substrate of fine high-density wiring that is excellent in electrical insulation reliability without a drop or short circuit.

FIG. 1 is a schematic cross-sectional view showing an example of a wiring board manufactured according to the present invention. (A)-(e) is a schematic sectional drawing for every process for demonstrating an example of embodiment which manufactures the wiring board shown in FIG. 1 with the manufacturing method of this invention. (F)-(j) is a schematic sectional drawing for every process for demonstrating an example of embodiment which manufactures the wiring board shown in FIG. 1 with the manufacturing method of this invention. (A)-(c) is a schematic sectional drawing for every process for demonstrating the manufacturing method of the conventional wiring board. (D)-(f) is a schematic sectional drawing for every process for demonstrating the manufacturing method of the conventional wiring board.

  Next, an example of an embodiment of the method for manufacturing a wiring board according to the present invention will be described with reference to FIGS.

  FIG. 1 is a schematic cross-sectional view showing an example of a wiring board manufactured by the manufacturing method of this example, wherein 1 is an insulating layer, 2 is a wiring conductor, and 3 is a solder resist layer.

  The insulating layer 1 is made of, for example, an electrically insulating material having a thickness of about 30 to 200 μm obtained by impregnating a glass cloth base material with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. A plurality of through holes 4 having a diameter of about 50 to 300 μm are formed from the upper surface to the lower surface of the insulating layer 1.

  A wiring conductor 2 is attached to the inner surface and upper and lower surfaces of the through hole 4 in the insulating layer 1. The wiring conductor 2 has a semiconductor element connection pad 2a to which the electrode terminal T of the semiconductor element S is connected on the upper surface of the insulating layer 1, and is connected to the wiring conductor of the external electric circuit board on the lower surface of the insulating layer 1. External connection pad 2b. The wiring conductors 2 attached to the upper and lower surfaces of the insulating layer 1 are electrically connected to each other through the through hole 4.

  Further, a solder resist layer 3 is deposited on the inside and upper and lower surfaces of the through hole 4 in the insulating layer 1. The solder resist layer 3 is deposited so as to fill the through holes 4 and expose the semiconductor element connection pads 2a and the external connection pads 2b in the wiring conductors 2 on the upper and lower surfaces. This solder resist layer 3 is for protecting the wiring conductor 2.

  Next, a method for manufacturing the above-described wiring board by the manufacturing method of this example will be described with reference to FIGS.

  First, as shown in FIG. 2 (a), a prepreg 1P formed by impregnating a glass cloth with an uncured thermosetting resin and an ultrathin copper foil 6 can be peeled off on one main surface of a carrier copper foil 5. A laminated copper foil 7 with a carrier is prepared. The prepreg 1P is cured to become the insulating layer 1, and has a thickness of about 30 to 300 μm. The carrier copper foil 5 is a support for supporting the ultrathin copper foil 6 and has a thickness of about 12 to 35 μm. Moreover, the ultra-thin copper foil 6 becomes a base metal at the time of forming the wiring conductor 2, The thickness is about 1-3 micrometers. The ultrathin copper foil 6 has a maximum height Rz of the exposed main surface of 2 to 3 μm and a maximum height Rz of the main surface in contact with the carrier copper foil 5 of 1.5 to 2 μm. .

  Next, as shown in FIG. 2 (b), the copper foil with carrier 7 is stacked on the upper and lower surfaces of the prepreg 1P so that the carrier copper foil 5 is on the outer side, and these are pressed and heated from above and below to prepreg. The copper foil 7 with a carrier is laminated and integrated on the upper and lower surfaces of the insulating layer 1 formed by thermosetting 1P. At this time, since the main surface of the ultrathin copper foil 6 in contact with the insulating layer 1 is a rough surface having a maximum height Rz of 2 to 3 μm, fine unevenness of the rough surface bites into the insulating layer 1. The insulating layer 1 and the ultrathin copper foil 6 are firmly adhered.

  Next, as shown in FIG.2 (c), the through-hole 4 is drilled by the drilling process from the upper surface to the lower surface of the laminated body of the insulating layer 1 and the copper foil 7 with a carrier, for example. The diameter of the through hole 4 is about 30 to 300 μm. The through hole 4 may be drilled by laser processing.

  Next, as shown in FIG. 2D, an electroless copper plating layer 8 is deposited on the inner wall of the through hole 4 and the surface of the carrier copper foil 5. The thickness of the electroless copper plating layer 8 is about 0.5 to 3.0 μm. At this time, since the surface of the ultrathin copper foil 6 is covered with the carrier copper foil 5, the electroless copper plating layer 8 is deposited on the main surface of the ultrathin copper foil 6 on the side in close contact with the carrier copper foil 5. It will never be done. In addition, since the surface of the ultrathin copper foil 6 is protected by the carrier copper foil 5 until the electroless copper plating layer 8 is deposited, there is a risk that the ultrathin copper foil 6 may be damaged or foreign matter. Can be reduced.

  Next, as shown in FIG.2 (e), the carrier copper foil 5 is peeled off and removed from the laminated body of the insulating layer 1 and the copper foil 7 with a carrier. Thus, the insulating layer 1 is obtained in which the ultrathin copper foil 6 is laminated on the upper and lower surfaces and the electroless copper plating layer 8 is deposited in the through hole 4.

  Next, as shown in FIG. 3 (f), a plating resist layer R that exposes the ultrathin copper foil 6 in a shape corresponding to the wiring conductor 2 is coated on the exposed main surface of the ultrathin copper foil 6 on the upper and lower surfaces. It forms. The thickness of the plating resist layer R is about 15 to 50 μm. At this time, since the maximum height Rz of the main surface of the ultrathin copper foil 6 on the side on which the plating resist layer R is deposited is 1.5 to 2 μm, the micro unevenness of the main surface of the ultrathin copper foil 6 is The ultrathin copper foil 6 and the plating resist layer R are firmly adhered to the plating resist layer R. If the maximum height Rz of the main surface of the ultrathin copper foil 6 in contact with the plating resist layer R is less than 1.5 μm, the adhesion between the ultrathin copper foil 6 and the plating resist layer R becomes weak, There is an increased risk of peeling. In addition, when the maximum height Rz of the main surface of the ultrathin copper foil 6 in contact with the plating resist layer R exceeds 2 μm, it is difficult to peel off the carrier copper foil 5 well from the ultrathin copper foil 6. It becomes. Therefore, the maximum height Rz of the main surface of the ultrathin copper foil 6 on the side where the plating resist layer is deposited is preferably in the range of 1.5 to 2 μm.

  Next, as shown in FIG. 3G, an electrolytic copper plating layer 9 is deposited on the surface of the ultrathin copper foil 6 and the surface of the electroless copper plating layer 8 exposed from the plating resist layer R. The thickness of the electrolytic copper plating layer 9 is about 10 to 30 μm. At this time, since the ultrathin copper foil 6 and the plating resist layer R are firmly adhered as described above, the ultrathin copper foil 6 and the plating resist layer R even if the resist pattern is a thin resist pattern having a width of 20 μm or less. It is effectively prevented that peeling occurs between the two. As a result, the plating solution for electrolytic copper plating does not enter between the ultrathin copper foil 6 and the plating resist layer R, and the wiring conductor 2 is formed only on the surface of the ultrathin copper foil 6 exposed from the plating resist layer R. The electrolytic copper plating layer 9 having a shape corresponding to the above can be applied.

  Next, as shown in FIG. 3H, the plating resist layer R is peeled and removed. An alkaline resist stripping solution is used for stripping the plating resist layer R.

  Next, as shown in FIG. 3 (i), the portion of the ultrathin copper foil 6 covered with the plating resist layer R is removed by etching, so that the inside of the through hole 4 is electroless copper plating layer 8 and electrolytic copper. In addition to the plating layer 9, the upper and lower surfaces of the insulating layer 1 form the wiring conductor 2 including the ultrathin copper foil 6 and the electrolytic copper plating layer 9. At this time, since the electrolytic copper plating layer 9 is not deposited on the portion covered with the plating resist layer R, the ultrathin copper foil 6 in that portion can be removed well. Therefore, for example, even in the case of the wiring conductor 2 including a wiring pattern 2 having a narrow line width of 20 μm or less and a fine high-density wiring pattern having an interval, electrical insulation without etching residue of the ultrathin copper foil 6 between the wiring patterns. A wiring board having excellent properties can be provided.

  Finally, as shown in FIG. 3J, the solder resist layer 3 is formed inside the through hole 4 and on the upper and lower surfaces of the insulating layer 1, thereby completing the wiring board according to this example.

DESCRIPTION OF SYMBOLS 1 ... Insulating layer 2 ... Wiring conductor 5 ... Carrier copper foil 6 ... Ultra-thin copper foil 7 ... Copper foil with a carrier 9 ... Electrolytic copper plating layer

Claims (1)

  A step of laminating an ultrathin copper foil whose maximum height Rz of the exposed main surface is 1.5 to 2 μm on the surface of the insulating layer, and a shape corresponding to the wiring conductor on the main surface A step of depositing a plating resist layer to be exposed to, a step of depositing an electrolytic copper plating layer for forming a wiring conductor on the ultrathin copper foil exposed from the plating resist layer, and from the main surface The step of stripping and removing the plating resist layer, the portion of the ultrathin copper foil covered with the plating resist layer is removed by etching, and the remaining ultrathin copper foil and the electrolytic copper plating layer thereon are formed. And a step of forming a wiring conductor.

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