WO2017203583A1 - プログラマブルロジックコントローラ - Google Patents
プログラマブルロジックコントローラ Download PDFInfo
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- WO2017203583A1 WO2017203583A1 PCT/JP2016/065223 JP2016065223W WO2017203583A1 WO 2017203583 A1 WO2017203583 A1 WO 2017203583A1 JP 2016065223 W JP2016065223 W JP 2016065223W WO 2017203583 A1 WO2017203583 A1 WO 2017203583A1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
Definitions
- the present invention relates to a programmable logic controller that controls equipment in the FA (Factory Automation) field.
- FA equipment is generally realized by combining multiple control devices. Operations of a plurality of control devices constituting equipment in the FA field are controlled by a control system including a programmable logic controller (PLC).
- PLC programmable logic controller
- the programmable logic controller acquires data set in advance or all data related to the control device at a preset cycle at the timing when the command execution, the command from the peripheral device, or the set condition becomes true. Some have a function of storing according to time series.
- Programmable logic controller that has a function to acquire preset data or all data at a set cycle and store it according to time series, and display the acquired data in a graph to confirm changes in data time series Has the function of
- the programmable logic controller needs to acquire data at least every time the control program is repeatedly executed in order to acquire time-series changes of data without being insufficiently acquired.
- the programmable logic controller acquires all the data every time the control program is executed, the total capacity of the acquired data becomes enormous and the data cannot be stored over a long period of time. Such a problem occurs.
- the programmable logic controller acquires data set in advance in order to store long-term data, or when the interval for acquiring data is lengthened, insufficient data acquisition occurs, and There arises a problem that the change of the series cannot be confirmed.
- Patent Document 1 In order to reduce the total capacity of data acquired by the programmable logic controller, a technique for acquiring data when a value changes is disclosed (see Patent Document 1).
- Patent Document 1 can only confirm changes in the time series of acquired data, and in order to confirm the time series changes of all data, it is necessary to acquire all data.
- the processing of the programmable logic controller has been speeded up, the time taken to execute the control program has been shortened, and the number of executions of the control program within a certain period has increased. Since all the data is acquired, there arises a problem that the total capacity of the acquired data becomes enormous.
- the present invention has been made in view of the above, and an object thereof is to obtain a programmable logic controller capable of further reducing the capacity of data to be acquired.
- the present invention includes an acquisition data setting unit that sets at least one of a plurality of data of a control device as acquisition data, and a storage unit that stores the acquisition data.
- a programmable logic controller comprising a program storage unit for storing a control program for controlling the control device.
- the programmable logic controller includes an input data receiving unit that receives data and a control unit. When the data received by the input data receiving unit is acquired data, and the value of the data received by the input data receiving unit has changed from the value most recently stored in the storage unit, the control unit receives the input data receiving unit. Is received at least once in the storage unit as acquired data.
- the programmable logic controller according to the present invention has an effect that the data to be acquired can be further reduced in capacity.
- the figure which shows the structure of the control system with which the programmable logic controller which concerns on Embodiment 1 is provided.
- storage part in FIG.5 S1 The figure explaining the change history data memorize
- storage part in FIG.5 S8 The flowchart which shows the operation
- the figure which shows the intermediate acquisition data created in step S13 of FIG. The figure explaining the intermediate data reproduced according to the flowchart shown in FIG.
- movement which the acquisition data setting part of the programmable logic controller which concerns on Embodiment 3 sets acquisition data
- FIG. 1 is a diagram illustrating a configuration of a control system including the programmable logic controller according to the first embodiment.
- FIG. 2 is a diagram showing an example of a control program generated by the computer of the control system shown in FIG.
- the control system 1 constitutes equipment in the FA (Factory Automation) field, and is connected to a plurality of control devices 2X and 3Y installed in the facility and a plurality of control devices 2X and 3Y as shown in FIG.
- Programmable Logic Controllers hereinafter simply referred to as PLC
- PLC Programmable Logic Controllers
- Control devices 2X and 3Y are switches, adjustment valves, electromagnetic valves, motors, or pumps installed in the equipment, and are drive devices that perform operations.
- the control device 2X is a switch
- the control device 3Y is a drive device other than the switch.
- the control system 1 includes a plurality of control devices 2X and a plurality of control devices 3Y.
- the control devices 2X are denoted by reference numerals 2X0, 2X1, 2X2, 2X3,... 2XF (F is a natural number), and a plurality of control devices 3Y are connected to each other.
- control devices 2X are distinguished from each other by the reference numerals 3Y0, 3Y1, 3Y2, 3Y3,... 3YF. Further, in this specification, when the control devices 2X are not distinguished from each other, the control device 2X is denoted by reference numeral 2X, and when the control devices 3Y are not distinguished from each other, the control device 3Y is denoted by reference numeral 3Y.
- the computer 6 is communicably connected to the PLC 5 via the network N.
- the network N is a computer network that connects the computer 6 and the PLC 5 so that they can communicate with each other.
- the network N is a LAN (Local Area Network) installed in the FA facility.
- the computer 6 is connected to the control devices 2X0, 2X1, 2X2, 2X3... 2XF, 3Y0, 3Y1, 3Y2, 3Y3.
- the computer 6 generates the control program SP shown in FIG. 2 executed by the PLC 5 and transmits it to the PLC 5.
- the PLC 5 stores the control program SP received from the computer 6.
- the PLC 5 controls the control devices 3Y0, 3Y1, 3Y2, 3Y3,... 3YF by executing the control program SP. That is, the control program SP is a computer program for controlling the control devices 3Y0, 3Y1, 3Y2, 3Y3,... 3YF connected to the PLC 5.
- the computer 6 generates information indicating the number of times that the PLC 5 executes the control program SP, and transmits information indicating the number of times that the generated control program SP is executed to the PLC 5.
- the PLC 5 stores information indicating the number of times of executing the control program SP.
- control program SP is a ladder program described in a ladder (LD) language as shown in FIG.
- the ladder language is a language defined by IEC (International Electrotechnical Commission) 61131-3 and JIS (Japanese Industrial Standards) B 3503: 2012.
- the control program SP includes two parallel buses BL located at both left and right ends in FIG. 2 and a plurality of rungs L that connect the two buses BL to each other.
- Each rung L includes a condition part LA provided on the left side in FIG. 2 and an operation part LB provided on the right side in FIG.
- the condition unit LA is defined by data DX0, DX1, DX2, DX3,... DXF received by the PLC 5 from at least one of the control devices 2X0, 2X1, 2X2, 2X3,.
- the operation unit LB defines control signals DY0, DY1, DY2, DY3,... DYF that the PLC 5 transmits to at least one of the control devices 3Y0, 3Y1, 3Y2, 3Y3,.
- the data DX0, DX1, DX2, DX3... DXF received by the PLC 5 from the control devices 2X0, 2X1, 2X2, 2X3... 2XF is a signal indicating on / off of the switch, that is, “0”. This is a digital signal indicating “1”.
- the top rung L indicates that the control signal DY0 transmitted to the control device 3Y0 is equal to the data DX0 received from the control device 2X0.
- the center rung L indicates that the control signal DY1 transmitted to the control device 3Y1 is equal to the data DX2 received from the control device 2X2, and the control transmitted to the control device 3Y3. It shows that the signal DY3 is equal to the data DX2 received from the control device 2X2.
- the bottom rung L indicates that the control signal DY2 transmitted to the control device 3Y2 is the reverse of the data DX3 received from the control device 2X3.
- the rung L3 indicates that the control signal DY2 transmitted to the control device 3Y2 is “1” when the data DX3 received from the control device 2X3 is “0”, and the data DX3 received from the control device 2X3 is “ “1” indicates that the control signal DY2 transmitted to the control device 3Y2 is “0”.
- control signals DY0, DY1, DY2, DY3... DYF are defined by the data DX0, DX1, DX2, DX3... DXF by the control program SP
- the control signals DY0, DY1, DY2,. DY3... DYF is a signal indicating ON / OFF, that is, a digital signal indicating “0” or “1”.
- the control program SP is a ladder program, but may be an SFC program described by a sequential function chart (SFC).
- the SFC language is a language defined by IEC (International Electrotechnical Commission) 61131-3.
- data DX0, DX1, DX2, DX3... DXF are not distinguished from each other, they are referred to as “data DX” and the control signals DY0, DY1, DY2, DY3. If not, it is referred to as “control signal DY”.
- FIG. 3 is a diagram showing a hardware configuration of a computer connected to the programmable logic controller of the control system shown in FIG.
- the computer 6 executes a computer program, and as shown in FIG. 3, a CPU (Central Processing Unit) 61, a RAM (Random Access Memory) 62, and a ROM (Read Only Memory). ) 63, a storage device 64 that is an external information storage device, an input device 65, a display device 66, and a communication interface 67.
- the CPU 61, RAM 62, ROM 63, storage device 64, input device 65, display device 66, and communication interface 67 are connected to each other via the bus B6.
- the CPU 61 executes programs stored in the ROM 63 and the storage device 64 while using the RAM 62 as a work area.
- the program stored in the ROM 63 is BIOS (Basic Input / Output System) or UEFI (Unified Extensible Firmware Interface), but the program stored in the ROM 63 is not limited to BIOS or UEFI.
- the program stored in the storage device 64 is an operating system program and an engineering tool program.
- the program stored in the storage device 64 is not limited to the operating system program and the engineering tool program.
- the storage device 64 is an SSD (Solid State Drive) or an HDD (Hard Disk Drive), but the storage device 64 is not limited to an SSD or an HDD.
- the input device 65 receives an operation input from the user.
- the input device 65 is a keyboard or a mouse, but is not limited to a keyboard or a mouse.
- the display device 66 displays characters and images.
- the display device 66 is a liquid crystal display device, but is not limited to a liquid crystal display device.
- the communication interface 67 communicates with the PLC 5.
- PLC5 is a programmable controller defined in JIS (Japanese Industrial Standards) B 3502: 2011. After being activated, the PLC 5 repeatedly executes the control program SP every preset period. The PLC 5 executes the control program SP a preset number of times. The number of times the control program SP is repeatedly executed is received from the computer 6. Each time the PLC 5 executes the control program SP, it receives data DX0, DX1, DX2, DX3,... DXF from the control devices 2X0, 2X1, 2X2, 2X3,. Each time the PLC 5 executes the control program SP, the PLC 5 acquires control signals DY0, DY1, DY2, DY3,...
- the PLC 5 executes the plurality of rungs L of the control program SP in order from the top. In the first embodiment, when the PLC 5 executes the control program SP in order from the upper rung L (L1) and executes the last rung L, the PLC 5 returns to the first rung L (L1).
- the PLC 5 repeatedly executes the first rung L (L1) after executing the last rung L (L1) in order, and then returns to the first rung L (L1) to repeat the control devices 2X0, 2X1, and 2X2. , 2X3... 2XF, 3Y0, 3Y1, 3Y2, 3Y3.
- the execution of the last rung L by the PLC 5 executing the control program SP in order from the upper rung L (L1) is referred to as “one scan”.
- the PLC 5 executes the control program SP, that is, at the end of each scan, that is, at the end of each scan, the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- the timing of receiving the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3... DYF is after the execution of the control program SP, that is, every scan. Last but not limited.
- the PLC 5 stores one or more of data DX0, DX1, DX2, DX3... DXF and control signals DY0, DY1, DY2, DY3.
- the PLC 5 receives the data DX0, DX1, DX2, DX3... DXF of the control device 2X that is a switch, but in addition to the switch, the link special relay, timer, long timer, link special Data of at least one of a register, a refresh data register, a special relay, a special register, a function input, a function output, and a function device may be received.
- the PLC 5 includes an acquisition data setting unit 11 that sets the acquisition data AD, a storage unit 12 that stores the acquisition data AD, a program storage unit 13 that stores the control program SP, and an input data reception unit. 14, a control unit 15, an internal data reproduction unit 16, and an input / output unit 17.
- the acquired data AD is data set to be acquired and stored by the PLC 5 among the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3. .
- the acquisition data setting unit 11 sets at least one of the plurality of data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- the acquired data setting unit 11 refers to the control program SP stored in the program storage unit 13 and sets the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3. At least one of them is set in the acquired data AD.
- the acquired data setting unit 11 uses the control program SP among the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- the control signals DY0, DY1, DY2, DY3... DYF that can be generated are not set in the acquired data AD.
- the acquired data setting unit 11 cannot generate data using the control program SP among the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- DX0, DX1, DX2, DX3... DXF are set in the acquired data AD.
- the acquisition data setting unit 11 can generate the data using the control program SP among the data X0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3. Restricted data DX0, DX1, DX2, DX3... DXF are set in the acquired data AD.
- the program storage unit 13 stores information indicating the number of times the PLC 5 executes the control program SP in addition to the control program SP.
- the number of times the PLC 5 executes the control program SP is a plurality of times.
- the program storage unit 13 is connected to the control devices 2X0, 2X1, 2X2, 2X3... 2XF, 3Y0, 3Y1, 3Y2, 3Y3.
- the input / output unit 17 controls the control devices 2X0, 2X1, 2X2, 2X3... 2XF, 3Y0, 3Y1, 3Y2, 3Y3.
- the input / output unit 17 repeatedly executes the control program SP for each preset period, and generates control signals DY0, DY1, DY2, DY3,... DYF.
- the input / output unit 17 transmits the generated control signals DY0, DY1, DY2, DY3,... DYF to the control devices 3Y0, 3Y1, 3Y2, 3Y3,.
- the input data receiving unit 14 includes data DX0, DX1, DX2, DX3... DXF from all the control devices 2X0, 2X1, 2X2, 2X3. Control signals DY0, DY1, DY2, DY3,... DYF to be transmitted to 3Y3. Each time the input / output unit 17 executes the control program SP, the input data receiving unit 14 receives all the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3. Receive. In the first embodiment, since the input / output unit 17 repeatedly executes the control program SP, the input data receiving unit 14 includes all the data DX0, DX1, DX2, DX3...
- the input data receiving unit 14 includes all the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1 after the input / output unit 17 completes the execution of the control program SP. , DY2, DY3... DYF.
- the control unit 15 receives at least one time when the input data receiving unit 14 receives all the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3. , The data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3... DYF received by the input data receiving unit 14 are stored in the storage unit 12.
- the control unit 15 performs any one time when the input / output unit 17 repeatedly executes the control program SP a predetermined number of times, that is, the input data reception unit 14 performs all data DX0, DX1, DX2, DX3,...
- the control unit 15 performs the data DX0, DX1, DX2, DX3 after the execution of the first control program SP of the plurality of times in which the input / output unit 17 repeatedly executes the control program SP.
- ... DXF and control signals DY0, DY1, DY2, DY3... DYF are all stored in the storage unit 12.
- the control unit 15 receives the data DX0, of which the input data receiving unit 14 receives all the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3... DYF are all stored in the storage unit 12 at other times except for at least one time.
- the control unit 15 stores the acquired data AD in the storage unit 12 at least once. Further, the control unit 15 causes the storage unit 12 to store all the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- control unit 15 stores the acquired data AD in the storage unit 12. It is a time other than the time to be memorized.
- the control unit 15 stores the acquired data AD in the storage unit 12
- the data DX0, DX1, DX2, DX3... DXF received by the input data receiving unit 14 is the acquired data AD
- the input data receiving unit When the value of the data DX0, DX1, DX2, DX3... DXF received by 14 changes from the value most recently stored in the storage unit 12, the data DX0, DX1, DX2, received by the input data receiving unit 14 DX3... DXF is stored in the storage unit 12 as acquired data AD.
- the control unit 15 receives the received data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2 after the first execution of the control program SP of the input / output unit 17 is completed.
- DY3... DYF are all stored in the storage unit 12, so that the data DX0 from the value most recently stored in the storage unit 12 after the second and subsequent executions of the control program SP of the input / output unit 17 are completed.
- DX1, DX2, DX3,... DXF the data DX0, DX1, DX2, DX3,.
- the control unit 15 “scans” that the data DX0, DX1, DX2, DX3. It describes.
- the internal data reproduction unit 16 controls the data DX0, DX1, DX2, DX3... DXF of each scan based on the acquired data AD stored in the storage unit 12 and the control program SP stored in the program storage unit 13. All of the signals DY0, DY1, DY2, DY3... DYF are reproduced.
- the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3... DYF for each scan are all the control devices 2X0, 2X1, 2X2, 2X3,. .. Internal data indicating the state of 2XF, 3Y0, 3Y1, 3Y2, 3Y3... 3YF.
- FIG. 4 is a diagram showing a hardware configuration of the programmable logic controller of the control system shown in FIG.
- the PLC 5 includes a CPU unit 21 that is communicably connected to the computer 6 via the network N, an input unit 22 that is connected to the control device 2X, and an output unit 23 that is connected to the control device 3Y.
- the CPU unit 21 includes a communication interface 211 that is communicably connected to the computer 6, an MPU (Micro-Processing Unit) 212 that executes a computer program, and a memory 213 that stores a control program SP.
- the CPU unit 21 includes a communication circuit 214 connected to the network N via a communication interface 211 and a bus interface 215.
- the MPU 212, the memory 213, the communication circuit 214, and the bus interface 215 are connected via the internal bus B5.
- the memory 213 includes a storage area capable of storing the control program SP and data.
- the memory 213 is configured by a nonvolatile semiconductor memory or a volatile semiconductor memory.
- RAM random access memory
- ROM read only memory
- flash memory flash memory
- EPROM Erasable Programmable Read Only Memory
- EEPROM Electrically Erasable Programmable Read Only Memory
- the memory 213 may be configured by at least one of a magnetic disk, an optical disk, and a magneto-optical disk.
- the communication circuit 214 is realized by a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a combination of two or more thereof.
- the bus interface 215 is a bus bridge circuit that connects the internal bus B5 and the expansion bus B.
- each of the input unit 22 and the output unit 23 includes input / output interfaces 35I and 35O connected to the control devices 2X and 3Y, and converters 36I and 36O connected to the input / output interfaces 35I and 35O.
- the input unit 22 and the output unit 23 include MPUs 37I and 37O for storing computer programs, shared memories 31I and 31O, communication circuits 38I and 38O, and bus interfaces 39I and 39O connected to the expansion bus B, respectively.
- the MPUs 37I and 37O, the shared memories 31I and 31O, and the communication circuits 38I and 38O are connected via internal buses B3I and B3O.
- Converters 36I and 36O are also connected to MPUs 37I and 37O. Converters 36I and 36O are realized by digital I / O (Input / Output). The communication circuits 38I and 38O are connected to the bus interfaces 39I and 39O.
- the shared memories 31I and 31O have a storage area capable of storing data.
- the shared memories 31I and 31O are configured by a nonvolatile semiconductor memory or a volatile semiconductor memory.
- a nonvolatile semiconductor memory or a volatile semiconductor memory a RAM, a ROM, a flash memory, an EPROM, or an EEPROM can be used.
- the shared memories 31I and 31O may be configured by at least one of a magnetic disk, an optical disk, and a magneto-optical disk.
- the communication circuits 38I and 38O are realized by a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination of two or more thereof.
- the MPU 37I of the input unit 22 stores the data DX received from the control device 2X in the shared memory 31I, and transmits it to the CPU unit 21 via the internal bus B3I, the communication circuit 38I, the bus interface 39I, and the expansion bus B. .
- the MPU 37O of the output unit 23 receives the control signal DY from the CPU unit 21, stores the received control signal DY in the shared memory 31O, and transmits it to the control device 3Y via the converter 36O and the input / output interface 35O.
- the functions of the input unit 22 and the output unit 23 are realized by the MPUs 37I and 370 executing computer programs.
- the computer program is realized by software, firmware, or a combination of software and firmware.
- the functions of the acquisition data setting unit 11, the control unit 15, and the internal data reproduction unit 16 of the PLC 5 are realized when the MPU 212 executes a computer program stored in the memory 213.
- the function of the input / output unit 17 of the PLC 5 is realized by the MPU 212 executing the control program SP.
- the computer program is realized by software, firmware, or a combination of software and firmware.
- the functions of the program storage unit 13 and the storage unit 12 are realized by the memory 213.
- the function of the input data receiving unit 14 is realized by the bus interface 215.
- FIG. 5 is a flowchart showing an operation of acquiring acquisition data of the programmable logic controller of the control system shown in FIG.
- FIG. 6 is a diagram illustrating all acquired data stored in the storage unit in step S1 of FIG.
- FIG. 7 is a diagram illustrating the change history data stored in the storage unit in step S8 of FIG.
- the input / output unit 17 of the PLC 5 When acquiring the acquisition data AD, the input / output unit 17 of the PLC 5 reads the control program SP from the program storage unit 13 after the control system 1 is activated, and executes the control program SP once.
- the controller 15 of the PLC 5 receives the data DX0, DX1, received from the control devices 2X0, 2X1, 2X2, 2X3... 2XF after the input / output unit 17 executes the control program SP once, that is, after scanning once.
- the control unit 15 of the PLC 5 causes the storage unit 12 to store all acquired data AAD shown in FIG.
- the total acquired data AAD indicates the acquired data AD of “0th scan”.
- the all acquired data AAD indicates all of the “0th scan” data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- the control unit 15 of the PLC 5 determines whether or not there is any abnormality in the control system 1 (step S2). In the first embodiment, the control unit 15 of the PLC 5 determines that there is an abnormality in the control system 1 when at least one of the data DX0, DX1, DX2, DX3... DXF is different from the normal value. However, the basis for determining whether there is no abnormality is not limited to at least one of the data DX0, DX1, DX2, DX3.
- step S2 When the control unit 15 of the PLC 5 determines that there is an abnormality in the control system 1 (step S2: No), the data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, stored in the storage unit 12 are stored. DY2, DY3... DYF are all transmitted to the storage device 64, which is an external information storage device of the PLC 5 (step S3), the flowchart shown in FIG. 5 is ended, and the acquisition of the acquisition data AD is ended. .
- the storage device 64 of the computer 6 stores all of the received data DX0, DX1, DX2, DX3... DXF and the control signals DY0, DY1, DY2, DY3.
- the control unit 15 of the PLC 5 determines whether or not the control system 1 satisfies the set condition (step S4).
- the setting condition is a condition for the user to end the acquisition of data DX0, DX1, DX2, DX3.
- the setting conditions are generated by the user using the computer 6, transmitted to the PLC 5, and stored in the program storage unit 13 of the PLC 5.
- the setting condition is that among the control devices 2X0, 2X1, 2X2, 2X3... 2XF, 3Y0, 3Y1, 3Y2, 3Y3...
- step S4: Yes the flowchart shown in FIG. 5 is ended, and the acquisition of the acquisition data AD is ended.
- step S4: No the control unit 15 of the PLC 5 determines that the setting condition is not met (step S4: No)
- step S5 after the input / output unit 17 executes the next control program SP, the control unit 15 of the PLC 5 DX0, DX1, DX2, DX3... DXF are received, and control signals DY0, DY1, DY2, DY3... DYF are acquired (step S5).
- the control unit 15 of the PLC 5 is set to the acquired data AD among the received data DX0, DX1, DX2, DX3...
- step S6 the control unit 15 of the PLC 5 extracts data DX0, DX1, DX2, DX3,... DXF.
- the control unit 15 of the PLC 5 extracts data DX0, DX1, DX2, DX3,... DXF extracted as set in the acquired data AD, which has changed from the value at the previous scan (step S7). .
- the control part 15 of PLC5 memorize
- the control unit 15 of the PLC 5 stores the value of the data DX0, DX1, DX2, DX3... DXF extracted as set in the acquired data AD in step S8, which has changed from the value at the previous scan.
- the control unit 15 of the PLC 5 repeats steps S2 to S8 every time the control program SP is executed until the number of times the control program SP is repeated reaches the number of times that the control program SP stored in the program storage unit 13 is executed. And execute “Scan”.
- the control unit 15 of the PLC 5 stores the change history data CHD shown in FIG. 7 in the storage unit 12 in step S8 during each scan.
- the change history data CHD indicates the acquired data AD stored in the storage unit 12 and associates the data DX name whose value has changed, the changed value, and the changed scan. That is, in step S8, the control unit 15 stores the data DX name whose value has changed, the changed value, and the changed scan in the storage unit 12 in association with each other.
- the change history data CHD changes the value of the data DX0 of the control device 2X0 to “1” at the second scan, and changes the value of the data DX1 of the control device 2X1 to “1” at the third scan. It shows that.
- the change history data CHD changes the value of the data DX2 of the control device 2X2 to “0” at the third scan, changes the value of the data DX1 of the control device 2X1 to “0” at the fifth scan, and changes to the seventh scan. It shows that the value of the data DX0 of the control device 2X0 has changed to “0”.
- FIG. 8 is a flowchart showing an operation in which the programmable logic controller of the control system shown in FIG. 1 reproduces intermediate data.
- FIG. 9 is a diagram showing the midway acquisition data created in step S13 of FIG.
- FIG. 10 is a diagram for explaining intermediate data reproduced according to the flowchart shown in FIG.
- FIG. 11 is a flowchart showing an operation of reproducing internal data of the programmable logic controller of the control system shown in FIG.
- FIG. 12 is a diagram for explaining the internal data reproduced by the internal data reproduction unit of the programmable logic controller of the control system shown in FIG.
- the internal data IRD shown in FIG. 12 indicates data DX0, DX1, DX2, DX3... DXF and control signals DY0, DY1, DY2, DY3.
- the internal reproduction data IRD indicates the states of all control devices 2X0, 2X1, 2X2, 2X3... 2XF, 3Y0, 3Y1, 3Y2, 3Y3.
- Internal data IRD shown in FIG. 12 is generated by the internal data reproduction unit 16.
- the internal data reproduction unit 16 first executes the processing of the flowchart shown in FIG. 8 to reproduce the intermediate data WD indicating the data DX at the time of all the scans of the control device 2X which is the switch shown in FIG.
- the internal data reproducing unit 16 acquires all the acquired data AAD shown in FIG. Data AAD is held (step S10).
- the internal data reproduction unit 16 retains all acquired data AAD until the flowchart of FIG. 8 ends.
- the internal data reproduction unit 16 of the PLC 5 refers to the change history data CHD shown in FIG. 7 and determines whether there is data DX whose value has changed in the nth scan (step S12).
- step S12 determines that there is data DX whose value has changed at the nth scan (step S12: Yes)
- Step S13 The internal data reproduction unit 16 holds all the acquired data AAD-n halfway until the flowchart of FIG. 8 ends.
- the value of each data DX since the value of each data DX may change every time step S11 to step S15 are repeated, the value of each data DX is shown as a blank.
- the internal data reproduction unit 16 of the PLC 5 determines that there is no data DX whose value has changed at the nth scan (step S12: No), and after the change of the data DX at which all the acquired data AAD has changed at the nth scan After updating all the acquired data AAD-n on the way (step S13), the value of the data DX whose value has not changed at the nth scan of the all acquired data AAD-n is maintained (step S13). S14).
- the internal data reproduction unit 16 of the PLC 5 repeats the steps S11 to S16 until the update of the values of the data DX of all the scans is completed.
- step S13 the internal data reproduction unit 16 of the PLC 5 updates the halfway acquired data AAD-n generated when step S13 was executed last time with the changed value of the data DX changed at the nth scan, New halfway acquisition data AAD-n is generated and held. If the internal data reproduction unit 16 of the PLC 5 determines that the update of the data DX for all the scans has been completed (step S15: Yes), one total acquired data AAD and n intermediate total acquired data AAD-n Holding. On the way, all acquired data AAD-n indicates the value of the reproduced data DX of the “nth scan”.
- the internal data reproduction unit 16 of the PLC 5 reproduces the value of the “DX scan” data DX.
- the internal data reproduction unit 16 of the PLC 5 determines that the update of the data DX for all the scans has been completed (step S15: Yes)
- the internal data reproduction unit 16 converts the data into one total acquired data AAD and n intermediate total acquired data AAD-n. Based on this, the intermediate data WD indicating the data DX for all the scans of the control device 2X shown in FIG. 10 is generated, the generated intermediate data WD is held, and the flowchart shown in FIG. 8 is ended.
- the internal data reproduction unit 16 of the PLC 5 refers to the control program SP stored in the program storage unit 13 (step S21).
- the internal data reproduction unit 16 of the PLC 5 reproduces the internal data IRD at the time of all the scans of the control device 3Y based on the control program SP and the intermediate data WD shown in FIG. 10 (step S22).
- the internal data reproduction unit 16 of the PLC 5 combines the intermediate data WD and the reproduced values of the control signals DY for all the scans of the control device 3Y to generate the internal data IRD shown in FIG.
- the control unit 15 of the PLC 5 transmits the internal data IRD reproduced by the internal data reproduction unit 16 to the computer 6 (step S23).
- the control unit 15 of the PLC 5 deletes the internal data IRD reproduced by the internal data reproduction unit 16 (step S24).
- the computer 6 stores the received internal data IRD in the storage unit 12 and displays it on the display device 66.
- the internal data reproduction unit 16 of the PLC 5 ends the flowchart shown in FIG.
- the internal data reproduction unit 16 of the PLC 5 acquires all acquired data AAD in step S10, refers to the change history data CHD in step S12, and refers to the control program SP in step S21, and is stored in the storage unit 12.
- the internal data IRD is reproduced based on the acquired data AD and the control program SP stored in the program storage unit 13.
- the control unit 15 stores in the storage unit 12 the value of the data DX that is set to the acquisition data AD by the acquisition data setting unit 11 and has changed from the value most recently stored in the storage unit 12. Therefore, it is not necessary to always store the values of all data DX. As a result, the PLC 5 according to the first embodiment can reduce the total capacity of the data DX stored in the storage unit 12, and can further reduce the capacity of the acquired data DX.
- the control unit 15 stores the value of the data DX that has been set to the acquisition data AD by the acquisition data setting unit 11 and has changed from the value most recently stored in the storage unit 12. Therefore, if the value changes, the value of the data DX set in the acquired data AD can be acquired without causing insufficient acquisition. As a result, the PLC 5 according to the first embodiment can suppress insufficient acquisition of the data DX, and can confirm time-series changes of the accurate data DX and the control signal DY.
- the PLC 5 according to the first embodiment reproduces internal data IRD indicating the states of the control devices 2X and 3Y based on the data DX stored in the storage unit 12 and the control program SP stored in the program storage unit 13.
- An internal data reproduction unit 16 is provided.
- the PLC 5 according to the first embodiment reproduces the control signal DY, which is data, based on the entire acquisition data AAD, which is the acquisition data AD stored by the internal data reproduction unit 16, the change history data CHD, and the control program SP. For this reason, the PLC 5 according to the first embodiment can confirm time-series changes in the accurate data DX and the control signal DY without acquiring the control signal DY.
- the PLC 5 includes the internal data reproduction unit 16 that reproduces the internal data IRD, and the time series changes of the accurate data DX and the control signal DY can be obtained without acquiring the control signal DY. Therefore, it is possible to confirm time-series changes in the data DX and the control signal DY for a long period of time.
- the control unit 15 may cause the storage unit 12 to store all of the data DX and the control signal DY. Therefore, even if the data DX whose value has changed is acquired, All data DX can be calculated based on AAD. As a result, the PLC 5 according to the first embodiment can confirm time-series changes in the accurate data DX and the control signal DY even if the acquired data DX is suppressed.
- the acquisition data setting unit 11 refers to the control program SP and sets the data DX that cannot be generated using the control program SP in the acquisition data AD.
- the PLC 5 obtains the data DX that cannot be generated without obtaining the control signal DY or using the control program SP, so that the time series changes of the accurate data DX and the control signal DY are confirmed. can do.
- the PLC 5 transmits the data DX and the control signal DY stored in the storage unit 12 to the storage device 64 of the computer 6 when an abnormality occurs, so that the acquired data DX and the control signal DY are reliably transmitted. It can be stored in the storage device 64.
- the PLC 5 according to the first embodiment is a so-called programmable logic controller, and is installed in a place where the programmable logic controller is generally difficult to extract data. For this reason, since PLC5 which concerns on Embodiment 1 can suppress the capacity
- FIG. 13 is a flowchart showing an operation of reproducing internal data of the programmable logic controller according to the second embodiment.
- the same parts as those in the first embodiment are denoted by the same reference numerals and description thereof is omitted.
- the PLC 5 according to the second embodiment has the same configuration as the PLC 5 according to the first embodiment. Further, the PLC 5 according to the second embodiment performs the same operation as the PLC 5 according to the first embodiment except for the operation of reproducing the internal data IRD.
- the internal data reproduction unit 16 of the PLC 5 is similar to the first embodiment in that the internal data reproduction unit 16 of the PLC 5 is a control program SP stored in the program storage unit 13. (Step S21).
- the internal data reproduction unit 16 of the PLC 5 reproduces the internal data IRD at the time of all scans of the control device 3Y based on the control program SP and the intermediate data WD (step S22).
- the internal data reproduction unit 16 of the PLC 5 generates the internal data IRD by combining the intermediate data WD and the reproduced values of the control signals DY at the time of all the scans of the control device 3Y.
- the control unit 15 of the PLC 5 transmits the internal data IRD reproduced by the internal data reproduction unit 16 to the computer 6.
- the control unit 15 of the PLC 5 transmits the internal data IRD reproduced by the internal data reproduction unit 16 to the computer 6 (step S23), deletes the internal data IRD (step S24), and then transmits the internal data IRD to the control device 3Y.
- the indicated control signal DY is transmitted to operate the control device 3Y according to the control signal DY (step S25).
- the control unit 15 of the PLC 5 transmits the control signal DY of the internal data IRD to the control device 3Y in the scan order, but transmits the control signal DY at the time of scanning designated by the computer 6 to the control device 3Y. May be.
- the PLC 5 can cause the control device 3Y to perform an arbitrary operation designated by the user.
- the PLC 5 controls the value of the data DX that is set to the acquired data AD by the acquired data setting unit 11 and has changed from the value most recently stored in the storage unit 12. Since the unit 15 stores in the storage unit 12, the total capacity of the data DX stored in the storage unit 12 can be reduced, and the acquired data DX can be further reduced in capacity.
- the control device 3Y since the PLC 5 according to the second embodiment transmits the internal data IRD reproduced by the internal data reproduction unit 16 to the control device 3Y, the control device 3Y can be operated based on the internal data IRD.
- FIG. 14 is a flowchart illustrating an operation in which the acquisition data setting unit of the programmable logic controller according to the third embodiment sets acquisition data.
- the same parts as those in the first embodiment are denoted by the same reference numerals and description thereof is omitted.
- the PLC 5 according to the third embodiment performs the same operation as the PLC 5 according to the first embodiment, except that the acquisition data setting unit 11 sets the acquisition data AD.
- the acquisition data setting unit 11 of the PLC 5 determines whether or not the data DX is indicated in the condition part LA of the rung L in the n-th row (step S32).
- step S32 determines that the data DX is not indicated in the condition part LA of the rung L of the n-th row (step S32: No)
- step S34 determines that the data DX is indicated in the condition part LA of the rung L of the n-th row. If the acquired data setting unit 11 of the PLC 5 determines that the indicated data DX is already set to the acquired data AD (step S34: Yes), the process proceeds to step S33. When the acquired data setting unit 11 of the PLC 5 determines that the indicated data DX has not been set as the acquired data AD (step S34: No), the acquired data DX is set as the acquired data AD ( Step S35).
- the acquisition data setting unit 11 of the PLC 5 determines whether or not the rung L confirmed in step S31 is the rung L of the last row (step S36). When the acquisition data setting unit 11 of the PLC 5 determines that the rung L confirmed in step S31 is not the rung L of the last row (step S36: No), the process proceeds to step S33, and the rung L confirmed in step S31 is the last rung L If it is determined that the rung is L (step S36: Yes), the flowchart shown in FIG. 14 is terminated. The acquisition data setting unit 11 of the PLC 5 repeats step S31 to step S36 until the confirmation of all the rungs L is completed.
- the PLC 5 controls the value of the data DX that is set to the acquired data AD by the acquired data setting unit 11 and has changed from the value most recently stored in the storage unit 12. Since the unit 15 stores in the storage unit 12, the total capacity of the data DX stored in the storage unit 12 can be reduced, and the acquired data DX can be further reduced in capacity.
- the acquisition data setting unit 11 sets the data DX indicated in the condition part LA of the control program SP to the acquisition data AD, the data DX0, DX1, DX2, DX3,. -It is not necessary to set all of DXF as acquired data AD. For this reason, PLC5 which concerns on Embodiment 3 suppresses acquiring data DX which are not shown by the condition part LA of control program SP among data DX0, DX1, DX2, DX3 ... DXF. Can do.
- the PLC 5 according to the third embodiment can further suppress the total capacity of the data DX to be acquired, and even if the data DX to be acquired is suppressed, the lack of acquisition of the data DX can be suppressed, and the accurate data DX In addition, a time-series change of the control signal DY can be confirmed.
- FIG. 15 is a diagram illustrating a configuration of a control system including the programmable logic controller according to the fourth embodiment.
- the same parts as those of the first embodiment are denoted by the same reference numerals and description thereof is omitted.
- the PLC 5-4 according to the fourth embodiment has the same configuration as the PLC 5 according to the first embodiment except that the internal data reproduction unit 16 is not provided. Further, the PLC 5-4 according to the fourth embodiment performs the same operation as the PLC 5 according to the first embodiment except that the internal data IRD is not reproduced.
- the PLC 5-4 sets the acquired data AD by the acquired data setting unit 11 and changes the value of the data DX from the value most recently stored in the storage unit 12. Is stored in the storage unit 12, the total capacity of the data DX stored in the storage unit 12 can be reduced, and the acquired data DX can be further reduced in capacity.
- the PLC 5-4 acquires the data DX that cannot be generated even when the acquisition program setting unit 11 uses the control program SP by referring to the control program SP stored in the program storage unit 13. Since the data AD is set, even if the control signal DY is not acquired, insufficient acquisition of the data DX can be suppressed, and accurate time-series changes of the data DX and the control signal DY can be confirmed.
- FIG. 16 is a flowchart illustrating an operation in which the programmable logic controller according to the fifth embodiment reproduces intermediate data.
- FIG. 17 is a flowchart showing an operation of reproducing internal data of a computer connected to the programmable logic controller shown in FIG.
- the same parts as those in the first embodiment are denoted by the same reference numerals and description thereof is omitted.
- the internal data reproduction unit 16 of the PLC 5 according to the fifth embodiment generates the halfway acquisition data AAD-n (step S13), and the data DX whose value has not changed at the nth scan of the halfway acquisition data AAD-n. (Step S14), the value DX of the “n-th scan” data DX is reproduced, and then the data DX reproduced in the “n-th scan”, that is, all acquired data AAD-n is transmitted to the computer 6. (Step S14a).
- the internal data reproduction unit 16 of the PLC 5 according to the fifth embodiment transmits the reproduced data DX of the “nth scan” to the computer 6 (step S14a), and then reproduces the data DX of the “n ⁇ 1th scan”.
- step S14b all acquired data AAD-n-1 is deleted (step S14b).
- the internal data reproduction unit 16 of the PLC 5 determines whether or not the update of the data DX for all the scans has been completed (step S15).
- the internal data reproduction unit 16 of the PLC 5 according to the fifth embodiment reproduces the value of the “nth scan” data DX and then transmits the “nth scan” reproduced data DX to the computer 6 (step S14a).
- step S14a The internal data reproduction unit 16 of the PLC 5 according to the fifth embodiment transmits the data DX reproduced from the “nth scan” to the computer 6 (step S14a), and then the data DX reproduced from the “n ⁇ 1th scan”. Except for the deletion, the same processing as the PLC 5 of the first embodiment is executed.
- the computer 6 that has received the reproduced data DX of the “nth scan” refers to the control program SP (step S21). Based on the control program SP and the intermediate data WD shown in FIG. 10, the computer 6 reproduces the internal data IRD at the time of all the scans of the control device 3Y, similarly to the PLC 5 of the first embodiment (step S22). .
- the computer 6 stores the reproduced internal data IRD in the storage unit 12 and displays it on the display device 66. After executing step S22, the computer 6 ends the flowchart shown in FIG.
- the PLC 5 controls the value of the data DX that has been set to the acquisition data AD by the acquisition data setting unit 11 and has changed from the value most recently stored in the storage unit 12. Since the unit 15 stores in the storage unit 12, the total capacity of the data DX stored in the storage unit 12 can be reduced, and the acquired data DX can be further reduced in capacity.
- the PLC 5 transmits the data DX reproduced in the “nth scan”, that is, all the acquired data AAD-n to the computer 6, and the data DX reproduced in the “n ⁇ 1 scan”, that is, in the middle. Since all the acquired data AAD-n-1 is deleted, the total capacity of the data DX stored in the storage unit 12 can be reduced.
- the PLCs 5 and 5-4 reproduce the data DX of the control device 2X and the control signal DY of the control device 3Y, but the data used in the PLCs 5 and 5-4 are also used. You may reproduce it without obtaining it. That is, the PLCs 5 and 5-4 can also reproduce data used internally. Note that the data used in the PLCs 5 and 5-4 are a counter for storing a value at which the instruction is executed, a variable for calculation, and 1-bit data used only inside.
- the configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.
- PLC programmable logic controller
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Abstract
Description
図1は、実施の形態1に係るプログラマブルロジックコントローラが備えられる制御システムの構成を示す図である。図2は、図1に示す制御システムのコンピュータが生成する制御プログラムの一例を示す図である。制御システム1は、FA(Factory Automation)分野の設備を構成するものであり、図1に示すように、設備に設置される複数の制御機器2X,3Yと、複数の制御機器2X,3Yに接続したプログラマブルロジックコントローラ(Programmable Logic Controllers:以下、単にPLCと記す)5と、PLC5に接続したコンピュータ6とを備える。
次に、本発明の実施の形態2に係るPLC5を図面に基づいて説明する。図13は、実施の形態2に係るプログラマブルロジックコントローラの内部データを再現する動作を示すフローチャートである。実施の形態2において、実施の形態1と同一部分には、同一符号を付して説明を省略する。
次に、本発明の実施の形態3に係るPLC5を図面に基づいて説明する。図14は、実施の形態3に係るプログラマブルロジックコントローラの取得データ設定部が取得データを設定する動作を示すフローチャートである。実施の形態3において、実施の形態1と同一部分には、同一符号を付して説明を省略する。
次に、本発明の実施の形態4に係るPLC5-4を図面に基づいて説明する。図15は、実施の形態4に係るプログラマブルロジックコントローラが備えられる制御システムの構成を示す図である。図15において、実施の形態1と同一部分には、同一符号を付して説明を省略する。
次に、本発明の実施の形態5に係るPLC5を図面に基づいて説明する。図16は、実施の形態5に係るプログラマブルロジックコントローラが途中データを再現する動作を示すフローチャートである。図17は、図16に示されたプログラマブルロジックコントローラに接続されたコンピュータの内部データを再現する動作を示すフローチャートである。実施の形態5において、実施の形態1と同一部分には、同一符号を付して説明を省略する。
Claims (7)
- 制御機器の複数のデータのうちの少なくとも一つを取得データに設定する取得データ設定部と、
前記取得データを記憶する記憶部と、
前記制御機器を制御する制御プログラムを格納するプログラム記憶部と、
前記データを受信する入力データ受信部と、
前記入力データ受信部が受信した前記データが前記取得データであり、かつ、前記入力データ受信部が受信した前記データの値が前記記憶部に最も最近記憶された値から変化した場合に、前記入力データ受信部が受信した前記データを前記取得データとして前記記憶部に少なくとも1回記憶させる制御部と、
を備えることを特徴とするプログラマブルロジックコントローラ。 - 前記記憶部に記憶された前記取得データと前記プログラム記憶部が格納した前記制御プログラムとに基づいて、全ての前記制御機器の状態を示す内部データを再現する内部データ再現部を備える
ことを特徴とする請求項1に記載のプログラマブルロジックコントローラ。 - 前記入力データ受信部は、前記全ての前記データを複数回受信し、
前記制御部は、前記入力データ受信部が複数回前記データを受信するうちの少なくとも1回において、前記データの全てを前記記憶部に記憶させる
ことを特徴とする請求項1又は請求項2に記載のプログラマブルロジックコントローラ。 - 前記制御部が前記データの全てを前記記憶部に記憶させる前記少なくとも1回は、前記複数回のうちの前記制御部が前記データを前記取得データとして前記記憶部に記憶させる回以外の回である
ことを特徴とする請求項3に記載のプログラマブルロジックコントローラ。 - 前記制御部は、前記内部データ再現部が再現した前記内部データを前記制御機器に出力する
ことを特徴とする請求項1から請求項4のうちいずれか一項に記載のプログラマブルロジックコントローラ。 - 前記取得データ設定部は、前記プログラム記憶部が格納した前記制御プログラムを参照して、前記データのうちの少なくとも一つを前記取得データに設定する
ことを特徴とする請求項1から請求項5のうちいずれか一項に記載のプログラマブルロジックコントローラ。 - 前記制御部は、異常が発生すると、前記記憶部に記憶した前記取得データを外部の情報記憶装置に送信する
ことを特徴とする請求項1から請求項6のうちいずれか一項に記載のプログラマブルロジックコントローラ。
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- 2016-05-23 KR KR1020187015887A patent/KR20180080301A/ko not_active IP Right Cessation
- 2016-05-23 CN CN201680072237.8A patent/CN109154803B/zh active Active
- 2016-05-23 KR KR1020207029798A patent/KR102219655B1/ko active IP Right Grant
- 2016-05-23 JP JP2018518831A patent/JP6529670B2/ja active Active
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CN114174939A (zh) * | 2019-07-26 | 2022-03-11 | 三菱电机株式会社 | 可编程逻辑控制器、设定工具及程序 |
DE112019007572T5 (de) | 2019-07-26 | 2022-04-28 | Mitsubishi Electric Corporation | Speicherprogrammierbare Steuerung, Einstellwerkzeug und Programm |
CN114174939B (zh) * | 2019-07-26 | 2024-01-12 | 三菱电机株式会社 | 可编程逻辑控制器、设定工具及记录介质 |
Also Published As
Publication number | Publication date |
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JPWO2017203583A1 (ja) | 2018-07-12 |
CN109154803A (zh) | 2019-01-04 |
KR20200121919A (ko) | 2020-10-26 |
KR102219655B1 (ko) | 2021-02-24 |
CN109154803B (zh) | 2022-04-08 |
JP6529670B2 (ja) | 2019-06-12 |
KR20180080301A (ko) | 2018-07-11 |
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