WO2017201839A1 - 液晶显示器的驱动系统及驱动方法 - Google Patents

液晶显示器的驱动系统及驱动方法 Download PDF

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Publication number
WO2017201839A1
WO2017201839A1 PCT/CN2016/090066 CN2016090066W WO2017201839A1 WO 2017201839 A1 WO2017201839 A1 WO 2017201839A1 CN 2016090066 W CN2016090066 W CN 2016090066W WO 2017201839 A1 WO2017201839 A1 WO 2017201839A1
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Prior art keywords
start signal
scan start
preset value
boosted
clock signal
Prior art date
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PCT/CN2016/090066
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English (en)
French (fr)
Inventor
曾德康
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深圳市华星光电技术有限公司
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Priority to US15/300,977 priority Critical patent/US10262579B2/en
Publication of WO2017201839A1 publication Critical patent/WO2017201839A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit

Definitions

  • the invention belongs to the technical field of liquid crystal display, and in particular to a driving system and a driving method of a liquid crystal display.
  • LCDs liquid crystal displays
  • Liquid crystal displays typically include a liquid crystal panel and a backlight module that provides a uniform surface light source to the liquid crystal panel.
  • the gate driver is usually fabricated on the array substrate by using the Gate Driver On Array (GOA) technology, thereby implementing the gate line progressive scan driving.
  • GOA Gate Driver On Array
  • a printed circuit board (Printed Circuit Board+Assembly, PCBA) is generally used to provide various signals to the gate driver.
  • the PCBA generally has a Timing Controller (TCON) and an Electric Shifter (Level Shift).
  • TCON generates a start signal (STV), a clock signal (CLK), etc., to the electric displacement converter, and the electric displacement is turned.
  • the device performs a boosting operation on the received signal to drive the gate line (and the thin film transistor TFT connecting the gate lines) in a progressive scan manner.
  • the present invention provides a driving system and a driving method of a liquid crystal display capable of reducing pins required for a timing controller and an electric displacement actuator.
  • a driving system for a liquid crystal display includes: a timing controller for generating a scan start signal; and a potential shifter for performing a boost operation on the generated scan start signal, And generating at least one clock signal according to the boosted scan start signal; the gate driver is configured to scan and drive the gate line according to the boosted scan start signal and the generated clock signal.
  • the potential shifter is further configured to store at least one preset value, and perform a delay operation on the boosted scan start signal according to the stored preset value to generate a clock signal.
  • the potential shifter is further configured to perform a delay operation on the boosted scan start signal according to the stored preset value when detecting a rising edge of the boosted scan start signal, To generate a clock signal.
  • the potential shifter includes: a boosting module, configured to perform a boosting operation on the generated scan start signal; a storage module, configured to store at least one preset value; and a detecting module, configured to detect the boost a rising edge of the scan start signal after the pressing; the delay module is configured to: when the detecting module detects the rising edge of the scan start signal after the boosting, obtain the preset value from the storage module, and according to the obtained pre- The set value delay operation of the boosted scan start signal to generate a clock signal; and an output module for outputting the boosted scan start signal and the generated clock signal.
  • a boosting module configured to perform a boosting operation on the generated scan start signal
  • a storage module configured to store at least one preset value
  • a detecting module configured to detect the boost a rising edge of the scan start signal after the pressing
  • the delay module is configured to: when the detecting module detects the rising edge of the scan start signal after the boosting, obtain the preset value from the storage module, and according to the obtained pre
  • the delay module sequentially acquires preset values from the storage module in an order from a minimum preset value to a maximum preset value, and according to each acquired The preset value delays the boosted scan start signal to generate a clock signal corresponding to each preset value.
  • the time delay of the boosted scan start signal is sequentially increased in the order from the minimum preset value to the maximum preset value.
  • the timing controller and the potential shifter are assembled on a printed circuit board behind the component, and the potential shifter comprises: an IIC protocol module for connection with a printed circuit board behind the component Communicate.
  • a driving method of a liquid crystal display comprising: generating a scan start signal; performing a boosting operation on the generated scan start signal; generating according to the boosted scan start signal a clock signal; the gate line is scan-driven according to the boosted scan start signal and the generated clock signal.
  • the method for generating a clock signal according to the boosted scan start signal includes: detecting a rising edge of the boosted scan start signal; and detecting a rising edge of the scan start signal after boosting Obtaining a stored preset value; performing a delay operation on the boosted scan start signal according to the acquired preset value to generate a clock signal; and outputting the boosted scan start signal and the generated clock signal.
  • the preset values are sequentially acquired in the order from the minimum preset value to the maximum preset value, and the boosted scan start is performed according to each preset value obtained.
  • the signal performs a delay operation to generate a clock signal corresponding to each preset value; wherein, the delay time of the boosted scan start signal is sequentially changed from the minimum preset value to the maximum preset value. long.
  • the driving system and the driving method of the liquid crystal display provided by the invention can reduce the pins required for the timing controller and the electric displacement converter, and make the package type of the timing controller and the electric displacement converter smaller, thereby reducing Packaging cost.
  • the pins of the timing controller and the electric displacement converter are reduced, the wiring between the two is reduced, which can reduce the size of the printed circuit board behind the assembly, thereby reducing the cost of the printed circuit board behind the assembly. .
  • FIG. 1 shows a frame view of a liquid crystal display according to an embodiment of the present invention
  • FIG. 2 is a block diagram of a printed circuit board and a gate driver after components and signal waveforms generated by the same according to an embodiment of the present invention
  • FIG. 3 is a block diagram of an electric displacement rotator in accordance with an embodiment of the present invention.
  • FIG. 4 is a flow chart of a driving method of a liquid crystal display according to an embodiment of the present invention.
  • FIG. 1 shows a frame view of a liquid crystal display according to an embodiment of the present invention.
  • a liquid crystal display includes: a liquid crystal panel assembly 300; a gate driver 400 and a data driver 500, both of which are connected to the liquid crystal panel assembly 300; a gray voltage generator 600 connected to the data driver 500; a printed circuit board (PCBA) 700 behind the component is coupled to the gate driver 400 and the data driver 500 to provide various signals to the gate driver 400 and the data driver 500.
  • PCBA printed circuit board
  • the printed circuit board 700 behind the component includes at least a timing controller 710, an electric displacement 720, and a connector 730, but the invention is not limited thereto.
  • the liquid crystal panel assembly 300 includes a plurality of display signal lines and a plurality of pixels PX connected to the display signal lines and arranged in an array.
  • the liquid crystal panel assembly 300 may include a lower display panel (not shown) and an upper display panel (not shown) facing each other, and a liquid crystal layer (not shown) interposed between the lower display panel and the upper display panel.
  • a display signal line can be arranged on the lower display panel.
  • the display signal lines may include a plurality of gate lines transmitting gate signals G m to as G 1 in transmitting data signals and a plurality of data lines D 1 to D n.
  • Gate lines G 1 to G m extending in the row direction and substantially parallel to each other, and the data line D 1 to D n in the column direction and extending substantially parallel to each other.
  • Each of the pixels PX includes: a switching device connected to a corresponding gate line and a corresponding data line; and a liquid crystal capacitor connected to the switching device.
  • Each pixel PX may also include a storage capacitor, which is connected in parallel with the liquid crystal capacitor, if necessary.
  • the switching device of each pixel PX is a three-terminal device, thus having a control terminal connected to the corresponding gate line, an input terminal connected to the corresponding data line, and an output terminal connected to the corresponding liquid crystal capacitor.
  • the gate driver 400 is connected to the gate lines G 1 to G m and applies a gate signal to the gate lines G 1 to G m , which is a gate-on voltage supplied from the external source to the gate driver 400 A combination of Von and a gate-off voltage Voff.
  • the gate driver 400 is arranged on one side of the liquid crystal panel assembly 300, and the gate lines G 1 to G m are connected to the gate driver 400.
  • the invention is not limited thereto. That is, a gate driver 400 disposed on opposite sides of the liquid crystal panel assembly 300, respectively, and the gate lines G 1 to G m are both connected to each of the gate driver 400.
  • the gate driver 400 may be embedded in the liquid crystal panel assembly 300.
  • the gray voltage generator 600 generates a gray voltage that is closely related to the transmittance of the pixel PX. This gray voltage is supplied to each pixel PX and has a positive value or a negative value according to the common voltage Vcom.
  • the data driver 500 is connected to the data lines D 1 to D n of the liquid crystal panel assembly 300, and applies the gray voltage generated by the gray voltage generator 600 to the pixel PX as a data voltage. If the gray voltage generator 600 does not supply all of the gray voltages but only the reference gray voltages, the data driver 500 can generate various gray voltages by dividing the reference gray voltages, and select various gray scales. One of the voltages acts as a data voltage.
  • both the data driver 500 and the gray voltage generator 600 can be embedded in the liquid crystal panel assembly 300.
  • the timing controller 710 on the printed circuit board 700 behind the components controls the operation of the gate driver 400 and the data driver 500.
  • the timing controller 710 receives an input image signal (eg, an RGB signal) and a plurality of input control signals for controlling display of the input image signal, such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, from an external graphics controller (not shown), The main clock signal MCLK and the data enable signal DE.
  • the timing controller 710 appropriately processes the input image signal in accordance with the input control signal, thereby generating image data DAT conforming to the operating conditions of the liquid crystal panel assembly 300. Then, the timing controller 710 generates the gate control signal CONT1 and the data control signal CONT2, transfers the gate control signal CONT1 to the gate driver 400, and transfers the data control signal CONT2 and the image data DAT to the data driver 500.
  • the gate control signal CONT1 may include a scan start signal STV1 that can be used to initiate operation of the gate driver 400, that is, a scan operation.
  • the gate control signal CONT1 can also An output enable signal can be included that can be used to limit the duration of the gate turn-on voltage Von. It should be noted that, unlike the prior art, the clock signal CKV is not included in the gate control signal CONT1 of the present embodiment.
  • the timing controller 710 transmits the gate control signal CONT1 to the electric displacement 720.
  • the electric displacement converter 720 generates at least one clock signal CKV according to the received scan start signal STV1, performs a boosting operation on the gate control signal CONT1, and transmits the boosted gate control signal CONT1 and the clock signal CKV to Gate driver 400.
  • the data control signal CONT2 may include: a horizontal synchronization start signal STH, a transmission indicating that the image data DAT; a load signal LOAD, which request data voltage is applied to the image data DAT corresponding to the data lines D 1 through D n; and a data clock signal HCLK .
  • the data control signal CONT2 may also include an inversion signal RVS for inverting the polarity of the data voltage with respect to the common voltage Vcom, which is hereinafter referred to as "polarity of the data voltage.”
  • the data driver 500 receives the image data DAT from the timing controller 710 in response to the data control signal CONT2, and selects the gray voltage corresponding to the image data DAT to convert the image data into a data voltage. Then, the data driver 500 supplies the data voltages to the data lines D 1 to D n .
  • the gate driver 400 applies the gate-on voltage Von is turned on is connected to the gate lines G 1 to G m in response to the gate control signal CONT1 and a boosted clock signal CKV to the gate lines G 1 to G m of Switching device. Then, the data voltages applied to the data lines D 1 to D n are transmitted to each of the pixels PX through the turned-on switching devices.
  • the difference between the data voltage applied to each pixel PX and the common voltage Vcom can be interpreted as a voltage with which the liquid crystal capacitor of each pixel PX is charged, that is, a pixel voltage.
  • the arrangement of the liquid crystal molecules in the liquid crystal layer varies depending on the amplitude of the pixel voltage, and thus the polarity of the light transmitted through the liquid crystal layer can also be changed, resulting in a change in the transmittance of the liquid crystal layer.
  • FIG. 2 is a block diagram of a printed circuit board and a gate driver after components and signal waveforms generated by the same according to an embodiment of the present invention.
  • components of other liquid crystal displays than the printed circuit board 700 and the gate driver 400 after the components are not shown. These omitted components can be referred to FIG.
  • the timing controller 710 generates a gate control signal CONT1.
  • the gate control signal CONT1 includes at least a scan start signal STV1 that can be used to initiate operation of the gate driver 400, that is, a scan operation. It should be noted that, unlike the prior art, the clock signal CKV is not included in the gate control signal CONT1 of the present embodiment.
  • the timing controller 710 transmits the scan start signal STV1 to the electric displacement converter 720.
  • the electric displacement converter 720 performs a boosting operation on the scan start signal STV1, and generates four clock signals CKV1, CKV2, CKV3, and CKV4 in accordance with the boosted scan start signal STV2.
  • the number of clock signals herein is only an example.
  • FIG. 3 is a block diagram of an electric displacement rotator in accordance with an embodiment of the present invention.
  • the electric displacement 720 includes: a storage module 721, a boosting module 722, a detecting module 723, a delay module 724, and an output module 725.
  • the storage module 721 is configured to store four preset values.
  • each preset value corresponds to one clock signal.
  • the four preset values are distinguished by a first preset value, a second preset value, a third preset value, and a fourth preset value.
  • the boosting module 722 is configured to perform a boosting operation on the scan start signal STV1 and generate a boosted scan start signal STV2.
  • the detecting module 723 is configured to detect a rising edge of the boosted scan start signal STV2.
  • the delay module 724 sequentially acquires four preset values from the storage module 721, and boosts the voltage according to each preset value.
  • the scan start signal STV2 performs a delay operation to form a clock signal CKV corresponding to each preset value.
  • the output module 725 transfers the boosted scan start signal STV2 and the generated four clock signals CKV1, CKV2, CKV3, CKV4 to the gate driver 400.
  • the time for delaying the boosted scan start signal STV2 corresponding to each preset value is different.
  • the shortest time after the boosted scan start signal STV2 is delayed is the boosted scan
  • the high level of the start signal STV2 is one-half of the duration T.
  • the first preset value, the second preset value, the third preset value, and the fourth preset value are sequentially increased.
  • the delay module 724 sequentially acquires four from the storage module 721 in the order of the minimum preset value to the maximum preset value. default value.
  • the delay module 724 obtains the first preset value from the storage module 721, and boosts the voltage according to the first preset value.
  • the subsequent scan start signal STV2 performs a delay D1 to form a clock signal CKV1 corresponding to the first preset value; then, the delay module 724 obtains a second preset value from the storage module 721, and according to the second preset
  • the value is delayed by D2 to the boosted scan start signal STV2 to form a clock signal CKV2 corresponding to the second preset value; then, the delay module 724 obtains a third preset value from the storage module 721, and according to The third preset value delays the boosted scan start signal STV2 by D3 to form a clock signal CKV3 corresponding to the third preset value; then, the delay module 724 obtains the fourth preset from the storage module 721. And delaying D4 of the boosted scan start signal STV2 according to the fourth preset
  • the electric displacement 720 further includes an IIC protocol module 726.
  • the electrical displacement 720 communicates with the connector 730 via the IIC protocol module 726.
  • the user or the designer can adjust the preset value in the storage module 721 of the electric displacement 720 through the connector 730, thereby adjusting the clock signal generated by the delay module 724 of the electric displacement 720 to make the component.
  • the latter printed circuit board 700 can be applied to a variety of different types of liquid crystal displays.
  • FIG. 4 is a flow chart of a driving method of a liquid crystal display according to an embodiment of the present invention.
  • step S410 a gate control signal CONT1 is generated.
  • the gate control signal CONT1 is generated by the timing controller 710.
  • the gate control signal CONT1 includes at least a scan start signal STV1 which can be used to start the operation of the gate driver 400, that is, the scan operation.
  • the clock signal CKV is not included in the gate control signal CONT1 of the present embodiment.
  • the timing controller 710 transmits the scan start signal STV1 to the electric displacement converter 720.
  • step S420 a boosting operation is performed on the scan start signal STV1.
  • the boosting module 722 of the electric displacement converter 720 performs a boosting operation on the scan start signal STV1 to generate a boosted scan start signal STV2.
  • step S430 a clock signal is generated based on the boosted scan start signal STV2.
  • step S430 further includes step S431, step S432, step S433, and step S434.
  • step S431 the rising edge of the boosted scan start signal STV2 is detected. Specifically, the detection module 723 of the electric displacement 720 detects the rising edge of the boosted scan start signal STV2.
  • step S432 when the rising edge of the boosted scan start signal STV2 is detected, the stored preset value is acquired. With the ground, when the detecting module 723 of the electric displacement 720 detects the rising edge of the boosted scan start signal STV2, the delay module 724 of the electric displacement 720 obtains the preset from the storage module 721. value.
  • the storage module 721 stores four preset values.
  • each preset value corresponds to one clock signal.
  • the four preset values are distinguished by a first preset value, a second preset value, a third preset value, and a fourth preset value.
  • the number of preset values can be set according to actual needs.
  • the first preset value, the second preset value, the third preset value, and the fourth preset value are sequentially increased. Further, when the detecting module 723 of the electric displacement converter 720 detects the rising edge of the boosted scan start signal STV2, the delay module 724 of the electric displacement converter 720 is used to minimize the pre-load from the storage module 721. Get the four preset values in order from the value to the maximum preset value.
  • step S433 the boosted scan start signal STV2 is subjected to a delay operation according to the acquired preset value to generate a clock signal.
  • the delay module 724 of the electric displacement converter 720 performs a delay operation on the boosted scan start signal STV2 according to the acquired preset value to generate the clock signal CKV.
  • the delay module 724 of the electric displacement converter 720 performs a delay operation on the boosted scan start signal STV2 according to each preset value sequentially acquired to form a corresponding value for each preset value.
  • Clock signal CKV clock signal CKV.
  • four clock signals CKV1, CKV2, CKV3, and CKV4 are formed. That is, the four clock signals CKV1, CKV2, CKV3, and CKV4 are sequentially formed.
  • the time for delaying the boosted scan start signal STV2 corresponding to each preset value is different.
  • the smaller the preset value is the shorter the time after which the corresponding boosted scan start signal STV2 is delayed. It should be understood that, as another implementation manner, it may be set that the larger the preset value is, the shorter the time after which the corresponding boosted scan start signal STV2 is delayed.
  • the shortest time during which the boosted scan start signal STV2 is delayed is one-half of the high level duration T of the boosted scan start signal STV2.
  • step S434 the boosted scan start signal and the generated clock signal are output. Specifically, the boosted scan start signal STV2 and the generated four clock signals CKV1, CKV2, CKV3, CKV4 are output by the output module 725 of the electric displacement converter 720.
  • step S440 the gate line is scan-driven according to the boosted scan start signal and the generated clock signal.
  • the gate driver 400 performs progressive scan driving on the gate lines G1 to Gm based on the boosted scan start signal STV2 and the generated four clock signals CKV1, CKV2, CKV3, CKV4.
  • FIG. 1 For specific driving methods, please refer to FIG. 1 below for the gate driver 400. description of.
  • the pins required for the timing controller and the electric displacement rotator can be reduced, and the package type of the timing controller and the electric displacement rotator can be made smaller, thereby reducing the packaging cost.
  • the pins of the timing controller and the electric displacement converter are reduced, the wiring between the two is reduced, which can reduce the size of the printed circuit board behind the assembly, thereby reducing the cost of the printed circuit board behind the assembly. .

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Abstract

一种液晶显示器的驱动系统及驱动方法，其系统包括：时序控制器(710)，用于产生扫描起始信号(STV1)；电位转移器(720)，用于对产生的扫描起始信号(STV1)进行升压操作，并根据升压后的扫描起始信号(STV2)产生至少一个时钟信号(CKV)；栅极驱动器(400)，用于根据升压后的扫描起始信号(STV2)以及产生的时钟信号(CKV)对栅极线(G 1~G m)进行扫描驱动。该液晶显示器的驱动系统和驱动方法，可以减少时序控制器(710)和电位移转器(720)所需要的引脚，使时序控制器(710)和电位移转器(720)的封装型号(Package)变小，从而减小封装成本。此外，由于时序控制器(710)和电位移转器(720)的引脚减少，二者之间的走线会减少，这样可以使组件后的印刷电路板(700)的尺寸减小，从而降低组件后的印刷电路板(700)的成本。

Description

液晶显示器的驱动系统及驱动方法 技术领域
本发明属于液晶显示技术领域，具体地讲，涉及一种液晶显示器的驱动系统及驱动方法。
背景技术
随着光电与半导体技术的演进，也带动了平板显示器(Flat Panel Display)的蓬勃发展，而在诸多平板显示器中，液晶显示器(Liquid Crystal Display，LCD)因具有高空间利用效率、低消耗功率、无辐射以及低电磁干扰等诸多优越特性，已被应用于生产生活的各个方面。
液晶显示器通常包括液晶面板以及向液晶面板提供均匀的面光源的背光模块。在液晶面板中，通常采用阵列基板栅极驱动(Gate Driver On Array，GOA)技术将栅极驱动器制作在阵列基板上，从而实现对栅极线逐行扫描驱动。
在阵列基板栅极驱动技术中，一般采用组件后的印刷电路板(Printed Circuit Board+Assembly，PCBA)向栅极驱动器提供各种信号。例如，PCBA上一般具有时序控制器(Timing Controller，TCON)和电位移转器(Level Shift)，TCON产生起始信号(STV)、时钟信号(CLK)等信号给电位移转器，电位移转器对接收到的信号进行升压操作，从而对栅极线(以及连接栅极线的薄膜晶体管TFT)进行逐行扫描驱动。
为了实现对栅极线逐行扫描驱动，至少需要提供四个时钟信号给栅极驱动器。当栅极驱动器需要的时钟信号越多，TCON和电位移转器所需要的引脚就会越多，这样会导致TCON和电位移转器的封装型号(Package)变大，从而导致封装成本上升。同时引脚增加，导致走线增加，这同样会使PCBA的尺寸变大，从而提升PCBA的成本。
发明内容
为了解决上述问题，本发明提供了一种能够减少时序控制器和电位移转器所需要的引脚的液晶显示器的驱动系统及驱动方法。
根据本发明的一方面，提供了一种液晶显示器的驱动系统，其包括：时序控制器，用于产生扫描起始信号；电位转移器，用于对产生的扫描起始信号进行升压操作，并根据升压后的扫描起始信号产生至少一个时钟信号；栅极驱动器，用于根据升压后的扫描起始信号以及产生的时钟信号对栅极线进行扫描驱动。
可选地，所述电位转移器还用于存储至少一个预设值，并根据存储的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号。
可选地，所述电位转移器还用于当其侦测到升压后的扫描起始信号的上升沿时，根据存储的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号。
可选地，所述电位转移器包括：升压模块，用于对产生的扫描起始信号进行升压操作；存储模块，用于存储至少一个预设值；侦测模块，用于侦测升压后的扫描起始信号的上升沿；延时模块，用于当侦测模块侦测到升压后的扫描起始信号的上升沿时，从存储模块获取预设值，并根据获取的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号；输出模块，用于输出升压后的扫描起始信号以及产生的时钟信号。
可选地，当所述存储模块存储至少两个预设值时，所述延时模块按照从最小预设值到最大预设值的顺序依次从存储模块获取预设值，并根据获取的每个预设值对升压后的扫描起始信号进行延时操作，以产生与每个预设值对应的时钟信号。
可选地，对升压后的扫描起始信号进行延时的时间按照从最小预设值到最大预设值的顺序依次变长。
可选地，所述时序控制器和所述电位转移器组装于组件后的印刷电路板上，所述电位转移器包括：IIC协议模块，用于与所述组件后的印刷电路板上的连接器进行通讯。
根据本发明的另一方面，还提供了一种液晶显示器的驱动方法，其包括：产生扫描起始信号；对产生的扫描起始信号进行升压操作；根据升压后的扫描起始信号产生时钟信号；根据升压后的扫描起始信号以及产生的时钟信号对栅极线进行扫描驱动。
可选地，根据升压后的扫描起始信号产生时钟信号的方法包括：侦测升压后的扫描起始信号的上升沿；当侦测到升压后的扫描起始信号的上升沿时，获取存储的预设值；根据获取的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号；输出升压后的扫描起始信号以及产生的时钟信号。
可选地，当存储至少两个预设值时，按照从最小预设值到最大预设值的顺序依次获取预设值，并根据获取的每个预设值对升压后的扫描起始信号进行延时操作，以产生与每个预设值对应的时钟信号；其中，对升压后的扫描起始信号进行延时的时间按照从最小预设值到最大预设值的顺序依次变长。
本发明提供的液晶显示器的驱动系统和驱动方法，可以减少时序控制器和电位移转器所需要的引脚，使时序控制器和电位移转器的封装型号(Package)变小，从而减小封装成本。此外，由于时序控制器和电位移转器的引脚减少，二者之间的走线会减少，这样可以使组件后的印刷电路板的尺寸减小，从而降低组件后的印刷电路板的成本。
附图说明
通过结合附图进行的以下描述，本发明的实施例的上述和其它方面、特点和优点将变得更加清楚，附图中：
图1示出了根据本发明的实施例的液晶显示器的框架图；
图2是根据本发明的实施例的组件后的印刷电路板及栅极驱动器的架构图以及它们产生的信号波形图；
图3是根据本发明的实施例的电位移转器的模块图；
图4是根据本发明的实施例的液晶显示器的驱动方法的流程图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。
图1示出了根据本发明的实施例的液晶显示器的框架图。
参照图1，根据本发明的实施例的液晶显示器包括：液晶面板组件300；栅极驱动器400和数据驱动器500，二者都连接到液晶面板组件300；灰度电压产生器600，连接到数据驱动器500；组件后的印刷电路板(PCBA)700，连接到栅极驱动器400和数据驱动器500，以提供各种信号给栅极驱动器400和数据驱动器500。
在本实施例中，组件后的印刷电路板700上至少包括：时序控制器710、电位移转器720以及连接器730，但本发明并不限制于此。
液晶面板组件300包括多条显示信号线和连接到显示信号线并按阵列排列的多个像素PX。液晶面板组件300可以包括：彼此面对的下显示面板(未示出)和上显示面板(未示出)，以及被插入在下显示面板和上显示面板之间的液晶层(未示出)。
可以在下显示面板上布置显示信号线。显示信号线可以包括传送栅极信号的多条栅极线G1至Gm和传送数据信号的多条数据线D1至Dn。栅极线G1至Gm按行方向延伸并且彼此大致平行，并且数据线D1至Dn按列方向延伸并且彼此大致平行。
每个像素PX包括：开关器件，连接到相应的栅极线和相应的数据线；以及液晶电容器，连接到该开关器件。如果必要，每个像素PX也可以包括存储电容器，其与液晶电容器并联连接。
每个像素PX的开关器件是三端器件，因此具有连接到相应栅极线的控制端、连接到相应数据线的输入端和连接到相应液晶电容器的输出端。
栅极驱动器400连接到栅极线G1至Gm，并向栅极线G1至Gm施加栅极信 号，该栅极信号是由外部源提供给栅极驱动器400的栅极导通电压Von和栅极截止电压Voff的组合。参照图1，在液晶面板组件300的一侧布置栅极驱动器400，并且栅极线G1至Gm都连接到栅极驱动器400。然而，本发明不限于此。也就是说，可以在液晶面板组件300的相对两侧分别布置一个栅极驱动器400，并且栅极线G1至Gm都连接到这两个栅极驱动器400的每一个。
在本实施例中，栅极驱动器400可以被嵌入在液晶面板组件300中。
灰度电压产生器600产生与像素PX的透射率紧密相关的灰度电压。该灰度电压被提供给每个像素PX，并且根据公共电压Vcom而具有正值或负值。
数据驱动器500连接到液晶面板组件300的数据线D1至Dn，并向像素PX施加由灰度电压产生器600产生的灰度电压作为数据电压。如果灰度电压产生器600不是提供所有的灰度电压而是仅提供基准灰度电压，则数据驱动器500可以通过将基准灰度电压分压而产生各种灰度电压，并选择各种灰度电压中的一个作为数据电压。
在本实施例中，数据驱动器500以及灰度电压产生器600都可以被嵌入在液晶面板组件300中。
组件后的印刷电路板700上的时序控制器710控制栅极驱动器400和数据驱动器500的操作。
时序控制器710从外部图形控制器(未示出)接收输入图像信号(例如RGB信号)以及用于控制输入图像信号的显示的多个输入控制信号，例如垂直同步信号Vsync、水平同步信号Hsync、主时钟信号MCLK、数据使能信号DE。时序控制器710根据输入控制信号适当处理输入图像信号，从而产生符合液晶面板组件300的操作条件的图像数据DAT。然后，时序控制器710产生栅极控制信号CONT1和数据控制信号CONT2，将栅极控制信号CONT1传送到栅极驱动器400，并将数据控制信号CONT2和图像数据DAT传送到数据驱动器500。
栅极控制信号CONT1可以包括：扫描起始信号STV1，被升压后能够被用于启动栅极驱动器400的操作，即扫描操作。栅极控制信号CONT1还可以 包括输出使能信号，能够被用于限制栅极导通电压Von的持续时间。需要说明的是，与现有技术不同的是，本实施例的栅极控制信号CONT1中不包括时钟信号CKV。
进一步地，时序控制器710将栅极控制信号CONT1传送到电位移转器720。电位移转器720根据接收到的扫描起始信号STV1产生至少一个时钟信号CKV，并对栅极控制信号CONT1进行升压操作，并将升压后的栅极控制信号CONT1以及时钟信号CKV传送到栅极驱动器400。
数据控制信号CONT2可以包括：水平同步开始信号STH，其指示图像数据DAT的传输；加载信号LOAD，其请求向数据线D1至Dn施加与图像数据DAT对应的数据电压；以及数据时钟信号HCLK。数据控制信号CONT2也可以包括反转信号RVS，用于反转数据电压相对于公共电压Vcom的极性，这此后被称为“数据电压的极性”。
数据驱动器500响应于数据控制信号CONT2从时序控制器710接收图像数据DAT，并选择与图像数据DAT对应的灰度电压而将图像数据转换为数据电压。然后，数据驱动器500将数据电压提供给数据线D1至Dn。
栅极驱动器400通过响应于升压后的栅极控制信号CONT1以及时钟信号CKV向栅极线G1至Gm施加栅极导通电压Von而导通连接到栅极线G1至Gm的开关器件。然后，施加到数据线D1至Dn的数据电压通过导通的开关器件而被传送到每个像素PX。
施加到每个像素PX的数据电压和公共电压Vcom之间的差可以被解释为是利用其对每个像素PX的液晶电容器充电的电压，即像素电压。液晶层内的液晶分子的排列根据像素电压的幅度而变化，因而通过液晶层传送的光的极性也可以变化，从而导致液晶层的透射率的变化。
以下对组件后的印刷电路板700及栅极驱动器400之间的信号产生及传送进行进一步地详细说明。图2是根据本发明的实施例的组件后的印刷电路板及栅极驱动器的架构图以及它们产生的信号波形图。在图2中，未示出除组件后的印刷电路板700及栅极驱动器400之外的其他液晶显示器的组件，这些省略掉的组件可以参照图1。
参照图2，如上所述，时序控制器710产生栅极控制信号CONT1。栅极控制信号CONT1至少包括：扫描起始信号STV1，升压后能够被用于启动栅极驱动器400的操作，即扫描操作。需要说明的是，与现有技术不同的是，本实施例的栅极控制信号CONT1中不包括时钟信号CKV。
时序控制器710将扫描起始信号STV1传送给电位移转器720。电位移转器720对扫描起始信号STV1进行升压操作，并根据升压后的扫描起始信号STV2产生四个时钟信号CKV1、CKV2、CKV3、CKV4。当然，应当理解的是，这里的时钟信号的数量仅作为一种示例。
图3是根据本发明的实施例的电位移转器的模块图。
参照图2和图3，根据本发明的实施例的电位移转器720包括：存储模块721、升压模块722、侦测模块723、延时模块724、输出模块725。
存储模块721用于存储四个预设值。这里，每个预设值对应一个时钟信号。为了便于说明，将这四个预设值以第一预设值、第二预设值、第三预设值、第四预设值进行区分。升压模块722用于对扫描起始信号STV1进行升压操作，并产生升压后的扫描起始信号STV2。侦测模块723用于侦测升压后的扫描起始信号STV2的上升沿。
当侦测模块723侦测到升压后的扫描起始信号STV2的上升沿时，延时模块724从存储模块721中依次获取四个预设值，并根据每个预设值对升压后的扫描起始信号STV2进行延时操作，以形成与每个预设值对应的时钟信号CKV。
输出模块725将升压后的扫描起始信号STV2以及产生的四个时钟信号CKV1、CKV2、CKV3、CKV4传送到栅极驱动器400。
具体地，每个预设值对应的对升压后的扫描起始信号STV2进行延时的时间不同。例如，预设值越小，其对应的升压后的扫描起始信号STV2被延时的时间越短。应当理解的是，作为另一种实施方式，也可以设置为预设值越大，其对应的升压后的扫描起始信号STV2被延时的时间越短。
优选地，升压后的扫描起始信号STV2被延时的最短时间为升压后的扫描 起始信号STV2的高电平持续时间T的二分之一。
在本实施例中，第一预设值、第二预设值、第三预设值、第四预设值依次增大。第一预设值对应的升压后的扫描起始信号STV2被延时的时间为D1，其中，D1＝T/2。第二预设值对应的升压后的扫描起始信号STV2被延时的时间为D2，其中，D2＝T。第三预设值对应的升压后的扫描起始信号STV2被延时的时间为D3，其中，D3＝3T/2。第四预设值对应的升压后的扫描起始信号STV2被延时的时间为D4，其中，D4＝2T。也就是说，升压后的扫描起始信号STV2被延时的时间按照最小预设值到最大预设值的顺序依次递增升压后的扫描起始信号STV2的高电平持续时间T的二分之一。
进一步地，当侦测模块723侦测到升压后的扫描起始信号STV2的上升沿时，延时模块724从存储模块721中按照最小预设值到最大预设值的顺序依次获取四个预设值。
例如，当侦测模块723侦测到升压后的扫描起始信号STV2的上升沿时，延时模块724从存储模块721中获取第一预设值，并根据第一预设值对升压后的扫描起始信号STV2进行延时D1，以形成与第一预设值对应的时钟信号CKV1；接着，延时模块724从存储模块721中获取第二预设值，并根据第二预设值对升压后的扫描起始信号STV2进行延时D2，以形成与第二预设值对应的时钟信号CKV2；接着，延时模块724从存储模块721中获取第三预设值，并根据第三预设值对升压后的扫描起始信号STV2进行延时D3，以形成与第三预设值对应的时钟信号CKV3；接着，延时模块724从存储模块721中获取第四预设值，并根据第四预设值对升压后的扫描起始信号STV2进行延时D4，以形成与第四预设值对应的时钟信号CKV4。
此外，电位移转器720还包括：IIC协议模块726。电位移转器720通过IIC协议模块726与连接器730进行通信。这样，用户或者设计者可通过连接器730对电位移转器720的存储模块721中的预设值进行调整，从而对电位移转器720的延时模块724产生的时钟信号进行调整，使组件后的印刷电路板700能够应用于各种不同类型的液晶显示器中。
图4是根据本发明的实施例的液晶显示器的驱动方法的流程图。
参照图2至图4，在步骤S410中，产生栅极控制信号CONT1。
具体地，利用时序控制器710产生栅极控制信号CONT1。这里栅极控制信号CONT1至少包括：扫描起始信号STV1，升压后能够被用于启动栅极驱动器400的操作，即扫描操作。需要说明的是，与现有技术不同的是，本实施例的栅极控制信号CONT1中不包括时钟信号CKV。
时序控制器710将扫描起始信号STV1传送给电位移转器720。
在步骤S420中，对扫描起始信号STV1进行升压操作。
具体地，利用电位移转器720的升压模块722对扫描起始信号STV1进行升压操作，以产生升压后的扫描起始信号STV2。
在步骤S430中，根据升压后的扫描起始信号STV2产生时钟信号。
具体地，在本实施例中，步骤S430进一步包括步骤S431、步骤S432、步骤S433和步骤S434。
在步骤S431中，侦测升压后的扫描起始信号STV2的上升沿。具体地，利用电位移转器720的侦测模块723侦测升压后的扫描起始信号STV2的上升沿。
在步骤S432中，当侦测到升压后的扫描起始信号STV2的上升沿时，获取存储的预设值。具有地，当电位移转器720的侦测模块723侦测到升压后的扫描起始信号STV2的上升沿时，利用电位移转器720的延时模块724从存储模块721中获取预设值。
在本实施例中，存储模块721存储了四个预设值。这里，每个预设值对应一个时钟信号。为了便于说明，将这四个预设值以第一预设值、第二预设值、第三预设值、第四预设值进行区分。预设值的数量可根据实际需要被设定。
在本实施例中，优选地，第一预设值、第二预设值、第三预设值、第四预设值依次增大。进一步地，当电位移转器720的侦测模块723侦测到升压后的扫描起始信号STV2的上升沿时，利用电位移转器720的延时模块724从存储模块721中按照最小预设值到最大预设值的顺序依次获取四个预设值。
在步骤S433中，根据获取的预设值对升压后的扫描起始信号STV2进行延时操作，以产生时钟信号。具体地，利用电位移转器720的延时模块724根据获取的预设值对升压后的扫描起始信号STV2进行延时操作，以产生时钟信号CKV。
在本实施例中，电位移转器720的延时模块724根据依序获取的每个预设值对升压后的扫描起始信号STV2进行延时操作，以形成与每个预设值对应的时钟信号CKV。这样，形成了四个时钟信号CKV1、CKV2、CKV3、CKV4。也就是说，四个时钟信号CKV1、CKV2、CKV3、CKV4依序形成。
每个预设值对应的对升压后的扫描起始信号STV2进行延时的时间不同。例如，预设值越小，其对应的升压后的扫描起始信号STV2被延时的时间越短。应当理解的是，作为另一种实施方式，也可以设置为预设值越大，其对应的升压后的扫描起始信号STV2被延时的时间越短。
优选地，升压后的扫描起始信号STV2被延时的最短时间为升压后的扫描起始信号STV2的高电平持续时间T的二分之一。
第一预设值对应的升压后的扫描起始信号STV2被延时的时间为D1，其中，D1＝T/2。第二预设值对应的升压后的扫描起始信号STV2被延时的时间为D2，其中，D2＝T。第三预设值对应的升压后的扫描起始信号STV2被延时的时间为D3，其中，D3＝3T/2。第四预设值对应的升压后的扫描起始信号STV2被延时的时间为D4，其中，D4＝2T。也就是说，升压后的扫描起始信号STV2被延时的时间按照最小预设值到最大预设值的顺序依次递增升压后的扫描起始信号STV2的高电平持续时间T的二分之一。
在步骤S434中，输出升压后的扫描起始信号以及产生的时钟信号。具体地，利用电位移转器720的输出模块725将升压后的扫描起始信号STV2以及产生的四个时钟信号CKV1、CKV2、CKV3、CKV4输出。
在步骤S440中，根据升压后的扫描起始信号以及产生的时钟信号对栅极线进行扫描驱动。具体地，利用栅极驱动器400根据升压后的扫描起始信号STV2以及产生的四个时钟信号CKV1、CKV2、CKV3、CKV4对栅极线G1至Gm进行逐行扫描驱动。具体的驱动方法请参照图1下面关于栅极驱动器400 的描述。
根据本发明的实施例，可以减少时序控制器和电位移转器所需要的引脚，使时序控制器和电位移转器的封装型号(Package)变小，从而减小封装成本。此外，由于时序控制器和电位移转器的引脚减少，二者之间的走线会减少，这样可以使组件后的印刷电路板的尺寸减小，从而降低组件后的印刷电路板的成本。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (10)

  1. 一种液晶显示器的驱动系统，其中，包括：
    时序控制器，用于产生扫描起始信号；
    电位转移器，用于对产生的扫描起始信号进行升压操作，并根据升压后的扫描起始信号产生至少一个时钟信号；
    栅极驱动器，用于根据升压后的扫描起始信号以及产生的时钟信号对栅极线进行扫描驱动。
  2. 根据权利要求1所述的驱动系统，其中，所述电位转移器还用于存储至少一个预设值，并根据存储的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号。
  3. 根据权利要求2所述的驱动系统，其中，所述电位转移器还用于当其侦测到升压后的扫描起始信号的上升沿时，根据存储的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号。
  4. 根据权利要求3所述的驱动系统，其中，所述电位转移器包括：
    升压模块，用于对产生的扫描起始信号进行升压操作；
    存储模块，用于存储至少一个预设值；
    侦测模块，用于侦测升压后的扫描起始信号的上升沿；
    延时模块，用于当侦测模块侦测到升压后的扫描起始信号的上升沿时，从存储模块获取预设值，并根据获取的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号；
    输出模块，用于输出升压后的扫描起始信号以及产生的时钟信号。
  5. 根据权利要求4所述的驱动系统，其中，当所述存储模块存储至少两个预设值时，所述延时模块按照从最小预设值到最大预设值的顺序依次从存储 模块获取预设值，并根据获取的每个预设值对升压后的扫描起始信号进行延时操作，以产生与每个预设值对应的时钟信号。
  6. 根据权利要求5所述的驱动系统，其中，对升压后的扫描起始信号进行延时的时间按照从最小预设值到最大预设值的顺序依次变长。
  7. 根据权利要求1所述的驱动系统，其中，所述时序控制器和所述电位转移器组装于组件后的印刷电路板上，
    所述电位转移器包括：IIC协议模块，用于与所述组件后的印刷电路板上的连接器进行通讯。
  8. 一种液晶显示器的驱动方法，其中，包括：
    产生扫描起始信号；
    对产生的扫描起始信号进行升压操作；
    根据升压后的扫描起始信号产生时钟信号；
    根据升压后的扫描起始信号以及产生的时钟信号对栅极线进行扫描驱动。
  9. 根据权利要求8所述的驱动方法，其中，根据升压后的扫描起始信号产生时钟信号的方法包括：
    侦测升压后的扫描起始信号的上升沿；
    当侦测到升压后的扫描起始信号的上升沿时，获取存储的预设值；
    根据获取的预设值对升压后的扫描起始信号进行延时操作，以产生时钟信号；
    输出升压后的扫描起始信号以及产生的时钟信号。
  10. 根据权利要求9所述的驱动方法，其中，当存储至少两个预设值时，按照从最小预设值到最大预设值的顺序依次获取预设值，并根据获取的每个预设值对升压后的扫描起始信号进行延时操作，以产生与每个预设值对应的时钟信号；
    其中，对升压后的扫描起始信号进行延时的时间按照从最小预设值到最大预设值的顺序依次变长。
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