WO2017156890A1 - 一种发光二极管、发光装置及显示装置 - Google Patents

一种发光二极管、发光装置及显示装置 Download PDF

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Publication number
WO2017156890A1
WO2017156890A1 PCT/CN2016/084712 CN2016084712W WO2017156890A1 WO 2017156890 A1 WO2017156890 A1 WO 2017156890A1 CN 2016084712 W CN2016084712 W CN 2016084712W WO 2017156890 A1 WO2017156890 A1 WO 2017156890A1
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Prior art keywords
light emitting
emitting diode
electrode pad
light
substrate
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PCT/CN2016/084712
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English (en)
French (fr)
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王涛
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京东方科技集团股份有限公司
京东方光科技有限公司
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Priority to US15/518,877 priority Critical patent/US10763413B2/en
Publication of WO2017156890A1 publication Critical patent/WO2017156890A1/zh

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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/642Heat extraction or cooling elements characterized by the shape

Definitions

  • the present application relates to the field of display technologies, and in particular, to a light emitting diode, a light emitting device, and a display device.
  • LEDs Light-Emitting Diodes
  • SMT Surface Mount Technology
  • the LED package is connected to the substrate through the pad, and the problem that the pad is detached due to the unstable combination of the LED and the substrate is apt to occur.
  • the pad area of the LED is increased, and the manufacturing process of the SMT is strictly controlled.
  • the manufacturing process of the pad is complicated, and increasing the area of the pad increases the manufacturing cost of the LED, and once the manufacturing process of the SMT has a problem, the writing will be unstable and affect the performance of the LED.
  • the present application attempts to solve the technical problem of how to improve the stability of the combination of the light emitting diode and the substrate and reduce the manufacturing cost.
  • a light emitting device comprising: a light emitting diode and a substrate; wherein the substrate is coated with a bonding substrate; the light emitting diode is provided with a positive electrode pad and a negative electrode pad; The surface of the positive electrode pad and/or the negative electrode pad is provided with a plurality of protrusions embedded in the bonding substrate; the positive electrode pad and the negative electrode pad are fixed to the substrate through the bonding substrate.
  • the positive pad and/or the negative pad are located on a bottom surface of the light emitting diode.
  • the positive pad and/or negative pad are located on a side of the light emitting diode.
  • the positive and negative electrode pads extend from a side of the light emitting diode to a bottom surface of the light emitting diode.
  • the substrate is provided with a recess in which the light emitting diode is located.
  • the protrusion has a cross-sectional shape that is rectangular, triangular, or wavy.
  • the bonding matrix is solder
  • the protrusions extend in a direction perpendicular to the plane of the pad.
  • the protrusions are formed on the surface of the pad by die casting, 3D printing, wire drawing or spraying.
  • the light emitting diode and the substrate coated with the bonding substrate are fixedly joined by heat bonding after bonding.
  • the area of the positive electrode pad is smaller than the area of the negative electrode pad.
  • a display device including the above-described light emitting device is proposed.
  • a light emitting diode is provided, the light emitting diode being provided with a positive electrode pad and a negative electrode pad; and a surface of the positive electrode pad and/or the negative electrode pad is provided with a plurality of protrusions.
  • the various embodiments provided by the present application avoid the increase of the pad area by providing a plurality of protrusions on the pads of the light emitting diodes, and increase the contact area between the pads and the solders under the premise of a certain pad area, thereby improving the contact area of the pads and the solders.
  • the stability of the combination of the LED and the substrate reduces the manufacturing cost.
  • the protrusions provided on the pads on the light-emitting diodes are more favorable for heat dissipation and prolong the service life of the light-emitting diodes.
  • FIG. 1 is a schematic structural view of a light emitting device according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a light emitting device according to another embodiment of the present application.
  • 4a, 4b, and 4c are schematic diagrams showing the structure of a light-emitting device according to still another embodiment of the present application.
  • FIG. 1 is a schematic view showing the structure of a light-emitting device of one embodiment of the present application.
  • the light-emitting device of this embodiment includes: a light-emitting diode 1 and a substrate 2; wherein the substrate 2 is coated with a bonding substrate 3; the light-emitting diode 1 is provided with a positive electrode pad 11 and a negative electrode pad 12; 11 and the surface of the negative electrode pad 12 are provided with a plurality of protrusions which are embedded in the bonding substrate 3; the positive electrode pad 11 and the negative electrode pad 12 are fixed to the substrate 2 by the bonding substrate 3.
  • the contact area of the pad and the solder can be increased only by providing protrusions on the positive electrode pad 11 or only on the surface of the negative electrode pad 12.
  • the surfaces of the positive electrode pad 11 and the negative electrode pad 12 are provided with protrusions to improve the stability of the combination of the light emitting diode and the substrate.
  • the contact area between the pads and the solder is increased under the premise that the pad area is constant, and the stability of the combination of the light-emitting diodes and the substrate is improved.
  • a large-area pad is used, which reduces the manufacturing cost.
  • the protrusions provided on the pads on the light-emitting diodes are more favorable for heat dissipation and prolong the service life of the light-emitting diodes.
  • the positive electrode pad 11 and the negative electrode pad 12 shown in FIG. 1 are located on the bottom surface of the light emitting diode 1.
  • the area of the positive electrode pad 11 is smaller than the area of the negative electrode pad 12. It should be noted that, in practical applications, the positive electrode pad 11 and/or the negative electrode pad 12 may be disposed on the side of the light emitting diode as needed.
  • FIG. 2 is a schematic cross-sectional view of the protrusion.
  • the cross-sectional shape of the protrusion on the surface of the positive electrode pad is rectangular (FIG. 2a), triangular (FIG. 2b) or wavy (FIG. 2c). It will of course be understood that the invention is not limited thereto, and the cross-sectional shape may be other irregular shapes.
  • the protrusions are preferably micro-protrusions having a size in the range of several micrometers to several tens of micrometers in width and height.
  • the width direction is a direction parallel to the pad surface
  • the height direction is a direction perpendicular to the pad surface.
  • the bonding substrate 3 is solder, which may be tin-lead alloy solder, tantalum solder, cadmium solder, silver solder or copper solder.
  • solder as a combination of light emitting diode and substrate The matrix enhances the stability of the bonding of the light emitting diode to the substrate.
  • the extending direction of the protrusion is set to be perpendicular to the plane of the pad, thereby further improving the stability of the combination of the LED and the substrate, and avoiding an increase in manufacturing cost caused by increasing the pad area.
  • the protrusion is formed on the surface of the pad by die casting, 3D printing, drawing or spraying; the substrate of the LED and the substrate coated with the bonding substrate are fixedly connected by heat bonding after bonding. This embodiment does not limit this.
  • FIG. 3 is a schematic structural view of a light emitting device according to another embodiment of the present application.
  • the embodiment shown in FIG. 3 is basically the same as the embodiment shown in FIG. 1.
  • the main difference between the two is that the substrate 2 is provided with a recess, and the light-emitting diode 1 is located in the recess.
  • a portion of the light emitting diode 1 is located within the recess and another portion protrudes beyond the recess.
  • FIG. 4a is a schematic structural view of a light emitting device according to still another embodiment of the present application.
  • the embodiment shown in FIG. 4a is substantially the same as the embodiment shown in FIG. 1.
  • the main difference between the two is that the positive electrode pad 11 and the negative electrode pad 12 of the embodiment shown in FIG. 4a are located on the bottom surface of the light-emitting diode 1 and
  • the substrate 2 is provided with a recess, and the light emitting diode 1 is located in the recess.
  • the light emitting diode is fully embedded in the recess.
  • the positive electrode pad 11 and the negative electrode pad 12 may also be provided only on the side of the light emitting diode (as shown in Fig. 4b).
  • the positive electrode pad 11 may be disposed on the side of the light emitting diode, and the negative electrode pad 12 may be disposed on the bottom surface of the light emitting diode (as shown in Fig. 4c).
  • the present application also provides a display device including the above-described light emitting device.
  • the display device provided in this embodiment may be any product having a display function such as a notebook computer display screen, an outdoor large screen, a television, a digital camera, a mobile phone, a tablet computer, and the like.
  • the light-emitting diode can be used as an indicator light of the display device, or can be used as a backlight of the display device.
  • the protrusions provided on the pads on the light-emitting diodes are more favorable for heat dissipation and prolong the service life of the light-emitting diodes.
  • the backlight of the display device requires a plurality of light emitting diodes, which reduces the manufacturing cost of the single light emitting diode, and can reduce the overall manufacturing cost of the display device.
  • the light-emitting device and the display device provided by the present invention increase the contact area between the pad and the solder by providing a protrusion structure on the pad of the light-emitting diode, thereby improving the stability of bonding the light-emitting diode to the substrate and reducing the manufacturing cost.
  • the pads on the LED The protrusions provided on the upper surface are more favorable for heat dissipation and prolong the service life of the light emitting diode.

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Abstract

提供一种发光二极管、发光装置及显示装置。该发光装置包括:发光二极管(1)和基板(2);所述基板(2)上涂覆有结合基质(3);所述发光二极管(1)设有正极焊盘(11)和负极焊盘(12);所述正极焊盘(11)和/或负极焊盘(12)的表面设有突起,所述突起嵌入所述结合基质(3)中;所述正极焊盘(11)和负极焊盘(12)通过所述结合基质(3)与所述基板(2)固接。提供的发光装置及显示装置,通过在发光二极管的焊盘上设置突起,避免了增大焊盘面积,在焊盘面积一定的前提下增大了焊盘与焊锡的接触面积,提升了发光二极管与基板结合的稳定性,降低了制作成本。

Description

一种发光二极管、发光装置及显示装置
相关申请的交叉引用
本申请要求在先中国专利申请No.201620193964.7的优先权,在此通过引用将该中国专利申请的全部内容并入本文。
技术领域
本申请涉及显示技术领域,特别涉及一种发光二极管、发光装置及显示装置。
背景技术
发光二极管(Light-Emitting Diodes,LED)是半导体二极管的一种,其广泛应用于LED显示屏、液晶屏背光源、照明光源和交通信号灯等领域。
表面贴装技术(Surface Mount Technology,SMT)是将传统的电子元器件压缩成为体积只有几十分之一的器件,并且直接将表面贴装元器件贴、焊到印制板表面规定位置上的装联技术。
现有技术中LED封装通过焊盘与基板连接,容易出现因LED与基板结合不稳定导致焊盘脱落的问题。现有技术中为了提升打件的稳定性,增大LED的焊盘面积,并严格管控SMT的制作工艺。然而,焊盘的制作工艺复杂,增大焊盘的面积会增大LED的制作成本,并且一旦SMT的制作工艺过程出现问题,将会导致打件不稳定,影响LED的性能。
发明内容
本申请试图解决如何提升发光二极管与基板结合的稳定性并且降低制作成本的技术问题。
为此目的,本申请一方面提出了一种发光装置,该发光装置包括:发光二极管和基板;其中所述基板上涂覆有结合基质;所述发光二极管设有正极焊盘和负极焊盘;所述正极焊盘和/或负极焊盘的表面设有多个突起,所述突起嵌入所述结合基质中;所述正极焊盘和负极焊盘通过所述结合基质与所述基板固接。
在一些实施例中,所述正极焊盘和/或负极焊盘位于所述发光二极管的底面。
在一些实施例中,所述正极焊盘和/或负极焊盘位于所述发光二极管的侧面。
在一些实施例中,所述正极焊盘和/或负极焊盘从所述发光二极管的侧面延伸到所述发光二极管的底面。
在一些实施例中,所述基板设有凹槽,所述发光二极管位于所述凹槽内。
在一些实施例中,所述突起的截面形状为矩形、三角形或波浪形。
在一些实施例中,所述结合基质为焊锡。
在一些实施例中,所述突起的延伸方向垂直于焊盘所在平面。
在一些实施例中,所述突起是采用压铸、3D打印、拉丝或喷涂形成于焊盘表面的。
在一些实施例中,所述发光二极管与涂覆结合基质的基板是通过对合后热烘的方式固定连接的。
在一些实施例中,所述正极焊盘的面积小于所述负极焊盘的面积。
根据本申请的另一方面,提出了一种显示装置,其包括上述发光装置。
根据本申请的另一方面,提出了一种发光二极管,所述发光二极管设有正极焊盘和负极焊盘;所述正极焊盘和/或负极焊盘的表面设有多个突起。
本申请提供的各种实施例通过在发光二极管的焊盘上设置多个突起,避免了增大焊盘面积,在焊盘面积一定的前提下增大了焊盘与焊锡的接触面积,提升了发光二极管与基板结合的稳定性,降低了制作成本。同时,在发光二极管上的焊盘上设置的突起更有利于散热,延长了发光二极管的使用寿命。
附图说明
通过参考附图会更加清楚的理解本申请的特征和优点,附图是示意性的而不应理解为对本申请进行任何限制,在附图中:
图1示出了本申请的一个实施例的发光装置的结构示意图;
图2a、图2b、图2c示出了本申请的突起的截面示意图;
图3示出了本申请的另一实施例的发光装置的结构示意图;
图4a、图4b、图4c示出了本申请的又一实施例的发光装置的结构示意图。
具体实施方式
下面将结合附图对本申请的实施例进行详细描述。
图1示出了本申请的一个实施例的发光装置的结构示意图。如图1所示,该实施例的发光装置包括:发光二极管1和基板2;其中基板2上涂覆有结合基质3;发光二极管1设有正极焊盘11和负极焊盘12;正极焊盘11和负极焊盘12的表面设有多个突起,所述突起嵌入结合基质3中;正极焊盘11和负极焊盘12通过结合基质3与基板2固接。
在实际应用中,仅在正极焊盘11或仅在负极焊盘12的表面设有突起的方式能增大焊盘与焊锡的接触面积。为了进一步增大焊盘与焊锡的接触面积,通常正极焊盘11和负极焊盘12的表面均设有突起,以提升发光二极管与基板结合的稳定性。
本实施例的发光装置,通过在发光二极管的焊盘上设置突起,在焊盘面积一定的前提下增大了焊盘与焊锡的接触面积,提升了发光二极管与基板结合的稳定性,不需要为了提升发光二极管与基板结合的稳定性而采用大面积的焊盘,降低了制作成本。同时,在发光二极管上的焊盘上设置的突起更有利于散热,延长了发光二极管的使用寿命。
图1中所示的正极焊盘11和负极焊盘12位于发光二极管1的底面。正极焊盘11的面积小于负极焊盘12的面积。需要说明的是,在实际应用中,可根据需要将正极焊盘11和/或负极焊盘12设置在发光二极管的侧面。
图2为突起的截面示意图,如图2所示,正极焊盘表面上的突起的截面形状为矩形(图2a)、三角形(图2b)或波浪形(图2c)。当然可以理解,本发明不仅限于此,截面形状还可以是其他不规则形状。该突起优选是微突起,在宽度和高度方面具有在几微米到几十微米的范围内的尺寸。其宽度方向为与焊盘表面平行的方向,而高度方向为与焊盘表面垂直的方向。
优选地,结合基质3为焊锡,可以为锡铅合金焊锡、加锑焊锡、加镉焊锡、加银焊锡或加铜焊锡。以焊锡作为发光二极管与基板的结合 基质可提升发光二极管与基板结合的稳定性。
为了进一步增大焊盘与焊锡的接触面积,将突起的延伸方向设置为垂直于焊盘所在平面,进一步提升发光二极管与基板结合的稳定性,避免了增大焊盘面积导致的制作成本的增高。
在实际应用中,该突起是采用压铸、3D打印、拉丝或喷涂形成于焊盘表面的;发光二极管与涂覆结合基质的基板是通过对合后热烘的方式来固定连接的。本实施例对此不做限制。
图3示出了本申请的另一实施例的发光装置的结构示意图。如图3所示的实施例与图1所示的实施例基本相同,两者的主要区别在于,基板2设有凹槽,发光二极管1位于所述凹槽内。可选地,该发光二极管1的一部分位于凹槽内,而另一部分突出于凹槽外。
图4a示出了本申请的又一实施例的发光装置的结构示意图。如图4a所示的实施例与图1所示的实施例基本相同,两者的主要区别在于:图4a所示的实施例的正极焊盘11和负极焊盘12位于发光二极管1的底面和侧面;基板2设有凹槽,发光二极管1位于所述凹槽内。而可选的是,该发光二极管被完全嵌入到所述凹槽内。
作为该实施例的一种变形,也可仅在发光二极管的侧面设置正极焊盘11和负极焊盘12(如图4b所示)。
作为该实施例的另一种变形,可在发光二极管的侧面设置正极焊盘11,在发光二极管的底面设置负极焊盘12(如图4c所示)。
本申请还提供了一种显示装置,包括上述发光装置。本实施例提供的显示装置可以是笔记本电脑显示屏、户外大屏幕、电视、数码相机、手机、平板电脑等任何具有显示功能的产品。其中,发光二极管可以作为显示装置的指示灯使用,也可以作为显示装置的背光源使用。通过在发光二极管的焊盘上设置突起结构,增大了焊盘与焊锡的接触面积,提升了发光二极管与基板结合的稳定性。同时,在发光二极管上的焊盘上设置的突起更有利于散热,延长了发光二极管的使用寿命。显示装置的背光源需要多个发光二极管,降低单个发光二极管的制作成本,可降低显示装置的整体制作成本。
本申请提供的发光装置及显示装置,通过在发光二极管的焊盘上设置突起结构,增大了焊盘与焊锡的接触面积,提升了发光二极管与基板结合的稳定性,降低了制作成本。同时,在发光二极管上的焊盘 上设置的突起更有利于散热,延长了发光二极管的使用寿命。
虽然结合附图描述了本申请的实施方式,但是本领域技术人员可以在不脱离本申请的精神和范围的情况下做出各种修改和变型,这样的修改和变型均落入由所附权利要求所限定的范围之内。在本申请的描述中,需要理解的是,术语“上”、“下”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。措词‘包括’并不排除在权利要求未列出的元件或步骤的存在。元件前面的措词‘一’或‘一个’并不排除多个这样的元件的存在。在相互不同从属权利要求中记载某些措施的简单事实不表明这些措施的组合不能被用于改进。在权利要求中的任何参考符号不应当被解释为限制范围。

Claims (18)

  1. 一种发光装置,包括:发光二极管和基板;
    所述基板上涂覆有结合基质;
    所述发光二极管设有正极焊盘和负极焊盘;
    所述正极焊盘和/或负极焊盘的表面设有多个突起,所述突起嵌入所述结合基质中;
    所述正极焊盘和负极焊盘通过所述结合基质与所述基板固接。
  2. 根据权利要求1所述的发光装置,其中,所述正极焊盘和/或负极焊盘位于所述发光二极管的底面。
  3. 根据权利要求1所述的发光装置,其中,所述正极焊盘和/或负极焊盘位于所述发光二极管的侧面。
  4. 根据权利要求3所述的发光装置,其中,所述正极焊盘和/或负极焊盘从所述发光二极管的侧面延伸到所述发光二极管的底面。
  5. 根据权利要求2或3所述的发光装置,其中,所述基板设有凹槽,所述发光二极管位于所述凹槽内。
  6. 根据权利要求1所述的发光装置,其中,所述突起的截面形状为矩形、三角形或波浪形。
  7. 根据权利要求1所述的发光装置,其中,所述结合基质为焊锡。
  8. 根据权利要求1所述的发光装置,其中,每个所述突起的延伸方向垂直于焊盘所在平面。
  9. 根据权利要求1所述的发光装置,其中,所述突起是采用压铸、3D打印、拉丝或喷涂的方式形成于焊盘的表面上。
  10. 根据权利要求1所述的发光装置,其中,所述发光二极管与涂覆结合基质的基板是通过对合后热烘的方式固定连接的。
  11. 根据权利要求1所述的发光装置,其中,所述正极焊盘的面积小于所述负极焊盘的面积。
  12. 一种显示装置,其中,包括权利要求1-11任一项所述的发光装置。
  13. 一种发光二极管,所述发光二极管设有正极焊盘和负极焊盘;
    所述正极焊盘和/或负极焊盘的表面设有多个突起。
  14. 根据权利要求13所述的发光二极管,其中,所述正极焊盘和/ 或负极焊盘位于所述发光二极管的底面。
  15. 根据权利要求13所述的发光二极管,其中,所述正极焊盘和/或负极焊盘位于所述发光二极管的侧面。
  16. 根据权利要求13所述的发光二极管,其中,所述正极焊盘和/或负极焊盘从所述发光二极管的侧面延伸到所述发光二极管的底面。
  17. 根据权利要求13所述的发光二极管,其中,所述突起的截面形状为矩形、三角形或波浪形。
  18. 根据权利要求13所述的发光二极管,其中每个所述突起的延伸方向垂直于焊盘所在平面。
PCT/CN2016/084712 2016-03-14 2016-06-03 一种发光二极管、发光装置及显示装置 WO2017156890A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220208828A1 (en) * 2020-12-30 2022-06-30 Applied Materials, Inc. Methods for integration of light emitting diodes and image sensors

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10734348B2 (en) * 2018-09-21 2020-08-04 Taiwan Semiconductor Manufacturing Company, Ltd. Bonded semiconductor devices and methods of forming the same
US11600218B2 (en) * 2019-02-26 2023-03-07 Kyocera Corporation Light emitter board, display device, and method for repairing display device
CN110867462A (zh) * 2019-10-30 2020-03-06 深圳市华星光电半导体显示技术有限公司 一种显示面板及显示装置
CN115714157A (zh) * 2019-12-03 2023-02-24 深圳市聚飞光电股份有限公司 倒装led芯片、线路板以及电子设备
CN113823724B (zh) * 2020-06-19 2023-06-16 成都辰显光电有限公司 微发光二极管器件及显示面板
CN112968030B (zh) * 2020-12-30 2022-09-23 重庆康佳光电技术研究院有限公司 显示面板与其制作方法
CN116435445A (zh) * 2023-06-13 2023-07-14 山西中科潞安紫外光电科技有限公司 具有高推力值的发光二极管芯片及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080054290A1 (en) * 2006-09-05 2008-03-06 Epistar Corporation Light emitting device and the manufacture method thereof
CN101359704A (zh) * 2007-07-30 2009-02-04 晶元光电股份有限公司 发光元件及其制造方法
CN101877383A (zh) * 2006-09-15 2010-11-03 晶元光电股份有限公司 发光装置
KR20130077059A (ko) * 2011-12-29 2013-07-09 하나 마이크론(주) Led 패키지 및 그 제조방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100631898B1 (ko) * 2005-01-19 2006-10-11 삼성전기주식회사 Esd보호 능력을 갖는 질화갈륨계 발광 소자 및 그 제조방법
KR101422452B1 (ko) * 2009-12-21 2014-07-22 가부시끼가이샤 도시바 질화물 반도체 발광 소자 및 그 제조 방법
KR100999736B1 (ko) * 2010-02-17 2010-12-08 엘지이노텍 주식회사 발광 소자, 발광 소자 제조방법 및 라이트 유닛
KR101401764B1 (ko) * 2010-05-12 2014-05-30 도요타지도샤가부시키가이샤 반도체 장치
JP2013197456A (ja) * 2012-03-22 2013-09-30 Stanley Electric Co Ltd Ledアレイ及び車両用灯具
TW201340428A (zh) * 2012-03-29 2013-10-01 Foxsemicon Integrated Tech Inc 發光二極體及其製造方法
US8985794B1 (en) * 2012-04-17 2015-03-24 Soraa, Inc. Providing remote blue phosphors in an LED lamp
US9673364B2 (en) * 2013-07-19 2017-06-06 Nichia Corporation Light emitting device and method of manufacturing the same
US20150034996A1 (en) * 2013-08-01 2015-02-05 Epistar Corporation Light-emitting device
CN103996655B (zh) * 2014-03-07 2017-02-08 京东方科技集团股份有限公司 一种阵列基板及其制备方法,显示面板、显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080054290A1 (en) * 2006-09-05 2008-03-06 Epistar Corporation Light emitting device and the manufacture method thereof
CN101877383A (zh) * 2006-09-15 2010-11-03 晶元光电股份有限公司 发光装置
CN101359704A (zh) * 2007-07-30 2009-02-04 晶元光电股份有限公司 发光元件及其制造方法
KR20130077059A (ko) * 2011-12-29 2013-07-09 하나 마이크론(주) Led 패키지 및 그 제조방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220208828A1 (en) * 2020-12-30 2022-06-30 Applied Materials, Inc. Methods for integration of light emitting diodes and image sensors
US11715753B2 (en) * 2020-12-30 2023-08-01 Applied Materials, Inc. Methods for integration of light emitting diodes and image sensors

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