WO2017152487A1 - 显示面板及其驱动电路 - Google Patents

显示面板及其驱动电路 Download PDF

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Publication number
WO2017152487A1
WO2017152487A1 PCT/CN2016/081779 CN2016081779W WO2017152487A1 WO 2017152487 A1 WO2017152487 A1 WO 2017152487A1 CN 2016081779 W CN2016081779 W CN 2016081779W WO 2017152487 A1 WO2017152487 A1 WO 2017152487A1
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Prior art keywords
sub
data signal
pixel
pixels
display
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PCT/CN2016/081779
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English (en)
French (fr)
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左清成
谭小平
黄俊宏
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to KR1020187027911A priority Critical patent/KR20180117666A/ko
Priority to JP2018547308A priority patent/JP2019509520A/ja
Priority to US15/112,137 priority patent/US10467977B2/en
Publication of WO2017152487A1 publication Critical patent/WO2017152487A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate

Definitions

  • the present invention generally relates to the field of display technology and, more particularly, to a drive circuit for a display panel.
  • LCDs liquid crystal displays
  • the existing multi-way selection switch (MUX) drive architecture is 1:2 MUX (2:4 MUX) or 1:3 MUX (2:6 MUX) mode.
  • MUX multi-way selection switch
  • . 1 shows a structure of a corresponding driving circuit of a plurality of sub-pixels of different color components included in a row of pixel units in a conventional liquid crystal display.
  • the driving structure employed is a 1:3 MUX mode, in a liquid crystal display.
  • a row of pixel units is represented by S(1) to S(2N), and each pixel unit includes sub-pixels of three color components, for example, a sub-pixel (R) of a red component, a sub-pixel (G) of a green component,
  • the sub-pixel (B) of the blue component, GATE(N) is a driving signal line, and provides a display driving signal for each sub-pixel of one row of pixel units
  • MUX_R, MUX_G, and MUX_B are data signal lines, respectively, sub-pixels of a red component.
  • R a green component sub-pixel (G), and a blue component sub-pixel (B) provide a display data signal.
  • the operation process of the existing liquid crystal display is: when the level of the GATE (N) driving signal line changes from low to high, the voltage is supplied to the gates of the MOS transistors connected to the GATE (N), and accordingly, each The MOS transistor is turned on, and after the predetermined time T1 elapses, the level of the data signal line MUX_R is pulled high. At this time, the thin film transistor (TFT) connected to the sub-pixel (R) of all the red components in one row of pixel units is turned on. (ie, T01, T04, T07, and T10 are simultaneously turned on in FIG.
  • TFT thin film transistor
  • the level of the data signal line MUX_R is pulled low, and after the predetermined time T2 elapses, the data signal line MUX_G is taken. The level is pulled high.
  • the thin film transistor (TFT) connected to the sub-pixel (G) of all the green components in one row of pixel units is turned on (that is, T02, T05, T08, and T11 in FIG. 1 are simultaneously turned on). ), charging of the sub-pixel (G) of all the green components corresponding to the row corresponding to GATE (N) is started.
  • the level of the data signal line MUX_G is pulled low, and after the predetermined time T3 elapses, the level of the data signal line MUX_B is set. Pulling up, at this time, the thin film transistor (TFT) connected to the sub-pixel (B) of all the blue components in one row of pixel units is turned on (ie, T03, T06, T09, T12 in FIG. 1 are simultaneously turned on), The sub-pixel (B) of all blue components corresponding to the row corresponding to GATE (N) is charged.
  • TFT thin film transistor
  • the level of the data signal line MUX_B is pulled low, and after a predetermined time T4 elapses, the driving signal line GATE (N) is driven. The level is pulled low to complete the charging of a line period signal. The above steps can be repeated after this to complete charging of the entire liquid crystal display.
  • FIG. 2 shows driving timing charts of the driving signal line GATE(N), the data signal lines MUX_R, MUX_G, and MUX_B in FIG.
  • MUX_R, MUX_G, and MUX_B sequentially charge sub-pixels of corresponding color components.
  • FIG. 3 is a view showing an actual signal waveform of a driving circuit of the liquid crystal display of FIG. 1.
  • the liquid crystal display module instantaneously drives the integrated circuit of the liquid crystal display (drive IC) Forming a large load, which results in the output of the driver IC, ie, the actual input control signal of the MOS transistor array (GOA) (for example, the actual input control signal can be CK (clock signal), STV (one frame Start signal), RESET (reset signal), etc.)
  • the actual input control signal can be CK (clock signal), STV (one frame Start signal), RESET (reset signal), etc.
  • a glitch occurs (as shown in Figure 3).
  • An exemplary embodiment of the present invention provides a driving circuit for a display panel to solve an actual input control signal of a GOA when a data signal line in an existing display panel charges a sub-pixel of each color component.
  • a driving circuit for a display panel including an array of pixel cells composed of a plurality of pixel units arranged in an array, each pixel unit being composed of a different color component
  • the sub-pixel composition is characterized in that, for a plurality of sub-pixels of different color components included in one row or one column of pixel units in the display panel, the driving circuit comprises: at least one driving signal line, the at least one driving The signal line is connected to the display driving signal transmitting unit, and the display driving signal generated by the display driving signal transmitting unit is supplied to the sub-pixels of the plurality of different color components via the at least one driving signal line; the plurality of data signal lines, The plurality of data signal lines are connected to the display data providing unit, and the display data signals provided by the display data providing unit are transmitted to the sub-pixels of the plurality of different color components via the plurality of data signal lines, wherein Sub-pixels of one color component of sub-pixels of different color
  • the sub-pixel of one of the plurality of sub-pixels of different color components may be divided into at least two parts, wherein the data signal of the display data signal is transmitted for the sub-pixel of the one color component
  • the number of lines may be the same as the number of divided portions of the sub-pixels of the one color component, and one data signal line may transmit a display data signal for a corresponding portion of the sub-pixels.
  • the at least two data signal lines may start to transmit display data signals to the sub-pixels of the respective corresponding portions at predetermined time intervals.
  • each of the at least two data signal lines being a sub-pixel charging period of a sub-pixel transmission display data signal corresponding to a corresponding portion.
  • the instantaneous pumping degree of the display panel MUX is turned on, thereby effectively overcoming the signal glitch caused by the instantaneous loading of the display panel input signal, thereby improving the quality of the input signal and improving The display quality of the screen.
  • FIG. 1 shows the structure of a corresponding driving circuit of a plurality of sub-pixels of different color components included in a row of pixel units in a conventional liquid crystal display
  • FIG. 2 shows driving timing charts of the driving signal line GATE(N), the data signal lines MUX_R, MUX_G, and MUX_B in FIG. 1;
  • FIG. 3 is a view showing an actual signal waveform of a driving circuit of the liquid crystal display of FIG. 1;
  • FIG. 4 illustrates a structural diagram of a driving circuit for a display panel according to an exemplary embodiment of the present invention
  • FIG. 5 illustrates driving timings of the driving signal lines GATE(N), data signal lines MUXR, MUXR(N), MUXG, MUXG(N), MUXB, MUXB(N) in FIG. 4 according to an exemplary embodiment of the present invention.
  • FIG. 6 illustrates actual signal waveform diagrams of the driving circuit for the display panel of FIG. 4, according to an exemplary embodiment of the present invention.
  • a driving circuit for a display panel is provided in an exemplary embodiment of the present invention, where the display panel includes a pixel unit array composed of a plurality of pixel units arranged in an array, each pixel unit being composed of a different color component Subpixel composition.
  • the driving circuit includes: at least one driving signal line, and the at least one driving signal line is connected to the display driving signal sending unit, for the sub-pixels of the plurality of different color components included in one row or one column of the pixel unit in the display panel, Providing, by the at least one driving signal line, a display driving signal generated by the display driving signal transmitting unit to the plurality of sub-pixels of different color components, a plurality of data signal lines, the plurality of data signal lines and the display data providing unit Connecting, transmitting, by the plurality of data signal lines, a display data signal provided by the display data providing unit to the sub-pixels of the plurality of different color components, wherein one of the sub-pixels for the plurality of different color components a sub-pixel of a color component, at least two of the plurality of data signal lines transmitting a display data signal for the sub-pixel of the one color component, the at least two data signal lines starting from different time points A display data signal is transmitted for the sub-pixels of the one color component.
  • the data signal lines can be effectively reduced into sub-components of the respective color components.
  • a sub-pixel including three color components per pixel unit ie, a sub-pixel (R) of a red component, a sub-pixel (G) of a green component, and a sub-pixel (B) of a blue component
  • a sub-pixel (R) of a red component ie, a sub-pixel (R) of a red component
  • a sub-pixel (G) of a green component ie, a sub-pixel (G) of a green component
  • B sub-pixel
  • FIG. 4 illustrates a structural diagram of a driving circuit for a display panel according to an exemplary embodiment of the present invention.
  • the driving structure employed is a 1:3 MUX mode, and one row of pixel units of the display panel is represented by S(1) to S(2N), and each pixel unit includes sub-pixels of three color components.
  • GATE(N) is a driving signal line, and is provided for each sub-pixel of a row of pixel units.
  • the display driving signals, MUXR, MUXR(N), MUXG, MUXG(N), MUXB, MUXB(N) are data signal lines, wherein MUXR and MUXR(N) are common sub-pixels of all red components in one row of pixel units.
  • the sub-pixel (G) of the green component provides a data signal line, that is, the sub-pixel (G) of all the green components in a row of pixel units is collectively charged by MUXG and MUXG(N), and MUXB and MUXB(N) are one line in common.
  • the sub-pixels (B) of all the blue components in the pixel unit provide data signal lines, that is, by MUXB, MUXB (N)
  • the pixels (B) of all the blue components in a row of pixel units are collectively charged.
  • sub-pixels of one color component of the plurality of different color component sub-pixels may be divided into at least two parts, and one data signal line transmits a display data signal to a corresponding partial sub-pixel, that is, Transmitting, by the sub-pixels of the one color component, the number of data signal lines of the display data signal is the same as the number of the divided sub-pixels of the one color component,
  • the sub-pixel of one color component may be divided into two parts, for example, the sub-pixel (R) of all red components in one row of pixel units is divided into two parts, as shown in FIG. , T01, T07 are a group (hereinafter, referred to as "first group"), T04, T10 are a group (hereinafter, referred to as "second group"), and the data signal line MUXR is a red component sub-pixel (R) T04 and T10 are charged, and the data signal line MUXR(N) is charged with the red sub-pixels (R) T01 and T07.
  • first group a group
  • T04, T10 are a group
  • the data signal line MUXR is a red component sub-pixel (R) T04 and T10 are charged
  • the data signal line MUXR(N) is charged with the red sub-pixels (R) T01 and T07.
  • T02 and T08 are a group (hereinafter, referred to as "third group")
  • T05, T11 is a group (hereinafter, referred to as "fourth group")
  • the data signal line MUXG is a green component sub-pixel (G) T05, T11 is charged
  • the data signal line MUXG(N) is a green component sub-pixel (G) ) T02, T08 for charging.
  • T03 and T09 are a group (hereinafter, referred to as "fifth group"), T06, T12
  • the data signal line MUXB is charged with the sub-pixels (B) T06, T12 of the blue component
  • the data signal line MUXB(N) is the sub-pixel of the blue component ( B) T03 and T09 are charged.
  • T10 is simultaneously turned on), and charging the sub-pixel (R) of the second group of red components corresponding to the row corresponding to GATE(N), that is, equivalent to the second group of red in the row of pixel units through the data signal line MUXR
  • the sub-pixel (R) of the component provides a display data signal.
  • the level of the data signal line MUXR(N) is pulled high, at this time, a thin film transistor (TFT) connected to the sub-pixel (R) of the first group of red components in one row of pixel units Turning on (ie, T01 and T07 are simultaneously turned on in FIG. 4), starting to charge the sub-pixel (R) of the first group of red components corresponding to the row of GATE(N), that is, equivalent to passing the data signal line MUXR (N) providing a display data signal for the sub-pixel (R) of the first group of red components in a row of pixel units.
  • the predetermined time interval ⁇ T may be determined according to the driving capability of the specific driving integrated circuit and the values of the dielectric constant of the constituent materials of the display panel, such as resistance, capacitance, impedance, and display panel.
  • each data signal line is charged with a corresponding partial sub-pixel at a predetermined time interval until all the rows corresponding to GATE(N) are completed.
  • the sub-pixel (R) of the red component is charged.
  • the levels of the data signal lines MUXR, MUXR(N) are pulled low, after a predetermined time ⁇ t elapses. Pulling the level of the data signal line MUXG high, at this time, a thin film transistor (TFT) connected to the sub-pixel (G) of the fourth group of green components in one row of pixel units is turned on (ie, T08 in FIG. 4, T11 is simultaneously turned on), and charging of the sub-pixel (G) of the fourth group of green components corresponding to the row of GATE(N) is started.
  • TFT thin film transistor
  • TFT thin film transistor
  • the sub-pixel (G) of the green component may also be divided into three parts or three. More than one part, correspondingly, the number of corresponding data signal lines can be increased. At this time, each data signal line is charged with a corresponding partial sub-pixel at a predetermined time interval until the completion of the correspondence with GATE(N) The sub-pixels (G) of all the green components of the row are charged.
  • the levels of the data signal lines MUXG, MUXG(N) are pulled low, and after a predetermined time ⁇ t elapses, the data is The level of the signal line MUXB is pulled high.
  • the thin film transistor (TFT) connected to the sub-pixel (B) of the sixth group of blue components in one row of pixel units is turned on (ie, T09 and T12 in FIG. 4 are simultaneously Turning on, charging the sub-pixel (B) of the sixth group of blue components corresponding to the row corresponding to GATE(N).
  • TFT thin film transistor
  • each data signal line is charged with a corresponding partial sub-pixel at a predetermined time interval until the completion of the pair with GATE(N)
  • the sub-pixels (B) of all the blue components of the corresponding row are charged.
  • the structure of the driving circuit shown in FIG. 4 is only an example, and those skilled in the art can adjust the structure of the driving circuit shown in FIG. 4 as needed, for example, the number of driving signal lines can be increased, and two Or more than two driving signal lines to provide display driving signals for a plurality of sub-pixels of different color components included in one row or one column of pixel units in the display panel, or may increase the number of data signal lines, for example, three lines may be used. Or three or more data signal lines transmit a display data signal for sub-pixels of one color component.
  • FIG. 5 illustrates driving timings of the driving signal lines GATE(N), data signal lines MUXR, MUXR(N), MUXG, MUXG(N), MUXB, MUXB(N) in FIG. 4 according to an exemplary embodiment of the present invention.
  • T represents a sub-pixel charging period.
  • T represents a sub-pixel charging period.
  • the start time of the pixel charging period is different by a predetermined time interval.
  • the start time of the period differs by a predetermined time interval
  • the sub-pixel charging period corresponding to the MUXB overlaps with the sub-pixel charging period corresponding to the MUXB(N)
  • the start time of the sub-pixel charging period corresponding to the MUXB and MUXB(N) The difference is a predetermined time interval.
  • the at least two data signal lines for charging the sub-pixels of one color component are charged with the sub-pixels of the corresponding portion with different starting times, which can effectively reduce the instantaneous pumping degree of the input signal on the display panel (change to When pumping).
  • the plurality of data signal lines are sub-pixels of different color components, and there is no overlap between sub-pixel charging periods of the display data signals, that is, the MUXR and MUXR(N) pairs There is no overlap between the sub-pixel charging period, the sub-pixel charging period corresponding to MUXG and MUXG(N), and the sub-pixel charging period corresponding to MUXB and MUXB(N).
  • FIG. 6 illustrates actual signal waveform diagrams of the driving circuit for the display panel of FIG. 4, according to an exemplary embodiment of the present invention.
  • the sub-pixels (R) of all the red components in one row of pixel units share one data signal line MUX_R, and the sub-pixels (G) of all the green components share one data signal line MUX_G.
  • the sub-pixels (B) of all the blue components share one data signal line MUX_B, so that the input signal may be burred.
  • the driving circuit for the display panel using the exemplary embodiment of the present invention is a color. After the sub-pixels of the component are charged, the signal glitch caused by the excessive loading of the display panel input signal is effectively overcome, the quality of the input signal is improved, and the display quality of the picture is improved.

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Abstract

提供用于显示面板的驱动电路，所述驱动电路包括：至少一条驱动信号线GATE(N)，所述至少一条驱动信号线GATE(N)与显示驱动信号发送单元连接，经由所述至少一条驱动信号线GATE(N)将显示驱动信号发送单元产生的显示驱动信号提供给所述多个不同颜色分量的子像素；多条数据信号线MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)，经由所述多条数据信号线MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)将显示数据提供单元提供的显示数据信号传输给所述多个不同颜色分量的子像素，所述多条数据信号线MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)中的至少两条数据信号线为所述一种颜色分量的子像素传输显示数据信号，所述至少两条数据信号线从不同的时间点开始为所述一种颜色分量的子像素传输显示数据信号。上述用于显示面板的驱动电路有效克服了显示面板输入信号因瞬间带载过重造成的信号毛刺。

Description

显示面板及其驱动电路 技术领域
本发明总体说来涉及显示技术领域，更具体地讲，涉及一种用于显示面板的驱动电路。
背景技术
随着液晶显示器(LCD)的不断发展，人们不仅对LCD显示屏幕需求越来越大，对显示的清晰度要求也越来越高，对画面显示品质的追求也越来越严格，因此，如何提高画面的显示品质，改善每一个输入输出信号单元的信号质量，成为一个值得研究和探讨的课题。
目前，现有的液晶显示器的内部结构一般如图1所示的形式，现有的多路选择开关(MUX)驱动架构为1:2MUX(2:4MUX)或1:3MUX(2:6MUX)模式。图1示出现有的液晶显示器中的一行像素单元所包括的多个不同颜色分量的子像素的对应的驱动电路的结构，在图1中，采用的驱动结构为1:3MUX模式，液晶显示器中的一行像素单元用S(1)～S(2N)来表示，每个像素单元包括三种颜色分量的子像素，例如，红色分量的子像素(R)、绿色分量的子像素(G)、蓝色分量的子像素(B)，GATE(N)为驱动信号线，为一行像素单元中的每个子像素提供显示驱动信号，MUX_R、MUX_G、MUX_B为数据信号线，分别为红色分量的子像素(R)、绿色分量的子像素(G)、蓝色分量的子像素(B)提供显示数据信号。
现有的液晶显示器的工作过程为：当GATE(N)驱动信号线的电平由低到高变化时，为与GATE(N)相连接的各MOS管的栅极提供电压，相应地，各MOS管导通，在经过预定时间T1后，将数据信号线MUX_R的电平拉高，此时，与一行像素单元中的全部红色分量的子像素(R)相连的薄膜晶体管(TFT)导通(即，图1中的T01、T04、T07、T10同时导通)，开始对与GATE(N)对应行的全部红色分量的子像素(R)进行充电，即，相当于通过数据信号线MUX_R为一行像素单元中的全部红色分量的子像素(R)提供显示数据信号。
类似地，在对与GATE(N)对应行的全部红色分量的子像素(R)进行充电完成后，将数据信号线MUX_R的电平拉低，在经过预定时间T2后，将数据信号线MUX_G的电平拉高，此时，与一行像素单元中的全部绿色分量的子像素(G)相连的薄膜晶体管(TFT)导通(即，图1中的T02、T05、T08、T11同时导通)，开始对与GATE(N)对应行的全部绿色分量的子像素(G)进行充电。
在对与GATE(N)对应行的全部绿色分量的子像素(G)进行充电完成后，将数据信号线MUX_G的电平拉低，在经过预定时间T3后，将数据信号线MUX_B的电平拉高，此时，与一行像素单元中的全部蓝色分量的子像素(B)相连的薄膜晶体管(TFT)导通(即，图1中的T03、T06、T09、T12同时导通)，开始对与GATE(N)对应行的全部蓝色分量的子像素(B)进行充电。
在对与GATE(N)对应行的全部蓝色分量的子像素(B)进行充电完成后，将数据信号线MUX_B的电平拉低，在经过预定时间T4后，将驱动信号线GATE(N)的电平拉低，从而完成一个行周期信号的充电。在此之后可重复上述步骤以完成对整个液晶显示器的充电。
图2示出图1中的驱动信号线GATE(N)、数据信号线MUX_R、MUX_G、MUX_B的驱动时序图。在GATE(N)的一个高电平周期内，MUX_R、MUX_G、MUX_B依次为对应的颜色分量的子像素进行充电。
图3示出图1的液晶显示器的驱动电路的实际信号波形图。从图3可以看出，当数据信号线MUX_R(或MUX_G或MUX_B)开始为对应颜色分量的子像素进行充电时，会导致液晶显示模组(LCM)瞬间对液晶显示器的驱动集成电路(驱动IC)形成一个较大的抽载，从而会导致驱动IC的输出，即，MOS管阵列(GOA)的实际输入控制信号(例如，实际输入控制信号可为CK(时钟信号)，STV(一帧的开始信号)，RESET(复位信号)等)出现毛刺(如图3所示)。
发明内容
本发明的示例性实施例在于提供一种用于显示面板的驱动电路，以解决现有的显示面板中的数据信号线为各颜色分量的子像素进行充电时，导致GOA的实际输入控制信号出现毛刺的技术问题。
根据本发明示例性实施例的一方面，提供一种用于显示面板的驱动电路，所述显示面板包括由多个呈阵列布置的像素单元构成的像素单元阵列，每个像素单元由不同颜色分量的子像素构成，其特征在于，针对所述显示面板中的一行或一列像素单元所包括的多个不同颜色分量的子像素，所述驱动电路包括：至少一条驱动信号线，所述至少一条驱动信号线与显示驱动信号发送单元连接，经由所述至少一条驱动信号线将显示驱动信号发送单元产生的显示驱动信号提供给所述多个不同颜色分量的子像素；多条数据信号线，所述多条数据信号线与显示数据提供单元连接，经由所述多条数据信号线将显示数据提供单元提供的显示数据信号传输给所述多个不同颜色分量的子像素，其中，针对所述多个不同颜色分量的子像素中的一种颜色分量的子像素，所述多条数据信号线中的至少两条数据信号线为所述一种颜色分量的子像素传输显示数据信号，所述至少两条数据信号线从不同的时间点开始为所述一种颜色分量的子像素传输显示数据信号。
可选地，所述多个不同颜色分量的子像素中的一种颜色分量的子像素可被划分为至少两部分，其中，为所述一种颜色分量的子像素传输显示数据信号的数据信号线的数量与所述一种颜色分量的子像素被划分出的部分的数量可相同，一条数据信号线可为对应的一部分的子像素传输显示数据信号。
可选地，所述至少两条数据信号线可以预定时间间隔开始为与各自对应的一部分的子像素传输显示数据信号。
可选地，所述至少两条数据信号线中的每条数据信号线为与各自对应的一部分的子像素传输显示数据信号的子像素充电周期之间可存在交叠。
可选地，所述多条数据信号线为不同颜色分量的子像素传输显示数据信号的子像素充电周期之间可不存在交叠。
采用上述用于显示面板的驱动电路，使得显示面板MUX开启的瞬间抽载程度变低，有效克服了显示面板输入信号因瞬间带载过重造成的信号毛刺，进而改善了输入信号的质量，提高了画面的显示品质。
附图说明
图1示出现有的液晶显示器中的一行像素单元所包括的多个不同颜色分量的子像素的对应的驱动电路的结构；
图2示出图1中的驱动信号线GATE(N)、数据信号线MUX_R、MUX_G、MUX_B的驱动时序图；
图3示出图1的液晶显示器的驱动电路的实际信号波形图；
图4示出根据本发明示例性实施例的用于显示面板的驱动电路的结构图；
图5示出根据本发明示例性实施例的图4中的驱动信号线GATE(N)、数据信号线MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)的驱动时序图；
图6示出根据本发明示例性实施例的图4的用于显示面板的驱动电路的实际信号波形图。
具体实施方式
现在将详细地描述本发明的示例性实施例，本发明的示例性实施例的示例示出在附图中。下面通过参照附图描述实施例来解释本发明。然而，本发明可以以许多不同的形式实施，而不应被解释为局限于在此阐述的示例性实施例。相反，提供这些实施例使得本公开将是彻底的和完整的，并且这些实施例将把本发明的范围充分地传达给本领域技术人员。
在本发明的示例性实施例中提出一种用于显示面板的驱动电路，这里，所述显示面板包括由多个呈阵列布置的像素单元构成的像素单元阵列，每个像素单元由不同颜色分量的子像素构成。
针对所述显示面板中的一行或一列像素单元所包括的多个不同颜色分量的子像素，该驱动电路包括：至少一条驱动信号线，所述至少一条驱动信号线与显示驱动信号发送单元连接，经由所述至少一条驱动信号线将显示驱动信号发送单元产生的显示驱动信号提供给所述多个不同颜色分量的子像素，多条数据信号线，所述多条数据信号线与显示数据提供单元连接，经由所述多条数据信号线将显示数据提供单元提供的显示数据信号传输给所述多个不同颜色分量的子像素，其中，针对所述多个不同颜色分量的子像素中的一种颜色分量的子像素，所述多条数据信号线中的至少两条数据信号线为所述一种颜色分量的子像素传输显示数据信号，所述至少两条数据信号线从不同的时间点开始为所述一种颜色分量的子像素传输显示数据信号。
采用上述用于显示面板的驱动电路，由于一行或一列像素单元中的一种颜色分量的子像素由至少两条数据信号线来提供显示数据信号，可有效降低数据信号线为各颜色分量的子像素进行充电时的瞬间抽载程度，避免输入信号出现毛刺。
下面参照图4，以每个像素单元包括三种颜色分量的子像素(即，红色分量的子像素(R)、绿色分量的子像素(G)、蓝色分量的子像素(B))为例，来详细介绍本发明示例性实施例的针对所述显示面板中的一行或一列像素单元所包括的多个不同颜色分量的子像素的驱动电路的工作原理。
图4示出根据本发明示例性实施例的用于显示面板的驱动电路的结构图。在图4所示的示例中，采用的驱动结构为1:3MUX模式，显示面板的一行像素单元用S(1)～S(2N)来表示，每个像素单元包括三种颜色分量的子像素，例如，红色分量的子像素(R)、绿色分量的子像素(G)、蓝色分量的子像素(B)，GATE(N)为驱动信号线，为一行像素单元中的每个子像素提供显示驱动信号，MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)为数据信号线，其中，MUXR、MUXR(N)共同为一行像素单元中的全部红色分量的子像素(R)提供数据信号线，即，由MUXR、MUXR(N)共同为一行像素单元中的全部红色分量的子像素(R)进行充电，MUXG、MUXG(N)共同为一行像素单元中的全部绿色分量的子像素(G)提供数据信号线，即，由MUXG、MUXG(N)共同为一行像素单元中的全部绿色分量的子像素(G)进行充电，MUXB、MUXB(N)共同为一行像素单元中的全部蓝色分量的子像素(B)提供数据信号线，即，由MUXB、MUXB(N)共同为一行像素单元中的全部蓝色分量的子像素(B)进行充电。
如图4所示，可将所述多个不同颜色分量的子像素中的一种颜色分量的子像素划分为至少两部分，一条数据信号线为对应的一部分的子像素传输显示数据信号，即，为所述一种颜色分量的子像素传输显示数据信号的数据信号线的数量与所述一种颜色分量的子像素被划分出的部分的数量相同，
在图4所示的示例中，可将一种颜色分量的子像素划分为两部分，例如，将一行像素单元中的全部红色分量的子像素(R)划分为两部分，如图4所示，T01、T07为一组(以下，称为“第一组”)，T04、T10为一组(以下，称为“第二组”)，数据信号线MUXR为红色分量的子像素(R)T04和T10进行充电，数据信号线MUXR(N)为红色分量的子像素(R)T01和T07进行充电。
类似地，可将一行像素单元中的全部绿色分量的子像素(G)划分为两部分，如图4所示，T02、T08为一组(以下，称为“第三组”)，T05、T11为一组(以下，称为“第四组”)，数据信号线MUXG为绿色分量的子像素(G)T05、T11进行充电，数据信号线MUXG(N)为绿色分量的子像素(G)T02、T08进行充电。
还可将一行像素单元中的全部蓝色分量的子像素(B)划分为两部分，如图4所示，T03、T09为一组(以下，称为“第五组”)，T06、T12为一组(以下，称为“第六组”)，数据信号线MUXB为蓝色分量的子像素(B)T06、T12进行充电，数据信号线MUXB(N)为蓝色分量的子像素(B)T03、T09进行充电。
数据信号线MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)为对应的颜色分量的子像素进行充电的过程如下：
当GATE(N)驱动信号线的电平由低到高变化时，为与GATE(N)相连接的各MOS管的栅极提供电压，相应地，各MOS管导通，在经过预定时间t1后，将数据信号线MUXR的电平拉高，此时，与一行像素单元中的第二组红色分量的子像素(R)相连的薄膜晶体管(TFT)导通(即，图4中的T04、T10同时导通)，开始对与GATE(N)对应行的第二组红色分量的子像素(R)进行充电，即，相当于通过数据信号线MUXR为一行像素单元中的第二组红色分量的子像素(R)提供显示数据信号。
在经过预定时间间隔△T后，将数据信号线MUXR(N)的电平拉高，此时，与一行像素单元中的第一组红色分量的子像素(R)相连的薄膜晶体管(TFT)导通(即，图4中的T01、T07同时导通)，开始对与GATE(N)对应行的第一组红色分量的子像素(R)进行充电，即，相当于通过数据信号线MUXR(N)为一行像素单元中的第一组红色分量的子像素(R)提供显示数据信号。作为示例，预定时间间隔△T可根据具体的驱动集成电路的驱动能力及显示面板中的电阻、电容、阻抗、显示面板组成材料的介电常数的值来确定。
这里，应理解，在本发明的示例性实施例中，不限于将一种颜色分量的子像素划分为两部分，还可将一种颜色分量的子像素划分为三个部分或三个以上部分，相应地，可增加对应的数据信号线的数量，此时，每条数据信号线以预定时间间隔为与各自对应的一部分的子像素进行充电，直到完成对与GATE(N)对应行的全部红色分量的子像素(R)进行充电。
类似地，在对与GATE(N)对应行的全部红色分量的子像素(R)进行充电完成后，将数据信号线MUXR、MUXR(N)的电平拉低，在经过预定时间△t后，将数据信号线MUXG的电平拉高，此时，与一行像素单元中的第四组绿色分量的子像素(G)相连的薄膜晶体管(TFT)导通(即，图4中的T08、T11同时导通)，开始对与GATE(N)对应行的第四组绿色分量的子像素(G)进行充电。
在经过预定时间△T后，将数据信号线MUXG(N)的电平拉高，此时，与一行像素单元中的第三组绿色分量的子像素(G)相连的薄膜晶体管(TFT)导通(即，图4中的T02、T05同时导通)，开始对与GATE(N)对应行的第三组绿色分量的子像素(G)进行充电。
这里，应理解，在本发明的示例性实施例中，不限于将绿色分量的子像素(G)划分为两部分，还可将绿色颜色分量的子像素(G)划分为三个部分或三个以上部分，相应地，可增加对应的数据信号线的数量，此时，每条数据信号线以预定时间间隔为与各自对应的一部分的子像素进行充电，直到完成对与GATE(N)对应行的全部绿色分量的子像素(G)进行充电。
在对与GATE(N)对应行的全部绿色分量的子像素(G)进行充电完成后，将数据信号线MUXG、MUXG(N)的电平拉低，在经过预定时间△t后，将数据信号线MUXB的电平拉高，此时，与一行像素单元中的第六组蓝色分量的子像素(B)相连的薄膜晶体管(TFT)导通(即，图4中的T09、T12同时导通)，开始对与GATE(N)对应行的第六组蓝色分量的子像素(B)进行充电。
在经过预定时间△T后，将数据信号线MUXB(N)的电平拉高，此时，与一行像素单元中的第五组蓝色分量的子像素(B)相连的薄膜晶体管(TFT)导通(即，图4中的T03、T06同时导通)，开始对与GATE(N)对应行的第五组蓝色分量的子像素(B)进行充电。
这里，应理解，在本发明的示例性实施例中，不限于将蓝色分量的子像素(B)划分为两部分，还可将蓝色分量的子像素(B)划分为三个部分或三个以上部分，相应地，可增加对应的数据信号线的数量，此时，每条数据信号线以预定时间间隔为与各自对应的一部分的子像素进行充电，直到完成对与GATE(N)对应行的全部蓝色分量的子像素(B)进行充电。
在对与GATE(N)对应行的全部蓝色分量的子像素(B)进行充电完成后， 将数据信号线MUXB、MUXB(N)的电平拉低，在经过预定时间△t后，将驱动信号线GATE(N)的电平拉低，从而完成一个行周期信号的充电。在此之后可重复上述步骤以完成对整个显示面板的充电。
应理解，图4所示的驱动电路的结构仅为示例，本领域技术人员可根据需要来对图4所示的驱动电路的结构进行调整，例如，可增加驱动信号线的数量，使用两条或两条以上的驱动信号线来为显示面板中的一行或一列像素单元所包括的多个不同颜色分量的子像素提供显示驱动信号，或者，可增加数据信号线的数量，例如，可使用三条或三条以上的数据信号线为一种颜色分量的子像素传输显示数据信号。此外，本领域技术人员还可根据需要来调整每个数据信号线对子像素进行充电的顺序，这里，基于至少两条数据信号线为一种颜色分量的子像素进行充电的各种技术方案，均在本发明的保护范围之内，对此，不做一一详细描述。
图5示出根据本发明示例性实施例的图4中的驱动信号线GATE(N)、数据信号线MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)的驱动时序图。
如图5所示，在GATE(N)的一个高电平周期内，MUXR、MUXR(N)、MUXG、MUXG(N)、MUXB、MUXB(N)从不同的时间点开始依次为对应的颜色分量的子像素进行充电。
所述至少两条数据信号线中的每条数据信号线为与各自对应的一部分的子像素传输显示数据信号的子像素充电周期之间可存在交叠。图中T表示一个子像素充电周期，从图5可以看出，MUXR对应的子像素充电周期与MUXR(N)对应的子像素充电周期之间存在交叠，MUXR、MUXR(N)对应的子像素充电周期的起始时间相差预定时间间隔，类似地，MUXG对应的子像素充电周期与MUXG(N)对应的子像素充电周期之间存在交叠，MUXG、MUXG(N)对应的子像素充电周期的起始时间相差预定时间间隔，MUXB对应的子像素充电周期与MUXB(N)对应的子像素充电周期之间存在交叠，MUXB、MUXB(N)对应的子像素充电周期的起始时间相差预定时间间隔。上述为一种颜色分量的子像素进行充电的至少两条数据信号线以不同的起始时间为对应部分的子像素进行充电，可有效降低显示面板对输入信号的瞬间抽载程度(变为分时抽载)。
但是，如图5所示，所述多条数据信号线为不同颜色分量的子像素传输显示数据信号的子像素充电周期之间不存在交叠，即，MUXR和MUXR(N)对 应的子像素充电周期、MUXG和MUXG(N)对应的子像素充电周期、MUXB和MUXB(N)对应的子像素充电周期三者之间不存在交叠。
图6示出根据本发明示例性实施例的图4的用于显示面板的驱动电路的实际信号波形图。
在图1所示的现有的驱动电路中，一行像素单元中的全部红色分量的子像素(R)共用一条数据信号线MUX_R，全部绿色分量的子像素(G)共用一条数据信号线MUX_G，全部蓝色分量的子像素(B)共用一条数据信号线MUX_B，使得输入信号会出现毛刺，从图6可以看出，采用本发明示例性实施例的用于显示面板的驱动电路为一种颜色分量的子像素进行充电之后，有效克服了显示面板输入信号因瞬间带载过重造成的信号毛刺，改善了输入信号的质量，提高了画面的显示品质。
上面已经结合具体示例性实施例描述了本发明，但是本发明的实施不限于此。在本发明的精神和范围内，本领域技术人员可以进行各种修改和变型，这些修改和变型将落入权利要求限定的保护范围之内。

Claims (10)

  1. 一种用于显示面板的驱动电路，所述显示面板包括由多个呈阵列布置的像素单元构成的像素单元阵列，每个像素单元由不同颜色分量的子像素构成，其中，针对所述显示面板中的一行或一列像素单元所包括的多个不同颜色分量的子像素，所述驱动电路包括：
    至少一条驱动信号线，所述至少一条驱动信号线与显示驱动信号发送单元连接，经由所述至少一条驱动信号线将显示驱动信号发送单元产生的显示驱动信号提供给所述多个不同颜色分量的子像素；
    多条数据信号线，所述多条数据信号线与显示数据提供单元连接，经由所述多条数据信号线将显示数据提供单元提供的显示数据信号传输给所述多个不同颜色分量的子像素，
    其中，针对所述多个不同颜色分量的子像素中的一种颜色分量的子像素，所述多条数据信号线中的至少两条数据信号线为所述一种颜色分量的子像素传输显示数据信号，所述至少两条数据信号线从不同的时间点开始为所述一种颜色分量的子像素传输显示数据信号。
  2. 根据权利要求1所述的驱动电路，其中，所述多个不同颜色分量的子像素中的一种颜色分量的子像素被划分为至少两部分，
    其中，为所述一种颜色分量的子像素传输显示数据信号的数据信号线的数量与所述一种颜色分量的子像素被划分出的部分的数量相同，一条数据信号线为对应的一部分的子像素传输显示数据信号。
  3. 根据权利要求2所述的驱动电路，其中，所述至少两条数据信号线以预定时间间隔开始为与各自对应的一部分的子像素传输显示数据信号。
  4. 根据权利要求3所述的驱动电路，其中，所述至少两条数据信号线中的每条数据信号线为与各自对应的一部分的子像素传输显示数据信号的子像素充电周期之间存在交叠。
  5. 根据权利要求1所述的驱动电路，其中，所述多条数据信号线为不同颜色分量的子像素传输显示数据信号的子像素充电周期之间不存在交叠。
  6. 一种显示面板，其包括由多个呈阵列布置的像素单元构成的像素单元阵 列，每个像素单元由不同颜色分量的子像素构成，其中，针对一行或一列像素单元所包括的多个不同颜色分量的子像素；所述显示面板还包括驱动电路；所述驱动电路包括：
    至少一条驱动信号线，所述至少一条驱动信号线与显示驱动信号发送单元连接，经由所述至少一条驱动信号线将显示驱动信号发送单元产生的显示驱动信号提供给所述多个不同颜色分量的子像素；
    多条数据信号线，所述多条数据信号线与显示数据提供单元连接，经由所述多条数据信号线将显示数据提供单元提供的显示数据信号传输给所述多个不同颜色分量的子像素，
    其中，针对所述多个不同颜色分量的子像素中的一种颜色分量的子像素，所述多条数据信号线中的至少两条数据信号线为所述一种颜色分量的子像素传输显示数据信号，所述至少两条数据信号线从不同的时间点开始为所述一种颜色分量的子像素传输显示数据信号。
  7. 根据权利要求6所述的显示面板，其中，所述多个不同颜色分量的子像素中的一种颜色分量的子像素被划分为至少两部分，
    其中，为所述一种颜色分量的子像素传输显示数据信号的数据信号线的数量与所述一种颜色分量的子像素被划分出的部分的数量相同，一条数据信号线为对应的一部分的子像素传输显示数据信号。
  8. 根据权利要求7所述的显示面板，其中，所述至少两条数据信号线以预定时间间隔开始为与各自对应的一部分的子像素传输显示数据信号。
  9. 根据权利要求8所述的显示面板，其中，所述至少两条数据信号线中的每条数据信号线为与各自对应的一部分的子像素传输显示数据信号的子像素充电周期之间存在交叠。
  10. 根据权利要求6所述的显示面板，其中，所述多条数据信号线为不同颜色分量的子像素传输显示数据信号的子像素充电周期之间不存在交叠。
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