WO2017128696A1 - 一种像素电路及其驱动方法、显示装置 - Google Patents

一种像素电路及其驱动方法、显示装置 Download PDF

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Publication number
WO2017128696A1
WO2017128696A1 PCT/CN2016/095272 CN2016095272W WO2017128696A1 WO 2017128696 A1 WO2017128696 A1 WO 2017128696A1 CN 2016095272 W CN2016095272 W CN 2016095272W WO 2017128696 A1 WO2017128696 A1 WO 2017128696A1
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WIPO (PCT)
Prior art keywords
transistor
display unit
scan line
line
scan
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Application number
PCT/CN2016/095272
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English (en)
French (fr)
Inventor
王俊伟
林鸿涛
邓应方
赵洪宇
李绚
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/539,528 priority Critical patent/US10217423B2/en
Publication of WO2017128696A1 publication Critical patent/WO2017128696A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display device.
  • LCD Liquid Crystal Display
  • TFT Thin Film Transistor
  • precharge is usually used to solve the technical problem, that is, the gate enable signal is turned on in advance to cause the scan line Scan to output a signal in advance (output signal from the time period T1), thereby The gate of the TFT is turned on so that the pixel can be charged in advance so that the pixel can be charged to the desired potential more quickly during the actual charging period T2.
  • the (N+1th) scan line Scan N+1 The input signal is required for pre-charging, which may cause interference between the Nth scan line Scan N and the (N+1th scan line Scan N+1), and the IC (Integrate Circuit) that drives the scan line Or the load of the GOA (Gate Driver on Array) unit is too large, resulting in insufficient output.
  • Embodiments of the present disclosure provide a pixel circuit, a driving method thereof, and a display device, which can pre-charge a pixel by using light energy, thereby improving the above-mentioned problems existing in the prior art.
  • a pixel circuit including a display unit and a first pre-charging unit; the first pre-charging unit being connected to the display unit, the N-1th scan line, and a control line, And configured to convert light energy into electrical energy, and pre-charge the display unit with converted electrical energy under control of the control line and the N-1th scan line; the display unit further Connected to the Nth scan line and the data line, and configured to charge the display unit through the data line under control of the Nth scan line; wherein N ⁇ 2.
  • the pixel circuit further includes a second pre-charging unit; the second pre-charging a unit connected to the display unit, the N-1th scan line, and the control line, and configured to convert light energy into electrical energy, and to scan the control line and the N-1th Under the control of the line, the display unit is reverse precharged; wherein the first pre-charging unit and the second pre-charging unit do not work at the same time.
  • the first pre-charging unit includes a first transistor, a second transistor, and a photosensitive energy storage element; a gate of the first transistor is connected to the control line, and the first pole and the N-1th a root scan line is connected, a second pole is connected to a gate of the second transistor; a first pole of the second transistor is connected to a first end of the display unit, and a second pole is connected to the photosensitive energy storage element The first pole is connected; the second pole of the photosensitive energy storage element is connected to the second end of the display unit.
  • the second pre-charging unit includes a third transistor, a fourth transistor, and a photosensitive energy storage element; a gate of the third transistor
  • the control lines are connected, the first pole is connected to the N-1th scan line, the second pole is connected to the gate of the fourth transistor, and the first pole of the fourth transistor is opposite to the display unit
  • the first end is connected, the second pole is connected to the second pole of the photosensitive energy storage element; the first pole of the photosensitive energy storage element is connected to the second end of the display unit, wherein the first transistor and Each of the third transistors is a P-type or N-type transistor, and the first transistor and the third transistor are crystals of different types from each other.
  • the display unit includes a fifth transistor, a liquid crystal capacitor and a storage capacitor; a gate of the fifth transistor is connected to the Nth scan line, a first pole is connected to the data line, and a second pole And connecting the liquid crystal capacitor and the first end of the storage capacitor; the liquid crystal capacitor and the second end of the storage capacitor are connected to a common voltage end.
  • a display device comprising the above-described pixel circuit.
  • a driving method of a pixel circuit comprising: a first pre-charging unit converting light energy into electrical energy, and adopting under control of a control line and an N-1th scanning line The converted electric energy pre-charges the display unit connected to the Nth scan line; under the control of the Nth scan line, the display unit is charged through the data line.
  • the pixel circuit includes a second pre-charging unit
  • the driving method includes: in a first frame, the first pre-charging unit converts light energy into electrical energy, and in the control line and the Under the control of the N-1th scan line, the converted electric energy pair and the Nth
  • the display unit connected to the root scan line performs precharging; and under the control of the Nth scan line, the display unit is charged through the data line;
  • the second pre-charging unit converts light energy into electrical energy, and under the control of the control line and the N-1th scan line, adopts a converted electric energy pair and the Nth root
  • the display unit connected to the scan line performs reverse pre-charging; under the control of the Nth scan line, the display unit is reversely charged through the data line;
  • the first frame and the second frame are repeated.
  • the first pre-charging unit comprises a first transistor, a second transistor and a photosensitive energy storage element
  • the first pre-charging unit converts light energy into electrical energy, and is in the control line and the N-1th scan Under the control of the line, the display unit connected to the Nth scan line is precharged by using the converted electric energy
  • the driving method further comprising: inputting a scan signal to the N-1th scan line, Inputting a signal to the control line such that the first transistor and the second transistor are turned on, and then using the electrical energy converted by the photosensitive energy storage element to the display unit connected to the Nth scan line Precharge.
  • the second pre-charging unit will light Converting into electrical energy, and under the control of the control line and the N-1th scan line, reversely precharging the display unit connected to the Nth scan line by using converted electric energy
  • the driving method further includes inputting a signal to the control line while the scan signal is input to the N-1th scan line, so that the third transistor and the fourth transistor are turned on, and then utilized The electrical energy converted by the photosensitive energy storage element reversely precharges the display unit connected to the Nth scan line.
  • the first pre-charging unit converts the light energy into electrical energy, and uses the converted electric energy to display the display unit connected to the Nth scan line under the control of the control line and the N-1th scan line. Precharge. On the basis of this, after the signal is input on the Nth scan line, the display unit connected to the Nth scan line is continuously charged through the data line, and the display unit connected to the Nth scan line can be quickly charged to The required potential. Since it is not necessary to simultaneously input two scan lines at the same time, and the embodiment of the present disclosure pre-charges using the energy of the light energy conversion, the load caused by the simultaneous input signals of the two scan lines in the prior art is improved or The problem of interference between scan lines.
  • FIG. 1 is a timing diagram of a precharge circuit provided by the prior art
  • FIG. 2 is a schematic diagram of a pixel circuit in accordance with an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a pixel circuit in accordance with another embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a pixel circuit in accordance with yet another embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a pixel circuit in accordance with still another embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of a pixel circuit of a display device in accordance with an embodiment of the present disclosure
  • FIG. 7 is a flowchart of a driving method of a pixel circuit, according to an embodiment of the present disclosure.
  • FIG. 8 is a timing diagram of a driving pixel circuit in accordance with an embodiment of the present disclosure.
  • 10-display unit 20-first pre-charge unit; 201-photosensitive energy storage element; 30-second pre-charge unit.
  • Embodiments of the present disclosure provide a pixel circuit, as shown in FIG. 2, including a display unit 10 and a first pre-charging unit 20.
  • the first pre-charging unit 20 is connected to the display unit 10, the N-1th scanning line Scan N-1, and the control line CL, and is configured to convert light energy into electrical energy, and at the control line CL and the N-1th Under the control of the root scan line Scan N-1, the display unit 10 is precharged using the converted electrical energy.
  • the display unit 10 is connected to the Nth scan line Scan N and the data line DL, and is configured to charge the display unit 10 through the data line DL under the control of the Nth scan line Scan N.
  • N 2
  • the data line DL can be The display unit 10 connected to the N-1th scan line Scan N-1 is charged for display.
  • the first pre-charging unit 20 connected to the N-1th scan line Scan N-1 can absorb light energy to convert it into electric energy, and on the control line CL and the N-1th scan line Scan N Under the common control of -1, the display unit 10 connected to the Nth scan line Scan N is precharged. At this time, since there is no input signal on the Nth scan line, the display unit 10 connected to the Nth scan line Scan N is not displayed.
  • the first pre-charging unit 20 can absorb the light emitted by the display unit 10 connected to the N-1th scan line Scan N-1 to convert it. For electric energy.
  • the first pre-charging unit 20 can also utilize the light emitted by the backlight to generate electrical energy. This can be determined according to different display devices applied by the pixel circuit, wherein the first pre-charging unit 20 can perform light-to-electrical conversion by utilizing the light emitted by the display device itself regardless of the type of display device. .
  • the first pre-charging unit 20 converts light energy into electrical energy, and uses the converted electric energy pair and the Nth under the control of the control line CL and the N-1th scan line Scan N-1.
  • the display unit 10 connected to the root scan line Scan N performs precharging. On the basis of this, after the signal is input on the Nth scan line Scan N, the display unit 10 connected to the Nth scan line Scan N is continuously charged through the data line DL, and the Nth scan can be quickly performed.
  • the display unit 10 connected to the line Scan N is charged to the desired potential without being limited by the scanning frequency. Since it is not necessary to simultaneously input signals on two scanning lines at the same time, and pre-charging by using electric energy converted by light energy, the load in the prior art due to simultaneous input signals of two scanning lines is improved or The problem of interference between scan lines.
  • the pixel circuit described above may further include a second pre-charging unit 30, as shown in FIG.
  • the second pre-charging unit 30 is connected to the display unit 10, the N-1th scan line Scan N-1, and the control line CL for converting light energy into electrical energy, and is on the control line CL and the N-1th scan line. Under the control of Scan N-1, the display unit 10 is reversely precharged; wherein the first pre-charging unit 20 and the second pre-charging unit 30 do not operate at the same time.
  • the data line DL can charge the display unit 10 connected to the N-1th scan line Scan N-1 for display.
  • the second pre-charging unit 30 connected to the N-1th scan line Scan N-1 can absorb light energy to convert it into electric energy, and on the control line CL and the N-1th scan line Scan N Under the common control of -1, the display unit 10 connected to the Nth scan line Scan N is advanced. Line reverse precharge. At this time, since there is no input signal on the Nth scanning line Scan N, the display unit 10 connected to the Nth scanning line is not displayed.
  • the display unit 10 connected to the Nth scan line Scan N can be reversely charged through the data line DL, so that the The display unit 10 connected to the N scanning lines Scan N is charged to the desired potential.
  • the first pre-charging unit 20 In order to operate the first pre-charging unit 20 and the second pre-charging unit 30 at different times, different signals can be input on the control line CL. For example, when a high level signal is input on the control line CL, the first pre-charging unit 20 operates to pre-charge the display unit 10, at which time the second pre-charging unit 30 does not operate. When a low level signal is input on the control line CL, the second pre-charging unit 30 operates to perform reverse pre-charging for the display unit 10, at which time the first pre-charging unit 20 does not operate.
  • the second pre-charging unit 30 can absorb the light emitted by the display unit 10 for display, and convert it into electric energy, and can also use the light emitted by the backlight to generate electric energy. This may depend on different display devices to which the pixel circuit is applied, wherein the second pre-charging unit 30 can utilize the light emitted by the display device itself to perform light energy to electrical energy regardless of the type of display device. Conversion.
  • the second pre-charging unit 30 performs reverse pre-charging of the display unit 10 in relation to charging the display unit 10 with respect to the first pre-charging unit 20. Based on this, in the embodiment of the present disclosure, precharging the display unit 10 by the first pre-charging unit 20 may be referred to as forward pre-charging.
  • the second pre-charging unit 30 performs reverse pre-charging on the display unit 10 to indicate that when the second pre-charging unit 30 charges the display unit 10, the current flows in the display unit 10 and the first pre-charging unit 20 performs the display unit 10 on the display unit 10. When charging, the current flows in the opposite direction.
  • the first pre-charging unit 20 and the second pre-charging unit 30 are used to alternately pre-charge the display unit 10 in the forward and reverse directions, so that the liquid crystal in the liquid crystal display can be deflected in different directions, thereby improving the liquid crystal aging.
  • the problem has increased the life of the LCD display.
  • the first pre-charging unit 20 includes a first transistor T1, a second transistor T2, and a photosensitive energy storage element 201; a gate of the first transistor T1 and The control line CL is connected, the first pole is connected to the N-1th scan line Scan N-1, and the second pole is connected to the gate of the second transistor T2.
  • the first pole of the second transistor T2 is connected to the first end of the display unit 10, and the second pole is connected to the first pole of the photosensitive energy storage element 201.
  • the second pole of the photosensitive energy storage element 201 is coupled to the second end of the display unit 10.
  • the first transistor T1 and the second transistor T2 may both be N-type transistors or both P-type transistors, or one of them is a P-type transistor and the other is an N-type transistor, so that when the N-1th scan is performed When the signal is input on the line Scan N-1, the second transistor T2 is in an on state.
  • first pre-charging unit 20 may further include a plurality of switching transistors connected in parallel with the first transistor T1 and the second transistor T2.
  • the foregoing is merely an illustration of the first pre-charging unit 20.
  • Other structures having the same functions as those of the first pre-charging unit 20 are not described herein again, but all should fall within the protection scope of the present disclosure.
  • the first transistor T1 as an N-type transistor as an example
  • the first transistor T1 when a high-level signal is input on the control line CL, the first transistor T1 is in an on state, and the N-1th scan line Scan N-
  • the signal input on 1 is input to the gate of the second transistor T2 through the first transistor T1, so that the second transistor T2 is in an on state.
  • a loop is formed between the display unit 10 and the photosensitive energy storage element 201. Therefore, when the photosensitive energy storage element 201 converts light energy into electrical energy, the display unit 10 connected to the Nth scan line Scan N can be pre-prepared. Charging.
  • the second pre-charging unit 30 includes the third transistor T3, the fourth transistor T4, and the photosensitive energy storage element 201.
  • the gate of the third transistor T3 is connected to the control line CL, the first electrode of the third transistor T3 is connected to the N-1th scan line Scan N-1, and the second pole is connected to the gate of the fourth transistor T4.
  • the first pole of the fourth transistor T4 is connected to the first end of the display unit 10, and the second pole is connected to the second pole of the photosensitive energy storage element 201.
  • the first pole of the photosensitive energy storage element 201 is coupled to the second end of the display unit 10.
  • Each of the first transistor T1 and the third transistor T3 is a P-type or N-type transistor, and the first transistor and the third transistor are mutually different types of transistors.
  • the first transistor T1 and the third transistor T3 are mutually different types of transistors If the first transistor T1 is a P-type transistor, the third transistor T3 is an N-type transistor; or, if the first transistor T1 is an N-type transistor, the third transistor T3 is a P-type transistor. In the embodiment of the present disclosure, the first transistor T1 is N-type and the third transistor T3 is P-type as an example.
  • the first transistor T1 is N-type and the third transistor T3 is P-type, when a high-level signal is input on the control line, the first transistor T1 is turned on, and the third transistor T3 is turned off; when a low level is input on the control line At the time of the signal, the third transistor T3 is turned on, and the first transistor T1 is turned off.
  • the fourth transistor T4 may be a P-type or N-type transistor such that the fourth transistor T4 is in an on state when the third transistor T3 is turned on and when the signal is input to the N-1th scan line Scan N-1.
  • the second pre-charging unit 30 may further include a plurality of switching transistors connected in parallel with the third transistor T3 and the fourth transistor T4.
  • the foregoing is merely an illustration of the second pre-charging unit 30.
  • Other structures having the same functions as those of the second pre-charging unit 30 are not described herein again, but all should fall within the protection scope of the present disclosure.
  • first and second poles of the photosensitive energy storage element 201 are not defined.
  • the first pole is the positive pole and the second pole is the negative pole; of course, alternatively, the second pole can be the negative pole and the first pole is the positive pole.
  • first and second poles of all transistors are not defined.
  • the first pole can be the drain and the second pole is the source; alternatively, the first pole is the source and the second pole is the drain.
  • the third transistor T3 When a low level signal is input on the control line CL, the third transistor T3 is in an on state, and a signal input on the N-1th scan line Scan N-1 is input to the gate of the fourth transistor T4 through the third transistor T3. So that the fourth transistor T4 is in an on state. At this time, a loop is formed between the display unit 10 and the photosensitive energy storage element 201, and the photosensitive energy storage element 201 converts light energy into electrical energy, so that the display unit 10 connected to the Nth scan line Scan N can be precharged.
  • the first transistor T1 or the third transistor T3 when a signal is input on the control line CL, only one of the first transistor T1 or the third transistor T3 can be turned on, thereby forming a loop to charge the display unit 10. Since the first pole of the photosensitive energy storage element 201 in the first pre-charging unit 20 is connected to the first end of the display unit 10, the second pole is connected to the second end of the display unit 10, and the second pre-charging unit 30 The second pole of the photosensitive energy storage element 201 Connected to the first end of the display unit 10, the first pole is connected to the second end of the display unit 10, and therefore, the charging directions of the display unit 10 by the first pre-charging unit 20 and the second pre-charging unit 30 are opposite.
  • the first pre-charging unit 20 and the second pre-charging unit 30 can be respectively controlled at different times by the signals of the control line CL and the N-1th scanning line Scan N-1.
  • the display unit 10 connected to the Nth scanning line Scan N performs forward pre-charging and reverse pre-charging, so that the liquid crystal in the liquid crystal display can be deflected in different directions to prevent aging of the liquid crystal and increase the service life of the display.
  • the display unit 10 includes a fifth transistor T5, a liquid crystal capacitor Clc, and a storage capacitor Cst.
  • the gate of the fifth transistor T5 is connected to the Nth scan line Scan N, the first pole is connected to the data line DL, the second pole is connected to the liquid crystal capacitor Clc and the first end of the storage capacitor Cst; the liquid crystal capacitor Clc and the storage capacitor Cst The second end is connected to the common voltage terminal Vcom.
  • the liquid crystal capacitor Clc is used to supply power during display, and the storage capacitor Cst is used to store power for the liquid crystal display to replenish the display when the power is insufficient during display.
  • the fifth transistor T5 when a signal is input on the Nth scan line Scan N, the fifth transistor T5 is in an on state, and the signal input on the data line DL is continuously input to the liquid crystal capacitor of the display unit 10 through the fifth transistor T5. Clc and the storage capacitor Cst are charged, and the display unit 10 can display under the control of the signal provided by the data line DL and the common voltage terminal Vcom.
  • the first end of the display unit, and the first end of the liquid crystal capacitor Clc and the storage capacitor Cst are connected to the pixel electrode, the second end of the display unit, and the liquid crystal capacitor Clc and the storage capacitor The second end of Cst is connected to the common voltage terminal Vcom (common electrode).
  • Embodiments of the present disclosure also provide a display device including the above-described pixel circuit.
  • each row of scan lines is connected to a plurality of pixel units. Except for the pixel unit connected to the first scan line Scan1, the pixel units connected to the other scan lines include the pixel circuits described above.
  • the pixel unit connected to the first scan line Scan1 may include only the display unit 10, which may be precharged by opening the gate enable signal in advance.
  • the data line DL can charge all the display units 10 connected to the N-1th scan line Scan N-1 to make the N-1th All display units 10 connected to the root scan line Scan N-1 are displayed.
  • all of the first pre-charging units 20 or all of the second connected to the N-1th scan line Scan N-1 The pre-charging unit 30 can absorb the light energy and convert the light energy into electrical energy so that the display unit 10 connected thereto and also connected to the Nth scanning line Scan N can perform forward or reverse pre-charging.
  • all the display units 10 connected to the Nth scan line are not displayed.
  • the display unit 10 connected to the Nth scan line Scan N is continuously charged in the forward or reverse direction through the data line DL, so that the signal can be quickly and reversely
  • the display unit 10 connected to the Nth scan line Scan N is charged to a desired potential.
  • the display device in the embodiment of the present disclosure may be any product or component having a display function such as a mobile phone, a tablet computer, a display, a notebook computer, a digital camera, or the like.
  • An embodiment of the present disclosure further provides a driving method of the foregoing pixel circuit. As shown in FIG. 7, the driving method includes:
  • the first pre-charging unit 20 converts the light energy into electrical energy, and under the control of the control line CL and the N-1th scan line Scan N-1, the converted electric energy pair and the Nth scan are used.
  • the display unit 10 connected to the line Scan N performs precharging.
  • the first pre-charging unit 20 connected to the N-1th scanning line Scan N-1 is at the N-1th scanning line Scan N-1 and Under the control of the control line CL, the light energy is converted into electric energy to precharge the display unit 10 connected to the Nth scan line Scan N.
  • step S101 the display unit 10 is charged by the data line DL under the control of the Nth scan line Scan N.
  • the first pre-charging unit 20 converts light energy into electrical energy, and uses the converted light energy pair and the Nth under the control of the control line CL and the N-1th scan line Scan N-1.
  • the display unit 10 connected to the root scan line Scan N performs precharging. On the basis of this, after the signal is input on the Nth scan line Scan N, the display unit 10 connected to the Nth scan line Scan N is continuously charged through the data line DL, and is connected to the Nth scan line Scan N.
  • the display unit 10 can be quickly charged to a desired potential so as not to be limited by the scanning frequency.
  • the disclosed embodiment employs pre-charging of electrical energy converted by light energy, thereby improving the problem of excessive load or interference between scanning lines caused by simultaneous input of signals on two scanning lines in the prior art.
  • the above-described driving method can be explained with reference to the timing chart of FIG.
  • the first pre-charging unit 20 converts the light energy into electrical energy, and under the control of the control line CL and the N-1th scanning line Scan N-1, the converted electric energy pair is used.
  • the display unit 10 connected to the Nth scan line Scan N performs precharging; and under the control of the Nth scan line Scan N, the display unit 10 is charged through the data line DL.
  • the first pre-charging unit 20 can be connected to the Nth scanning line Scan N by controlling the signal input on the control line CL.
  • the display unit 10 performs precharging, and the electric energy converted by the second pre-charging unit 30 cannot reach the display unit 10 connected to the Nth scanning line Scan N.
  • the data line DL continues to charge the display unit 10 connected to the Nth scan line Scan N.
  • the second pre-charging unit 30 converts the light energy into electrical energy, and uses the converted electric energy pair under the control of the control line CL and the N-1th scan line Scan N-1.
  • the display unit 10 connected to the Nth scan line Scan N performs reverse precharge; and under the control of the Nth scan line Scan N, the display unit 10 is reversely charged through the data line DL.
  • the second pre-charging unit 30 can be connected to the Nth scanning line Scan N by controlling the signal input on the control line CL.
  • the display unit 10 performs reverse pre-charging, and the electric energy converted by the first pre-charging unit 20 cannot reach the display unit 10 connected to the Nth scanning line Scan N.
  • the data line DL continues to reversely charge the display unit 10 connected to the Nth scan line Scan N.
  • the second pre-charging unit 30 performs reverse pre-charging on the display unit 10 in terms of the direction in which the first pre-charging unit 20 charges the display unit 10.
  • precharging the display unit 10 by the first pre-charging unit 20 may be referred to as forward pre-charging.
  • the display unit 10 is respectively subjected to forward pre-charging and reverse pre-charging, so that the flow of current in the display unit 10 is reversed, thereby making the liquid crystals different.
  • the direction is deflected, which prevents the aging of the liquid crystal and prolongs the service life of the liquid crystal display.
  • step S100 specifically includes:
  • the first transistor T1 is an N-type transistor
  • the first transistor when a signal is input on the N-1th scan line Scan N-1, the first transistor can be made by inputting a high level signal on the control line CL. T1 is in the on state.
  • the signal input on the N-1th scanning line Scan N-1 is input to the gate of the second transistor T2 through the first transistor T1, so that the second transistor T2 is in an on state.
  • the photosensitive energy storage element 201 and the display unit 10 connected thereto and the Nth scan line Scan N form a loop, and the photosensitive energy storage element 201 converts the light energy into electric energy, so that the converted electric energy can be used to pass the loop.
  • the display unit 10 is precharged.
  • the second pre-charging unit 30 converts the light energy into For the electric energy, under the control of the control line CL and the N-1th scanning line Scan N-1, the converted electric energy is used to reverse precharge the display unit 10 connected to the Nth scan line Scan N, including: While inputting the scan signal to the N-1th scan line Scan N-1, the signal is input to the control line CL, so that the third transistor T3 and the fourth transistor T4 are turned on, so that the electric energy converted by the photosensitive energy storage element 201 can be utilized.
  • the display unit 10 connected to the Nth scan line Scan N is reversely precharged.
  • the third transistor T3 is a P-type transistor
  • a low level signal can be input on the control line CL to make the third transistor T3 It is in the on state.
  • the signal input on the N-1th scanning line Scan N-1 is input to the gate of the fourth transistor T4 through the third transistor T3, so that the fourth transistor T4 is in an on state.
  • the photosensitive energy storage element 201 and the display unit 10 connected thereto and the Nth scan line Scan N form a loop, and the photosensitive energy storage element 201 converts the light energy.
  • the converted electrical energy is such that the converted electrical energy can be used to reverse precharge the display unit 10 through the loop.
  • the pixel unit connected to the first scan line Scan 1 includes only the display unit 10.
  • the display unit 10 includes a fifth transistor T5, a liquid crystal capacitor Clc, and a storage capacitor Cst.
  • the gate of the fifth transistor T5 is connected to the first scan line Scan1, the source is connected to the data line DL, and the drain is connected to the liquid crystal capacitor Clc and the first end of the storage capacitor Cst; the liquid crystal capacitor Clc and the storage capacitor Cst are The two ends are connected to the common voltage terminal Vcom.
  • the pixel unit connected to the other scanning lines except the first scanning line Scan 1 includes not only the display unit 10 but also the first pre-charging unit 20 and the second pre-charging unit 30.
  • the display unit 10 includes a fifth transistor T5, a liquid crystal capacitor Clc, and a storage capacitor Cst.
  • the first pre-charging unit 20 includes a first transistor T1, a second transistor T2, and a photosensitive energy storage element 201.
  • the second pre-charging unit 30 includes a third transistor T3, a fourth transistor T4, and a photosensitive energy storage element 201.
  • the first transistor T1, the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are N-type transistors, and the third transistor T3 is a P-type transistor.
  • the connection relationship of each component in the pixel unit is as follows:
  • the gate of the fifth transistor T5 is connected to the Nth scan line Scan N, the source is connected to the data line DL, and the drain is connected to the liquid crystal capacitor Clc and the first end of the storage capacitor Cst; the liquid crystal capacitor Clc and the storage capacitor Cst are The two ends are connected to the common voltage terminal Vcom;
  • the gate of the first transistor T1 is connected to the control line CL, the source is connected to the N-1th scan line Scan N-1, the drain is connected to the gate of the second transistor T2, and the source and display of the second transistor T2
  • the first end of the unit 10 is connected, the drain is connected to the anode of the photosensitive energy storage element 201 in the first pre-charging unit 20; the cathode of the photosensitive energy storage element 201 in the first pre-charging unit 20 is connected to the second end of the display unit 10 Connected
  • the gate of the third transistor T3 is connected to the control line CL, the source is connected to the N-1th scan line Scan N-1, the drain is connected to the gate of the fourth transistor T4, and the source and display of the fourth transistor T4 are
  • the first end of the unit 10 is connected, the drain is connected to the negative electrode of the photosensitive energy storage element 201 in the second pre-charging unit 30; the positive electrode of the photosensitive energy storage element 201 in the second pre-charging unit 30 is the second of the display unit 10. Connected to the end.
  • the gate enable signal is turned on in advance to advance the input signal on the first scan line Scan1, so that all the fifth transistors T5 connected to the first scan line Scan1 are turned on. status.
  • the signal input on the data line DL passes through the fifth crystal T5
  • the liquid crystal capacitor Clc and the storage capacitor Cst input to the pixel unit are precharged.
  • all the display units 10 connected to the first scan line Scan 1 are continuously charged through the data line DL, so that the liquid crystal capacitor Clc and the storage capacitor Cst in the display unit 10 are thus charged. It can be quickly charged to the desired potential.
  • the control line CL While charging all of the display units 10 connected to the first scan line Scan 1, the control line CL outputs a high level signal such that the first transistor T1 of the pixel unit connected to the second scan line Scan 2 is at The state is turned on, and the third transistor T3 is turned off. At this time, the signal input on the first scan line Scan 1 causes the second transistor T2 to be in an on state through the first transistor T1, so that the photosensitive energy storage element 201 in the first pre-charge unit 20 and the display unit 10 connected thereto are connected. Form a loop.
  • the photosensitive energy storage element 201 is equivalent to a power source, and uses the converted electric energy to precharge the liquid crystal capacitor Clc and the storage capacitor Cst in the loop.
  • the display unit 10 connected to the second scan line Scan 2 is precharged when a signal is input on the first scan line Scan 1, when the signal is input on the second scan line Scan 2, and the second The display unit 10 connected to the root scan line Scan 2 can be quickly charged to the desired potential and displayed.
  • the display unit 10 connected to the third scanning line Scan 3, the fourth scanning line Scan 4, and the Nth scanning line Scan N sequentially performs precharging and continuing charging.
  • the gate enable signal is turned on in advance to advance the input signal on the first scan line Scan1, so that all the fifth transistors T5 connected to the first scan line Scan1 are in an on state, and the data line DL is input.
  • the signal is precharged by the liquid crystal capacitor Clc and the storage capacitor Cst input to the pixel unit through the fifth crystal T5.
  • the data line DL continues to charge all the display units 10 connected to the first scan line Scan1, so that the liquid crystal capacitor Clc and the storage capacitor Cst in the display unit 10 can be quickly Charge to the desired potential.
  • Photosensitive energy storage element 201 It is equivalent to a power source, and uses the converted electric energy to perform pre-charging opposite to the pre-charging direction of the first frame to the liquid crystal capacitor Clc and the storage capacitor Cst in the loop.
  • the foregoing program may be stored in a computer readable storage medium, and when executed, the program executes the steps including the above method embodiments.
  • the foregoing storage medium includes various media that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

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Abstract

一种像素电路及其驱动方法、显示装置，可利用光能对像素进行预充电，改善了现有技术中两根扫描线同时输入信号造成的负载过大或扫描线之间相互干扰的问题。该像素电路包括显示单元(10)和第一预充电单元(20)；所述第一预充电单元(20)，与所述显示单元(10)、第N-1根扫描线(Scan N-1)和控制线(CL)相连，用于将光能转化为电能，并在所述控制线(CL)和所述第N-1根扫描线(Scan N-1)的控制下，采用转化的电能对所述显示单元(10)进行预充电；所述显示单元(10)，还与第N根扫描线(Scan N)和数据线(DL)相连，用于在所述第N根扫描线(Scan N)的控制下，通过所述数据线(DL)对所述显示单元(10)进行充电。其中，N≥2。

Description

一种像素电路及其驱动方法、显示装置 技术领域
本公开涉及显示技术的领域，尤其涉及一种像素电路及其驱动方法、显示装置。
背景技术
目前，液晶显示器(Liquid Crystal Display，简称LCD)由于具有功耗小、微型化、轻薄等优点而得到越来越广泛的应用。
在LCD中的薄膜晶体管(Thin Film Transistor，简称TFT)中，可能由于扫描频率过高而导致对像素的充电时间不足。现有技术中，如图1所示，通常采用预充电(Precharge)来解决这一技术问题，即栅启动信号提前开启以使扫描线Scan提前输出信号(从时间段T1开始输出信号)，从而使TFT的栅极打开，这样就可以提前给像素充电，使得像素在实际充电时间段T2内便能更快速地充电到需要的电位。
然而，由于在预充电时间段T1和实际充电时间段T2中扫描线Scan上均需输入信号，并且在通过第N根扫描线Scan N进行充电时，第N+1根扫描线Scan N+1上需输入信号以进行预充电，这样可能会造成第N根扫描线Scan N与第N+1根扫描线Scan N+1之间的干扰，并且使得驱动扫描线的IC(Integrate Circuit，集成电路)或GOA(Gate Driver on Array，阵列基板行驱动技术)单元的负载过大，从而导致其输出不足。
发明内容
本公开的实施例提供一种像素电路及其驱动方法、显示装置，可利用光能对像素进行预充电，改善了现有技术中存在的上述问题。
根据本公开的第一方面，提供了一种像素电路，包括显示单元和第一预充电单元；所述第一预充电单元与所述显示单元、第N-1根扫描线和控制线相连，并且被配置用于将光能转化为电能，以及在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对所述显示单元进行预充电；所述显示单元还与第N根扫描线和数据线相连，并且被配置成在所述第N根扫描线的控制下，通过所述数据线对所述显示单元进行充电；其中，N≥2。
可选地，所述像素电路还包括第二预充电单元；所述第二预充电 单元与所述显示单元、所述第N-1根扫描线和所述控制线相连，并且被配置用于将光能转化为电能，以及在所述控制线和所述第N-1根扫描线的控制下，对所述显示单元进行反向预充电；其中，所述第一预充电单元和所述第二预充电单元不同时工作。
可选地，所述第一预充电单元包括第一晶体管、第二晶体管和光敏储能元件；所述第一晶体管的栅极与所述控制线相连，第一极与所述第N-1根扫描线相连，第二极与所述第二晶体管的栅极相连；所述第二晶体管的第一极与所述显示单元的第一端相连，第二极与所述光敏储能元件的第一极相连；所述光敏储能元件的第二极与所述显示单元的第二端相连。
可选地，在所述像素电路还包括第二预充电单元的情况下，所述第二预充电单元包括第三晶体管、第四晶体管和光敏储能元件；所述第三晶体管的栅极与所述控制线相连，第一极与所述第N-1根扫描线相连，第二极与所述第四晶体管的栅极相连；所述第四晶体管的第一极与所述显示单元的第一端相连，第二极与所述光敏储能元件的第二极相连；所述光敏储能元件的第一极与所述显示单元的第二端相连，其中，所述第一晶体管和所述第三晶体管中的每一个都为P型或N型晶体管，且所述第一晶体管和所述第三晶体管是互为不同类型的晶体。
可选地，所述显示单元包括第五晶体管、液晶电容和存储电容；所述第五晶体管的栅极与所述第N根扫描线相连，第一极与所述数据线相连，第二极与所述液晶电容和所述存储电容的第一端相连；所述液晶电容和所述存储电容的第二端与公共电压端相连。
根据本公开的第二方面，还提供了一种显示装置，包括上述的像素电路。
根据本公开的第三方面，还提供了一种像素电路的驱动方法，包括：第一预充电单元将光能转化为电能，并在控制线和第N-1根扫描线的控制下，采用转化的电能对与第N根扫描线相连的显示单元进行预充电；所述第N根扫描线的控制下，通过数据线对所述显示单元进行充电。
可选地，所述像素电路包括第二预充电单元，并且所述驱动方法包括：在第一帧，所述第一预充电单元将光能转化为电能，并在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对与所述第N 根扫描线相连的所述显示单元进行预充电；在所述第N根扫描线的控制下，通过所述数据线对所述显示单元进行充电；
在第二帧，所述第二预充电单元将光能转化为电能，并在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对与所述第N根扫描线相连的所述显示单元进行反向预充电；在所述第N根扫描线的控制下，通过所述数据线对所述显示单元进行反向充电；以及
重复所述第一帧和所述第二帧。
可选地，所述第一预充电单元包括第一晶体管、第二晶体管和光敏储能元件，所述第一预充电单元将光能转化为电能，并在控制线和第N-1根扫描线的控制下，采用转化的电能对与第N根扫描线相连的所述显示单元进行预充电，所述驱动方法还包括：在向所述第N-1根扫描线输入扫描信号的同时，向所述控制线输入信号，使得所述第一晶体管和所述第二晶体管导通，并且然后利用所述光敏储能元件转化的电能对与所述第N根扫描线相连的所述显示单元进行预充电。
可选地，在所述像素电路还包括第二预充电单元且所述第二预充电单元包括第三晶体管、第四晶体管和光敏储能元件的情况下，所述第二预充电单元将光能转化为电能，并在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对与所述第N根扫描线相连的所述显示单元进行反向预充电，所述驱动方法还包括：在向所述第N-1根扫描线输入扫描信号的同时，向所述控制线输入信号，使得所述第三晶体管和所述第四晶体管导通，并且然后利用所述光敏储能元件转化的电能对与所述第N根扫描线相连的所述显示单元进行反向预充电。
本公开的实施例中，第一预充电单元将光能转化为电能，并在控制线和第N-1根扫描线的控制下，采用转化的电能对与第N根扫描线相连的显示单元进行预充电。在此基础上，当第N根扫描线上输入信号后，通过数据线继续对与第N根扫描线相连的显示单元进行充电，可快速地使与第N根扫描线相连的显示单元充电到所需电位。由于无需在同一时刻使两根扫描线同时输入信号，而且本公开的实施例采用光能转换的电能进行预充电，因此改善了现有技术中两根扫描线同时输入信号造成的负载过大或扫描线之间相互干扰的问题。
附图说明
为了更清楚地说明本公开的实施例，下面将对实施例中使用的附 图作简单的介绍。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。
图1为现有技术提供的一种预充电电路的时序图；
图2为根据本公开的实施例的一种像素电路的示意图；
图3为根据本公开的另一实施例的一种像素电路的示意图；
图4为根据本公开的又一实施例的一种像素电路的示意图；
图5为根据本公开的再一实施例的一种像素电路的示意图；
图6为根据本公开的实施例的一种显示装置的像素电路的示意图；
图7为根据本公开的的实施例的一种像素电路的驱动方法的流程图。
图8为根据本公开的实施例的一种驱动像素电路的时序图。
附图说明：
10-显示单元；20-第一预充电单元；201-光敏储能元件；30-第二预充电单元。
具体实施方式
下面将结合附图，对本公开的实施例中的技术方案进行清楚、完整的描述。显然，所描述的实施例仅仅是本公开的一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开的实施例提供了一种像素电路，如图2所示，包括显示单元10和第一预充电单元20。
第一预充电单元20与显示单元10、第N-1根扫描线Scan N-1和控制线CL相连，并且被配置用于将光能转化为电能，以及在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的电能对显示单元10进行预充电。
显示单元10与第N根扫描线Scan N和数据线DL相连，并且被配置成在第N根扫描线Scan N的控制下，通过数据线DL对显示单元10进行充电。
在所述实施例中，N≥2。
当在第N-1根扫描线Scan N-1上输入信号后，数据线DL便可对 与第N-1根扫描线Scan N-1相连的显示单元10进行充电以进行显示。与此同时，与第N-1根扫描线Scan N-1相连的第一预充电单元20可以吸收光能以将其转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的共同控制下，为与第N根扫描线Scan N相连的显示单元10进行预充电。此时，由于第N根扫描线上没有输入信号，因此与第N根扫描线Scan N相连的显示单元10不进行显示。
需要说明的是，由于显示单元10在进行显示时可以发出光，因此第一预充电单元20可吸收与第N-1根扫描线Scan N-1相连的显示单元10发出的光以将其转化为电能。当然，第一预充电单元20也可利用背光源发出的光以产生电能。这可根据该像素电路所应用的不同显示装置而确定，其中，不管是何种类型的显示装置，第一预充电单元20都可利用显示装置自身发出的光，而进行光能到电能的转换。
在本公开的实施例中，第一预充电单元20将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的电能对与第N根扫描线Scan N相连的显示单元10进行预充电。在此基础上，当在第N根扫描线Scan N上输入信号后，通过数据线DL继续对与第N根扫描线Scan N相连的显示单元10进行充电，可快速地使与第N根扫描线Scan N相连的显示单元10充电到所需电位，而不受扫描频率的限制。由于无需在同一时刻在两根扫描线上同时输入信号，而且通过采用光能转换成的电能进行预充电，因此改善了现有技术中由于两根扫描线同时输入信号而造成的负载过大或扫描线之间相互干扰的问题。
在另一实施例中，上面所述的像素电路还可以包括第二预充电单元30，如图3所示。第二预充电单元30与显示单元10、第N-1根扫描线Scan N-1和控制线CL相连，用于将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，对显示单元10进行反向预充电；其中，第一预充电单元20和第二预充电单元30不同时工作。
当在第N-1根扫描线Scan N-1上输入信号后，数据线DL便可对与第N-1根扫描线Scan N-1相连的显示单元10进行充电以进行显示。与此同时，与第N-1根扫描线Scan N-1相连的第二预充电单元30可以吸收光能以将其转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的共同控制下，为与第N根扫描线Scan N相连的显示单元10进 行反向预充电。此时，由于第N根扫描线Scan N上没有输入信号，因此，与第N根扫描线相连的显示单元10不进行显示。
在此基础上，当第N根扫描线Scan N上输入信号后，通过数据线DL可继续对与第N根扫描线Scan N相连的显示单元10进行反向充电，从而可快速地使与第N根扫描线Scan N相连的显示单元10充电到所需电位。
为了使第一预充电单元20和第二预充电单元30不同时工作，可在控制线CL上输入不同的信号。例如，当在控制线CL上输入高电平信号时，第一预充电单元20工作而为显示单元10进行预充电，此时第二预充电单元30不工作。当在控制线CL上输入低电平信号时，第二预充电单元30工作而为显示单元10进行反向预充电，此时第一预充电单元20不工作。
需要说明的是，与第一预充电单元20类似，第二预充电单元30可吸收进行显示的显示单元10发出的光，而将其转化为电能，也可利用背光源发出的光以产生电能，这可根据该像素电路所应用的不同显示装置而定，其中，不管是何种类型的显示装置，第二预充电单元30都可利用显示装置自身发出的光，而进行光能到电能的转换。
此外，第二预充电单元30对显示单元10进行反向预充电，是相对第一预充电单元20对显示单元10进行充电而言的。基于此，本公开的实施例中，可将第一预充电单元20对显示单元10进行预充电称为正向预充电。
第二预充电单元30对显示单元10进行反向预充电表示当第二预充电单元30对显示单元10进行充电时，电流在显示单元10的流向与第一预充电单元20对显示单元10进行充电时，电流的流向相反。
液晶显示器中的液晶层两端的电压若第一端一直保持正电压，第二端一直保持负电压，或第一端一直保持负电压，第二端一直保持正电压，则液晶将一直向同一方向偏转。这样，容易使液晶老化。本公开的实施例中，利用第一预充电单元20和第二预充电单元30交替对显示单元10进行正、反向预充电，可使液晶显示器中液晶在不同方向偏转，从而可以改善液晶老化的问题，增加了液晶显示器的使用寿命。
在另一实施例中，如图4所示，第一预充电单元20包括第一晶体管T1、第二晶体管T2和光敏储能元件201；第一晶体管T1的栅极与 控制线CL相连，第一极与第N-1根扫描线Scan N-1相连，第二极与第二晶体管T2的栅极相连。
第二晶体管T2的第一极与显示单元10的第一端相连，第二极与光敏储能元件201的第一极相连。
光敏储能元件201的第二极与显示单元10的第二端相连。
此处，第一晶体管T1和第二晶体管T2可以均为N型晶体管或均为P型晶体管，或者其中一个为P型晶体管，另一个为N型晶体管，以使当在第N-1根扫描线Scan N-1上输入信号时，第二晶体管T2处于导通状态。
需要说明的是，第一预充电单元20还可以包括多个与第一晶体管T1和第二晶体管T2并联的开关晶体管。上述仅仅是对第一预充电单元20的举例说明，与第一预充电单元20功能相同的其它结构在此不再一一赘述，但都应当属于本公开的保护范围。
本公开的实施例中，以第一晶体管T1为N型晶体管为例，当控制线CL上输入高电平信号时，第一晶体管T1处于导通状态，第N-1根扫描线Scan N-1上输入的信号通过第一晶体管T1输入到第二晶体管T2的栅极，使得第二晶体管T2处于导通状态。此时，显示单元10和光敏储能元件201之间形成一个回路，因此当光敏储能元件201将光能转化为电能时，可以对与第N根扫描线Scan N相连的显示单元10进行预充电。
进一步，如图5所示，在像素电路还包括第二预充电单元30的情况下，第二预充电单元30包括第三晶体管T3、第四晶体管T4和光敏储能元件201。
第三晶体管T3的栅极与控制线CL相连，第三晶体管T3的第一极与第N-1根扫描线Scan N-1相连，第二极与第四晶体管T4的栅极相连。
第四晶体管T4的第一极与显示单元10的第一端相连，第二极与光敏储能元件201的第二极相连。
光敏储能元件201的第一极与显示单元10的第二端相连。
第一晶体管T1和第三晶体管T3中的每一个都为P型或N型晶体管，且所述第一晶体管和所述第三晶体管是互为不同类型的晶体管。
第一晶体管T1和第三晶体管T3是互为不同类型的晶体管指的是 如果第一晶体管T1为P型晶体管，则第三晶体管T3为N型晶体管；或者，如果第一晶体管T1为N型晶体管，则第三晶体管T3为P型晶体管。本公开的实施例中以第一晶体管T1为N型，第三晶体管T3为P型为例进行说明。
由于第一晶体管T1为N型，第三晶体管T3为P型，因此当控制线上输入高电平信号时，第一晶体管T1导通，第三晶体管T3截止；当控制线上输入低电平信号时，第三晶体管T3导通，第一晶体管T1截止。
第四晶体管T4可以为P型或N型晶体管，以使在第三晶体管T3导通时且在第N-1根扫描线Scan N-1输入信号时，第四晶体管T4处于导通状态。
需要说明的是，第二预充电单元30还可以包括多个与第三晶体管T3和第四晶体管T4并联的开关晶体管。上述仅仅是对第二预充电单元30的举例说明，与第二预充电单元30功能相同的其它结构在此不再一一赘述，但都应当属于本公开的保护范围。
另外，不对光敏储能元件201的第一极和第二极进行限定。例如，第一极是正极且第二极是负极；当然，替换地，第二极可以是负极，且第一极是正极。
此外，不对所有晶体管的第一极和第二极进行限定。例如，第一极可以是漏极，且第二极是源极；替换地，第一极是源极，且第二极是漏极。
当控制线CL上输入低电平信号时，第三晶体管T3处于导通状态，第N-1根扫描线Scan N-1上输入的信号通过第三晶体管T3输入到第四晶体管T4的栅极，使得第四晶体管T4处于导通状态。此时，显示单元10和光敏储能元件201之间形成一个回路，光敏储能元件201将光能转化为电能，从而可以对与第N根扫描线Scan N相连的显示单元10进行预充电。
本公开的实施例中，当控制线CL上输入信号时，只能使第一晶体管T1或第三晶体管T3中的一个处于导通状态，从而形成一个回路以便对显示单元10进行充电。由于第一预充电单元20中的光敏储能元件201的第一极与显示单元10的第一端相连，第二极与显示单元10的第二端相连，而第二预充电单元30中的光敏储能元件201的第二极 与显示单元10的第一端相连，第一极与显示单元10的第二端相连，因此，第一预充电单元20和第二预充电单元30对显示单元10的充电方向是相反的。基于此，本公开的实施例中，可以通过控制线CL和第N-1根扫描线Scan N-1的信号来控制第一预充电单元20和第二预充电单元30在不同时刻分别对与第N根扫描线Scan N相连的显示单元10进行正向预充电和反向预充电，使得液晶显示器中的液晶可以在不同的方向进行偏转，以防止液晶的老化，增长了显示器的使用寿命。
可选地，如图4和图5所示，显示单元10包括第五晶体管T5、液晶电容Clc和存储电容Cst。
第五晶体管T5的栅极与第N根扫描线Scan N相连，第一极与数据线DL相连，第二极与液晶电容Clc和存储电容Cst的第一端相连；液晶电容Clc和存储电容Cst的第二端与公共电压端Vcom相连。
液晶电容Clc用于在显示时提供电量，存储电容Cst用于为液晶显示器存储电量以便在显示过程中电量不足时为显示补充电量。
本公开的实施例中，当第N根扫描线Scan N上输入信号时，第五晶体管T5处于导通状态，数据线DL上输入的信号通过第五晶体管T5继续输入到显示单元10的液晶电容Clc和存储电容Cst以进行充电，显示单元10在数据线DL和公共电压端Vcom提供的信号的控制下可以进行显示。
应当指出，在本发明的上述实施例中，显示单元的第一端、以及液晶电容Clc和存储电容Cst的第一端连接到像素电极，显示单元的第二端、以及液晶电容Clc和存储电容Cst的第二端连接到公共电压端Vcom(公共电极)相连。
本公开的实施例还提供了一种显示装置，包括上述的像素电路。
如图6所示，每行扫描线都连接多个像素单元，除与第一根扫描线Scan1相连的像素单元外，与其它扫描线相连的像素单元都包括上述的像素电路。其中，与第一根扫描线Scan1相连的像素单元可以只包括显示单元10，其可采用提前开启栅启动信号的方式进行预充电。
当第N-1根扫描线Scan N-1上输入信号时，数据线DL可对与第N-1根扫描线Scan N-1相连的所有显示单元10进行充电，以使与第N-1根扫描线Scan N-1相连的所有显示单元10进行显示。与此同时，与第N-1根扫描线Scan N-1相连的所有第一预充电单元20或所有第二 预充电单元30便可以吸收光能，并将光能转化为电能，从而可以为与其相连且还与第N根扫描线Scan N相连的显示单元10进行正向或反向预充电。此时，由于第N根扫描线Scan N上没有输入信号，因此与第N根扫描线相连的所有显示单元10不进行显示。
在此基础上，当第N根扫描线Scan N上输入信号时，通过数据线DL继续对与第N根扫描线Scan N相连的显示单元10进行正向或反向充电，从而可快速地使与第N根扫描线Scan N相连的显示单元10充电到所需电位。
本公开的实施例中的显示装置可以为：手机、平板电脑、显示器、笔记本电脑、数码相机等任何具有显示功能的产品或部件。
本公开的实施例还提供一种上述像素电路的驱动方法，如图7所示，所述驱动方法包括：
在步骤S 100处，第一预充电单元20将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的电能对与第N根扫描线Scan N相连的显示单元10进行预充电。
当第N-1根扫描线Scan N-1上输入信号时，与第N-1根扫描线Scan N-1相连的第一预充电单元20在第N-1根扫描线Scan N-1和控制线CL的控制下，将光能转化为电能，以便为与第N根扫描线Scan N相连的显示单元10进行预充电。
在步骤S101处，在第N根扫描线Scan N的控制下，通过数据线DL对显示单元10进行充电。
当第N根扫描线Scan N上输入信号时，(此时，第N-1根扫描线Scan N-1上停止输入信号，并且第一预充电单元20对与第N根扫描线Scan N相连的显示单元10进行预充电的过程结束)，数据线DL上的输入信号继续为与第N根扫描线Scan N相连的显示单元10进行充电。
本公开的实施例中，第一预充电单元20将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的光能对与第N根扫描线Scan N相连的显示单元10进行预充电。在此基础上，当第N根扫描线Scan N上输入信号后，通过数据线DL继续对与第N根扫描线Scan N相连的显示单元10进行充电，与第N根扫描线Scan N相连的显示单元10可快速地被充电到所需电位，从而可不受扫描频率的限制。由于无需在同一时刻在两根扫描线上同时输入信号，而且本 公开的实施例采用由光能转换的电能进行预充电，因此改善了现有技术中两根扫描线上同时输入信号时造成的负载过大或扫描线之间相互干扰的问题。
在像素电路包括第二预充电单元30的情况下，上述驱动方法可参照图8的时序图来解释。
如图8所示，在第一帧，第一预充电单元20将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的电能对与第N根扫描线Scan N相连的显示单元10进行预充电；并且在第N根扫描线Scan N的控制下，通过数据线DL对显示单元10进行充电。
在第一帧，在第N-1根扫描线Scan N-1上输入信号后，可通过控制控制线CL上输入的信号，使第一预充电单元20对与第N根扫描线Scan N相连的显示单元10进行预充电，而使第二预充电单元30转化的电能不能到达与第N根扫描线Scan N相连的显示单元10。
在此基础上，在第N根扫描线Scan N上输入信号时，数据线DL继续对与第N根扫描线Scan N相连的显示单元10进行充电。
如图8所示，在第二帧，第二预充电单元30将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的电能对与第N根扫描线Scan N相连的显示单元10进行反向预充电；并且在第N根扫描线Scan N的控制下，通过数据线DL对显示单元10进行反向充电。
在第二帧，在第N-1根扫描线Scan N-1上输入信号后，可通过控制控制线CL上输入的信号，使第二预充电单元30对与第N根扫描线Scan N相连的显示单元10进行反向预充电，而使第一预充电单元20转化的电能不能到达与第N根扫描线Scan N相连的显示单元10。
在此基础上，在第N根扫描线Scan N上输入信号时，数据线DL继续对与第N根扫描线Scan N相连的显示单元10进行反向充电。
然后，重复在所述第一帧处和所述第二帧处采取的步骤。
需要说明的是，第二预充电单元30对显示单元10进行反向预充电，是相对第一预充电单元20对显示单元10进行充电的方向而言的。本公开的实施例中，可将第一预充电单元20对显示单元10进行预充电称为正向预充电。
在本公开的实施例中，在第一帧和第二帧处，分别对显示单元10进行正向预充电和反向预充电，使显示单元10中电流的流向相反，从而使液晶在不同的方向偏转，这防止液晶的老化，延长了液晶显示器的使用寿命。
在第一预充电单元20包括第一晶体管T1、第二晶体管T2和光敏储能元件201的情况下，步骤S100具体包括：
在向第N-1根扫描线Scan N-1输入信号的同时，向控制线CL输入信号，使第一晶体管T1和第二晶体管T2导通。此时，利用光敏储能元件201转化的电能对与第N根扫描线Scan N相连的显示单元10进行预充电。
例如，在第一晶体管T1为N型晶体管的情况下，在第N-1根扫描线Scan N-1上输入信号时，可通过在控制线CL上输入高电平信号，来使第一晶体管T1处于导通状态。第N-1根扫描线Scan N-1上输入的信号通过第一晶体管T1被输入到第二晶体管T2的栅极，从而使得第二晶体管T2处于导通状态。此时，光敏储能元件201和与其以及第N根扫描线Scan N均相连的显示单元10形成一个回路，并且光敏储能元件201将光能转化的电能，从而可以采用转化的电能通过该回路对该显示单元10进行预充电。
此外，在像素电路还包括第二预充电单元30且第二预充电单元30包括第三晶体管T3、第四晶体管T4和光敏储能元件201的情况下，第二预充电单元30将光能转化为电能，并在控制线CL和第N-1根扫描线Scan N-1的控制下，采用转化的电能对与第N根扫描线Scan N相连的显示单元10进行反向预充电，包括：向第N-1根扫描线Scan N-1输入扫描信号的同时，向控制线CL输入信号，使得第三晶体管T3和第四晶体管T4导通，从而光敏储能元件201转化的电能可以被利用来对与第N根扫描线Scan N相连的显示单元10进行反向预充电。
例如，在第三晶体管T3为P型晶体管的情况下，在第N-1根扫描线Scan N-1上输入信号时，可在控制线CL上输入低电平信号，来使第三晶体管T3处于导通状态。第N-1根扫描线Scan N-1上输入的信号通过第三晶体管T3输入到第四晶体管T4的栅极，使得第四晶体管T4处于导通状态。此时，光敏储能元件201和与其以及第N根扫描线Scan N均相连的显示单元10形成一个回路，光敏储能元件201将光能 转化的电能，从而可以采用转化的电能通过该回路给显示单元10进行反向预充电。
下面提供具体实施例以详细描述上述显示装置的工作过程。
如图6所示，与第一根扫描线Scan 1相连的像素单元只包括显示单元10。显示单元10包括第五晶体管T5、液晶电容Clc和存储电容Cst。第五晶体管T5的栅极与第一根扫描线Scan 1相连，源极与数据线DL相连，漏极与液晶电容Clc和存储电容Cst的第一端相连；液晶电容Clc和存储电容Cst的第二端与公共电压端Vcom相连。
与除第一根扫描线Scan 1外的其它扫描线相连的像素单元，不仅包括显示单元10，还包括第一预充电单元20和第二预充电单元30。显示单元10包括第五晶体管T5、液晶电容Clc和存储电容Cst。第一预充电单元20包括第一晶体管T1、第二晶体管T2和光敏储能元件201。第二预充电单元30包括第三晶体管T3、第四晶体管T4和光敏储能元件201。第一晶体管T1、第二晶体管T2、第四晶体管T4、第五晶体管T5为N型晶体管，第三晶体管T3为P型晶体管。并且，该像素单元中的各部件的连接关系如下：
第五晶体管T5的栅极与第N根扫描线Scan N相连，源极与数据线DL相连，漏极与液晶电容Clc和存储电容Cst的第一端相连；液晶电容Clc和存储电容Cst的第二端与公共电压端Vcom相连；
第一晶体管T1的栅极与控制线CL相连，源极与第N-1根扫描线Scan N-1相连，漏极与第二晶体管T2的栅极相连；第二晶体管T2的源极与显示单元10的第一端相连，漏极与第一预充电单元20中光敏储能元件201的正极相连；第一预充电单元20中的光敏储能元件201的负极与显示单元10的第二端相连；
第三晶体管T3的栅极与控制线CL相连，源极与第N-1根扫描线Scan N-1相连，漏极与第四晶体管T4的栅极相连；第四晶体管T4的源极与显示单元10的第一端相连，漏极与第二预充电单元30中的光敏储能元件201的负极相连；第二预充电单元30中的光敏储能元件201的正极与显示单元10的第二端相连。
如图8所示，在第一帧处，栅启动信号提前开启以使第一根扫描线Scan 1上提前输入信号，使得与第一根扫描线Scan 1相连的所有第五晶体管T5处于导通状态。数据线DL上输入的信号通过第五晶体T5 输入到像素单元的液晶电容Clc和存储电容Cst进行预充电。在第一根扫描线Scan 1的充电时间段，通过数据线DL继续对与第一根扫描线Scan 1相连的所有显示单元10进行充电，这样显示单元10中的液晶电容Clc和存储电容Cst便可以快速充电到所需电位。在对与第一根扫描线Scan 1相连的所有显示单元10进行充电的同时，控制线CL输出高电平信号，使得与第二根扫描线Scan 2相连的像素单元中的第一晶体管T1处于导通状态，并且第三晶体管T3截止。此时，第一根扫描线Scan 1上输入的信号通过第一晶体管T1使第二晶体管T2处于导通状态，使得第一预充电单元20中的光敏储能元件201和与其相连的显示单元10形成回路。光敏储能元件201相当于一个电源，利用转化的电能向回路中液晶电容Clc和存储电容Cst进行预充电。当第一根扫描线Scan 1上停止输入信号时，第二根扫描线Scan 2上输入信号，使得与第二根扫描线Scan 2相连的所有第五晶体管T5处于导通状态。数据线DL提供的信号通过第五晶体管T5继续输入到液晶电容Clc和存储电容Cst进行充电。由于在第一根扫描线Scan 1上输入信号时，对与第二根扫描线Scan 2相连的显示单元10进行过预充电，因此在第二根扫描线Scan 2上输入信号时，与第二根扫描线Scan 2相连的显示单元10便可以快速充电到所需电位，并进行显示。以此类推，与第三根扫描线Scan 3、第四根扫描线Scan 4…第N根扫描线Scan N相连的显示单元10都依次进行预充电及继续充电。
在第二帧处，栅启动信号提前开启以使第一根扫描线Scan 1上提前输入信号，使得与第一根扫描线Scan 1相连的所有第五晶体管T5处于导通状态，数据线DL输入的信号通过第五晶体T5输入到像素单元的液晶电容Clc和存储电容Cst进行预充电。在第一根扫描线Scan 1的充电时间段，数据线DL继续对与第一根扫描线Scan1相连的所有显示单元10进行充电，这样显示单元10中的液晶电容Clc和存储电容Cst便可以快速充电到所需电位。在对与第一根扫描线Scan1相连的所有显示单元10进行充电的同时，向控制线CL输入低电平信号，使得与第二根扫描线Scan 2相连的像素单元中的第三晶体管T3处于导通状态，第一晶体管T1截止。第一根扫描线Scan 2上的信号通过第三晶体管T3使第四晶体管T4处于导通状态，使得第二预充电单元20中的光敏储能元件201和与其相连的显示单元10形成回路。光敏储能元件201 相当于一个电源，利用转化的电能向回路中液晶电容Clc和存储电容Cst进行与第一帧预充电方向相反的预充电。当第一根扫描线Scan 1上停止输入信号时，第二根扫描线Scan 2上输入信号，使得与第二根扫描线Scan 2相连的所有第五晶体管T5处于导通状态。数据线DL上的信号通过第五晶体管T5继续输入到液晶电容Clc和存储电容Cst进行反向充电。由于在第一根扫描线Scan 1上输入信号时，与第二根扫描线Scan 2相连的显示单元10进行过预充电，因此在第二根扫描线Scan 2上输入信号时，与第二根扫描线Scan 2相连的显示单元10便可以快速充电到所需电位，并进行显示。以此类推，与第三根扫描线Scan3、第四根扫描线Scan 4…第N根扫描线Scan N相连的显示单元10都依次进行反向预充电及继续充电。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中，该程序在执行时，执行包括上述方法实施例的步骤。前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述仅为本公开的具体实施方式，但本公开的保护范围并不局限于此。任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，它们都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种像素电路，包括显示单元和第一预充电单元；
    所述第一预充电单元与所述显示单元、第N-1根扫描线和控制线相连，并且被配置用于将光能转化为电能，以及在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对所述显示单元进行预充电；
    所述显示单元还与第N根扫描线和数据线相连，并且被配置成在所述第N根扫描线的控制下，通过所述数据线对所述显示单元进行充电；
    其中，N≥2。
  2. 根据权利要求1所述的像素电路，还包括第二预充电单元；
    所述第二预充电单元与所述显示单元、所述第N-1根扫描线和所述控制线相连，并且被配置用于将光能转化为电能，以及在所述控制线和所述第N-1根扫描线的控制下，对所述显示单元进行反向预充电；
    其中，所述第一预充电单元和所述第二预充电单元不同时工作。
  3. 根据权利要求1或2所述的像素电路，其中，所述第一预充电单元包括第一晶体管、第二晶体管和光敏储能元件；
    所述第一晶体管的栅极与所述控制线相连，第一极与所述第N-1根扫描线相连，第二极与所述第二晶体管的栅极相连；
    所述第二晶体管的第一极与所述显示单元的第一端相连，第二极与所述光敏储能元件的第一极相连；
    所述光敏储能元件的第二极与所述显示单元的第二端相连。
  4. 根据权利要求3所述的像素电路，其中，在所述像素电路还包括第二预充电单元的情况下，所述第二预充电单元包括第三晶体管、第四晶体管和光敏储能元件；
    所述第三晶体管的栅极与所述控制线相连，第一极与所述第N-1根扫描线相连，第二极与所述第四晶体管的栅极相连；
    所述第四晶体管的第一极与所述显示单元的第一端相连，第二极与所述光敏储能元件的第二极相连；
    所述光敏储能元件的第一极与所述显示单元的第二端相连；
    其中，所述第一晶体管和所述第三晶体管中的每一个都为P型或N 型晶体管，且所述第一晶体管和所述第三晶体管是互为不同类型的晶体管。
  5. 根据权利要求1所述的像素电路，所述显示单元包括第五晶体管、液晶电容和存储电容；
    所述第五晶体管的栅极与所述第N根扫描线相连，第一极与所述数据线相连，第二极与所述液晶电容和所述存储电容的第一端相连；
    所述液晶电容和所述存储电容的第二端与公共电压端相连。
  6. 一种显示装置，包括权利要求1-5中任一项所述的像素电路。
  7. 一种如权利要求1-5中任一项所述的像素电路的驱动方法，包括：
    第一预充电单元将光能转化为电能，并在控制线和第N-1根扫描线的控制下，采用转化的电能对与第N根扫描线相连的显示单元进行预充电；
    在所述第N根扫描线的控制下，通过数据线对所述显示单元进行充电。
  8. 根据权利要求7所述的驱动方法，其中所述像素电路包括第二预充电单元，并且其中所述驱动方法包括：
    在第一帧，所述第一预充电单元将光能转化为电能，并在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对与所述第N根扫描线相连的所述显示单元进行预充电；在所述第N根扫描线的控制下，通过所述数据线对所述显示单元进行充电；
    在第二帧，所述第二预充电单元将光能转化为电能，并在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对与所述第N根扫描线相连的所述显示单元进行反向预充电；在所述第N根扫描线的控制下，通过所述数据线对所述显示单元进行反向充电；
    重复所述第一帧和所述第二帧的步骤。
  9. 根据权利要求7或8所述的驱动方法，其中所述第一预充电单元包括第一晶体管、第二晶体管和光敏储能元件，所述第一预充电单元将光能转化为电能，并在控制线和第N-1根扫描线的控制下，采用转化的电能对与第N根扫描线相连的所述显示单元进行预充电，所述驱动方法还包括：
    在向所述第N-1根扫描线输入扫描信号的同时，向所述控制线输 入信号，使得所述第一晶体管和所述第二晶体管导通，并且然后利用所述光敏储能元件转化的电能对与所述第N根扫描线相连的所述显示单元进行预充电。
  10. 根据权利要求9所述的驱动方法，其中在所述像素电路还包括第二预充电单元且所述第二预充电单元包括第三晶体管、第四晶体管和光敏储能元件的情况下，所述第二预充电单元将光能转化为电能，并在所述控制线和所述第N-1根扫描线的控制下，采用转化的电能对与所述第N根扫描线相连的所述显示单元进行反向预充电，所述驱动方法还包括：
    在向所述第N-1根扫描线输入扫描信号的同时，向所述控制线输入信号，使得所述第三晶体管和所述第四晶体管导通，并且然后利用所述光敏储能元件转化的电能对与所述第N根扫描线相连的所述显示单元进行反向预充电。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105489186B (zh) * 2016-01-25 2018-03-30 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
KR102518746B1 (ko) * 2016-06-01 2023-04-07 삼성디스플레이 주식회사 표시 장치
CN106959563B (zh) * 2017-05-26 2020-08-18 上海天马微电子有限公司 一种阵列基板及其驱动方法、显示面板、显示装置
KR102362880B1 (ko) * 2017-07-03 2022-02-15 삼성디스플레이 주식회사 표시 장치 및 이를 이용한 표시 패널의 구동 방법
CN108538254A (zh) * 2018-04-25 2018-09-14 京东方科技集团股份有限公司 显示面板及其驱动方法、显示装置
US10885864B2 (en) * 2018-10-31 2021-01-05 HKC Corporation Limited Pre-charge method for display panel, display panel, and display device
CN110163172B (zh) * 2019-05-27 2021-05-07 京东方科技集团股份有限公司 纹理检测电路、充电电路及驱动方法、触控显示面板
CN110277053B (zh) 2019-06-25 2020-12-08 京东方科技集团股份有限公司 一种显示面板及其制作方法、驱动方法、显示装置
CN111312187A (zh) * 2020-03-05 2020-06-19 深圳市华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、液晶显示面板
CN113093419B (zh) * 2021-04-19 2023-01-24 天马微电子股份有限公司 一种显示面板和显示装置
CN115547271B (zh) * 2021-12-30 2023-08-25 惠科股份有限公司 显示面板和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007005938A (ja) * 2005-06-21 2007-01-11 Canon Inc 光電変換装置及びその駆動方法
CN102999227A (zh) * 2011-09-08 2013-03-27 瀚宇彩晶股份有限公司 光学触控显示面板及其触控感测方法
CN103413532A (zh) * 2013-07-26 2013-11-27 京东方科技集团股份有限公司 像素驱动电路和方法、阵列基板及液晶显示装置
CN104155820A (zh) * 2014-08-13 2014-11-19 深圳市华星光电技术有限公司 一种阵列基板及驱动方法
CN105489186A (zh) * 2016-01-25 2016-04-13 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050009385A1 (en) * 2003-06-23 2005-01-13 Korsunsky Iosif R. Electrical connector having improved contacts
JP4521176B2 (ja) * 2003-10-31 2010-08-11 東芝モバイルディスプレイ株式会社 表示装置
JP2005300948A (ja) * 2004-04-13 2005-10-27 Hitachi Displays Ltd 表示装置及びその駆動方法
US20060262055A1 (en) * 2005-01-26 2006-11-23 Toshiba Matsushita Display Technology Plane display device
CN101071208A (zh) * 2006-05-12 2007-11-14 群康科技(深圳)有限公司 液晶面板、液晶显示装置及移动电话
US20130141417A1 (en) * 2011-12-02 2013-06-06 Chenghung Chen Drive Circuit, LCD Panel Module, LCD Device, and Driving Method
CN102402960A (zh) * 2011-12-02 2012-04-04 深圳市华星光电技术有限公司 驱动电路、液晶面板模组、液晶显示装置及一种驱动方法
CN102738080B (zh) * 2012-07-20 2014-06-18 深圳市华星光电技术有限公司 具有嵌入式光伏电池的阵列基板的制作方法
US8859346B2 (en) 2012-07-20 2014-10-14 Shenzhen China Star Optoelectronics Technology Co., Ltd Method for manufacturing array substrate with embedded photovoltaic cell

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007005938A (ja) * 2005-06-21 2007-01-11 Canon Inc 光電変換装置及びその駆動方法
CN102999227A (zh) * 2011-09-08 2013-03-27 瀚宇彩晶股份有限公司 光学触控显示面板及其触控感测方法
CN103413532A (zh) * 2013-07-26 2013-11-27 京东方科技集团股份有限公司 像素驱动电路和方法、阵列基板及液晶显示装置
CN104155820A (zh) * 2014-08-13 2014-11-19 深圳市华星光电技术有限公司 一种阵列基板及驱动方法
CN105489186A (zh) * 2016-01-25 2016-04-13 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置

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