WO2017101738A1 - 静电卡盘机构以及半导体加工设备 - Google Patents

静电卡盘机构以及半导体加工设备 Download PDF

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Publication number
WO2017101738A1
WO2017101738A1 PCT/CN2016/109237 CN2016109237W WO2017101738A1 WO 2017101738 A1 WO2017101738 A1 WO 2017101738A1 CN 2016109237 W CN2016109237 W CN 2016109237W WO 2017101738 A1 WO2017101738 A1 WO 2017101738A1
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Prior art keywords
edge
wafer
electrostatic
temperature
electrostatic chuck
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PCT/CN2016/109237
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English (en)
French (fr)
Inventor
彭宇霖
刘海鹰
Original Assignee
北京北方微电子基地设备工艺研究中心有限责任公司
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Application filed by 北京北方微电子基地设备工艺研究中心有限责任公司 filed Critical 北京北方微电子基地设备工艺研究中心有限责任公司
Priority to SG11201805094RA priority Critical patent/SG11201805094RA/en
Priority to KR1020187018849A priority patent/KR102213395B1/ko
Priority to JP2018531072A priority patent/JP6663994B2/ja
Publication of WO2017101738A1 publication Critical patent/WO2017101738A1/zh
Priority to US16/008,803 priority patent/US10985045B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23Q—DETAILS, COMPONENTS, OR ACCESSORIES FOR MACHINE TOOLS, e.g. ARRANGEMENTS FOR COPYING OR CONTROLLING; MACHINE TOOLS IN GENERAL CHARACTERISED BY THE CONSTRUCTION OF PARTICULAR DETAILS OR COMPONENTS; COMBINATIONS OR ASSOCIATIONS OF METAL-WORKING MACHINES, NOT DIRECTED TO A PARTICULAR RESULT
    • B23Q3/00—Devices holding, supporting, or positioning work or tools, of a kind normally removable from the machine
    • B23Q3/15—Devices for holding work using magnetic or electric force acting directly on the work
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4871—Bases, plates or heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
    • H02N13/00—Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect

Definitions

  • the present invention relates to the field of semiconductor device manufacturing, and in particular to an electrostatic chuck mechanism and a semiconductor processing apparatus.
  • an electrostatic chuck In the process of manufacturing integrated circuits and Micro-Electro-Mechanical Systems (MEMS), especially in the implementation of plasma etching, physical vapor deposition (PVD), chemical vapor deposition (Chemical Vapor)
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • an electrostatic chuck In the process of Deposition (referred to as CVD), an electrostatic chuck is often used to carry and heat a workpiece such as a wafer, and the electrostatic chuck also supplies a DC bias to a workpiece such as a wafer and controls the temperature of the surface of the workpiece to be processed. .
  • FIG. 1 is a schematic view showing the structure of a typical electrostatic chuck mechanism.
  • the electrostatic chuck mechanism includes an electrostatic chuck 8 and an edge assembly.
  • the electrostatic chuck 8 is used to fix the wafer 5 on its upper surface by electrostatic adsorption, and a heater is disposed in the electrostatic chuck 8 for controlling the temperature of the wafer 5.
  • the edge assembly includes a focus ring 6, a base ring 7 and an insulating ring 9 which are sequentially stacked from top to bottom, wherein the insulating ring 9 is fixed to the mounting fixture 10 for supporting the electrostatic chuck 8.
  • Both the focus ring 6 and the base ring 7 are wrapped around the electrostatic chuck 8, the focus ring 6 is used to form a boundary capable of confining the plasma inside thereof; the base ring 7 is for supporting the focus ring 6, and protecting the electrostatic chuck 8 The peripheral wall is not etched by the plasma.
  • the heater in the electrostatic chuck 8 cannot control the temperature of the wafer 5 near its edge (since the diameter of the wafer 5 is slightly larger than the outer diameter of the electrostatic chuck 8, the heater cannot control the periphery of the wafer 5 not with the electrostatic chuck 8
  • the temperature of the portion in contact with each other causes temperature unevenness in the edge region and the central region of the wafer 5, failing to meet the requirements of the 28-20 nm technique for etching uniformity of the edge region and the central region of the wafer 5.
  • the present invention aims to at least solve one of the technical problems existing in the prior art, and proposes an electrostatic chuck mechanism and a semiconductor processing apparatus, which can individually adjust the temperature of the center area and the edge area of the wafer, thereby realizing the edge area of the wafer.
  • the temperature difference between the center and the center is compensated, which in turn improves process uniformity.
  • An electrostatic chuck mechanism for the purpose of the present invention, comprising a base and an edge assembly, wherein the base includes a bearing surface for carrying a wafer, and surrounding the bearing surface and located at a stepped surface at the edge of the wafer, and the stepped surface is lower than the bearing surface; the edge assembly includes a focus ring, a base ring and an insulating ring, the focus ring being circumferentially disposed on the stepped surface; the base ring Provided around an outer peripheral wall of the base; the insulating ring is disposed at a bottom of the base and supports the base; the electrostatic chuck mechanism further includes a main body electrostatic heating layer and an edge electrostatic heating layer, wherein The main body electrostatic heating layer is disposed on the bearing surface for electrostatically adsorbing the wafer and can adjust a temperature of the wafer; the edge electrostatic heating layer is disposed on the step surface for electrostatic adsorption The focus ring is described and the temperature of the focus ring can be adjusted.
  • the edge electrostatic heating layer comprises an edge heating layer and an edge insulating layer disposed in this order from bottom to top, wherein the focus ring is superposed on the edge insulating layer, and the edge insulating layer is disposed in the edge insulating layer a first DC electrode that generates an electrostatic attraction force to the focus ring by applying a direct current to the first DC electrode; the edge heating layer is configured to heat the focus ring by heat conduction.
  • the main body electrostatic heating layer includes a main body heating layer and a main body insulating layer which are disposed in this order from bottom to top, wherein the wafer is stacked on the main body insulating layer, and the main insulating layer is provided with a first a DC electrode that generates an electrostatic attraction force to the wafer by applying a direct current to the second DC electrode; the body heating layer is for heating the wafer by heat conduction.
  • the edge electrostatic heating layer comprises an edge insulating layer
  • the focusing ring is superposed on the edge insulating layer
  • a first direct current electrode is disposed in the edge insulating layer, and the first direct current electrode is A direct current is generated to generate an electrostatic attraction force to the focus ring; and a first heating element is further disposed in the edge insulating layer for heating the focus ring by heat conduction.
  • the main body electrostatic heating layer comprises a main body insulating layer
  • the wafer is stacked on the main body insulating layer, and a second direct current electrode is disposed in the main body insulating layer, and the second direct current electrode is passed through A direct current is generated to generate an electrostatic adsorption force to the wafer; and a second heating element is further disposed in the main body insulating layer for heating the wafer by heat conduction.
  • a first channel is disposed in the edge electrostatic heating layer for conveying heat exchange gas between the focus ring and the edge electrostatic heating layer.
  • a second passage is disposed in the main body electrostatic heating layer for conveying the heat exchange gas toward the upper portion of the main body electrostatic heating layer.
  • the electrostatic chuck mechanism further includes a radio frequency source for simultaneously supplying radio frequency energy to the wafer and the focus ring.
  • the electrostatic chuck mechanism further includes a main body RF source and an edge RF source, wherein the main RF source is configured to provide RF energy to the wafer; A radio frequency source is used to provide radio frequency energy to the focus ring.
  • the electrostatic chuck mechanism further includes an edge temperature sensor, a center temperature sensor, and a temperature control unit, wherein the edge temperature sensor is disposed in the base, and Near the edge of the wafer to detect the temperature at the edge of the wafer and to the temperature control unit; the center temperature sensor is disposed within the pedestal and near the center of the wafer And detecting a temperature at a center of the wafer and transmitting to the temperature control unit; the temperature control unit is configured to control an operation state of the edge electrostatic heating layer according to a temperature at the edge to control the The temperature of the ring is controlled to control the temperature at the edge of the wafer; and the operating state of the body electrostatic heating layer is controlled according to the temperature at the center to control the temperature at the center of the wafer.
  • the present invention also provides a semiconductor processing apparatus including a reaction chamber and an electrostatic chuck mechanism disposed therein, the electrostatic chuck mechanism for carrying a wafer, and adjusting a temperature of the wafer
  • the electrostatic chuck mechanism adopts the electrostatic chuck mechanism provided by any of the above aspects of the present invention.
  • the electrostatic chuck mechanism provided by the present invention adjusts the temperature of the wafer by providing a main body electrostatic heating layer on the bearing surface of the base; and at the same time, an edge electrostatic heating layer is disposed on the step surface of the base to adjust the temperature of the gathering ring and Further adjusting the temperature at the edge of the wafer, the temperature of the central region and the edge region of the wafer can be individually adjusted, so that the temperature difference between the edge region of the wafer and the central region can be compensated, thereby improving the process uniformity.
  • the main body electrostatic heating layer can also electrostatically adsorb the wafer to achieve the fixing of the wafer; at the same time, the edge electrostatic heating layer can also electrostatically adsorb the focus ring, thereby making the focus ring and the edge electrostatic heating layer more closely, thereby improving the pair of gathering rings.
  • the heat transfer effect can also be applied to the wafer to achieve the fixing of the wafer; at the same time, the edge electrostatic heating layer can also electrostatically adsorb the focus ring, thereby making the focus ring and the edge electrostatic heating layer more closely, thereby improving the pair of gathering rings. The heat transfer effect.
  • the semiconductor processing apparatus provided by the present invention can separately adjust the temperature of the central area and the edge area of the wafer by using the above-mentioned electrostatic chuck mechanism provided by the present invention, thereby realizing the temperature difference between the edge area of the wafer and the central area. Compensation, which in turn can improve process uniformity.
  • FIG. 1 is a schematic structural view of a typical electrostatic chuck mechanism
  • FIG. 2 is a cross-sectional view of an electrostatic chuck mechanism according to an embodiment of the present invention
  • Figure 3 is an enlarged view of the area I in Figure 2;
  • FIG. 4 is a partial cross-sectional structural view of an electrostatic chuck mechanism according to an embodiment of the present invention.
  • the electrostatic chuck mechanism includes a base 11, an edge assembly, a main body electrostatic heating layer 17, and an edge electrostatic heating layer 18.
  • the susceptor 11 includes a bearing surface 111 for carrying the wafer 14 , and a step surface 112 surrounding the bearing surface 111 and located at the edge of the wafer 14 , and the step surface 112 is lower than the bearing surface 111 .
  • a central portion of the upper surface of the susceptor 11 is formed with a boss having an upper surface serving as a bearing surface 111 for carrying the wafer 14, and an edge region of the upper surface of the susceptor 11, that is, surrounding the periphery of the boss
  • the annular surface serves as a stepped surface 112.
  • the diameter of the wafer 14 is slightly larger than the diameter of the bearing surface 111, so that a portion of the edge of the wafer 14 protrudes from the boundary of the bearing surface 111 without coming into contact with the bearing surface 111.
  • the edge assembly includes a focus ring 12, a base ring 13 and an insulating ring 15, wherein the focus ring 12 is disposed around the step surface 112, and a portion of the wafer 14 that protrudes from the boundary of the bearing surface 111 is superposed on the focus ring. 12, so that the focus ring 12 can generate heat transfer with the edge of the wafer 14.
  • the base ring 13 is disposed around the outer peripheral wall of the base 11 and is located between the focus ring 12 and the insulating ring 15 in the vertical direction for supporting the focus ring 12 and protecting the outer peripheral wall of the base 11 from plasma. eclipse.
  • An insulating ring 15 is disposed at the bottom of the base 11, and It is fixed to the mounting fixture 16 for supporting the base 11.
  • the focus ring 12, the base ring 13 and the insulating ring 15 can be made of insulating materials such as quartz (SiO2), ceramic (Al2O3) and silicon carbide according to the requirements of different processes, and the materials of the three can be the same or different.
  • the main body electrostatic heating layer 17 is disposed on the carrying surface 111 for electrostatically adsorbing the wafer 14 and adjusting the temperature of the wafer 14.
  • the main body electrostatic heating layer 17 includes a main body heating layer 173 and a main body insulating layer 171 which are sequentially disposed from bottom to top.
  • the wafer 14 is stacked on the main body insulating layer 171, and in the main body insulating layer.
  • a second DC electrode 172 is disposed in the 171.
  • the second DC electrode 172 is electrically connected to the DC power source.
  • the DC power source is used to apply DC power to the second DC electrode 172 to generate an electrostatic adsorption force on the wafer 14 to implement the wafer 14 . Fixed.
  • the body heating layer 173 is used to heat the wafer 14 by heat conduction, and the heat to be generated is conducted to the wafer 14 through the body insulating layer 171.
  • the main body heating layer 173 may be adhered to the bearing surface 111 by means of a silicone bonding.
  • a second passage (not shown) is provided in the main body electrostatic heating layer 17 for conveying the heat exchange gas toward the upper portion of the main body electrostatic heating layer 17.
  • the second channel is a through hole (not shown) corresponding to the thickness of the main heating layer 173 and the main body insulating layer 171, respectively, for insulating the body toward the lower surface of the wafer 14.
  • a heat exchange gas (for example, an inert gas such as helium gas) is transported between the upper surfaces of the layers 171, and the heat exchange gas can accelerate heat transfer between the main body insulating layer 171 and the wafer 14, and at the same time, can improve heat transfer uniformity, thereby Heating efficiency and heating uniformity can be improved.
  • An edge electrostatic heating layer 18 is disposed on the stepped surface 112 for electrostatically attracting the focus ring 12 and adjusting the temperature of the focus ring 12.
  • the edge electrostatic heating layer 18 includes an edge heating layer 183 and an edge insulating layer 181 which are disposed in this order from bottom to top, wherein the focus ring 12 is superposed on the edge insulating layer 181, and the edge heating layer 183 is used for
  • the heat conducting means heats the focus ring 12, and the heat to be generated is conducted to the focus ring 12 through the edge insulating layer 181.
  • a first DC electrode 182 is disposed in the edge insulating layer 181.
  • the first DC electrode 182 is electrically connected to a DC power source, and the DC power source is used to apply DC power to the first DC electrode 182, thereby generating static electricity to the focus ring 12.
  • the adsorption force causes the focus ring 12 to be more closely adhered to the edge insulating layer 181, thereby improving the heat transfer effect on the gathering ring 12.
  • the edge heating layer 183 may be adhered to the stepped surface 112 by means of a silicone bonding.
  • a first passage (not shown) is provided in the edge electrostatic heating layer 18 for conveying heat exchange gas between the focus ring 12 and the edge electrostatic heating layer 18.
  • the first channel is a through hole (not shown) correspondingly disposed in the edge heating layer 183 and the edge insulating layer 181, respectively, for facing the lower surface and the edge of the focus ring 12.
  • a heat exchange gas (for example, an inert gas such as helium gas) is transported between the upper surfaces of the insulating layer 181, and the heat exchange gas accelerates heat transfer between the edge insulating layer 181 and the focus ring 12, so that heating efficiency can be improved.
  • the electrostatic chuck mechanism further includes a radio frequency source (not shown) for simultaneously providing RF energy to the wafer 14 and the focus ring 12 to attract the plasma toward the upper surface of the wafer 14.
  • a radio frequency source (not shown) for simultaneously providing RF energy to the wafer 14 and the focus ring 12 to attract the plasma toward the upper surface of the wafer 14.
  • RF energy is also introduced into the focus ring 12 while introducing RF energy to the wafer 14, this can increase the area of the effective electric field of the wafer 14, thereby improving process uniformity.
  • RF sources typically include a matcher and RF power.
  • RF sources may be used to provide RF energy to the wafer 14 and the focus ring 12 respectively, that is, the main RF source and the edge RF source are respectively disposed, wherein the main RF source is used to provide the RF to the wafer 14. Energy; the edge RF source is used to provide RF energy to the focus ring 12.
  • the main RF source and the edge RF source it can be different according to The process debugging requires independently controlling the RF energy of the wafer 14 and the focus ring 12, respectively, so that the plasma distribution of the central region and the edge region of the wafer 14 can be separately controlled, thereby increasing the plasma adjustment window and improving the process uniformity.
  • the electrostatic chuck mechanism further includes an edge temperature sensor, a center temperature sensor, and a temperature control unit, which are not shown in the above figures, wherein the edge temperature sensor is disposed in the susceptor 11 and near the edge of the wafer 14. For detecting the temperature at the edge of the wafer 14, and transmitting the detection result to the temperature control unit.
  • a center temperature sensor is disposed within the susceptor 11 and near the center of the wafer 14 for detecting the temperature at the center of the wafer 14 and transmitting the detection result to the temperature control unit.
  • the temperature control unit is configured to control the operating condition of the edge electrostatic heating layer 18 according to the temperature at the edge to control the temperature of the focus ring 12, thereby controlling the temperature at the edge of the wafer 14; and controlling the electrostatic charging layer 17 of the main body according to the temperature at the center. Operating conditions to control the temperature at the center of the wafer 14.
  • the edge electrostatic heating layer 18 is composed of the edge heating layer 183 and the edge insulating layer 181, but the present invention is not limited thereto. In practical applications, the edge electrostatic heating layer may also be set only.
  • An edge insulating layer is disposed on the edge insulating layer, and a first DC electrode is disposed in the edge insulating layer, and an electrostatic attraction force is generated to the focus ring by applying a direct current to the first DC electrode.
  • a first heating element is further provided in the edge insulating layer for heating the focus ring by means of heat conduction. That is to say, the temperature adjustment of the focus ring is realized by embedding the heating element in the edge insulating layer.
  • the edge electrostatic heating layer of the above structure can be processed by a sintering method.
  • the first passage is a through hole provided in the edge insulating layer through the thickness thereof for conveying the heat exchange gas between the lower surface of the focus ring and the upper surface of the edge insulating layer, whereby accelerating the heat transfer between the edge insulating layer and the focus ring, thereby Heating efficiency can be improved.
  • the main body electrostatic heating layer 17 is composed of the main body heating layer 173 and the main body insulating layer 171, but the present invention is not limited thereto. In practical applications, the main body electrostatic heating layer may only be used.
  • a main body insulating layer is disposed on the main body insulating layer, and a second direct current electrode is disposed in the main body insulating layer, and an electrostatic attraction force is generated on the wafer by applying direct current to the second direct current electrode.
  • a second heating element is further disposed in the body insulating layer for heating the wafer by heat conduction. That is to say, the temperature adjustment of the wafer is realized by embedding the heating element in the main insulating layer.
  • the main body electrostatic heating layer of the above structure can be processed by a sintering method.
  • the second channel is a through hole provided through the thickness of the body insulating layer for conveying the heat exchange gas toward the upper portion of the body insulating layer, that is, toward the lower surface of the wafer and the body.
  • a heat exchange gas is transported between the upper surfaces of the insulating layer to accelerate heat transfer between the edge insulating layer and the focus ring, thereby improving heating efficiency.
  • the electrostatic chuck mechanism provided by the embodiment of the present invention includes a base 11, and a focus ring 12 disposed around the base 11.
  • a region corresponding to the position at which the focus ring 12 is disposed is referred to as a focus ring region A1
  • a region corresponding to a position at which the wafer is disposed is referred to as a wafer region A2
  • a focus ring region A1 is disposed around the wafer region A2.
  • the electrostatic chuck mechanism further includes a first heating layer 53, a first heating element (not shown), and a first heating connection element 64.
  • the first heating layer 53 is disposed around the susceptor 11 and located below the focus ring 12; the first heating element is disposed in the first heating layer 53 for heating the focus ring 12 by converting electrical energy into thermal energy.
  • the first heating connection element 64 extends through the base 11 and is coupled to the first heating layer 53 for inputting a first electrical heating signal to the first heating layer 53 for the first heating layer 53 to convert the first electrical heating signal into thermal energy. .
  • the electrostatic chuck mechanism further includes a first electrostatic layer 54, a first DC electrode 51, and a first DC electrode connection element 65.
  • the first electrostatic layer 54 is disposed around the susceptor 11 and located between the focus ring 12 and the first heating layer 53; the first DC electrode 51 is disposed in the first static layer 54; the first DC electrode connecting member 65 penetrates the pedestal 11 and the first heating layer 53 are connected to the first DC electrode 51 in the first electrostatic layer 54.
  • the first DC electrode connecting component 65 is configured to input a first DC voltage to the first DC electrode 51, and the first DC electrode 51 can form an electric field under the control of the first DC voltage to enable the first electrostatic layer 54 to pass electrostatic adsorption.
  • the focus ring 12 is attracted thereto and the focus ring 12 is fixed.
  • the electrostatic chuck mechanism further includes a first heat collecting plate 55.
  • the first heat collecting plate 55 is made of a material having good heat conductivity, and is disposed around the base 11 and is in contact with the upper surface of the first heating layer 53, that is, the first heat collecting plate 55 is located at the first heating layer 53 and Between the first electrostatic layers 54. Since the temperatures at the respective positions on the focus ring 12 are not the same, by the first heat transfer plate 55 having good heat conduction performance, the temperature between the different positions on the focus ring 12 can be continuously transitioned to be uniform.
  • the electrostatic chuck mechanism further includes a first gas passage 56.
  • the first gas passage 56 penetrates the first heating layer 53, the first heat equalizing plate 55, and the first electrostatic layer 54 for conveying the heat exchange gas to the lower surface (ie, the back surface) of the focus ring 12, thereby being in the focus ring 12.
  • the lower surface forms a gas layer, and the temperature of the focus ring 12 is kept constant with the temperature of the susceptor 11 by the good thermal conductivity of the heat exchange gas, that is, by increasing the heat exchange capacity between the focus ring 12 and the first static layer 54, effectively The temperature of the focus ring 12 is controlled.
  • the heat exchange gas is helium.
  • the type of the heat exchange gas is not limited thereto, and other gases may be used as long as the heat exchange between the focus ring 12 and the first electrostatic layer 54 can be achieved, and details are not described herein.
  • the electrostatic chuck mechanism further includes a first temperature control unit (not shown).
  • the first temperature control unit includes a first detection module 57 and a first control module (not shown), and the first detection module 57 is configured to detect the current temperature of the focus ring 12 and send it to the first control module;
  • the first control module is for controlling the temperature of the focus ring 12 according to the current temperature of the focus ring 12.
  • the first detecting module 57 penetrates the base 11 , the first heating layer 53 and the first heat collecting plate 55 from the bottom of the base 11 and contacts the first static layer 54 to detect the current temperature of the focus ring 12 .
  • the first detection module 57 is a thermocouple.
  • the first detecting module 57 is not limited thereto, and other temperature measuring components may also be used, and details are not described herein again.
  • the electrostatic chuck mechanism further includes a second heating layer 59, a second heating element (not shown), and a second heating connection element 66.
  • the second heating layer 59 is disposed on the intermediate convex portion of the susceptor 11; the second heating element is disposed in the second heating layer 59 for being placed on the susceptor 11 by converting electrical energy into thermal energy.
  • the wafer is heated; the second heating connection element 66 extends through the susceptor 11 and is coupled to the second heating layer 59 for inputting a second electrical heating signal to the second heating layer 59 for the second heating layer 59 to apply the second heating signal. It is converted into thermal energy to heat the wafer on the second heating layer 59.
  • the electrostatic chuck mechanism further includes a second electrostatic layer 60.
  • the second electrostatic layer 60 is disposed on the second heating layer 59, and the second DC electrode 101 is disposed in the second electrostatic layer 60.
  • the second DC electrode 101 can form an electric field under voltage control to make the second electrostatic layer.
  • the wafer can be adsorbed thereon by electrostatic adsorption.
  • the electrostatic chuck mechanism further includes a second DC electrode connection element 67.
  • the second DC electrode connecting member 67 penetrates the susceptor 11 and the second heating layer 59 and is connected to the second DC electrode 101 of the second electrostatic layer 60.
  • the second DC electrode connection element 67 inputs a second DC voltage to the second DC electrode 101 to enable the second DC electrode 101 to form an electric field under the control of the second DC voltage for the second electrostatic layer 60 to adsorb the wafer.
  • the electrostatic chuck mechanism further includes a second heat collecting plate 61; the second heat collecting plate 61 is in contact with the upper surface of the second heating layer 59, that is, the second heat collecting plate 61 is located at the second heating layer 59 and the second Between the electrostatic layers 60. Since the temperatures at various locations on the wafer are not the same, the temperature between different locations on the wafer can be achieved by means of the second heat spreader 61 having good thermal conductivity. The degree of continuous transition tends to be uniform.
  • the electrostatic chuck mechanism further includes a second temperature control unit (not shown).
  • the second temperature control unit includes a second detection module 62 and a second control module (not shown), the second detection module 62 is configured to detect the current temperature of the wafer and send it to the second control module; The module is used to control the temperature of the wafer based on the current temperature of the wafer.
  • the second detecting module 62 penetrates the base 11 , the second heating layer 59 and the second heat collecting plate 61 from the bottom of the base 11 and contacts the second static layer 60 to detect the current temperature of the wafer, and The temperature of the wafer is controlled by means of a second control module.
  • the second detection module 62 is a thermocouple.
  • the second detecting module 62 is not limited thereto, and other temperature measuring components may also be used, and details are not described herein again.
  • the electrostatic chuck mechanism further includes a second gas passage 58.
  • the second gas passage 58 penetrates the susceptor 11 from the bottom of the susceptor 11 to introduce a heat exchange gas to the lower surface (ie, the back surface) of the wafer, thereby forming a gas layer on the lower surface of the wafer, and good heat conduction through the heat exchange gas.
  • the temperature of the wafer is kept constant in accordance with the temperature of the electrostatic chuck mechanism, that is, by increasing the heat exchange capability between the wafer and the second electrostatic layer 60, the temperature of the wafer is effectively controlled.
  • the heat exchange gas is helium.
  • the type of the heat exchange gas is not limited thereto, and other gases may be used.
  • the first gas passage 56 and the second gas passage 58 are in communication, that is, the first gas passage 56 and the second gas passage 58 have the same gas inlet, and the first gas passage 56 is used to receive the gas inlet.
  • the heat exchange gas is directed to the lower surface of the focus ring 12 to control the temperature of the focus ring 12, and the second gas passage 58 is used to direct the heat exchange gas from the gas inlet to the lower surface of the wafer to perform temperature on the wafer. control.
  • the first gas passage 56 and the second gas passage 58 are disposed in communication to simplify the structure of the first gas passage 56 and the second gas passage 58.
  • the electrostatic chuck mechanism further includes a heat medium flow passage 63.
  • the heat medium flow passage 63 is disposed in the susceptor 11 and is simultaneously distributed in the focus ring region A1 and the wafer region A2. Hot A heat medium fluid is introduced into the medium flow passage 63, and the heat medium fluid is used to maintain the base temperature of the susceptor 11.
  • the heat medium flow passage 63 is connected to the heat medium inlet and outlet 68; and is used for introducing or withdrawing the heat medium fluid to the heat medium flow passage 63.
  • the electrostatic chuck mechanism further includes a radio frequency electrode input end 69.
  • the RF electrode input 69 is coupled to the susceptor 11. During the process, the RF electrode input 69 is capable of introducing RF energy into the electrostatic chuck mechanism.
  • a focus ring 12 is disposed around the base 11, and a first heating layer 53 is disposed around the base 11 and below the focus ring 12, and the first heating layer 53 is disposed in the first heating layer 53.
  • a first heating element is coupled to the external power source via a first heating connection element 64 that extends through the base 11 to generate thermal energy from the electrical energy to heat the focus ring 12.
  • an embodiment of the present invention further provides a semiconductor processing apparatus including a reaction chamber and an electrostatic chuck mechanism disposed therein for carrying a wafer and adjusting a temperature of the wafer.
  • the electrostatic chuck mechanism employs the electrostatic chuck mechanism provided by the above embodiment of the present invention.
  • the semiconductor processing apparatus provided by the embodiment of the present invention can separately adjust the temperature of the central area and the edge area of the wafer by using the electrostatic chuck mechanism provided by the above embodiment of the present invention, so that the edge area between the wafer and the central area can be realized.
  • the temperature difference is compensated, which in turn improves process uniformity.

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Abstract

一种静电卡盘机构以及半导体加工设备。该静电卡盘机构包括基座（11）、边缘组件、主体静电加热层（17）和边缘静电加热层（18），其中，基座包括用于承载晶片（14）的承载面（111），以及环绕在承载面周围、且位于晶片边缘处的台阶面（112），且台阶面低于承载面。边缘组件包括聚焦环（12）、基环（13）和绝缘环（15），聚焦环环绕设置在台阶面上；绝缘环设置在基座底部，并支撑基座。主体静电加热层设置在承载面上，用以静电吸附晶片，并能调节晶片的温度。边缘静电加热层设置在台阶面上，用以静电吸附聚焦环，并能调节聚焦环的温度。该静电卡盘机构以及半导体加工设备，可以单独地调节晶片中心区域和边缘区域的温度，从而可以实现对晶片边缘区域和中心区域之间的温度差异进行补偿，进而可以提高工艺均匀性。

Description

静电卡盘机构以及半导体加工设备 技术领域
本发明涉及半导体设备制造领域，具体地，涉及一种静电卡盘机构以及半导体加工设备。
背景技术
在制造集成电路和微机电系统(Micro-Electro-Mechanical System，简称MEMS)的工艺过程中，特别是在实施等离子刻蚀、物理气相沉积(Physical Vapor Deposition，简称PVD)、化学气相沉积(Chemical Vapor Deposition，简称CVD)等的工艺过程中，常使用静电卡盘来承载及加热晶片等被加工工件，且该静电卡盘还为晶片等被加工工件提供直流偏压并且控制被加工工件表面的温度。
图1为典型的静电卡盘机构的结构示意图。如图1所示，静电卡盘机构包括静电卡盘8和边缘组件。其中，静电卡盘8用于采用静电吸附的方式将晶片5固定在其上表面上，并且在静电卡盘8内设置有加热器，用以控制晶片5的温度。边缘组件包括由上而下依次叠置的聚焦环6、基环7和绝缘环9，其中，绝缘环9固定在安装固定件10上，用于支撑静电卡盘8。聚焦环6和基环7均环绕在静电卡盘8的周围，聚焦环6用于形成能够将等离子体限制在其内部的边界；基环7用于支撑聚焦环6，并保护静电卡盘8的外周壁不被等离子体刻蚀。
上述静电卡盘机构在实际应用中不可避免地存在以下问题：
进入28-20纳米技术代以后，高K栅介质和金属栅电极MOS器件被引入集成电路生产工艺，晶片间的晶体管栅极长度的均匀性(3σ)由45nm节点的3nm减小到32nm节点的1.56nm，这意味着对刻蚀均匀性的要求大大提高。然而，由于受到静电卡盘8的物理尺寸的限制， 静电卡盘8内的加热器无法对晶片5靠近其边缘处的温度进行控制(由于晶片5的直径略大于静电卡盘8的外径，加热器无法控制晶片5的外围不与静电卡盘8相接触的部分的温度)，从而造成晶片5的边缘区域和中心区域的温度不均匀，无法满足28-20纳米技术的对晶片5的边缘区域和中心区域的刻蚀均匀性的要求。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一，提出了一种静电卡盘机构以及半导体加工设备，可以单独地调节晶片中心区域和边缘区域的温度，从而可以实现对晶片边缘区域和中心区域之间的温度差异进行补偿，进而可以提高工艺均匀性。
为实现本发明的目的而提供一种静电卡盘机构，包括基座和边缘组件，其中，所述基座包括用于承载晶片的承载面，以及环绕在所述承载面周围、且位于所述晶片边缘处的台阶面，且所述台阶面低于所述承载面；所述边缘组件包括聚焦环、基环和绝缘环，所述聚焦环环绕设置在所述台阶面上；所述基环环绕所述基座的外周壁而设置；所述绝缘环设置在所述基座底部，并支撑所述基座；所述静电卡盘机构还包括主体静电加热层和边缘静电加热层，其中，所述主体静电加热层设置在所述承载面上，用以静电吸附所述晶片，并能调节所述晶片的温度；所述边缘静电加热层设置在所述台阶面上，用以静电吸附所述聚焦环，并能调节所述聚焦环的温度。
其中，所述边缘静电加热层包括由下而上依次设置的边缘加热层和边缘绝缘层，其中，所述聚焦环叠置在所述边缘绝缘层上，且在所述边缘绝缘层中设置有第一直流电极，通过向所述第一直流电极通入直流电，而对所述聚焦环产生静电吸附力；所述边缘加热层用于采用热传导的方式加热所述聚焦环。
其中，所述主体静电加热层包括由下而上依次设置的主体加热层和主体绝缘层，其中，所述晶片叠置在所述主体绝缘层上，且在所述主体绝缘层中设置有第二直流电极，通过向所述第二直流电极通入直流电，而对所述晶片产生静电吸附力；所述主体加热层用于采用热传导的方式加热所述晶片。
其中，所述边缘静电加热层包括边缘绝缘层，所述聚焦环叠置在所述边缘绝缘层上，且在所述边缘绝缘层中设置有第一直流电极，通过向所述第一直流电极通入直流电，而对所述聚焦环产生静电吸附力；在所述边缘绝缘层中还设置有第一加热元件，用于采用热传导的方式加热所述聚焦环。
其中，所述主体静电加热层包括主体绝缘层，所述晶片叠置在所述主体绝缘层上，且在所述主体绝缘层中设置有第二直流电极，通过向所述第二直流电极通入直流电，而对所述晶片产生静电吸附力；在所述主体绝缘层中还设置有第二加热元件，用于采用热传导的方式加热所述晶片。
其中，对于上述任一方案提供的静电卡盘机构，在所述边缘静电加热层中设置有第一通道，用以朝向所述聚焦环与所述边缘静电加热层之间输送热交换气体。
其中，对于上述任一方案提供的静电卡盘机构，在所述主体静电加热层中设置有第二通道，用以朝向所述主体静电加热层上方输送热交换气体。
其中，对于上述任一方案提供的静电卡盘机构，所述静电卡盘机构还包括射频源，用于同时向所述晶片和聚焦环提供射频能量。
其中，对于上述任一方案提供的静电卡盘机构，所述静电卡盘机构还包括主体射频源和边缘射频源，其中，所述主体射频源用于向所述晶片提供射频能量；所述边缘射频源用于向所述聚焦环提供射频能量。
其中，对于上述任一方案提供的静电卡盘机构，所述静电卡盘机构还包括边缘温度传感器、中心温度传感器和温控单元，其中，所述边缘温度传感器设置在所述基座内，且靠近所述晶片的边缘处，用以检测所述晶片的边缘处的温度，并发送至所述温控单元；所述中心温度传感器设置在所述基座内，且靠近所述晶片的中心处，用以检测所述晶片的中心处的温度，并发送至所述温控单元；所述温控单元用于根据所述边缘处的温度控制所述边缘静电加热层的工作状态以控制所述聚焦环的温度，从而控制所述晶片的边缘处的温度；以及根据所述中心处的温度控制所述主体静电加热层的工作状态，以控制所述晶片的中心处的温度。
作为另一个技术方案，本发明还提供一种半导体加工设备，其包括反应腔室和设置在其内的静电卡盘机构，所述静电卡盘机构用于承载晶片，以及调节所述晶片的温度，其中，所述静电卡盘机构采用了本发明上述任意一方案提供的静电卡盘机构。
本发明具有以下有益效果：
本发明提供的静电卡盘机构，其通过在基座的承载面上设置主体静电加热层来调节晶片的温度；同时在基座的台阶面上设置边缘静电加热层，来调节聚集环的温度并进而调节晶片边缘处的温度，可以实现单独地调节晶片中心区域和边缘区域的温度，从而可以实现对晶片边缘区域和中心区域之间的温度差异进行补偿，进而可以提高工艺均匀性。此外，主体静电加热层还可以静电吸附晶片，从而实现对晶片的固定；同时，边缘静电加热层还可以静电吸附聚焦环，从而使聚焦环与边缘静电加热层更贴合，进而提高对聚集环的热传递效果。
本发明提供的半导体加工设备，其通过采用本发明提供的上述静电卡盘机构，可以单独地调节晶片中心区域和边缘区域的温度，从而可以实现对晶片边缘区域和中心区域之间的温度差异进行补偿，进而可以提高工艺均匀性。
附图说明
图1为典型的静电卡盘机构的结构示意图；
图2为本发明实施例提供的静电卡盘机构的剖视图；
图3为图2中I区域的放大图；以及
图4为本发明实施例提供的静电卡盘机构的局部剖面结构示意图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图来对本发明提供的静电卡盘机构以及半导体加工设备进行详细描述。
图2为本发明实施例提供的静电卡盘机构的剖视图。图3为图2中I区域的放大图。请一并参阅图2和图3，静电卡盘机构包括基座11、边缘组件、主体静电加热层17和边缘静电加热层18。其中，基座11包括：用于承载晶片14的承载面111，以及环绕在该承载面111周围、且位于晶片14边缘处的台阶面112，且该台阶面112低于承载面111。也就是说，在基座11上表面的中心区域形成有凸台，该凸台的上表面用作承载晶片14的承载面111，而基座11上表面的边缘区域，即环绕在凸台周边的环形表面用作台阶面112。在一般情况下，晶片14的直径略大于承载面111的直径，从而晶片14边缘处的一部分自承载面111的边界伸出，而不与承载面111相接触。
边缘组件包括聚焦环12、基环13和绝缘环15，其中，聚焦环12环绕设置在上述台阶面112上，晶片14的边缘处自承载面111的边界伸出的部分叠置在该聚焦环12上，从而聚焦环12可以与晶片14的边缘产生热量传递。基环13环绕基座11的外周壁而设置，并且在竖直方向上位于聚焦环12和绝缘环15之间，用于支撑聚焦环12，并保护基座11的外周壁不被等离子体刻蚀。绝缘环15设置在基座11底部，并 固定在安装固定件16上，用于支撑该基座11。聚焦环12、基环13和绝缘环15可以根据不同工艺的要求选择石英(SiO2)、陶瓷(Al2O3)和碳化硅等的绝缘材料制作，且三者的材料可以相同或不同。
主体静电加热层17设置在承载面111上，用以静电吸附晶片14，并能调节晶片14的温度。在本实施例中，主体静电加热层17包括由下而上依次设置的主体加热层173和主体绝缘层171，工艺过程中，晶片14叠置在主体绝缘层171上，且在该主体绝缘层171中设置有第二直流电极172，该第二直流电极172与直流电源电连接，直流电源用于向第二直流电极172通入直流电，从而对晶片14产生静电吸附力，以实现对晶片14的固定。主体加热层173用于采用热传导的方式加热晶片14，即将产生的热量通过主体绝缘层171传导至晶片14。主体加热层173可以采用硅胶粘接的方式粘贴在承载面111上。
优选地，在主体静电加热层17中设置有第二通道(图中未示出)，用以朝向主体静电加热层17上方输送热交换气体。具体地，上述第二通道为对应地分别在主体加热层173和主体绝缘层171中设置的贯穿二者厚度的通孔(图中未示出)，用以朝向晶片14的下表面与主体绝缘层171的上表面之间输送热交换气体(例如氦气等的惰性气体)，该热交换气体可以加速主体绝缘层171与晶片14之间的热量传递，同时可以提高热量传递的均匀性，从而可以提高加热效率和加热均匀性。
边缘静电加热层18设置在台阶面112上，用以静电吸附聚焦环12，并能调节聚焦环12的温度。在本实施例中，边缘静电加热层18包括由下而上依次设置的边缘加热层183和边缘绝缘层181，其中，聚焦环12叠置在边缘绝缘层181上，边缘加热层183用于采用热传导的方式加热聚焦环12，即将产生的热量通过边缘绝缘层181传导至聚焦环12。由于晶片14的边缘处自承载面111的边界伸出的部分叠置在该聚焦环12上，聚焦环12可以与晶片14的边缘产生热量传递，因此，通过调节聚 集环12的温度，可以间接调节晶片14的边缘处的温度。而且，在该边缘绝缘层181中设置有第一直流电极182，该第一直流电极182与直流电源电连接，直流电源用于向第一直流电极182通入直流电，从而对聚焦环12产生静电吸附力，使聚焦环12与边缘绝缘层181更贴合，进而可以提高对聚集环12的热传递效果。边缘加热层183可以采用硅胶粘接的方式粘贴在台阶面112上。
优选地，在边缘静电加热层18中设置有第一通道(图中未示出)，用以朝向聚焦环12与边缘静电加热层18之间输送热交换气体。具体地，上述第一通道为对应地分别在边缘加热层183和边缘绝缘层181中设置的贯穿二者厚度的通孔(图中未示出)，用以朝向聚焦环12的下表面与边缘绝缘层181的上表面之间输送热交换气体(例如氦气等的惰性气体)，该热交换气体可以加速边缘绝缘层181与聚焦环12之间的热量传递，从而可以提高加热效率。
借助上述主体静电加热层17和边缘静电加热层18，可以实现单独地调节晶片14中心区域(与承载面111相接触的部分)和边缘区域(自承载面111的边界伸出的部分)的温度，从而可以实现对晶片14边缘区域和中心区域之间的温度差异进行补偿，进而可以提高工艺均匀性。
优选地，静电卡盘机构还包括射频源(图中未示出)，用于同时向晶片14和聚焦环12提供射频能量，从而吸引等离子体朝向晶片14的上表面运动。而且，由于在向晶片14引入射频能量的同时，还向聚焦环12引入射频能量，这可以增大晶片14有效电场的面积，从而可以提高工艺均匀性。射频源通常包括匹配器和射频电源。
当然，在实际应用中，还可以采用不同的射频源分别向晶片14和聚焦环12提供射频能量，即，分别设置主体射频源和边缘射频源，其中，主体射频源用于向晶片14提供射频能量；边缘射频源用于向聚焦环12提供射频能量。借助主体射频源和边缘射频源，可以根据不同的 工艺调试要求独立地分别控制晶片14和聚焦环12的射频能量大小，从而可以分别对晶片14中心区域和边缘区域的等离子体分布进行控制，进而可以增加等离子体的调整窗口，提高工艺均匀性。
优选地，静电卡盘机构还包括边缘温度传感器、中心温度传感器和温控单元，以上各附图中均未示出，其中，边缘温度传感器设置在基座11内，且靠近晶片14的边缘处，用以检测晶片14的边缘处的温度，并将检测结果发送至温控单元。中心温度传感器设置在基座11内，且靠近晶片14的中心处，用以检测晶片14的中心处的温度，并将检测结果发送至温控单元。温控单元用于根据边缘处的温度控制边缘静电加热层18的工作状况以控制聚焦环12的温度，从而控制晶片14的边缘处的温度；以及根据中心处的温度控制主体静电加热层17的工作状况，以控制晶片14的中心处的温度。借助上述边缘温度传感器、中心温度传感器和温控单元，可以分别对晶片14中心区域和边缘区域的温度进行精确控制，从而可以进一步提高晶片14的温度均匀性，进而可以提高工艺均匀性。
需要说明的是，在本实施例中，边缘静电加热层18由边缘加热层183和边缘绝缘层181组成，但是本发明并不局限于此，在实际应用中，边缘静电加热层还可以仅设置一层边缘绝缘层，聚焦环叠置在该边缘绝缘层上，且在边缘绝缘层中设置有第一直流电极，通过向该第一直流电极通入直流电，而对聚焦环产生静电吸附力。而且，在边缘绝缘层中还设置有第一加热元件，用于采用热传导的方式加热聚焦环。也就是说，采用边缘绝缘层内嵌加热元件的方式实现对聚焦环的温度调节。上述结构的边缘静电加热层可以采用烧结的方法进行加工制造。
在这种情况下，优选地，上述第一通道为在边缘绝缘层中设置的贯穿其厚度的通孔，用以朝向聚焦环的下表面与边缘绝缘层的上表面之间输送热交换气体，从而加速边缘绝缘层与聚焦环之间的热量传递，从而 可以提高加热效率。
还需要说明的是，在本实施例中，主体静电加热层17由主体加热层173和主体绝缘层171组成，但是本发明并不局限于此，在实际应用中，主体静电加热层还可以仅设置一层主体绝缘层，晶片叠置在该主体绝缘层上，且在主体绝缘层中设置有第二直流电极，通过向第二直流电极通入直流电，而对晶片产生静电吸附力。而且，在主体绝缘层中还设置有第二加热元件，用于采用热传导的方式加热晶片。也就是说，采用主体绝缘层内嵌加热元件的方式实现对晶片的温度调节。上述结构的主体静电加热层可以采用烧结的方法进行加工制造。
在这种情况下，优选地，上述第二通道为在主体绝缘层中设置的贯穿其厚度的通孔，用以朝向主体绝缘层的上方输送热交换气体，即，朝向晶片的下表面与主体绝缘层的上表面之间输送热交换气体，从而加速边缘绝缘层与聚焦环之间的热量传递，从而可以提高加热效率。
下面结合图4详细说明本发明实施例提供的静电卡盘机构的温度调节系统。
如图4所示，本发明实施例提供的静电卡盘机构，包括基座11、环绕基座11设置的聚焦环12。为了便于描述，将与设置聚焦环12的位置相对应的区域称为聚焦环区域A1，将与设置晶片的位置相对应的区域称为晶片区域A2，聚焦环区域A1环绕晶片区域A2设置。
本实施例中，在聚焦环区域A1中，静电卡盘机构还包括第一加热层53、第一加热元件(图中未示出)、第一加热连接元件64。其中，第一加热层53环绕基座11设置且位于聚焦环12的下方；第一加热元件设置在第一加热层53中，用以采用将电能转换为热能的方式对聚焦环12进行加热，第一加热连接元件64贯穿基座11并与第一加热层53连接，用以向第一加热层53输入第一电加热信号，以供第一加热层53将第一电加热信号转化为热能。
其中，静电卡盘机构还包括第一静电层54、第一直流电极51和第一直流电极连接元件65。该第一静电层54环绕基座11设置，且位于聚焦环12和第一加热层53之间；第一直流电极51设置在第一静电层54中；第一直流电极连接元件65贯穿基座11和第一加热层53，并与第一静电层54中的第一直流电极51连接。第一直流电极连接元件65用于向第一直流电极51输入第一直流电压，第一直流电极51能够在该第一直流电压控制下形成电场，以使第一静电层54能够通过静电吸附的方式将聚焦环12吸附于其上，而对聚焦环12进行固定。
其中，静电卡盘机构还包括第一匀热板55。该第一匀热板55采用热传导能力好的材料制成，其环绕基座11设置且与第一加热层53的上表面相接触，即，第一匀热板55位于第一加热层53和第一静电层54之间。由于聚焦环12上各位置处的温度并不相同，借助具备良好热传导性能的第一匀热板55，能够使聚焦环12上不同位置处之间的温度连续过渡，趋于均匀。
其中，静电卡盘机构还包括第一气体通道56。该第一气体通道56贯穿第一加热层53、第一匀热板55和第一静电层54，用于将热交换气体输送至聚焦环12的下表面(即背面)，从而在聚焦环12的下表面形成气体层，通过热交换气体良好的热传导性，保持聚焦环12的温度与基座11的温度一致，即通过增加聚焦环12与第一静电层54之间的热交换能力，有效的控制聚焦环12的温度。优选地，热交换气体为氦气。当然，热交换气体的种类并不局限于此，还可以采用其他气体，只要能够达到使聚焦环12与第一静电层54之间进行热交换的目的即可，在此不再赘述。
其中，静电卡盘机构还包括第一控温单元(图中未示出)。该第一控温单元包括第一检测模块57和第一控制模块(图中未示出)，第一检测模块57用于检测聚焦环12的当前温度，并将其发送至第一控制模块； 第一控制模块用于根据聚焦环12的当前温度对聚焦环12的温度进行控制。具体地，第一检测模块57从基座11的底部贯穿基座11、第一加热层53和第一匀热板55，并与第一静电层54接触，以此检测聚焦环12的当前温度，并借助第一控制模块而对聚焦环12的温度进行控制。优选地，第一检测模块57为热电偶。当然，第一检测模块57并不局限于此，还可以采用其他测温元件，在此不再赘述。
本实施例，在晶片区域A2中，静电卡盘机构还包括第二加热层59、第二加热元件(图中未示出)和第二加热连接元件66。其中，第二加热层59设置在基座11的中间凸起部分上；第二加热元件设置在第二加热层59中，用以采用将电能转换为热能的方式对置于基座11上的晶片进行加热；第二加热连接元件66贯穿基座11并与第二加热层59连接，用以向第二加热层59输入第二电加热信号，以供第二加热层59将第二加热信号转化为热能，从而对位于第二加热层59上的晶片进行加热。
其中，静电卡盘机构还包括第二静电层60。该第二静电层60设置在第二加热层59上，且在第二静电层60中设置有第二直流电极101，第二直流电极101能够在电压控制下形成电场，以使第二静电层60能够通过静电吸附的方式将晶片吸附于其上。
其中，静电卡盘机构还包括第二直流电极连接元件67。该第二直流电极连接元件67贯穿基座11和第二加热层59，并与第二静电层60中的第二直流电极101连接。第二直流电极连接元件67向第二直流电极101输入第二直流电压，以使第二直流电极101能够在该第二直流电压的控制下形成电场，以供第二静电层60吸附晶片。
其中，静电卡盘机构还包括第二匀热板61；第二匀热板61与第二加热层59的上表面相接触，即，第二匀热板61位于第二加热层59和第二静电层60之间。由于晶片上各位置处的温度并不相同，借助具备良好热传导性能的第二匀热板61，能够使晶片上不同位置处之间的温 度进行连续过渡，趋于均匀。
其中，静电卡盘机构还包括第二控温单元(图中未示出)。第二控温单元包括第二检测模块62和第二控制模块(图中未示出)，第二检测模块62用于检测晶片的当前温度，并将其发送至第二控制模块；第二控制模块用于根据晶片的当前温度对晶片的温度进行控制。具体地，第二检测模块62从基座11的底部贯穿基座11、第二加热层59和第二匀热板61，并与第二静电层60接触，以此检测晶片的当前温度，并借助第二控制模块而对晶片的温度进行控制。优选地，第二检测模块62为热电偶。当然，第二检测模块62并不局限于此，还可以采用其他测温元件，在此不再赘述。
其中，静电卡盘机构还包括第二气体通道58。该第二气体通道58从基座11的底部贯穿基座11，以将热交换气体引入至晶片的下表面(即背面)，从而在晶片的下表面形成气体层，通过热交换气体良好的热传导性，保持晶片的温度与静电卡盘机构的温度一致，即通过增加晶片与第二静电层60之间的热交换能力，有效的控制晶片的温度。优选地，热交换气体为氦气。当然，热交换气体的种类并不局限于此，还可以采用其他气体。
本实施例中，第一气体通道56和第二气体通道58是相通的，即第一气体通道56和第二气体通道58具有相同的气体入口，第一气体通道56用于将来自气体入口的热交换气体引至聚焦环12的下表面，以对聚焦环12的温度进行控制，第二气体通道58用于将来自气体入口的热交换气体引至晶片的下表面，以对晶片的温度进行控制。将第一气体通道56和第二气体通道58设置为连通的，可简化第一气体通道56和第二气体通道58的结构。
其中，静电卡盘机构还包括热媒流动通道63。该热媒流动通道63设置在基座11内，且同时分布于聚焦环区域A1和晶片区域A2内。热 媒流动通道63内可通入热媒流体，热媒流体用于维持基座11的基础温度。该热媒流动通道63连接有热媒进出口68；用于将热媒流体通入或引出热媒流动通道63。
其中，静电卡盘机构还包括射频电极输入端69。该射频电极输入端69与基座11连接，在工艺过程中，射频电极输入端69能够将射频能量引入静电卡盘机构中。
本实施例提供的静电卡盘机构中，环绕基座11设置有聚焦环12，并且环绕基座11且在聚焦环12的下方设置有第一加热层53，在第一加热层53中设置有第一加热元件，该第一加热元件经由贯穿基座11的第一加热连接元件64而与外部电源连接，以便利用电能生成热能而对聚焦环12进行加热。利用对聚焦环12进行独立加热，可以更加精确地对聚焦环12的温度进行控制，从而减小晶片边缘区域与晶片中心区域的温度差异。
作为另一个技术方案，本发明实施例还提供一种半导体加工设备，其包括反应腔室和设置在其内的静电卡盘机构，该静电卡盘机构用于承载晶片，以及调节晶片的温度。该静电卡盘机构采用了本发明上述实施例提供的静电卡盘机构。
本发明实施例提供的半导体加工设备，其通过采用本发明上述实施例提供的静电卡盘机构，可以单独地调节晶片中心区域和边缘区域的温度，从而可以实现对晶片边缘区域和中心区域之间的温度差异进行补偿，进而可以提高工艺均匀性。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (11)

  1. 一种静电卡盘机构，包括基座和边缘组件，其中，所述基座包括用于承载晶片的承载面，以及环绕在所述承载面周围、且位于所述晶片边缘处的台阶面，且所述台阶面低于所述承载面；所述边缘组件包括聚焦环、基环和绝缘环，所述聚焦环环绕设置在所述台阶面上；所述基环环绕所述基座的外周壁而设置；所述绝缘环设置在所述基座底部，并支撑所述基座；其特征在于，所述静电卡盘机构还包括主体静电加热层和边缘静电加热层，其中，
    所述主体静电加热层设置在所述承载面上，用以静电吸附所述晶片，并能调节所述晶片的温度；
    所述边缘静电加热层设置在所述台阶面上，用以静电吸附所述聚焦环，并能调节所述聚焦环的温度。
  2. 根据权利要求1所述的静电卡盘机构，其特征在于，所述边缘静电加热层包括由下而上依次设置的边缘加热层和边缘绝缘层，其中，
    所述聚焦环叠置在所述边缘绝缘层上，且在所述边缘绝缘层中设置有第一直流电极，通过向所述第一直流电极通入直流电，而对所述聚焦环产生静电吸附力；
    所述边缘加热层用于采用热传导的方式加热所述聚焦环。
  3. 根据权利要求1所述的静电卡盘机构，其特征在于，所述主体静电加热层包括由下而上依次设置的主体加热层和主体绝缘层，其中，
    所述晶片叠置在所述主体绝缘层上，且在所述主体绝缘层中设置有第二直流电极，通过向所述第二直流电极通入直流电，而对所述晶片产生静电吸附力；
    所述主体加热层用于采用热传导的方式加热所述晶片。
  4. 根据权利要求1所述的静电卡盘机构，其特征在于，所述边缘静电加热层包括边缘绝缘层，所述聚焦环叠置在所述边缘绝缘层上，且在所述边缘绝缘层中设置有第一直流电极，通过向所述第一直流电极通入直流电，而对所述聚焦环产生静电吸附力；
    在所述边缘绝缘层中还设置有第一加热元件，用于采用热传导的方式加热所述聚焦环。
  5. 根据权利要求1所述的静电卡盘机构，其特征在于，所述主体静电加热层包括主体绝缘层，所述晶片叠置在所述主体绝缘层上，且在所述主体绝缘层中设置有第二直流电极，通过向所述第二直流电极通入直流电，而对所述晶片产生静电吸附力；
    在所述主体绝缘层中还设置有第二加热元件，用于采用热传导的方式加热所述晶片。
  6. 根据权利要求1-5任意一项所述的静电卡盘机构，其特征在于，在所述边缘静电加热层中设置有第一通道，用以朝向所述聚焦环与所述边缘静电加热层之间输送热交换气体。
  7. 根据权利要求1-5任意一项所述的静电卡盘机构，其特征在于，在所述主体静电加热层中设置有第二通道，用以朝向所述主体静电加热层上方输送热交换气体。
  8. 根据权利要求1-5任意一项所述的静电卡盘机构，其特征在于，所述静电卡盘机构还包括射频源，用于同时向所述晶片和聚焦环提供射频能量。
  9. 根据权利要求1-5任意一项所述的静电卡盘机构，其特征在于，所 述静电卡盘机构还包括主体射频源和边缘射频源，其中，
    所述主体射频源用于向所述晶片提供射频能量；
    所述边缘射频源用于向所述聚焦环提供射频能量。
  10. 根据权利要求1-5任意一项所述的静电卡盘机构，其特征在于，所述静电卡盘机构还包括边缘温度传感器、中心温度传感器和温控单元，其中，所述边缘温度传感器设置在所述基座内，且靠近所述晶片的边缘处，用以检测所述晶片的边缘处的温度，并发送至所述温控单元；
    所述中心温度传感器设置在所述基座内，且靠近所述晶片的中心处，用以检测所述晶片的中心处的温度，并发送至所述温控单元；
    所述温控单元用于根据所述边缘处的温度控制所述边缘静电加热层的工作状态以控制所述聚焦环的温度，从而控制所述晶片的边缘处的温度；以及根据所述中心处的温度控制所述主体静电加热层的工作状态，以控制所述晶片的中心处的温度。
  11. 一种半导体加工设备，其包括反应腔室和设置在其内的静电卡盘机构，所述静电卡盘机构用于承载晶片，以及调节所述晶片的温度，其特征在于，所述静电卡盘机构采用了权利要求1-10任意一项所述的静电卡盘机构。
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