WO2017092378A1 - 单晶薄膜键合体及其制造方法 - Google Patents

单晶薄膜键合体及其制造方法 Download PDF

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WO2017092378A1
WO2017092378A1 PCT/CN2016/091695 CN2016091695W WO2017092378A1 WO 2017092378 A1 WO2017092378 A1 WO 2017092378A1 CN 2016091695 W CN2016091695 W CN 2016091695W WO 2017092378 A1 WO2017092378 A1 WO 2017092378A1
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silicon
film
substrate
single crystal
lithium niobate
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English (en)
French (fr)
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胡文
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济南晶正电子科技有限公司
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/513—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using plasma jets
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing

Definitions

  • the present invention relates to a single crystal film bonding body having a three-layer structure with low interface reflectivity and a method of manufacturing the single crystal film bonding body, and more particularly to a device capable of reducing light waves or sound waves in a substrate material A single crystal film bond body in which an interface is reflected and a method of manufacturing the single crystal film bond body.
  • Lithium niobate single crystal film and lithium niobate thin film have a wide range of applications in optical signal processing, information storage, and electronic devices. As a basic material, high frequency, high bandwidth, high integration, and large size can be produced. Capacity, low power optoelectronic devices and integrated optical paths.
  • lithium niobate single crystal film and lithium niobate single crystal film can be applied to manufacturing filters, optical waveguide modulators, optical waveguide switches, spatial light modulators and optical frequency multipliers, surface acoustic wave generators, infrared detectors , ferroelectric memory, etc.
  • the process of forming a lithium niobate or lithium niobate film on a silicon substrate can be compatible with existing silicon-based production processes and production lines, greatly increasing the processability and application range of the lithium niobate film.
  • a typical substrate material has the structure that the underside is a silicon substrate and a layer of lithium niobate is overlaid on the silicon substrate.
  • the thickness of the silicon substrate is about 250 microns
  • the thickness of the lithium niobate layer is between 1 micron and 50 microns, typically about 20 microns.
  • a direct bonding technique is generally employed.
  • the direct bonding process polishes and cleans the surfaces of the two wafers, close to each other, and then fit together. If the surfaces of the two wafers are very smooth and very clean, the molecules on the surface of the two wafers are close to each other, and the two wafers are bonded together due to the inter-molecular van der Waals force, thereby forming a bonding body. Subsequently, by heating the bonding body, the bonding force is further enhanced to become a very strong bonding body.
  • the direct bonding process has the advantages of a clear bonding interface and a strong bonding force between the film and the substrate. However, the direct bonding process requires very high surface roughness for the wafer, for example, typically requiring surface roughness below 1 nm.
  • the bonding interface is rough, light waves and sound waves are diffusely reflected at the interface, and the effect of light reflection on the lithography process is greatly reduced.
  • the noise interference of the sound waves on the device is greatly reduced, and the yield and quality of the device are enhanced.
  • the rough bonding interface is very unfavorable for direct bonding, and even cannot be successfully bonded directly.
  • the present invention provides a single crystal film bonding body capable of reducing reflection of light waves or sound waves at an interface between substrate materials and a method of manufacturing the single crystal film The method of bonding.
  • a single crystal film bond body comprising a silicon substrate, a lithium niobate film or a lithium niobate film, and a silicon substrate and a lithium niobate film or a lithium niobate film.
  • the surface of the silicon-based film bonded to the silicon substrate may be a polished surface, and the surface of the silicon substrate bonded to the silicon-based film may be a polished surface, and the polished surface of the silicon-based film is bonded to the polished surface of the silicon substrate. To form a bond.
  • the silicon-based film may be a silicon film, a silicon dioxide film or a silicon nitride film.
  • the silicon-based film can be formed on a lithium niobate film or a lithium niobate film by plasma enhanced chemical vapor deposition, physical vapor deposition, sputtering, evaporation, or epitaxial growth.
  • the surface of the lithium niobate film or the lithium niobate film on which the silicon-based film is formed may be a surface having a micron or submicron roughness.
  • a method of manufacturing a single crystal film bond comprising: providing an original substrate having a rough surface having a micron or submicron roughness; Depositing a transition layer thereon, and surface polishing the transition layer to obtain a smooth surface capable of direct bonding process; providing a target substrate and surface polishing the target substrate to obtain a smooth surface capable of direct bonding process; using direct keys
  • the polished surface of the target substrate is legally bonded to the polished surface of the transition layer deposited on the original substrate to form a bond.
  • the original substrate may be a lithium niobate or lithium niobate substrate.
  • the transition layer may be a silicon-based film, and the silicon-based film may be a silicon film, a silicon dioxide film, or a silicon nitride film.
  • the target substrate may be a silicon substrate.
  • the rough surface of the original substrate can be obtained by grinding, etching or sand blasting.
  • the transition layer may be deposited on the original substrate by plasma enhanced chemical vapor deposition, physical vapor deposition, sputtering, evaporation, or epitaxial growth.
  • the thickness of the transition layer can range from 0.1 microns to 30 microns.
  • the transition layer may be surface polished to have a surface roughness of less than 1 nanometer.
  • the transition layer After depositing the transition layer on the original substrate, the transition layer may be annealed at a temperature of 100 ° C to 1000 ° C to remove potential defects and impurities therein.
  • the bonding body may be annealed at a temperature of 30 ° C to 500 ° C to enhance the bonding force.
  • the original substrate of the bond body can be ground by a grinding process, and the ground surface can be polished to improve surface smoothness and achieve a target thickness.
  • the transition layer may be surface polished using a chemical mechanical polishing process, and/or the target substrate may be surface polished using a chemical mechanical polishing process.
  • the abrasive surface can be polished using a chemical mechanical polishing process.
  • the single crystal film bonding body of the invention can effectively reduce or even eliminate the reflection effect of the interface between the lithium niobate or lithium niobate thin film layer and the silicon substrate on the light wave and the sound wave, and reduce or eliminate the reflection effect of the interface on the light. Or interference caused by acoustic signals.
  • the method of the present invention utilizes the diffuse reflection effect of the rough interface to reduce or eliminate the strong directional reflection of light waves and/or sound waves at the interface, and deposits the transition layer and polishes the surface of the transition layer to achieve the keys of the original substrate and the target substrate. Hehe. Further, the method of the present invention is capable of producing a single crystal film of a large size and having a thickness of nanometers and micrometers.
  • Figure 1 shows a diagram of a process of depositing a transition layer on an original substrate
  • FIG. 2 is a view showing a process of polishing a transition layer deposited on an original substrate
  • FIG. 3 is a view showing a process of bonding a transition layer and a target substrate to form a bond
  • Figure 4 is a view showing a process of grinding an original substrate
  • Fig. 5 is a view showing a single crystal thin film bonded body obtained by surface-polishing an original substrate.
  • the single crystal film bonding body includes a silicon substrate 3, a lithium niobate film or a lithium niobate film 1 and a silicon substrate 3 and a lithium niobate film or a lithium niobate film 1 Silicon-based film 2.
  • the silicon-based film 2 can be formed on the lithium niobate film or the lithium niobate film 2 by deposition, and bonded to the silicon substrate 3 by direct bonding.
  • the surface of the silicon-based film 2 bonded to the silicon substrate 3 may be a polishing surface, and the surface of the silicon substrate 3 bonded to the silicon-based film 2 may be a polishing surface, and the polishing surface of the silicon-based film 2 and the silicon substrate 3
  • the polishing surface is bonded to form a bonding body 4 (i.e., a bonding body including the single crystal film 2, which is also simply referred to as a single crystal film bonding body).
  • the silicon-based film 2 may be a silicon film, a silicon dioxide film or a silicon nitride film.
  • the silicon-based thin film 2 may be formed on a lithium niobate film or a lithium niobate thin film 1 by plasma enhanced chemical vapor deposition, physical vapor deposition, sputtering, evaporation, or epitaxial growth.
  • the surface of the lithium niobate film or the lithium niobate film 1 on which the silicon-based film 2 is formed may be a micron- or sub-micron-roughness surface.
  • the structure of the single crystal film bonding body of the present invention is as follows: the lowermost layer is a silicon substrate on which a silicon-based film is formed, and the uppermost layer is a lithium niobate single crystal film.
  • the silicon substrate and the silicon-based film are different in source.
  • the silicon substrate is a common silicon wafer obtained by a crystal pulling growth process, and the silicon-based film is deposited on the lithium niobate film by a deposition method.
  • the silicon-based film may be a silicon film, a silicon dioxide film, a silicon nitride film, or the like, but is not limited thereto.
  • the lithium niobate film can be replaced with another film such as a lithium niobate film.
  • FIG. 1 is a view showing a process of depositing a transition layer on an original substrate
  • FIG. 2 is a view showing a process of polishing a transition layer deposited on an original substrate
  • FIG. 3 is a view showing a process of bonding a transition layer and a target substrate. A diagram of a process for forming a bond.
  • an original substrate 1 is provided.
  • the surface of the original substrate 1 may be a rough surface such as a surface which may be a micron or submicron roughness.
  • the rough surface of the original substrate 1 can be obtained by a process such as grinding, etching, or sand blasting.
  • the transition layer 2 may be deposited on the original substrate 1 by a process such as plasma enhanced chemical vapor deposition (PECVD), physical vapor deposition (PVD), sputtering, evaporation, or epitaxial growth.
  • PECVD plasma enhanced chemical vapor deposition
  • PVD physical vapor deposition
  • sputtering evaporation
  • epitaxial growth evaporation
  • the transition layer 2 can be annealed to remove impurities such as potential defects and gases therein.
  • the transition layer 2 may be surface-polished, and the surface polishing may be chemical mechanical polishing to obtain a smooth surface conforming to the direct bonding process. After surface polishing, the surface roughness of the transition layer 2 is less than 1 nanometer to meet the surface roughness requirements of the direct bonding process.
  • a target substrate 3 is provided, and the target substrate 3 is subjected to, for example, chemical mechanical polishing to obtain a smooth surface conforming to the direct bonding process.
  • the polishing surface of the target substrate 3 is bonded to the polishing surface of the transition layer 2 formed on the original substrate 1 by direct bonding to form the bonding body 4.
  • the bonding body 4 can be annealed to further enhance the bonding force.
  • FIG. 4 is a view showing a process of grinding the original substrate
  • FIG. 5 is a view showing a single crystal film bond obtained by surface-polishing the original substrate.
  • the bonding body 4 can be ground by the grinding apparatus 5, specifically, the surface of the original substrate 1 is ground to reduce the thickness of the original substrate 1. Further, referring to FIG. 5, the ground surface of the ground original substrate 1 may be subjected to, for example, chemical mechanical polishing to improve the smoothness of the surface and reach a target thickness. Thus, a bonding body 4 having a three-layer structure composed of the single crystal thin film 1, the transition layer 2, and the target substrate 3 is formed.
  • the original substrate 1 is derived from a lithium niobate or lithium niobate substrate
  • the target substrate 3 is derived from silicon. Substrate.
  • the transition layer 2 may be a silicon-based film selected from a silicon film, a silicon dioxide film, or a silicon nitride film.
  • a transition layer 2 is deposited on the rough surface of the original substrate 1, and the transition layer 2 may be silicon, silicon dioxide, silicon nitride, etc., and the deposition method may be PECVD, PVD or the like. Film growth process.
  • the thickness of the transition layer 2 may be from 0.1 micrometers to 30 micrometers.
  • the transition layer 2 may be annealed to remove impurities and defects generated during the deposition, and the annealing temperature may be from 100 ° C to 1000 ° C.
  • the transition layer 2 is polished by a chemical mechanical polishing process to have a surface roughness of less than 1 nm. Then, the original substrate 1 and the target substrate 2 are bonded to the bonded body 4 by a direct bonding process. Further, the bonding body 4 may be annealed to enhance the bonding force, and the annealing temperature may be from 30 ° C to 500 ° C.
  • the bonding body 4 may be ground by the grinder 5 to grind the original substrate 1 to a target thickness; and the ground surface is polished to a target thickness by a chemical mechanical polishing process, thereby causing lithium niobate or lithium niobate film
  • the thickness can range from 50 nanometers to 190 microns.
  • lithium niobate having a rough surface is first used, and a silicon thin film is deposited on the rough surface, and then the surface of the silicon thin film is polished, and then the polished surface of the silicon thin film and the silicon wafer substrate are polished.
  • the polished surface is directly bonded, thereby forming a three-layered bond.
  • the structure of the bonding body is as follows: the bottom is a silicon substrate, the upper surface is a silicon film, and the uppermost layer is a lithium niobate single crystal film.
  • the silicon film has a "fill-in" rough lithium niobate surface and achieves direct bonding to the silicon substrate.
  • a silicon film as an intermediate layer may be replaced with a silicon dioxide film or silicon nitride. It is also possible to replace the uppermost lithium niobate film with other thin film materials such as lithium niobate.
  • the bonding body having the three-layer structure not only has excellent piezoelectricity, pyroelectricity, nonlinear optical, acousto-optic, acoustic and electric characteristics, such as lithium niobate or lithium niobate, but also has a silicon substrate with the existing IC industry.
  • the material production line is well compatible and has a very broad market prospect.
  • the original substrate is a lithium niobate wafer with a thickness of 200 microns and a surface roughness of micron or submicron.
  • the meter grade such as 0.1 micron to 2 micron, can achieve a rough effect by grinding, etching or sand blasting.
  • a silicon film was deposited as a transition layer on the rough surface of lithium niobate by a sputtering process, and the film thickness was 2 ⁇ m; the deposited sheet after the deposition was annealed at an annealing temperature of 300 ° C and an annealing time of 5 hours.
  • the surface of the silicon transition layer on the deposition sheet is subjected to chemical mechanical polishing to make the surface of the silicon transition layer rougher than 1 nm;
  • the target substrate is a silicon substrate having a thickness of 500 ⁇ m, and the silicon substrate is subjected to chemical mechanical polishing to make the surface roughness lower than 1 nanometer.
  • the polished surface of the silicon transition layer and the polished surface of the silicon substrate are bonded by a direct bonding process to form a bonding body.
  • the bonded body was annealed at 130 ° C for an annealing time of 3 hours to further enhance the bonding force.
  • the bonding body is thinned by a grinding process to thin the lithium niobate wafer to 5 microns.
  • the thickness of lithium niobate was polished to 4 microns using a chemical mechanical polishing process with a surface roughness of less than 1 nm.
  • a bonding body having a three-layer structure of a lithium niobate thin film, a silicon transition layer, and a silicon substrate in this order from top to bottom is obtained.
  • the original substrate was a lithium niobate wafer having a thickness of 350 microns and a surface roughness of 0.2 microns.
  • a silicon film was deposited as a transition layer by a evaporation process to a thickness of 1.5 ⁇ m; the deposited wafer after the deposition was annealed at an annealing temperature of 200 ° C and an annealing time of 3 hours to remove defects and impurities in the silicon film.
  • the surface of the silicon transition layer was subjected to chemical mechanical polishing to make the surface roughness less than 1 nm;
  • the target substrate was a silicon substrate having a thickness of 650 ⁇ m, and the silicon substrate was subjected to chemical mechanical polishing to have a surface roughness of less than 1 nm.
  • the polished surface of the silicon transition layer and the polished surface of the silicon substrate are bonded by a direct bonding process to form a bonding body.
  • the bonded body was annealed at 170 ° C for an annealing time of 2 hours to further enhance the bonding force.
  • the bonding body is thinned by a grinding process to make lithium niobate to a thickness of 21 ⁇ m.
  • the lithium niobate was polished to 20 ⁇ m using a chemical mechanical polishing process with a surface roughness of 1 nm or less. Therefore, a novel material having a three-layer structure of a lithium niobate thin film, a silicon transition layer, and a silicon substrate in order from top to bottom is obtained.
  • the original substrate was a lithium niobate wafer having a thickness of 250 microns and a surface roughness of micron or submicron.
  • a layer of silicon dioxide was deposited as a transition layer by plasma enhanced chemical vapor deposition. The deposition thickness was 3 ⁇ m and the deposition temperature was 200 ° C.
  • the silicon dioxide deposition sheet was annealed at an annealing temperature of 300 ° C and an annealing time of 3 hours. To remove defects and impurities in the transition layer.
  • the surface of the silica was subjected to chemical mechanical polishing to make the surface roughness less than 1 nm;
  • the target substrate was a silicon substrate having a thickness of 500 ⁇ m, and the silicon substrate was subjected to chemical mechanical polishing to have a surface roughness of less than 1 nm.
  • the silicon dioxide transition layer is formed by a direct bonding process.
  • the polished surface is bonded to the polished surface of the silicon substrate to form a bond.
  • the bonded body was annealed at 150 ° C for an annealing time of 6 hours to further enhance the bonding force.
  • the bonding process is thinned by a grinding process to reduce the thickness of lithium niobate to 11 microns.
  • the lithium niobate was polished to 10 ⁇ m using a chemical mechanical polishing process with a surface roughness of 1 nm or less. Therefore, a bonding body having a three-layer structure of a lithium niobate thin film, a silicon dioxide transition layer, and a silicon substrate in this order from top to bottom is obtained.
  • the original substrate was a lithium niobate wafer having a thickness of 200 microns and a surface roughness of 0.4 microns.
  • a silicon nitride film was deposited as a transition layer by a plasma enhanced chemical vapor deposition process with a deposition thickness of 2 ⁇ m and a deposition temperature of 300 ° C.
  • the silicon nitride deposition sheet was annealed at an annealing temperature of 400 ° C and an annealing time of 3 hours. To remove defects and impurities in the transition layer.
  • the surface of the silicon nitride is chemically mechanically polished to a surface roughness of less than 1 nm;
  • the target substrate is a silicon substrate having a thickness of 450 ⁇ m, and the silicon substrate is subjected to chemical mechanical polishing to have a surface roughness of less than 1 nm.
  • the polished surface of the transition layer and the polished surface of the silicon substrate are bonded by a direct bonding process to form a bonded body.
  • the bonded body was annealed at 200 ° C for an annealing time of 6 hours to further enhance the bonding force.
  • the bonding body was thinned by a grinding process to reduce the lithium niobate wafer to 3 microns.
  • the lithium niobate was polished to 2 microns using a chemical mechanical polishing process with a surface roughness of 1 nm. Therefore, a novel material having a three-layer structure of a lithium niobate thin film, a silicon nitride transition layer, and a silicon substrate in this order from top to bottom is obtained.
  • a transition layer is deposited on the rough surface of the original substrate, and the transition layer can be prepared by epitaxial growth methods such as PECVD, PVD, etc.
  • the material of the transition layer can be silicon, silicon dioxide, or nitride. Silicon and so on.
  • the transition layer can be annealed, and a specific gas atmosphere such as O 2 or N 2 can be selected in the annealing process, and the annealing temperature can be selected from the range of 50 ° C to 1000 ° C, and can be specifically selected according to different materials and process requirements, in order to remove the transition.
  • the surface of the transition layer is then polished using a chemical mechanical polishing process to obtain a smooth surface suitable for the direct bonding process.
  • the polished transition layer surface is contacted with the target substrate, the two wafers are bonded together by a direct bonding process to form a bonding body, and the bonding body can be annealed at a temperature of 50 ° C to 400 ° C to improve Its bonding force.
  • the original substrate is thinned to a target thickness by a grinding process, and then the original substrate is polished to a target thickness by a chemical mechanical polishing process, and the surface of the film reaches a nano-scale surface roughness.
  • a lithium niobate or lithium niobate single crystal film on silicon having a low reflectance interface is prepared.
  • the invention adopts a lithium niobate or lithium niobate having a rough surface as an original substrate, and deposits silicon, silicon dioxide or silicon nitride on the surface of the original substrate by using a process such as CVD or PVD to form a transition layer, and then uses a chemical mechanical polishing process.
  • the surface of the transition layer is polished, so that the rough substrate can be integrated into a whole by a direct bonding process and a silicon substrate bond.
  • the process not only solves the problem of strong directional reflection of light waves and sound waves at the interface, but also solves the direct bonding problem between the silicon substrate and the lithium niobate or lithium niobate thin film layer.

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Abstract

一种单晶薄膜键合体（4），包括硅基底（3）、铌酸锂单晶薄膜或钽酸锂单晶薄膜（1）以及位于硅基底（3）与铌酸锂单晶薄膜或钽酸锂单晶薄膜（1）之间的硅基薄膜（2），其中，硅基薄膜（2）通过沉积形成在铌酸锂单晶薄膜或钽酸锂单晶薄膜（1）上，并通过直接键合法与硅基底（3）进行键合。硅基薄膜（2）为硅薄膜、二氧化硅薄膜或氮化硅薄膜。还包括一种制造单晶薄膜键合体（4）的方法。

Description

单晶薄膜键合体及其制造方法 技术领域
本发明涉及一种具有三层结构的低界面反射率的单晶薄膜键合体和一种制造所述单晶薄膜键合体的方法，更具体地，涉及一种能够减小光波或声波在基板材料之间的界面发生反射的单晶薄膜键合体和一种制造所述单晶薄膜键合体的方法。
背景技术
钽酸锂单晶薄膜和铌酸锂薄膜单晶薄膜在光信号处理、信息存储以及电子器件等中有着广泛的用途，用其作为基础材料，可以制作高频、高带宽、高集成度、大容量、低功耗的光电子学器件和集成光路。此外，钽酸锂单晶薄膜和铌酸锂单晶薄膜可被应用于制造滤波器，光波导调制器、光波导开关、空间光调制器和光学倍频器、表面声波发生器、红外探测器、铁电体存储器等。在硅基板上形成钽酸锂或铌酸锂薄膜的工艺可与现有的硅基生产工艺和生产线兼容，大大增加铌酸锂薄膜的可加工性和应用范围。
在制造滤波器时，典型的基板材料具有如下结构：下侧是硅基底，在硅基底上面覆盖一层钽酸锂。比如，硅基底的厚度为250微米左右，钽酸锂层的厚度在1微米至50微米之间，典型地，厚度为20微米左右。
在制备以上基板材料的结构时，一般采用直接键合技术。直接键合工艺是将两个晶片的表面抛光并清洗干净，互相靠近，然后贴合在一起。如果两个晶片的表面非常光滑并且非常干净，则两个晶片表面的分子就互相靠近，由于分子间的范德瓦尔斯力的作用，两个晶片就结合在一起，从而形成了键合体。随后，对键合体进行加热，键合力会进一步增强，从而变成非常牢固的键合体。直接键合工艺具有键合界面清晰、薄膜和基板的键合力强等优点。但是，直接键合工艺对于晶圆片的表面粗糙度要求非常高，比如，通常要求表面粗糙度低于1纳米。
采用直接键合工艺在硅基板上制备钽酸锂层(或铌酸锂层)所形成的双层结构，由于硅和钽酸锂的光学折射率不同，从而造成光在界面上的强烈的 定向反射。在制造器件时，需要精密的光刻工艺，光在硅和钽酸锂的界面上的强烈反射会影响光刻工艺的精确度。再者，由于硅和钽酸锂的密度和杨氏模量不同，会造成声波在界面上的强烈定向反射。在滤波器的使用过程中，声波在硅和钽酸锂的界面上反射会造成器件的噪音干扰，造成了器件品质的下降。因此，如何解决光反射和声波反射的干扰成为制备性能优良的器件的关键技术。
如果键合界面比较粗糙，光波和声波在界面上发生漫反射，光反射对光刻工艺的影响会大大降低，声波对器件的噪音干扰会大大降低，器件的产量和质量就会增强。但是，粗糙的键合界面却非常不利于直接键合，甚至不能成功地直接键合。
发明内容
技术问题
为了解决在现有技术中存在的上述至少一个问题，本发明提供了一种能够减小光波或声波在基板材料之间的界面发生反射的单晶薄膜键合体和一种制造所述单晶薄膜键合体的方法。
技术方案
根据一个实施例，提供了一种单晶薄膜键合体，所述单晶薄膜键合体包括硅基底、铌酸锂薄膜或钽酸锂薄膜以及位于硅基底与铌酸锂薄膜或钽酸锂薄膜之间的硅基薄膜，其中，硅基薄膜通过沉积形成在铌酸锂薄膜或钽酸锂薄膜上，并通过直接键合法与硅基底进行键合。
硅基薄膜的与硅基底进行键合的表面可以是抛光表面，硅基底的与硅基薄膜进行键合的表面可以是抛光表面，硅基薄膜的抛光表面与硅基底的抛光表面进行键合，以形成键合体。
硅基薄膜可以为硅薄膜、二氧化硅薄膜或氮化硅薄膜。
硅基薄膜可以通过等离子体增强化学气相沉积、物理气相沉积、溅射、蒸发或外延生长形成在铌酸锂薄膜或钽酸锂薄膜上。
铌酸锂薄膜或钽酸锂薄膜的其上形成硅基薄膜的表面可以为微米级或亚微米级粗糙度的表面。
根据另一实施例，提供了一种制造单晶薄膜键合体的方法，所述方法包括：提供具有微米级或亚微米级粗糙度的粗糙表面的原始基板；在原始基板 上沉积过渡层，并对过渡层进行表面抛光以获得能够进行直接键合工艺的光滑表面；提供目标基板并对目标基板进行表面抛光，以获得能够进行直接键合工艺的光滑表面；利用直接键合法将目标基板的抛光表面与沉积在原始基板上的过渡层的抛光表面进行键合，以形成键合体。
原始基板可以为铌酸锂或钽酸锂基板。
过渡层可以为硅基薄膜，硅基薄膜可以为硅薄膜、二氧化硅薄膜或氮化硅薄膜。
目标基板可以为硅基板。
原始基板的粗糙表面可以通过研磨、腐蚀或喷砂获得。
可以通过等离子体增强化学气相沉积、物理气相沉积、溅射、蒸发或外延生长在原始基板上沉积过渡层。
过渡层的厚度可以为0.1微米至30微米。
可以对过渡层进行表面抛光以使表面粗糙度小于1纳米。
在原始基板上沉积过渡层之后，可以在100℃至1000℃的温度下对过渡层进行退火，以去除其中的潜在缺陷和杂质。
在形成键合体之后，可以在30℃至500℃的温度下对键合体进行退火，以增强键合力。
可以利用研磨工艺将键合体的原始基板进行研磨，并可以对研磨面进行抛光，以提高表面光滑度并达到目标厚度。
可以采用化学机械抛光工艺对过渡层进行表面抛光，和/或可以采用化学机械抛光工艺对目标基板进行表面抛光。
可以采用化学机械抛光工艺对研磨面进行抛光。
技术效果
本发明的单晶薄膜键合体能够有效地降低甚至消除在钽酸锂或铌酸锂薄膜层和硅基板之间的界面对光波和声波的反射作用，并且降低或消除了界面的反射作用对光或声波信号造成的干扰。本发明的方法是利用粗糙界面的漫反射效应来降低或消除光波和/或声波在界面的强烈的定向反射，以及沉积过渡层且将过渡层的表面进行抛光以实现原始基板和目标基板的键合。此外，本发明的方法能够制造大尺寸且厚度为纳米和微米等级的单晶薄膜。
附图说明
根据结合附图进行的以下详细描述，本发明的以上和其它方面、特征和优点将更加明显，在附图中：
图1示出了在原始基板上沉积过渡层的工艺的图；
图2示出了沉积在原始基板上的过渡层进行抛光的工艺的图；
图3示出了将过渡层和目标基板进行键合以形成键合体的工艺的图；
图4示出了将原始基板进行研磨的工艺的图；
图5示出了对原始基板进行表面抛光所获得的单晶薄膜键合体的图。
具体实施方式
现在将详细地参考实施例，在附图中示出了实施例的示例，其中，同样的标号始终指同样的元件。以下通过参照附图描述实施例以解释本发明。
如这里使用的，除非上下文另外指出，否则将理解的是，当诸如层、膜、区域或基板的元件被称作“在”另一元件“上”时，该元件可以直接在另一元件上，或者也可以存在中间元件。
根据本发明的实施例，参照图5，单晶薄膜键合体包括硅基3、铌酸锂薄膜或钽酸锂薄膜1以及位于硅基底3与铌酸锂薄膜或钽酸锂薄膜1之间的硅基薄膜2。硅基薄膜2可以通过沉积形成在铌酸锂薄膜或钽酸锂薄膜2上，并通过直接键合法与硅基底3进行键合。
硅基薄膜2的与硅基底3进行键合的表面可以是抛光表面，硅基底3的与硅基薄膜2进行键合的表面可以是抛光表面，硅基薄膜2的抛光表面与硅基底3的抛光表面进行键合，以形成键合体4(即，包括单晶薄膜2的键合体，其还简称为单晶薄膜键合体)。
硅基薄膜2可以为硅薄膜、二氧化硅薄膜或氮化硅薄膜。
此外，硅基薄膜2可以通过等离子体增强化学气相沉积、物理气相沉积、溅射、蒸发或外延生长等工艺形成在铌酸锂薄膜或钽酸锂薄膜1上。
铌酸锂薄膜或钽酸锂薄膜1的其上形成硅基薄膜2的表面可以为微米级或亚微米级粗糙度的表面。
具体地，本发明的单晶薄膜键合体的结构为如下：最下层为硅基板，其上为硅基薄膜，最上层为钽酸锂单晶薄膜。其中，硅基板和硅基薄膜的来源不同，硅基板是常见的通过拉晶生长过程得到的硅片，而硅基薄膜通过沉积的方法覆盖在钽酸锂薄膜上。
此外，硅基薄膜可以为硅薄膜、二氧化硅薄膜、氮化硅薄膜等，但不限于此。
此外，可以将钽酸锂薄膜替换成其它薄膜，比如铌酸锂薄膜。
下面将参照附图详细地说明本发明的制造单晶薄膜键合体的方法。
图1示出了在原始基板上沉积过渡层的工艺的图，图2示出了沉积在原始基板上的过渡层进行抛光的工艺的图，图3示出了将过渡层和目标基板进行键合以形成键合体的工艺的图。
首先，参照图1，提供一种原始基板1。原始基板1的表面可以为粗糙表面，例如可以为微米级或亚微米级的粗糙度的表面。原始基板1的粗糙表面可以通过研磨、腐蚀或喷砂等工艺获得。
然后，可以利用等离子体增强化学气相沉积(PECVD)、物理气相沉积(PVD)、溅射、蒸发或外延生长等工艺在原始基板1上沉积过渡层2。可以对过渡层2进行退火，以去除其中潜在的缺陷和气体等杂质。
此外，参照图2，可以对过渡层2进行表面抛光，表面抛光可以是化学机械抛光，以获得符合直接键合工艺的光滑表面。经过表面抛光之后，过渡层2的表面粗糙度小于1纳米，以满足直接键合工艺对晶片表面粗糙度的要求。
参照图3，提供目标基板3，将目标基板3进行例如化学机械抛光，以获得符合直接键合工艺的光滑表面。
利用直接键合法，将目标基板3的抛光表面与形成在原始基板1上的过渡层2的抛光表面进行键合，以形成键合体4。
此外，可以对键合体4进行退火，以进一步增强键合力。
图4示出了将原始基板进行研磨的工艺的图，图5示出了对原始基板进行表面抛光所获得的单晶薄膜键合体的图。
参照图4，可以利用研磨设备5将键合体4进行研磨，具体地，研磨原始基板1的表面以减小原始基板1的厚度。此外，参照图5，可以将研磨原始基板1的研磨后的表面进行例如化学机械抛光以提高表面的光滑度，并达到目标厚度。因此，形成具有由单晶薄膜1、过渡层2和目标基板3组成的三层结构的键合体4。
可选地，原始基板1来源于铌酸锂或钽酸锂基板，目标基板3来源于硅 基板。
过渡层2可以是硅基薄膜，硅基薄膜选自于硅薄膜、二氧化硅薄膜或氮化硅薄膜等。
具体地，根据本发明的实施例，在原始基板1的粗糙表面上沉积一层过渡层2，过渡层2可以为硅、二氧化硅、氮化硅等，沉积方法可以为PECVD、PVD或其它薄膜生长工艺。过渡层2的厚度可以为0.1微米到30微米。此外，可以将过渡层2进行退火，以去除在沉积过程中产生的杂质和缺陷，退火温度可以为100℃到1000℃。
另外，利用化学机械抛光工艺对过渡层2进行抛光，以使表面粗糙度低于1纳米。然后，采用直接键合工艺，将原始基板1和目标基板2键合成键合体4。此外，可以对键合体4进行退火以增强键合力，退火温度可以为30℃到500℃。
可以利用研磨机5对键合体4进行研磨，以将原始基板1研磨到接近目标厚度；并且利用化学机械抛光工艺，将研磨后的表面抛光到目标厚度，从而铌酸锂或钽酸锂薄膜的厚度可以为50纳米至190微米。
详细地讲，根据本发明的方法，先采用具有粗糙表面的钽酸锂，并且在粗糙表面上沉积一层硅薄膜，然后将硅薄膜的表面抛光，然后将硅薄膜的抛光表面和硅片基底的抛光表面进行直接键合，由此形成了三层结构的键合体。此键合体的结构为：最下面为硅基板，上面是硅薄膜，最上面是钽酸锂单晶薄膜。硅薄膜具有“填平”粗糙的钽酸锂表面和实现与硅基板直接键合的作用。通过本发明的方法，引入了粗糙的漫反射界面解决了强烈定向反射的问题，并且还解决了硅基板和钽酸锂薄膜层的直接键合问题。
在一些应用中，可以将作为中间层的硅薄膜替换为二氧化硅薄膜或氮化硅。也可以将最上层的钽酸锂薄膜替换为诸如铌酸锂的其它薄膜材料。
具有此三层结构的键合体不仅具有钽酸锂或铌酸锂的优异的压电、热释电、非线性光学、声光、声电等特性，而且还与现有的IC产业的硅基板材料的生产线很好地兼容，从而具有非常广阔的市场前景。
下面将以铌酸锂和钽酸锂单晶薄膜的制造为例来说明本发明的方法的实施过程。
示例1
原始基板为铌酸锂晶片，厚度为200微米，表面粗糙度为微米级或亚微 米级，比如0.1微米至2微米，可通过研磨、腐蚀或喷砂获得粗糙的效果。用溅射工艺在铌酸锂的粗糙表面上沉积一层硅薄膜作为过渡层，薄膜厚度为2微米；将沉积完成后的沉积片进行退火，退火温度为300℃，退火时间为5小时。将沉积片上的硅过渡层表面进行化学机械抛光，使硅过渡层的表面粗糙低于1纳米；目标基板为硅基板，厚度为500微米，将硅基板进行化学机械抛光，使表面粗糙度低于1纳米。将原始基板和目标基板进行清洗后，利用直接键合工艺，将硅过渡层的抛光表面和硅基板的抛光表面键合，形成键合体。将键合体在130℃下进行退火，退火时间3小时，以进一步增强键合力。利用研磨工艺将键合体减薄，使铌酸锂晶片减薄到5微米。利用化学机械抛光工艺，将铌酸锂的厚度抛光到4微米，表面粗糙度小于1纳米。获得从上到下依次为铌酸锂薄膜、硅过渡层和硅基板的三层结构的键合体。
示例2
原始基板为钽酸锂晶片，厚度为350微米，表面粗糙度为0.2微米。利用蒸发工艺沉积一层硅薄膜作为过渡层，厚度为1.5微米；将沉积完成后的沉积片进行退火，退火温度为200℃，退火时间为3小时，以去除硅薄膜中的缺陷和杂质。将硅过渡层的表面进行化学机械抛光，使表面粗糙低于1纳米；目标基板为硅基板，厚度为650微米，将硅基板进行化学机械抛光，使表面粗糙度低于1纳米。将原始基板和目标基板进行清洗后，利用直接键合工艺，将硅过渡层的抛光表面和硅基板的抛光表面键合，形成键合体。将键合体在170℃下进行退火，退火时间2小时，以进一步增强键合力。利用研磨工艺将键合体减薄，使钽酸锂厚度到21微米。利用化学机械抛光工艺，将钽酸锂抛光到20微米，表面粗糙度为1纳米以下。因此，获得从上到下依次为钽酸锂薄膜、硅过渡层和硅基板的三层结构的新型材料。
示例3
原始基板为钽酸锂晶片，厚度为250微米，表面粗糙度为微米级或亚微米级。利用等离子体增强化学气相沉淀工艺沉积一层二氧化硅作为过渡层，沉积厚度为3微米，沉积温度为200℃，将二氧化硅沉积片进行退火，退火温度为300℃，退火时间为3小时，以去除过渡层中的缺陷和杂质。将二氧化硅的表面进行化学机械抛光，使表面粗糙低于1纳米；目标基板为硅基板，厚度为500微米，将硅基板进行化学机械抛光，使表面粗糙度低于1纳米。将原始基板和目标基板进行清洗后，利用直接键合工艺，将二氧化硅过渡层 的抛光表面和硅基板的抛光表面键合，形成键合体。将键合体在150℃下进行退火，退火时间6小时，以进一步增强键合力。利用研磨工艺将键合体减薄，使钽酸锂厚度减薄到11微米。利用化学机械抛光工艺，将钽酸锂抛光到10微米，表面粗糙度为1纳米以下。因此，获得从上到下依次为钽酸锂酸锂薄膜、二氧化硅过渡层和硅基板的三层结构的键合体。
示例4
原始基板为钽酸锂晶片，厚度为200微米，表面粗糙度为0.4微米。用等离子体增强化学气相沉淀工艺沉积氮化硅薄膜作为过渡层，沉积厚度为2微米，沉积温度为300℃；将氮化硅沉积片进行退火，退火温度为400℃，退火时间为3小时，以去除过渡层中的缺陷和杂质。将氮化硅表面进行化学机械抛光，使表面粗糙低于1纳米；目标基板为硅基板，厚度为450微米，将硅基板进行化学机械抛光，使表面粗糙度低于1纳米。将原始基板和目标基板进行清洗后，利用直接键合工艺，将过渡层的抛光表面和硅基板的抛光表面键合，形成键合体。将键合体在200℃下进行退火，退火时间6小时，以进一步增强键合力。利用研磨工艺进行将键合体减薄，将钽酸锂晶片减薄到3微米。利用化学机械抛光工艺，将钽酸锂抛光到2微米，表面粗糙度为1纳米。因此，获得从上到下依次为钽酸锂酸锂薄膜、氮化硅过渡层、硅基板的三层结构的新型材料。
上述示例仅对本发明的方法进行详细说明，并不意图对本发明的方法的操作步骤和条件构成限制。
综上所述，在本发明中，在原始基板的粗糙表面沉积一层过渡层，过渡层可以用PECVD、PVD等外延生长法进行制备，过渡层的材料可以为硅、二氧化硅、氮化硅等。可以将过渡层退火，退火过程中可以选用O2、N2等特定气体氛围，退火温度可以选择50℃至1000℃的范围，并且可以根据材料和工艺要求的不同来具体选择，目的是去除过渡层中的缺陷和杂质；然后利用化学机械抛光工艺，将过渡层表面进行抛光处理，以获得光滑的、适合直接键合工艺的表面。此外，将抛光过的过渡层表面和目标基板接触，利用直接键合工艺使两个晶片键合在一起以形成键合体，还可以将键合体在50℃到400℃的温度下进行退火以提高其键合力。
再者，利用研磨工艺使原始基板减薄至接近目标厚度，再利用化学机械抛光工艺将原始基板抛光到目标厚度，且使薄膜表面达到纳米级表面粗糙度， 从而制备出具有低反射率界面的硅上的钽酸锂或铌酸锂单晶薄膜。
本发明采用了具有粗糙表面的铌酸锂或钽酸锂作为原始基板，使用CVD、PVD等工艺沉积在原始基板表面沉积硅、二氧化硅或氮化硅形成过渡层，再使用化学机械抛光工艺对此过渡层表面抛光，使得有粗糙面的原始基板能利用直接键合工艺和硅基板键合成一个整体。此工艺既解决了光波和声波在界面上的强烈的定向反射问题，又解决了硅基板和钽酸锂或铌酸锂薄膜层的直接键合问题。
应该理解，前面的内容示出了各种示例实施例，但是不应该被理解为局限于公开的特定示例实施例，对所公开的示例实施例的修改以及其它示例实施例意图包括在所附权利要求的范围内。

Claims (18)

  1. 一种单晶薄膜键合体，其特征在于，所述单晶薄膜键合体包括硅基底、铌酸锂单晶薄膜或钽酸锂单晶薄膜以及位于硅基底与铌酸锂单晶薄膜或钽酸锂单晶薄膜之间的硅基薄膜，
    其中，硅基薄膜通过沉积形成在铌酸锂单晶薄膜或钽酸锂单晶薄膜上，并通过直接键合法与硅基底进行键合。
  2. 根据权利要求1所述的单晶薄膜键合体，其特征在于，硅基薄膜的与硅基底进行键合的表面是抛光表面，硅基底的与硅基薄膜进行键合的表面是抛光表面，硅基薄膜的抛光表面与硅基底的抛光表面进行键合，以形成键合体。
  3. 根据权利要求1所述的单晶薄膜键合体，其特征在于，硅基薄膜为硅薄膜、二氧化硅薄膜或氮化硅薄膜。
  4. 根据权利要求1所述的单晶薄膜键合体，其特征在于，硅基薄膜通过等离子体增强化学气相沉积、物理气相沉积、溅射、蒸发或外延生长形成在铌酸锂单晶薄膜或钽酸锂单晶薄膜上。
  5. 根据权利要求1所述的单晶薄膜键合体，其特征在于，铌酸锂单晶薄膜或钽酸锂单晶薄膜的其上形成硅基薄膜的表面为微米级或亚微米级粗糙度的表面。
  6. 一种制造单晶薄膜键合体的方法，其特征在于，所述方法包括：
    提供具有微米级或亚微米级粗糙度的粗糙表面的原始基板；
    在原始基板上沉积过渡层，并对过渡层进行表面抛光以获得能够进行直接键合工艺的光滑表面；
    提供目标基板并对目标基板进行表面抛光，以获得能够进行直接键合工艺的光滑表面；以及
    利用直接键合法将目标基板的抛光表面与沉积在原始基板上的过渡层的抛光表面进行键合，以形成键合体。
  7. 根据权利要求6所述的方法，其特征在于，原始基板为铌酸锂或钽酸锂基板。
  8. 根据权利要求6所述的方法，其特征在于，过渡层为硅基薄膜，硅基薄膜为硅薄膜、二氧化硅薄膜或氮化硅薄膜。
  9. 根据权利要求6所述的方法，其特征在于，目标基板为硅基板。
  10. 根据权利要求6所述的方法，其特征在于，原始基板的粗糙表面通过研磨、腐蚀或喷砂获得。
  11. 根据权利要求6所述的方法，其特征在于，通过等离子体增强化学气相沉积、物理气相沉积、溅射、蒸发或外延生长在原始基板上沉积过渡层。
  12. 根据权利要求6所述的方法，其特征在于，过渡层的厚度为0.1微米至30微米。
  13. 根据权利要求6所述的方法，其特征在于，对过渡层进行表面抛光以使表面粗糙度小于1纳米。
  14. 根据权利要求6所述的方法，所述方法还包括：在原始基板上沉积过渡层之后，在100℃至1000℃的温度下对过渡层进行退火，以去除其中的潜在缺陷和杂质。
  15. 根据权利要求6所述的方法，所述方法还包括：在形成键合体之后，在30℃至500℃的温度下对键合体进行退火，以增强键合力。
  16. 根据权利要求6或15所述的方法，所述方法还包括：利用研磨工艺将键合体的原始基板进行研磨，并对研磨面进行抛光，以提高表面光滑度并达到目标厚度。
  17. 根据权利要求6所述的方法，其特征在于，采用化学机械抛光工艺对过渡层进行表面抛光，和/或采用化学机械抛光工艺对目标基板进行表面抛光。
  18. 根据权利要求16所述的方法，其特征在于，采用化学机械抛光工艺对研磨面进行抛光。
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