WO2017084299A1 - 待机电路及电子设备 - Google Patents

待机电路及电子设备 Download PDF

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Publication number
WO2017084299A1
WO2017084299A1 PCT/CN2016/084484 CN2016084484W WO2017084299A1 WO 2017084299 A1 WO2017084299 A1 WO 2017084299A1 CN 2016084484 W CN2016084484 W CN 2016084484W WO 2017084299 A1 WO2017084299 A1 WO 2017084299A1
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WIPO (PCT)
Prior art keywords
standby
power
diode
module
management microprocessor
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PCT/CN2016/084484
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English (en)
French (fr)
Inventor
李锦乐
秦建设
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深圳Tcl数字技术有限公司
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Publication of WO2017084299A1 publication Critical patent/WO2017084299A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/13—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using ferroresonant transformers as final control devices

Definitions

  • the present invention relates to the field of power supply technologies, and in particular, to a standby circuit and an electronic device.
  • one is an isolated auxiliary switching power supply. Although it can be insulated thermally and thermally, the voltage regulation precision is high, but the cost is high, and the efficiency is low in the case of a small load; the other is a capacitor.
  • the voltage division non-isolation scheme although low in cost, is generally only regulated by the voltage regulator tube, and the standby power supply is not controlled. When the input voltage is wide, the efficiency is not high, and the power consumption is large.
  • a primary object of the present invention is to provide a standby circuit and an electronic device aimed at reducing standby power consumption.
  • the present invention provides a standby circuit including a standby power module, a power management microprocessor, a control module, and a relay, wherein the power management microprocessor is connected to the standby power module and a relay, and the power supply is The management microprocessor is further connected to the standby power module via the control module, and the standby power module is further connected to the relay;
  • the standby power module generates a standby voltage according to an input voltage of the main power source, supplies power to the power management microprocessor during standby, and supplies power when the relay is pulled to activate the main power source after the relay is pulled in Working power supply
  • the power management microprocessor detects a standby voltage generated by the standby power module, and sends a corresponding level signal to the control module according to the detected standby voltage magnitude;
  • the control module controls, according to the level signal, a standby voltage generated by the standby power module to control a standby voltage generated by the standby power module within a preset range;
  • the standby circuit further includes an infrared receiver connected to the power management microprocessor and the standby power module, the infrared receiver is powered by the standby power module, and after receiving the infrared remote control signal, An infrared remote control signal is sent to the power management microprocessor.
  • the standby power module includes a first capacitor, a second capacitor, a first diode, and a second diode, one end of the second capacitor is connected to a main power line, and the other end of the second capacitor is Connected to the cathode of the first diode, the anode of the first diode is connected to the main power supply neutral, and the anode of the second diode is connected to the cathode of the first diode.
  • a cathode of the second diode is grounded via the first capacitor, and a cathode of the second diode is further connected to a power terminal and an input end of the power management microprocessor, the second diode A cathode is also coupled to the relay, and an anode of the second diode is further coupled to the control module.
  • control module includes a switch tube, a first end of the switch tube is grounded, a second end of the switch tube is connected to an anode of the second diode, and a control end of the switch tube is An output terminal of the power management microprocessor is connected, and the switch tube is configured to switch between an on state and an off state according to a level signal sent by the power management microprocessor.
  • the switch tube is an NMOS transistor
  • the first end of the switch tube is the source of the NMOS transistor
  • the second end is the drain of the NMOS transistor
  • the control end is the gate of the NMOS transistor
  • the value of the second capacitor is 0.33 uF.
  • the invention also provides a standby circuit, comprising a standby power module, a power management microprocessor, a control module and a relay, wherein the power management microprocessor is connected to the standby power module and the relay, and the power management microprocessor further Connected to the standby power module via the control module, the standby power module is further connected to the relay;
  • the standby power module generates a standby voltage according to an input voltage of the main power source, supplies power to the power management microprocessor during standby, and supplies power when the relay is pulled to activate the main power source after the relay is pulled in Working power supply
  • the power management microprocessor detects a standby voltage generated by the standby power module, and sends a level signal to the control module according to the detected standby voltage magnitude;
  • the control module controls a standby voltage level generated by the standby power module according to the level signal to control a standby voltage generated by the standby power module within a preset range.
  • the standby power module includes a first capacitor, a second capacitor, a first diode, and a second diode, one end of the second capacitor is connected to a main power line, and the other end of the second capacitor is Connected to the cathode of the first diode, the anode of the first diode is connected to the main power supply neutral, and the anode of the second diode is connected to the cathode of the first diode.
  • a cathode of the second diode is grounded via the first capacitor, and a cathode of the second diode is further connected to a power terminal and an input end of the power management microprocessor, the second diode A cathode is also coupled to the relay, and an anode of the second diode is further coupled to the control module.
  • control module includes a switch tube, a first end of the switch tube is grounded, a second end of the switch tube is connected to an anode of the second diode, and a control end of the switch tube is An output terminal of the power management microprocessor is connected, and the switch tube is configured to switch between an on state and an off state according to a level signal sent by the power management microprocessor.
  • the switch tube is an NMOS transistor
  • the first end of the switch tube is the source of the NMOS transistor
  • the second end is the drain of the NMOS transistor
  • the control end is the gate of the NMOS transistor
  • the value of the second capacitor is 0.33 uF.
  • the preset range is 4.8V to 5.2V.
  • the standby circuit further includes an infrared receiver connected to the power management microprocessor and the standby power module, the infrared receiver is powered by the standby power module, and after receiving the infrared remote control signal The infrared remote control signal is sent to the power management microprocessor.
  • the present invention further provides an electronic device including a standby circuit including a standby power module, a power management microprocessor, a control module, and a relay, the power management micro processing The device is connected to the standby power module and the relay, and the power management microprocessor is further connected to the standby power module via the control module, and the standby power module is further connected to the relay;
  • the standby power module generates a standby voltage according to an input voltage of the main power source, supplies power to the power management microprocessor during standby, and supplies power when the relay is pulled to activate the main power source after the relay is pulled in Working power supply
  • the power management microprocessor detects a standby voltage generated by the standby power module, and sends a corresponding level signal to the control module according to the detected standby voltage magnitude;
  • the control module controls a standby voltage level generated by the standby power module according to the level signal to control a standby voltage generated by the standby power module within a preset range.
  • the standby power module includes a first capacitor, a second capacitor, a first diode, and a second diode, one end of the second capacitor is connected to a main power line, and the other end of the second capacitor is Connected to the cathode of the first diode, the anode of the first diode is connected to the main power supply neutral, and the anode of the second diode is connected to the cathode of the first diode.
  • a cathode of the second diode is grounded via the first capacitor, and a cathode of the second diode is further connected to a power terminal and an input end of the power management microprocessor, the second diode A cathode is also coupled to the relay, and an anode of the second diode is further coupled to the control module.
  • control module includes a switch tube, a first end of the switch tube is grounded, a second end of the switch tube is connected to an anode of the second diode, and a control end of the switch tube is An output terminal of the power management microprocessor is connected, and the switch tube is configured to switch between an on state and an off state according to a level signal sent by the power management microprocessor.
  • the switch tube is an NMOS transistor
  • the first end of the switch tube is the source of the NMOS transistor
  • the second end is the drain of the NMOS transistor
  • the control end is the gate of the NMOS transistor
  • the value of the second capacitor is 0.33 uF.
  • the preset range is 4.8V to 5.2V. .
  • the standby circuit further includes an infrared receiver connected to the power management microprocessor and the standby power module, the infrared receiver is powered by the standby power module, and after receiving the infrared remote control signal The infrared remote control signal is sent to the power management microprocessor.
  • a standby circuit and an electronic device use a power management microprocessor to detect a standby voltage generated by a standby power module, and send a level signal to the control module according to the detected standby voltage magnitude, wherein the control module is
  • the standby voltage generated by the standby power module may be adjusted according to the level signal to stabilize the standby voltage generated by the standby power module within a preset range. Since it is not necessary to use a Zener diode to provide a stable standby voltage, it is only necessary to use a power management microprocessor to detect and control the standby voltage level, thereby ensuring the normal operation of the standby circuit without making the input voltage wider. The power consumption is large, which greatly reduces standby power consumption.
  • FIG. 1 is a block diagram showing the structure of a standby circuit according to a preferred embodiment of the present invention
  • FIG. 2 is a circuit diagram of a standby circuit in accordance with a preferred embodiment of the present invention.
  • FIG. 1 there is shown a block diagram of a standby circuit in accordance with a preferred embodiment of the present invention.
  • a preferred embodiment of the present invention provides a standby circuit including a standby power module 1, a power management microprocessor 2, a control module 3, and a relay 4, a power management microprocessor 2, and a standby power module 1, a relay 4
  • the connection, the power management microprocessor 2 is also connected to the standby power module 1 via the control module 3, and the standby power module 1 is also connected to the relay 4; the standby power module 1 generates a standby voltage according to the input voltage of the main power input, and supplies power during standby.
  • the microprocessor 2 is powered and supplies power when the relay 4 is pulled in to activate the main power source as the operating power source after the relay 4 is pulled in; the power management microprocessor 2 detects the standby voltage generated by the standby power module 1 and according to the detection.
  • the standby voltage level sends a level signal to the control module 3; the control module 3 controls the standby voltage generated by the standby power module 1 according to the level signal to stabilize the standby voltage generated by the standby power module 1 within a preset range. .
  • the power management microprocessor 2 detects the standby voltage generated by the standby power module 1 and sends a level signal to the control module 4 according to the detected standby voltage.
  • the control module 4 can adjust according to the level signal.
  • the standby voltage generated by the standby power module 1 is such that the standby voltage generated by the standby power module 1 is stabilized within a preset range. Since it is not necessary to use a Zener tube to regulate the voltage to provide a stable standby voltage, it is only necessary to use the power management microprocessor 2 to detect and control the standby voltage level, thereby ensuring the normal operation of the standby circuit without making the input voltage relatively The wide power consumption is large, which greatly reduces standby power consumption.
  • FIG. 2 is a circuit diagram of a standby circuit according to a preferred embodiment of the present invention.
  • the standby power module 1 includes a first capacitor C1, a second capacitor CX, a first diode D1, and a second diode D2. One end of the second capacitor CX is connected to the main power line L, and the other end of the second capacitor CX.
  • the cathode of the first diode D1 Connected to the cathode of the first diode D1, the anode of the first diode D1 is connected to the main power supply neutral line N, the anode of the second diode D2 is connected to the cathode of the first diode D1, and the second diode
  • the cathode of the tube D2 is grounded via the first capacitor C1, and the cathode of the second diode D2 is also connected to the power supply terminal of the power management microprocessor 2, that is, the first pin and the input terminal, that is, the second leg, and the second diode D2
  • the cathode is also connected to the relay 4, and the anode of the second diode D2 is also connected to the control module 3.
  • the control module 3 includes a switch tube, the first end of the switch tube is grounded, the second end of the switch tube is connected to the anode of the second diode D2, and the control end of the switch tube and the power management microprocessor
  • the output terminals of 2 are connected, and the switch tubes are used for switching between an on state and an off state according to a level signal transmitted by the power management microprocessor 2.
  • the switch tube may be an NPN type transistor, a PNP type transistor, an NMOS transistor, a PMOS transistor, or the like, which is not limited herein.
  • the switching transistor is NMOS transistor Q1
  • the source of the NMOS transistor Q1 is grounded
  • the drain of the NMOS transistor Q1 is connected to the anode of the second diode D2
  • the gate and power of the NMOS transistor Q1 are connected.
  • the output of the management microprocessor 2 is connected to the third leg.
  • the standby circuit of the embodiment further includes an infrared receiver GR1 connected to the power management microprocessor 2 and the standby power module 1, and the infrared receiver GR1 is powered by the standby power module 1, and after receiving the infrared remote control signal, The infrared remote control signal is sent to the power management microprocessor 2.
  • the standby circuit provided by the preferred embodiment of the present invention includes an AC power input socket P1, a standby power module 1, a power management microprocessor 2, a relay 4, that is, a relay K1, an infrared receiver GR1, and Transformer T1, the infrared receiver GR1 receives an externally input infrared remote control signal, and outputs a corresponding control signal to the power management microprocessor 2, the power management microprocessor 2 controls the relay K1 according to the control signal, and the relay K1 is operated by the standby
  • the power module 1 is time-divisionally powered with a set of windings of the T1 transformer of the main power source.
  • the power is supplied to the relay K1 through the winding of the transformer T1.
  • One end of the winding receives the ground of the power module 1 of the machine, and the other end is connected to the rectifier diode.
  • the voltage is filtered by the filter capacitor to supply power to the relay.
  • the power management microprocessor 2 the relay K1, the infrared receiver GR1, the winding of the transformer T1, and the like are connected to the main power supply ground (PGND) by the alternating current N line, that is, the main power supply neutral line N (GND).
  • PGND main power supply ground
  • N main power supply neutral line
  • AGND system ground
  • the 50 Hz alternating current flowing through the second capacitor CX through the alternating current power input socket P1 is rectified by the rectifying first diode D1 and the second diode D2 to obtain a direct current to charge the first capacitor C1 for filtering.
  • the relay K1 is mainly supplied by the first capacitor C1. After the relay K1 is pulled in, the working power is enabled, and the relay K1 current is supplied by the winding of the voltage regulator T1. After the power management microprocessor 2 is powered on, it receives the remote control signal through the infrared receiver GR1, and controls the pull-in and disconnection of the relay K1 after being amplified by the transistor Q.
  • the 6th pin of the power management microprocessor 2 outputs a low level, the transistor Q is turned off, and the relay K1 is in an off state.
  • the sixth pin of the power management microprocessor outputs a high level, and the relay K1 pulls in.
  • the energy required to pull the relay K1 by the storage capacitor C1 Provided. After the relay K1 is pulled in, the working power is enabled, and the power is supplied to the relay K1 through the transformer T1.
  • the infrared receiver GR1 receives the infrared signal and outputs the remote control signal from the IR pin to the fourth leg of the microprocessor, and the IR pin of the infrared receiver GR1 is connected to the second pin of the optocoupler UR1.
  • the remote control signal output by the infrared receiver GR1 is output to the central controller of the system at the secondary side through the optocoupler UR1, and a remote control signal is provided thereto.
  • the L terminal is positive, and when the N terminal is negative, the current is charged to the first capacitor C1 through the second capacitor CX and the second diode D2, and the first capacitor C1 is charged.
  • the voltage VC1 at both ends gradually rises, and when the VC1 reaches the operating voltage of the power management microprocessor 2, the power management microprocessor 2 starts operating.
  • the second pin of the power management microprocessor 2 starts to detect the voltage level of VC1. If the voltage value of VC1 reaches the set voltage value V1 such as 5.2V, the third pin of the power management microprocessor 2 outputs a high level, NMOS.
  • Transistor Q1 is turned on, so charging of the first capacitor C1 is stopped, and the voltage value of VC1 is no longer rising. Due to the presence of the load, the voltage across the first capacitor C1 gradually decreases. When the voltage value of the VC1 drops to the set voltage value V2, such as 4.8V, the third pin of the power management microprocessor 2 outputs a low level. The NMOS transistor Q1 is turned off, so that the first capacitor C1 is started to be charged again, and the voltage value of VC1 starts to rise again.
  • V2 set voltage value
  • the power management microprocessor 2 can control the charging and discharging of the first capacitor C1 by turning on and off the NMOS transistor Q1, thereby stabilizing the voltage value of the standby voltage VC1 between V1 and V2 to achieve voltage regulation. the goal of.
  • the current charges the second capacitor CX.
  • the first capacitor C1 has stopped charging, but the power management microprocessor 2 and the load continue to consume the energy in the first capacitor C1. Maintaining operation, the voltage on the first capacitor C1 is lowered.
  • an appropriate capacitor value can be selected for the first capacitor C1, so that the voltage on the first capacitor C1 is not reduced during the entire period in which the N terminal is positive and the L terminal is negative, and the power management micro can be maintained.
  • the normal operation of the processor 2 and the load can achieve the purpose of not consuming energy to make the standby circuit work normally.
  • the present invention also provides an electronic device, which includes the above-mentioned standby circuit, and its working principle is as described above, and details are not described herein again. Since it is not necessary to use a voltage regulator or the like to provide a stable standby voltage for an electronic device, it is only necessary to use a power management microprocessor to detect and control the standby voltage level, thereby ensuring the normal operation of the standby circuit without making an input. The power consumption is large when the voltage is wide, which greatly reduces the standby power consumption of the electronic device.
  • the technical solution of the present invention which is essential or contributes to the prior art, may be embodied in the form of a software product stored in a storage medium (such as ROM/RAM, disk,
  • a storage medium such as ROM/RAM, disk,
  • the optical disc includes a number of instructions for causing a terminal device (which may be a cell phone, a computer, a server, or a network device, etc.) to perform the methods described in various embodiments of the present invention.

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Abstract

一种待机电路和电子设备，该待机电路包括待机电源模块（1）、电源管理微处理器（2）、控制模块（3）和继电器（4），电源管理微处理器（2）与待机电源模块（1）、继电器（4）连接，电源管理微处理器（2）还经控制模块（3）与待机电源模块（1）连接，待机电源模块（1）还与继电器（4）连接；电源管理微处理器（2）检测待机电源模块（1）产生的待机电压大小，并根据待机电压大小发送电平信号至控制模块（3）；控制模块（3）根据电平信号控制待机电源模块（1）产生的待机电压大小，以将待机电压大小控制在预设范围内。该待机电路和电子设备无需利用稳压管等进行稳压来提供稳定的待机电压，只需利用电源管理微处理器检测、控制待机电压大小，既保证待机电路的正常工作，又不会使得输入电压较宽时的功耗较大，极大地降低了待机功耗。

Description

待机电路及电子设备
技术领域
本发明涉及电源技术领域，尤其涉及一种待机电路及电子设备。
背景技术
目前，随着人们对环保节能越来越重视，电子电器产品的待机功耗成为当前急待解决的能源浪费难题，如何降低待机功耗成为全球性的节能难题。
在现有的电源待机方案中，一种为采用隔离的辅助开关电源，虽然能冷热地隔离，稳压精度高，但成本较高，在小负载的情况下效率低；另一种为电容分压非隔离方案，虽然成本低，但由于一般只是利用稳压管来进行稳压，没有对待机电源进行管控，在输入电压较宽时其效率不高，功耗较大。
发明内容
本发明的主要目的在于提供一种待机电路及电子设备，旨在降低待机功耗。
为实现上述目的，本发明提供的一种待机电路，包括待机电源模块、电源管理微处理器、控制模块和继电器，所述电源管理微处理器与所述待机电源模块、继电器连接，所述电源管理微处理器还经所述控制模块与所述待机电源模块连接，所述待机电源模块还与所述继电器连接；
所述待机电源模块根据主电源的输入电压产生待机电压，在待机时给所述电源管理微处理器供电并且在所述继电器吸合时提供电源，以在所述继电器吸合后启用主电源作为工作电源；
所述电源管理微处理器检测所述待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送相应的电平信号至所述控制模块；
所述控制模块根据所述电平信号控制所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小控制在预设范围内；
所述待机电路还包括与所述电源管理微处理器、所述待机电源模块连接的红外接收器，所述红外接收器由所述待机电源模块供电，并在接收到红外遥控信号后将所述红外遥控信号发送至所述电源管理微处理器。
优选地，所述待机电源模块包括第一电容、第二电容、第一二极管和第二二极管，所述第二电容的一端与主电源火线连接，所述第二电容的另一端与所述第一二极管的阴极连接，所述第一二极管的阳极与主电源零线连接，所述第二二极管的阳极与所述第一二极管的阴极连接，所述第二二极管的阴极经所述第一电容接地，所述第二二极管的阴极还与所述电源管理微处理器的电源端及输入端连接，所述第二二极管的阴极还与所述继电器连接，所述第二二极管的阳极还与所述控制模块连接。
优选地，所述控制模块包括开关管，所述开关管的第一端接地，所述开关管的第二端与所述第二二极管的阳极连接，所述开关管的控制端与所述电源管理微处理器的输出端连接，所述开关管用于根据所述电源管理微处理器发送的电平信号进行导通状态和截止状态的切换。
优选地，所述开关管为NMOS晶体管，所述开关管的第一端为NMOS晶体管的源极，第二端为NMOS晶体管的漏极，控制端为NMOS晶体管的栅极。
优选地，所述第二电容的值为0.33uF。
本发明还提供一种待机电路，包括待机电源模块、电源管理微处理器、控制模块和继电器，所述电源管理微处理器与所述待机电源模块、继电器连接，所述电源管理微处理器还经所述控制模块与所述待机电源模块连接，所述待机电源模块还与所述继电器连接；
所述待机电源模块根据主电源的输入电压产生待机电压，在待机时给所述电源管理微处理器供电并且在所述继电器吸合时提供电源，以在所述继电器吸合后启用主电源作为工作电源；
所述电源管理微处理器检测所述待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送电平信号至所述控制模块；
所述控制模块根据所述电平信号控制所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小控制在预设范围内。
优选地，所述待机电源模块包括第一电容、第二电容、第一二极管和第二二极管，所述第二电容的一端与主电源火线连接，所述第二电容的另一端与所述第一二极管的阴极连接，所述第一二极管的阳极与主电源零线连接，所述第二二极管的阳极与所述第一二极管的阴极连接，所述第二二极管的阴极经所述第一电容接地，所述第二二极管的阴极还与所述电源管理微处理器的电源端及输入端连接，所述第二二极管的阴极还与所述继电器连接，所述第二二极管的阳极还与所述控制模块连接。
优选地，所述控制模块包括开关管，所述开关管的第一端接地，所述开关管的第二端与所述第二二极管的阳极连接，所述开关管的控制端与所述电源管理微处理器的输出端连接，所述开关管用于根据所述电源管理微处理器发送的电平信号进行导通状态和截止状态的切换。
优选地，所述开关管为NMOS晶体管，所述开关管的第一端为NMOS晶体管的源极，第二端为NMOS晶体管的漏极，控制端为NMOS晶体管的栅极。
优选地，所述第二电容的值为0.33uF。
优选地，所述预设范围为4.8V至5.2V。
优选地，所述待机电路还包括与所述电源管理微处理器、所述待机电源模块连接的红外接收器，所述红外接收器由所述待机电源模块供电，并在接收到红外遥控信号后将所述红外遥控信号发送至所述电源管理微处理器。
此外，为实现上述目的，本发明还提供一种电子设备，所述电子设备包括待机电路，所述待机电路包括待机电源模块、电源管理微处理器、控制模块和继电器，所述电源管理微处理器与所述待机电源模块、继电器连接，所述电源管理微处理器还经所述控制模块与所述待机电源模块连接，所述待机电源模块还与所述继电器连接；
所述待机电源模块根据主电源的输入电压产生待机电压，在待机时给所述电源管理微处理器供电并且在所述继电器吸合时提供电源，以在所述继电器吸合后启用主电源作为工作电源；
所述电源管理微处理器检测所述待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送相应的电平信号至所述控制模块；
所述控制模块根据所述电平信号控制所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小控制在预设范围内。
优选地，所述待机电源模块包括第一电容、第二电容、第一二极管和第二二极管，所述第二电容的一端与主电源火线连接，所述第二电容的另一端与所述第一二极管的阴极连接，所述第一二极管的阳极与主电源零线连接，所述第二二极管的阳极与所述第一二极管的阴极连接，所述第二二极管的阴极经所述第一电容接地，所述第二二极管的阴极还与所述电源管理微处理器的电源端及输入端连接，所述第二二极管的阴极还与所述继电器连接，所述第二二极管的阳极还与所述控制模块连接。
优选地，所述控制模块包括开关管，所述开关管的第一端接地，所述开关管的第二端与所述第二二极管的阳极连接，所述开关管的控制端与所述电源管理微处理器的输出端连接，所述开关管用于根据所述电源管理微处理器发送的电平信号进行导通状态和截止状态的切换。
优选地，所述开关管为NMOS晶体管，所述开关管的第一端为NMOS晶体管的源极，第二端为NMOS晶体管的漏极，控制端为NMOS晶体管的栅极。
优选地，所述第二电容的值为0.33uF。
优选地，所述预设范围为4.8V至5.2V。。
优选地，所述待机电路还包括与所述电源管理微处理器、所述待机电源模块连接的红外接收器，所述红外接收器由所述待机电源模块供电，并在接收到红外遥控信号后将所述红外遥控信号发送至所述电源管理微处理器。
本发明提出的一种待机电路及电子设备，利用电源管理微处理器检测待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送电平信号至所述控制模块，所述控制模块即可根据所述电平信号调节所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小稳定在预设范围内。由于无需利用稳压管等进行稳压来提供稳定的待机电压，只需利用电源管理微处理器来检测、控制待机电压大小，既能保证待机电路的正常工作，又不会使得输入电压较宽时的功耗较大，极大地降低了待机功耗。
附图说明
图1为本发明较佳实施例待机电路的结构框图；
图2为本发明较佳实施例待机电路的电路图。
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
参照图1，图1是本发明较佳实施例待机电路的结构框图。
本发明较佳实施例提出一种待机电路，所述待机电路包括待机电源模块1、电源管理微处理器2、控制模块3和继电器4，电源管理微处理器2与待机电源模块1、继电器4连接，电源管理微处理器2还经控制模块3与待机电源模块1连接，待机电源模块1还与继电器4连接；待机电源模块1根据主电源输入的输入电压产生待机电压，在待机时给电源管理微处理器2供电并且在继电器4吸合时提供电源，以在继电器4吸合后启用主电源作为工作电源；电源管理微处理器2检测待机电源模块1产生的待机电压大小，并根据检测的待机电压大小发送电平信号至控制模块3；控制模块3根据所述电平信号控制待机电源模块1产生的待机电压大小，以将待机电源模块1产生的待机电压大小稳定在预设范围内。
本实施例中利用电源管理微处理器2检测待机电源模块1产生的待机电压大小，并根据检测的待机电压大小发送电平信号至控制模块4，控制模块4即可根据所述电平信号调节待机电源模块1产生的待机电压大小，以将待机电源模块1产生的待机电压大小稳定在预设范围内。由于无需利用稳压管等进行稳压来提供稳定的待机电压，只需利用电源管理微处理器2来检测、控制待机电压大小，既能保证待机电路的正常工作，又不会使得输入电压较宽时的功耗较大，极大地降低了待机功耗。
具体地，参照图2，图2为本发明较佳实施例待机电路的电路图。
上述待机电源模块1包括第一电容C1、第二电容CX、第一二极管D1和第二二极管D2，第二电容CX的一端与主电源火线L连接，第二电容CX的另一端与第一二极管D1的阴极连接，第一二极管D1的阳极与主电源零线N连接，第二二极管D2的阳极与第一二极管D1的阴极连接，第二二极管D2的阴极经第一电容C1接地，第二二极管D2的阴极还与电源管理微处理器2的电源端即第1脚及输入端即第2脚连接，第二二极管D2的阴极还与继电器4连接，第二二极管D2的阳极还与控制模块3连接。
上述控制模块3包括开关管，所述开关管的第一端接地，所述开关管的第二端与第二二极管D2的阳极连接，所述开关管的控制端与电源管理微处理器2的输出端连接，所述开关管用于根据电源管理微处理器2发送的电平信号进行导通状态和截止状态的切换。其中，该开关管可以是NPN型三极管、PNP型三极管、NMOS晶体管、PMOS晶体管等，在此不作限定。本实施例中仅以该开关管为NMOS晶体管Q1进行具体说明，NMOS晶体管Q1的源极接地，NMOS晶体管Q1的漏极与第二二极管D2的阳极连接，NMOS晶体管Q1的栅极与电源管理微处理器2的输出端即第3脚连接。
进一步地，本实施例的待机电路还包括与电源管理微处理器2、待机电源模块1连接的红外接收器GR1，红外接收器GR1由待机电源模块1供电，并在接收到红外遥控信号后将所述红外遥控信号发送至电源管理微处理器2。
具体地，如图2所示，本发明较佳实施例提供的待机电路包括交流电电源输入插座P1、待机电源模块1、电源管理微处理器2、继电器4也即继电器K1、红外接收器GR1和变压器T1，该红外接收器GR1接收外部输入的红外遥控信号，并且输出相应的控制信号至电源管理微处理器2，该电源管理微处理器2根据控制信号控制继电器K1，该继电器K1由该待机电源模块1与主电源的T1变压器的一组绕组分时供电。继电器K1吸合后，交流电输出端(AC-out) 与交流电输入端(AC-in) 连通并向工作电源供电，工作电源启用后，通过变压器T1的绕组向继电器K1供电。该绕组的一端接待机电源模块1的地，另一端接整流二极管，经整流二极管整流后得到电压经滤波电容滤波后给继电器供电。
该待机电路中，电源管理微处理器2、继电器K1、红外接收器GR1、变压器T1的绕组等相关电路以交流电N线即主电源零线N共地(GND)，与主电源地(PGND)以及系统地(AGND即次级端的冷地)隔离。
通过该交流电电源输入插座P1流过第二电容CX的50Hz交流电电流经过起整流作用的第一二极管D1和第二二极管D2整流，取得直流电流向起滤波作用的第一电容C1充电。该继电器K1在吸合瞬间，其电流主要由第一电容C1提供。该继电器K1吸合后，工作电源启用，继电器K1电流由交压器T1的绕组提供。电源管理微处理器2上电后，通过红外接收器GR1接收遥控信号，经三极管Q放大后控制继电器K1的吸合与断开。
待机时，电源管理微处理器2第6脚输出低电平，三极管Q截止，继电器K1处于断开状态。当电源管理微处理器2接到开机信号，电源管理微处理器的第6脚输出高电平，继电器K1吸合。继电器K1吸合所需要的能量由储能电容Cl 提供。继电器K1吸合后，工作电源启用，通过变压器T1向继电器K1供电。
红外接收器GR1接收红外信号后从IR脚输出遥控信号到微处理器的第4脚，同时红外接收器GR1的IR脚接到光耦UR1的第2脚。在系统开机状态下，红外接收器GR1输出的遥控信号通过光耦UR1输出到次级端的系统中央控制器，并为其提供遥控信号。
本实施例中，在交流电电源输入插座P1上电后，L端为正，N端为负时，电流通过第二电容CX、第二二极管D2给第一电容C1充电，第一电容C1两端的电压VC1逐渐上升，当VC1达到电源管理微处理器2的工作电压后，电源管理微处理器2开始工作。电源管理微处理器2的第2脚开始检测VC1的电压大小，如果VC1的电压值达到设定电压值V1如5.2V时，则电源管理微处理器2的第3脚输出高电平，NMOS晶体管Q1导通，因此停止给第一电容C1充电，VC1的电压值不再上升。而由于负载的存在，第一电容C1两端的电压会逐渐下降，当VC1的电压值下降到设定电压值V2如4.8V时，则电源管理微处理器2的第3脚输出低电平，NMOS晶体管Q1截止，因此又开始给第一电容C1充电，VC1的电压值又开始上升。依此循环，则电源管理微处理器2能通过NMOS晶体管Q1的导通和截止来控制第一电容C1的充放电，从而将待机电压VC1的电压值稳定在V1与V2之间，达到稳压的目的。
而当N端为正，L端为负时，电流给第二电容CX充电，此时第一电容C1已停止充电，但电源管理微处理器2及负载继续消耗第一电容C1中的能量以维持工作，第一电容C1上的电压降低。本实施例中，可针对第一电容C1选择合适的电容值，以使得在N端为正、L端为负的整个周期内，第一电容C1上的电压降低不多，能维持电源管理微处理器2及负载的正常工作，则能达到不消耗能量使待机电路正常工作的目的。
本发明还提出一种电子设备，该电子设备包括上述待机电路，其工作原理如上所述，在此不再赘述。由于无需利用稳压管等进行稳压来为电子设备提供稳定的待机电压，只需利用电源管理微处理器来检测、控制待机电压大小，既能保证待机电路的正常工作，又不会使得输入电压较宽时的功耗较大，极大地降低了电子设备的待机功耗。
上述本发明实施例序号仅仅为了描述，不代表实施例的优劣。通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质（如ROM/RAM、磁碟、光盘）中，包括若干指令用以使得一台终端设备（可以是手机，计算机，服务器，或者网络设备等）执行本发明各个实施例所述的方法。
以上仅为本发明的优选实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (18)

  1. 一种待机电路，其特征在于，包括待机电源模块、电源管理微处理器、控制模块和继电器，所述电源管理微处理器与所述待机电源模块、继电器连接，所述电源管理微处理器还经所述控制模块与所述待机电源模块连接，所述待机电源模块还与所述继电器连接；
    所述待机电源模块根据主电源的输入电压产生待机电压，在待机时给所述电源管理微处理器供电并且在所述继电器吸合时提供电源，以在所述继电器吸合后启用主电源作为工作电源；
    所述电源管理微处理器检测所述待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送相应的电平信号至所述控制模块；
    所述控制模块根据所述电平信号控制所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小控制在预设范围内；
    所述待机电路还包括与所述电源管理微处理器、所述待机电源模块连接的红外接收器，所述红外接收器由所述待机电源模块供电，并在接收到红外遥控信号后将所述红外遥控信号发送至所述电源管理微处理器。
  2. 如权利要求1所述的待机电路，其特征在于，所述待机电源模块包括第一电容、第二电容、第一二极管和第二二极管，所述第二电容的一端与主电源火线连接，所述第二电容的另一端与所述第一二极管的阴极连接，所述第一二极管的阳极与主电源零线连接，所述第二二极管的阳极与所述第一二极管的阴极连接，所述第二二极管的阴极经所述第一电容接地，所述第二二极管的阴极还与所述电源管理微处理器的电源端及输入端连接，所述第二二极管的阴极还与所述继电器连接，所述第二二极管的阳极还与所述控制模块连接。
  3. 如权利要求2所述的待机电路，其特征在于，所述控制模块包括开关管，所述开关管的第一端接地，所述开关管的第二端与所述第二二极管的阳极连接，所述开关管的控制端与所述电源管理微处理器的输出端连接，所述开关管用于根据所述电源管理微处理器发送的电平信号进行导通状态和截止状态的切换。
  4. 如权利要求3所述的待机电路，其特征在于，所述开关管为NMOS晶体管，所述开关管的第一端为NMOS晶体管的源极，第二端为NMOS晶体管的漏极，控制端为NMOS晶体管的栅极。
  5. 如权利要求2所述的待机电路，其特征在于，所述第二电容的值为0.33uF。
  6. 一种待机电路，其特征在于，包括待机电源模块、电源管理微处理器、控制模块和继电器，所述电源管理微处理器与所述待机电源模块、继电器连接，所述电源管理微处理器还经所述控制模块与所述待机电源模块连接，所述待机电源模块还与所述继电器连接；
    所述待机电源模块根据主电源的输入电压产生待机电压，在待机时给所述电源管理微处理器供电并且在所述继电器吸合时提供电源，以在所述继电器吸合后启用主电源作为工作电源；
    所述电源管理微处理器检测所述待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送相应的电平信号至所述控制模块；
    所述控制模块根据所述电平信号控制所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小控制在预设范围内。
  7. 如权利要求6所述的待机电路，其特征在于，所述待机电源模块包括第一电容、第二电容、第一二极管和第二二极管，所述第二电容的一端与主电源火线连接，所述第二电容的另一端与所述第一二极管的阴极连接，所述第一二极管的阳极与主电源零线连接，所述第二二极管的阳极与所述第一二极管的阴极连接，所述第二二极管的阴极经所述第一电容接地，所述第二二极管的阴极还与所述电源管理微处理器的电源端及输入端连接，所述第二二极管的阴极还与所述继电器连接，所述第二二极管的阳极还与所述控制模块连接。
  8. 如权利要求7所述的待机电路，其特征在于，所述控制模块包括开关管，所述开关管的第一端接地，所述开关管的第二端与所述第二二极管的阳极连接，所述开关管的控制端与所述电源管理微处理器的输出端连接，所述开关管用于根据所述电源管理微处理器发送的电平信号进行导通状态和截止状态的切换。
  9. 如权利要求8所述的待机电路，其特征在于，所述开关管为NMOS晶体管，所述开关管的第一端为NMOS晶体管的源极，第二端为NMOS晶体管的漏极，控制端为NMOS晶体管的栅极。
  10. 如权利要求7所述的待机电路，其特征在于，所述第二电容的值为0.33uF。
  11. 如权利要求6所述的待机电路，其特征在于，所述预设范围为4.8V至5.2V。
  12. 一种电子设备，其特征在于，所述电子设备包括待机电路，所述待机电路包括待机电源模块、电源管理微处理器、控制模块和继电器，所述电源管理微处理器与所述待机电源模块、继电器连接，所述电源管理微处理器还经所述控制模块与所述待机电源模块连接，所述待机电源模块还与所述继电器连接；
    所述待机电源模块根据主电源的输入电压产生待机电压，在待机时给所述电源管理微处理器供电并且在所述继电器吸合时提供电源，以在所述继电器吸合后启用主电源作为工作电源；
    所述电源管理微处理器检测所述待机电源模块产生的待机电压大小，并根据检测的待机电压大小发送相应的电平信号至所述控制模块；
    所述控制模块根据所述电平信号控制所述待机电源模块产生的待机电压大小，以将所述待机电源模块产生的待机电压大小控制在预设范围内。
  13. 如权利要求12所述的电子设备，其特征在于，所述待机电源模块包括第一电容、第二电容、第一二极管和第二二极管，所述第二电容的一端与主电源火线连接，所述第二电容的另一端与所述第一二极管的阴极连接，所述第一二极管的阳极与主电源零线连接，所述第二二极管的阳极与所述第一二极管的阴极连接，所述第二二极管的阴极经所述第一电容接地，所述第二二极管的阴极还与所述电源管理微处理器的电源端及输入端连接，所述第二二极管的阴极还与所述继电器连接，所述第二二极管的阳极还与所述控制模块连接。
  14. 如权利要求13所述的电子设备，其特征在于，所述控制模块包括开关管，所述开关管的第一端接地，所述开关管的第二端与所述第二二极管的阳极连接，所述开关管的控制端与所述电源管理微处理器的输出端连接，所述开关管用于根据所述电源管理微处理器发送的电平信号进行导通状态和截止状态的切换。
  15. 如权利要求14所述的电子设备，其特征在于，所述开关管为NMOS晶体管，所述开关管的第一端为NMOS晶体管的源极，第二端为NMOS晶体管的漏极，控制端为NMOS晶体管的栅极。
  16. 如权利要求13所述的电子设备，其特征在于，所述第二电容的值为0.33uF。
  17. 如权利要求12所述的电子设备，其特征在于，所述预设范围为4.8V至5.2V。
  18. 如权利要求12所述的电子设备，其特征在于，所述待机电路还包括与所述电源管理微处理器、所述待机电源模块连接的红外接收器，所述红外接收器由所述待机电源模块供电，并在接收到红外遥控信号后将所述红外遥控信号发送至所述电源管理微处理器。
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